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path: root/opcodes/arm-dis.c
AgeCommit message (Expand)AuthorFilesLines
2020-01-01Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2019-12-24ubsan: arm: shift exponent 32 is too large for 32-bit type 'unsigned int'Alan Modra1-3/+3
2019-12-18More signed overflow fixesAlan Modra1-3/+3
2019-11-22Arm: Change CRC from fpu feature to archititectural extensionMihail Ionescu1-12/+12
2019-11-12[binutils][arm] Update the decoding of MVE VMOV, VMVNMihail Ionescu1-6/+11
2019-11-07[Patch][binutils][arm] Armv8.6-A Matrix Multiply extension [9/10]Matthew Malcomson1-0/+14
2019-11-07[binutils][arm] BFloat16 enablement [4/X]Matthew Malcomson1-5/+30
2019-11-07[Patch][binutils][arm] Create a new generic coprocessor array [3/10]Matthew Malcomson1-51/+86
2019-08-27Add support for the MVE VMOV instruction to the ARM assembler. This instruct...Srinath Parvathaneni1-0/+23
2019-08-12Modify the ARM encoding and decoding of SQRSHRL and UQRSHLL MVE instructions.Srinath Parvathaneni1-4/+10
2019-08-05Removes support in the ARM assembler for the unsigned variants of the VQ(R)DM...Barnaby Wilks1-4/+4
2019-07-22This patch addresses the change in the June Armv8.1-M Mainline specification,...Barnaby Wilks1-4/+0
2019-07-10arm-dis.c (print_insn_coprocessor): Rename index to index_operand.Hans-Peter Nilsson1-5/+5
2019-06-04Remove an unnecessary set of parentheses in the arm-dis.c source file.Alan Hayward1-1/+1
2019-05-21[binutils, ARM] <spec_reg> changes for VMRS and VMSR instructionsSudakshina Das1-2/+22
2019-05-21[binutils, Arm] Add support for conditional instructions in Armv8.1-M MainlineSudakshina Das1-0/+89
2019-05-21[binutils, Arm] Add support for shift instructions in MVESudakshina Das1-0/+183
2019-05-16[PATCH 56/57][Arm][OBJDUMP] Add support for MVE instructions: vpnot, vpsel, v...Andre Vieira1-0/+142
2019-05-16[PATCH 55/57][Arm][OBJDUMP] Add support for MVE instructions: vmul, vmulh, vr...Andre Vieira1-0/+73
2019-05-16[PATCH 54/57][Arm][OBJDUMP] Add support for MVE instructions: vmax(a), vmax(a...Andre Vieira1-0/+154
2019-05-16[PATCH 53/57][Arm][OBJDUMP] Add support for MVE instructions: vand, vbrsr, vc...Andre Vieira1-0/+66
2019-05-16[PATCH 52/57][Arm][OBJDUMP] Add support for MVE instructions: vadc, vabav, va...Andre Vieira1-0/+143
2019-05-16[PATCH 51/57][Arm][OBJDUMP] Add support for MVE instructions: lctp, letp, wls...Andre Vieira1-3/+18
2019-05-16[PATCH 50/57][Arm][OBJDUMP] Add support for MVE shift instructionsAndre Vieira1-2/+409
2019-05-16[PATCH 49/57][Arm][OBJDUMP] Add support for MVE complex number instructionsAndre Vieira1-0/+142
2019-05-16[PATCH 48/57][Arm][OBJDUMP] Add support for MVE instructions: vddup, vdwdup, ...Andre Vieira1-1/+87
2019-05-16[PATCH 47/57][Arm][OBJDUMP] Add support for MVE instructions: vaddv, vmlaldav...Andre Vieira1-0/+286
2019-05-16[PATCH 46/57][Arm][OBJDUMP] Add support for MVE instructions: vmovl, vmull, v...Andre Vieira1-0/+196
2019-05-16[PATCH 45/57][Arm][OBJDUMP] Add support for MVE instructions: vmov, vmvn, vor...Andre Vieira1-5/+604
2019-05-16[PATCH 44/57][Arm][OBJDUMP] Add support for MVE instructions: vcvt and vrintAndre Vieira1-2/+367
2019-05-16[PATCH 43/57][Arm][OBJDUMP] Add support for MVE instructions: scatter stores ...Andre Vieira1-1/+355
2019-05-16[PATCH 42/57][Arm][OBJDUMP] Add support for MVE instructions: vldr[bhw] and v...Andre Vieira1-0/+263
2019-05-16[PATCH 41/57][Arm][OBJDUMP] Add support for MVE instructions: vld[24] and vst...Andre Vieira1-0/+178
2019-05-16[PATCH 40/57][Arm][OBJDUMP] Add support for MVE instructions: vdup, veor, vfm...Andre Vieira1-14/+204
2019-05-16[PATCH 39/57][Arm][OBJDUMP] Add support for MVE instructions: vpt, vpst and vcmpAndre Vieira1-12/+614
2019-05-16[PATCH 38/57][Arm][OBJDUMP] Disable the use of MVE reserved coproc numbers in...Andre Vieira1-0/+7
2019-05-16[PATCH 37/57][Arm][OBJDUMP] Add framework for MVE instructionsAndre Vieira1-4/+258
2019-04-15[binutils, ARM, 16/16] Add support to VLDR and VSTR of system registersAndre Vieira1-1/+51
2019-04-15[binutils, ARM, 15/16] Add support for VSCCLRMAndre Vieira1-0/+32
2019-04-15[opcodes, ARM, 14/16] Add mode availability to coprocessor table entriesAndre Vieira1-413/+434
2019-04-15[binutils, ARM, 13/16] Add support for CLRMAndre Vieira1-2/+15
2019-04-15[binutils, ARM, 12/16] Scalar Low Overhead loop instructions for Armv8.1-M Ma...Andre Vieira1-0/+37
2019-04-15[binutils, ARM, 11/16] New BFCSEL instruction for Armv8.1-M MainlineAndre Vieira1-0/+8
2019-04-15[binutils, ARM, 10/16] BFCSEL infrastructure with new global reloc R_ARM_THM_...Andre Vieira1-0/+18
2019-04-15[binutils, ARM, 9/16] New BFL instruction for Armv8.1-M MainlineAndre Vieira1-0/+2
2019-04-15[binutils, ARM, 8/16] BFL infrastructure with new global reloc R_ARM_THM_BF18Andre Vieira1-0/+18
2019-04-15[binutils, ARM, 7/16] New BFX and BFLX instruction for Armv8.1-M MainlineAndre Vieira1-0/+9
2019-04-15[binutils, ARM, 6/16] New BF instruction for Armv8.1-M MainlineAndre Vieira1-0/+5
2019-04-15[binutils, ARM, 5/16] BF insns infrastructure with new global reloc R_ARM_THM...Andre Vieira1-0/+18
2019-04-15[binutils, ARM, 3/16] BF insns infrastructure with new bfd_reloc_code_real fo...Andre Vieira1-0/+8
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