aboutsummaryrefslogtreecommitdiff
path: root/opcodes/arm-dis.c
AgeCommit message (Expand)AuthorFilesLines
2017-07-04[Patch ARM] Support MVFR2 VFP Coprocessor register for ARMv8-ARamana Radhakrishnan1-0/+4
2017-06-28[ARM] Assembler and disassembler support Dot Product ExtensionJiong Wang1-0/+6
2017-06-14Don't use print_insn_XXX in GDBYao Qi1-1/+1
2017-06-14[opcodes][arm] Remove bogus entry added by accident in former patchAndre Vieira1-2/+0
2017-05-02Fix value in comment of disassembled ARM type A opcodes.Bernd Edlinger1-2/+2
2017-04-05-Wwrite-strings: Constify struct disassemble_info's disassembler_options fieldPedro Alves1-2/+2
2017-02-28GDB: Add support for the new set/show disassembler-options commands.Peter Bergner1-95/+74
2017-01-18[ARM] Fix the decoding of indexed element VCMLA instructionSzabolcs Nagy1-4/+4
2017-01-02Update year range in copyright notice of all files.Alan Modra1-1/+1
2016-12-16Fix compile time warning building arm-dis.cNick Clifton1-2/+2
2016-12-05[ARM] Add ARMv8.3 VCMLA and VCADD instructionsSzabolcs Nagy1-0/+28
2016-12-05[ARM] Add ARMv8.3 VJCVT instructionSzabolcs Nagy1-0/+4
2016-10-06-Wimplicit-fallthrough warning fixesAlan Modra1-0/+1
2016-08-26Add missing ARMv8-M special registersThomas Preud'homme1-14/+23
2016-06-30Fix typo in commentYao Qi1-1/+1
2016-06-07[ARM] Add command line option for RAS extension.Matthew Wahab1-2/+2
2016-05-10Use getters/setters to access ARM branch typeThomas Preud'homme1-4/+5
2016-05-10Add support for ARMv8-M security extensions instructionsThomas Preud'homme1-1/+18
2016-04-05[ARM] Add ARMv8.2 FP16 vmul/vmla/vmls (by scalar)Jiong Wang1-6/+18
2016-03-16[ARM] Support ARMv8.2 FP16 simd instructionsJiong Wang1-23/+81
2016-02-24[OPCODES][ARM][1/3]Add armv8.2 fp16 instruction dissembler support.Renlin Li1-4/+87
2016-02-24[OPCODES][ARM]Fix mask for a few coprocessor opcodes.Renlin Li1-8/+8
2016-02-24[OPCODE][ARM]Correct disassembler for cdp/cdp2, mcr/mcr2, mrc/mrc2, ldc/ldc2,...Renlin Li1-0/+23
2016-01-25[PATCH[ARM]Check mapping symbol while backward searching for IT block.Renlin Li1-3/+78
2016-01-12[ARM] Support ARMv8.2 RAS extension.Matthew Wahab1-0/+8
2016-01-01Copyright update for binutilsAlan Modra1-1/+1
2015-12-24Add assembler support for ARMv8-M BaselineThomas Preud'homme1-13/+15
2015-12-24Add assembler support for ARMv8-M MainlineThomas Preud'homme1-12/+18
2015-12-02Fix ldah being disassembled as ldaexhAndre Vieira1-1/+1
2015-11-23opcodes: handle mach-o for thumb/arm disambiguation.Tristan Gingold1-0/+8
2015-08-13Fixes for unpredictable nops and 26-bit versions of teq,tst,cmn,cmp.Andre Vieira1-3/+11
2015-08-12Remove trailing spaces in opcodesH.J. Lu1-57/+57
2015-07-16Updates the ARM disassembler's output of floating point constants to include ...Alessandro Marzocchi1-2/+33
2015-06-16Fixes a compile time warnng about left shifting a negative value.Szabolcs Nagy1-1/+1
2015-06-02[ARM] Support for ARMv8.1 Adv.SIMD extensionMatthew Wahab1-0/+19
2015-06-02[ARM] Add support for ARMv8.1 PAN extensionMatthew Wahab1-0/+5
2015-06-02[ARM] Rework CPU feature selection in the disassemblerMatthew Wahab1-29/+26
2015-04-15[ARM] Disassembles SSAT and SSAT16 instructions incorrectly for Thumb-2Renlin Li1-2/+8
2015-03-24Extend arm_feature_set struct to provide more bitsTerry Guo1-1294/+2530
2015-03-03[ARM] Skip private symbol when doing objdumpJiong Wang1-2/+5
2015-01-02ChangeLog rotatation and copyright year updateAlan Modra1-1/+1
2014-08-22ARM/opcodes: Fix negative hexadecimal offset disassemblyMaciej W. Rozycki1-0/+2
2014-03-05Update copyright yearsAlan Modra1-1/+1
2013-10-15Fix neon vshll disassembly.Ramana Radhakrishnan1-3/+3
2013-09-04 PR gas/15914Nick Clifton1-3/+16
2013-03-11Add support for AArch32 CRC instruction in ARMv8.Kyrylo Tkachov1-1/+21
2013-02-112013-02-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>Richard Earnshaw1-2/+2
2012-10-112012-10-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>Richard Earnshaw1-5/+5
2012-09-182012-09-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>Richard Earnshaw1-28/+28
2012-08-24 * gas/config/tc-arm.c (ARM_ENC_TAB): Add sha1h and sha2op entries.Matthew Gretton-Dann1-0/+3