riscv-gnu-toolchain/gdb.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2023-09-25	Revert "arc: Add new opcode functions for ARCv3 ISA."	Claudiu Zissulescu	1	-7/+1
2023-09-25	arc: Add new opcode functions for ARCv3 ISA.	Claudiu Zissulescu	1	-1/+7
2023-01-01	Update year range in copyright notice of binutils files	Alan Modra	1	-1/+1
2022-11-22	opcodes: Correct address for ARC's "isa_config" aux reg	Shahab Vahedi	1	-1/+2
2022-01-02	Update year range in copyright notice of binutils files	Alan Modra	1	-1/+1
2021-08-17	opcodes: Fix the auxiliary register numbers for ARC HS	Shahab Vahedi	1	-2/+2
2021-01-01	Update year range in copyright notice of binutils files	Alan Modra	1	-1/+1
2020-02-25	[ARC][committed] Update int_vector_base aux register.	Claudiu Zissulescu	1	-2/+1
2020-01-01	Update year range in copyright notice of binutils files	Alan Modra	1	-1/+1
2019-01-01	Update year range in copyright notice of binutils files	Alan Modra	1	-1/+1
2018-08-06	[ARC] Update handling AUX-registers.	claziss	1	-376/+375
2018-01-03	Update year range in copyright notice of binutils files	Alan Modra	1	-1/+1
2017-07-19	[ARC] Add SecureShield AUX registers	claziss	1	-0/+9
2017-07-19	[ARC] Add JLI support.	John Eric Martin	1	-1/+1
2017-02-15	Distinguish some of the registers different on ARC700 and HS38 cpus	Vineet Gupta	1	-12/+36
2017-01-02	Update year range in copyright notice of all files.	Alan Modra	1	-1/+1
2016-04-12	Add support for .extCondCode, .extCoreRegister and .extAuxRegister.	Claudiu Zissulescu	1	-363/+362
2016-04-05	[ARC] Fix support for double assist instructions.	Claudiu Zissulescu	1	-359/+363
2016-03-30	[ARC] Cleanup AUX register names.	Claudiu Zissulescu	1	-27/+4
2016-01-01	Copyright update for binutils	Alan Modra	1	-1/+1
2015-10-07	New ARC implementation.	Nick Clifton	1	-0/+403