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2024-02-19aarch64: Add support for the id_aa64isar3_el1 system registerYury Khrustalev1-0/+1
Hi, [PATCH][Binutils] aarch64: Add support for the id_aa64isar3_el1 system register AArch64 defines a read-only system register called id_aa64isar3_el1. This patch also adds relevant tests. Regression tested on the aarch64-none-elf and aarch64-none-linux-gnu targets and no regressions was found. Is this Ok for trunk? I do not have commit rights, if OK, can someone commit on my behalf? Thanks, Yury Khrustalev From e42c835e8f2ee81150f498675f2faf108bbe79f8 Mon Sep 17 00:00:00 2001 From: Yury Khrustalev <yury.khrustalev@arm.com> Date: Tue, 6 Feb 2024 11:05:39 +0000 Subject: [PATCH] [PATCH][Binutils] aarch64: Add support for the id_aa64isar3_el1 system register AArch64 defines a read-only system register called id_aa64isar3_el1. This patch also adds relevant tests. Regression tested on the aarch64-none-elf and aarch64-none-linux-gnu targets and no regressions was found.
2024-01-10gas: aarch64: Add system registers for Debug and PMU extensionsSaurabh Jha1-0/+41
This patch adds support for the new AArch64 system registers that are part of the following extensions: * FEAT_DEBUGv8p9 * FEAT_PMUv3p9 * FEAT_PMUv3_SS * FEAT_PMUv3_ICNTR * FEAT_SEBEP
2024-01-08aarch64: Add ite feature system registers.srinath1-0/+4
This patch adds ite feature (FEAT_ITE) system registers, trcitecr_el1, trcitecr_el12, trcitecr_el2 and trciteedcr.
2024-01-04Update year range in copyright notice of binutils filesAlan Modra1-1/+1
Adds two new external authors to etc/update-copyright.py to cover bfd/ax_tls.m4, and adds gprofng to dirs handled automatically, then updates copyright messages as follows: 1) Update cgen/utils.scm emitted copyrights. 2) Run "etc/update-copyright.py --this-year" with an extra external author I haven't committed, 'Kalray SA.', to cover gas testsuite files (which should have their copyright message removed). 3) Build with --enable-maintainer-mode --enable-cgen-maint=yes. 4) Check out */po/*.pot which we don't update frequently.
2023-11-16aarch64: Add support for VMSA feature enhancements.Srinath Parvathaneni1-0/+25
This patch adds the permission model enhancement and memory attribute index enhancement features and their corresponding system registers in AArch64 assembler. Permission Indirection Extension (FEAT_S1PIE, FEAT_S2PIE) Permission Overlay Extension (FEAT_S1POE, FEAT_S2POE) Memory Attribute Index Enhancement (FEAT_AIE) Extension to Translation Control Registers (FEAT_TCR2) These features are available by default from Armv9.4-A architecture.
2023-11-16aarch64: Add support to new features in RAS extension.Srinath Parvathaneni1-0/+14
This patch also adds support for: 1. FEAT_RASv2 feature and "ERXGSR_EL1" system register. RASv2 feature is enabled by passing +rasv2 to -march (eg: -march=armv8-a+rasv2). 2. FEAT_SCTLR2 and following system registers. SCTLR2_EL1, SCTLR2_EL12, SCTLR2_EL2 and SCTLR2_EL3. 3. FEAT_FGT2 and following system registers. HDFGRTR2_EL2, HDFGWTR2_EL2, HFGRTR2_EL2, HFGWTR2_EL2 4. FEAT_PFAR and following system registers. PFAR_EL1, PFAR_EL2 and PFAR_EL12. FEAT_RASv2, FEAT_SCTLR2, FEAT_FGT2 and FEAT_PFAR features are by default enabled from Armv9.4-A architecture. This patch also adds support for two read only system registers id_aa64mmfr3_el1 and id_aa64mmfr4_el1, which are available from Armv8-A Architecture.
2023-11-16aarch64: Add features to the Statistical Profiling Extension.Srinath Parvathaneni1-0/+1
This patch adds features to the Statistical Profiling Extension, identified as FEAT_SPEv1p4, FEAT_SPE_FDS, and FEAT_SPE_CRR, which are enabled by default from Armv9.4-A. Also adds support for system register "pmsdsfr_el1".
2023-11-07aarch64: Add 128-bit system register flagsVictor Do Nascimento1-10/+10
In preparation for the implementation of 128-bit system register support across the toolchain, this patch adds the feature flag F_REG_128 and adds it to relevant system registers in `aarch64-sys-regs.def'. Given the shared nature of this file, this change is made necessary initially to implement argument validation in the `__arm_rsr128' and `__armwsr128' ACLE intrinsics in GCC, but will be of subsequent use in the binutils implementation of the corresponding `mrrs' and `msrr' instructions. Regression tested on aarch64-linux-gnu, no regressions. opcodes/ChangeLog: * aarch64-opc.h (F_REG_128): New flag. * aarch64-sys-regs.def (par_el1): Add F_REG_128 flag. (rcwmask_el1): Likewise. (rcwsmask_el1): Likewise. (ttbr0_el1): Likewise. (ttbr0_el12): Likewise. (ttbr0_el2): Likewise. (ttbr1_el1): Likewise. (ttbr1_el12): Likewise. (ttbr1_el2): Likewise. (vttbr_el2): Likewise.
2023-11-07aarch64: Add THE system register supportVictor Do Nascimento1-0/+2
Add Binutils support for system registers associated with the Translation Hardening Extension (THE). In doing so, we also add core feature support for THE, enabling its associated feature flag and implementing the necessary feature-checking machinery. Regression tested on aarch64-linux-gnu, no regressions. gas/ChangeLog: * config/tc-aarch64.c (aarch64_features): Add "+the" feature modifier. * doc/c-aarch64.texi (AArch64 Extensions): Update documentation for `the' option. * testsuite/gas/aarch64/sysreg-8.s: Add tests for `the' associated system registers. * testsuite/gas/aarch64/sysreg-8.d: Likewise. include/ChangeLog: * opcode/aarch64.h (enum aarch64_feature_bit): Add AARCH64_FEATURE_THE. opcode/ChangeLog: * aarch64-opc.c (aarch64_sys_ins_reg_supported_p): Add `the' system register check support. * aarch64-sys-regs.def: Add `rcwmask_el1' and `rcwsmask_el1' * aarch64-tbl.h: Define `THE' preprocessor macro.
2023-11-02aarch64: Add GCS system registers.Srinath Parvathaneni1-0/+10
This patch adds support for 10 new AArch64 system registers (gcscre0_el1, gcscr_el1, gcscr_el12, gcscr_el2, gcscr_el3, gcspr_el0, gcspr_el1 ,gcspr_el12, gcspr_el2 and gcspr_el3), which are enabled on using Guarded Control Stack (+gcs flag) feature.
2023-10-30aarch64: Update aarch64-sys-regs.def headerVictor Do Nascimento1-0/+4
Given the shared use of the aarch64-sys-regs.def file across Binutils and GCC, add instructions for keeping the file synchronized across the two codebases. Namely, it should be made clear that all changes are first to be made in Binutils and the updated file copied across to GCC. opcodes/ChangeLog * opcodes/aarch64-sys-regs.def: Update file-description header comment.
2023-10-04aarch64: Refactor system register dataVictor Do Nascimento1-0/+1060
This patch moves instances of system register definitions, represented by the SYSREG macro, out of their original place in `aarch64-opc.c' and into a dedicated .def file, `aarch64-sys-regs.def'. System register entries in this new file are ordered alphabetically by name. This choice is made to enable the use of fast search algorithms such as binary search when validating register names. The SYSREG macro, defined as SYSREG (name, encoding, flags, features) is kept as is and used in the def file, but all other SR_* macros which previously served as indirections to SYSREG are removed. opcodes/ChangeLog: * aarch64-opc.c (SR_CORE): Macro definition and uses deleted. (SR_FEAT): Likewise. (SR_FEAT2): Likewise. (SR_V8_1_A): Likewise. (SR_V8_4_A): Likewise. (SR_V8A): Likewise. (SR_V8R): Likewise. (SR_V8_1A): Likewise. (SR_V8_2A): Likewise. (SR_V8_3A): Likewise. (SR_V8_4A): Likewise. (SR_V8_6A): Likewise. (SR_V8_7A): Likewise. (SR_V8_8A): Likewise. (SR_GIC): Likewise. (SR_AMU): Likewise. (SR_LOR): Likewise. (SR_PAN): Likewise. (SR_RAS): Likewise. (SR_RNG): Likewise. (SR_SME): Likewise. (SR_SSBS): Likewise. (SR_SVE): Likewise. (SR_ID_PFR2): Likewise. (SR_PROFILE): Likewise. (SR_MEMTAG): Likewise. (SR_SCXTNUM): Likewise. (SR_EXPAND_ELx): Likewise. (SR_EXPAND_EL12): Likewise. * opcodes/aarch64-sys-regs.def: New.
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