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path: root/opcodes/aarch64-dis.h
AgeCommit message (Expand)AuthorFilesLines
2024-01-15aarch64: rcpc3: Define address operand fields and inserter/extractorsVictor Do Nascimento1-0/+3
2024-01-15aarch64: Add SVE2.1 Contiguous load/store instructions.Srinath Parvathaneni1-0/+1
2024-01-15aarch64: Add SVE2.1 dupq, eorqv and extq instructions.Srinath Parvathaneni1-0/+1
2024-01-15aarch64: Add support for FEAT_SME2p1 instructions.Srinath Parvathaneni1-0/+2
2024-01-04Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2023-03-30aarch64: Add the SME2 shift instructionsRichard Sandiford1-0/+1
2023-03-30aarch64: Add the SME2 predicate-related instructionsRichard Sandiford1-0/+1
2023-03-30aarch64: Add the SME2 multivector LD1 and ST1 instructionsRichard Sandiford1-0/+1
2023-03-30aarch64: Add the SME2 MOVA instructionsRichard Sandiford1-0/+2
2023-01-01Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2022-01-02Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2021-12-02aarch64: Add support for +mopsRichard Sandiford1-0/+1
2021-11-17aarch64: [SME] SVE2 instructions added to support SMEPrzemyslaw Wirkus1-0/+1
2021-11-17aarch64: [SME] Add SME mode selection and state access instructionsPrzemyslaw Wirkus1-0/+1
2021-11-17aarch64: [SME] Add LD1x, ST1x, LDR and STR instructionsPrzemyslaw Wirkus1-0/+3
2021-11-17aarch64: [SME] Add MOV and MOVA instructionsPrzemyslaw Wirkus1-0/+1
2021-03-31Use bool in opcodesAlan Modra1-4/+4
2021-03-31Remove bfd_stdint.hAlan Modra1-1/+1
2021-01-01Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2020-10-28aarch64: Add DSB instruction Armv8.7-a variantPrzemyslaw Wirkus1-0/+1
2020-04-20[AArch64, Binutils] Add missing TSB instructionSudakshina Das1-0/+1
2020-01-01Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2019-01-25AArch64: Remove ldgv and stgv instructions from Armv8.5-A Memory Tagging Exte...Sudi Das1-1/+0
2019-01-01Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2018-11-12[BINUTILS, AARCH64, 6/8] Add Tag getting instruction in Memory Tagging ExtensionSudakshina Das1-0/+1
2018-05-15Modify AArch64 Assembly and disassembly functions to be able to fail and repo...Tamar Christina1-4/+7
2018-01-03Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2017-11-09Adds the new Fields and Operand types for the new instructions in Armv8.4-a.Tamar Christina1-0/+1
2017-02-24[AArch64] Additional SVE instructionsRichard Sandiford1-1/+4
2017-01-02Update year range in copyright notice of all files.Alan Modra1-1/+1
2016-11-18[AArch64] Add ARMv8.3 FCMLA and FCADD instructionsSzabolcs Nagy1-0/+1
2016-11-18[AArch64] Add ARMv8.3 combined pointer authentication load instructionsSzabolcs Nagy1-0/+1
2016-09-21[AArch64][SVE 28/32] Add SVE FP immediate operandsRichard Sandiford1-0/+3
2016-09-21[AArch64][SVE 27/32] Add SVE integer immediate operandsRichard Sandiford1-0/+6
2016-09-21[AArch64][SVE 26/32] Add SVE MUL VL addressing modesRichard Sandiford1-0/+3
2016-09-21[AArch64][SVE 25/32] Add support for SVE addressing modesRichard Sandiford1-0/+7
2016-09-21[AArch64][SVE 24/32] Add AARCH64_OPND_SVE_PATTERN_SCALEDRichard Sandiford1-0/+1
2016-09-21[AArch64][SVE 21/32] Add Zn and Pn registersRichard Sandiford1-0/+2
2016-09-21[AArch64][SVE 16/32] Use specific insert/extract methods for fpimmRichard Sandiford1-0/+1
2016-01-01Copyright update for binutilsAlan Modra1-1/+1
2015-12-11[AArch64][Patch 4/5] Support HINT aliases taking operands.Matthew Wahab1-0/+1
2015-01-02ChangeLog rotatation and copyright year updateAlan Modra1-1/+1
2014-09-03[PATCH/AArch64] Implement LSE featureJiong Wang1-0/+1
2014-03-05Update copyright yearsAlan Modra1-1/+1
2012-08-13Add support for 64-bit ARM architecture: AArch64Nick Clifton1-0/+94
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