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path: root/opcodes/aarch64-asm.c
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2023-01-01Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2022-10-17Allow explicit size specifier for predicate operand of {sq, uq, }{incp, decp}CaiJingtao1-1/+2
2022-01-02Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2021-12-02aarch64: Add support for +mopsRichard Sandiford1-0/+13
2021-11-25Fix building the AArch64 assembler and disassembler when assertions are disab...Nick Clifton1-13/+13
2021-11-17aarch64: [SME] SVE2 instructions added to support SMEPrzemyslaw Wirkus1-0/+67
2021-11-17aarch64: [SME] Add SME mode selection and state access instructionsPrzemyslaw Wirkus1-0/+25
2021-11-17aarch64: [SME] Add LD1x, ST1x, LDR and STR instructionsPrzemyslaw Wirkus1-0/+47
2021-11-17aarch64: [SME] Add MOV and MOVA instructionsPrzemyslaw Wirkus1-0/+55
2021-04-19arm64: add two initializersJan Beulich1-2/+2
2021-03-31Use bool in opcodesAlan Modra1-128/+128
2021-01-08Fix places in the AArch64 opcodes library code where a call to assert() has s...Nick Clifton1-6/+7
2021-01-01Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2020-10-28aarch64: Add DSB instruction Armv8.7-a variantPrzemyslaw Wirkus1-0/+15
2020-04-20[AArch64, Binutils] Add missing TSB instructionSudakshina Das1-0/+11
2020-02-26Indent labelsAlan Modra1-2/+2
2020-01-01Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2019-11-07[binutils][aarch64] Bfloat16 enablement [2/X]Matthew Malcomson1-0/+1
2019-07-01[gas][aarch64][SVE2] Fix pmull{t,b} requirement on SVE2-AESMatthew Malcomson1-2/+2
2019-05-09[binutils][aarch64] New sve_size_tsz_bhs iclass.Matthew Malcomson1-0/+6
2019-05-09[binutils][aarch64] New sve_shift_tsz_bhsd iclass.Matthew Malcomson1-0/+1
2019-05-09[binutils][aarch64] New SVE_SHRIMM_UNPRED_22 operand.Matthew Malcomson1-2/+4
2019-05-09[binutils][aarch64] New sve_size_013 iclass.Matthew Malcomson1-0/+8
2019-05-09[binutils][aarch64] New sve_size_bh iclass.Matthew Malcomson1-0/+1
2019-05-09[binutils][aarch64] New sve_size_sd2 iclass.Matthew Malcomson1-0/+4
2019-05-09[binutils][aarch64] New iclass sve_size_hsd2.Matthew Malcomson1-0/+5
2019-01-25AArch64: Remove ldgv and stgv instructions from Armv8.5-A Memory Tagging Exte...Sudi Das1-11/+0
2019-01-01Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2018-11-12[BINUTILS, AARCH64, 6/8] Add Tag getting instruction in Memory Tagging ExtensionSudakshina Das1-0/+11
2018-11-12[BINUTILS, AARCH64, 4/8] Add Tag setting instructions in Memory Tagging Exten...Sudakshina Das1-1/+2
2018-11-12[BINUTILS, AARCH64, 2/8] Add Tag generation instructions in Memory Tagging Ex...Sudakshina Das1-0/+2
2018-10-03AArch64: Constraint disassembler and assembler changes.Tamar Christina1-1/+33
2018-10-03AArch64: Wire through instr_sequenceTamar Christina1-1/+2
2018-05-15Implement Read/Write constraints on system registers on AArch64Tamar Christina1-0/+31
2018-05-15Modify AArch64 Assembly and disassembly functions to be able to fail and repo...Tamar Christina1-186/+248
2018-01-03Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2017-12-19Correct disassembly of dot product instructions.Tamar Christina1-1/+1
2017-11-09Adds the new Fields and Operand types for the new instructions in Armv8.4-a.Tamar Christina1-0/+30
2017-06-28[AArch64] Add dot product support for AArch64 to binutilsTamar Christina1-0/+14
2017-05-18Don't compare boolean values against TRUE or FALSEAlan Modra1-3/+2
2017-02-24[AArch64] Additional SVE instructionsRichard Sandiford1-30/+48
2017-02-22aarch64: actually copy first operand in convert_bfc_to_bfm()Jan Beulich1-2/+2
2017-01-02Update year range in copyright notice of all files.Alan Modra1-1/+1
2016-12-08AArch64/opcodes: Correct another `index' global shadowing errorMaciej W. Rozycki1-8/+8
2016-11-18[AArch64] Add ARMv8.3 FCMLA and FCADD instructionsSzabolcs Nagy1-3/+47
2016-11-18[AArch64] Add ARMv8.3 combined pointer authentication load instructionsSzabolcs Nagy1-0/+24
2016-10-11[AArch64] PR target/20666, fix wrong encoding of new introduced BFC pseudoJiong Wang1-1/+1
2016-09-21[AArch64][SVE 31/32] Add SVE instructionsRichard Sandiford1-0/+43
2016-09-21[AArch64][SVE 30/32] Add SVE instruction classesRichard Sandiford1-0/+84
2016-09-21[AArch64][SVE 28/32] Add SVE FP immediate operandsRichard Sandiford1-0/+45