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2018-08-06[ARC] Update handling AUX-registers.claziss1-0/+4
2018-08-06x86: fold RegEip/RegRip and RegEiz/RegRizJan Beulich1-0/+11
2018-08-03x86: drop NoRex64 from {,v}pmov{s,z}x*Jan Beulich1-0/+7
2018-08-03x86: drop "mem" operand type attributeJan Beulich1-0/+6
2018-08-01csky regenAlan Modra1-0/+4
2018-07-31Correct previous update - new translation for the opcodes subdirectory.Nick Clifton1-0/+4
2018-07-31x86: also optimize KXOR{D,Q} and KANDN{D,Q}Jan Beulich1-0/+5
2018-07-31x86: fold various AVX512 templates with so far differing Masking attributesJan Beulich1-0/+15
2018-07-31x86/Intel: correct permitted operand sizes for AVX512 scatter/gatherJan Beulich1-0/+6
2018-07-31x86: drop CpuVREXJan Beulich1-0/+8
2018-07-30RISC-V: Set insn info fields correctly when disassembling.Jim Wilson1-0/+6
2018-07-30Add support for the C_SKY series of processors.Andrew Jenner1-0/+12
2018-07-27Re: PowerPC Improve support for Gekko & BroadwayAlan Modra1-0/+6
2018-07-26PowerPC Improve support for Gekko & BroadwayAlex Chadwick1-0/+11
2018-07-25x86: Expand Broadcast to 3 bitsH.J. Lu1-0/+17
2018-07-24PR23430, Indices misspelledAlan Modra1-0/+5
2018-07-24x86-64: correct AVX512F vcvtsi2s{d,s} handlingJan Beulich1-0/+8
2018-07-23[ARC] Fix decoding of w6 signed short immediate.Claudiu Zissulescu1-0/+4
2018-07-23[ARC] Allow vewt instruction for ARC EM family.Claudiu Zissulescu1-0/+4
2018-07-23power9 mfupmc/mtupmcAlan Modra1-0/+6
2018-07-20MIPS/GAS: Split Loongson MMI Instructions from loongson2f/3aChenghua Xu1-0/+11
2018-07-19x86: fold narrowing VCVT* templatesJan Beulich1-0/+7
2018-07-19x86: fold VFPCLASSP{D,S} templatesJan Beulich1-0/+8
2018-07-19x86: fold various AVX512* templatesJan Beulich1-0/+9
2018-07-19x86: fold various AVX512DQ templatesJan Beulich1-0/+8
2018-07-19x86: fold various AVX512BW templatesJan Beulich1-0/+8
2018-07-19x86: fold various AVX512CD templatesJan Beulich1-0/+8
2018-07-19x86: fold various AVX512VL templates into their AVX512F counterpartsJan Beulich1-0/+10
2018-07-19x86: pre-process opcodes table before parsingJan Beulich1-0/+12
2018-07-18x86: Split vcvtps2{,u}qq and vcvttps2{,u}qqH.J. Lu1-0/+16
2018-07-12This patch adds support for the SSBB and PSSBB speculation barrier instructio...Nick Clifton1-0/+8
2018-07-12Add remainder of Em16 restrictions for AArch64 gas.Tamar Christina1-0/+8
2018-07-11Adds the speculation barrier instructions to the ARM assembler and disassembler.Sudakshina Das1-0/+6
2018-07-11x86: adjust monitor/mwait templatesJan Beulich1-0/+9
2018-07-11x86: drop {,reg16_}inoutportreg variablesJan Beulich1-0/+7
2018-07-11x86/Intel: accept memory operand size specifiers for CET insnsJan Beulich1-0/+6
2018-07-11x86: replace off-by-one OTMaxJan Beulich1-0/+6
2018-07-09S12Z/opcodes: Correct a `reg' global shadowing error for pre-4.8 GCCMaciej W. Rozycki1-0/+8
2018-07-06Fix SBO bit in disassembly mask for ldrah on AArch64.Tamar Christina1-0/+5
2018-07-06Fix the read/write flag for these registers on AArch64Tamar Christina1-0/+6
2018-07-02GDB PR tdep/8282: MIPS: Wire in `set disassembler-options'Maciej W. Rozycki1-0/+13
2018-07-02[ARM] Update bfd's Tag_CPU_arch knowledgeThomas Preud'homme1-0/+8
2018-06-29Fix AArch64 encodings for by element instructions.Tamar Christina1-0/+14
2018-06-26Updated translations.Nick Clifton1-0/+6
2018-06-26Fix spelling mistakes.Nick Clifton1-0/+4
2018-06-24Regenerate configure and pot files with updated binutils version number.Nick Clifton1-0/+5
2018-06-24Add 2.30 branch notes to ChangeLogs and NEWS files.Nick Clifton1-0/+4
2018-06-22Correct negs aliasing on AArch64.Tamar Christina1-0/+6
2018-06-21MIPS/opcodes: Fix a typo in `-M ginv' option descriptionMaciej W. Rozycki1-0/+5
2018-06-20RISC-V: Accept constant operands in la and llaSebastian Huber1-0/+6