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AgeCommit message (Expand)AuthorFilesLines
2015-01-28FT32 initial supportAlan Modra1-0/+11
2015-01-28NDS32/opcodes: Add new system registers.Kuan-Lin Chen1-0/+4
2015-01-16S/390: Add support for IBM z13.Andreas Krebbel1-0/+18
2015-01-02ChangeLog rotatation and copyright year updateAlan Modra1-883/+4
2014-12-27Limit moxie sto/ldo offsets to 16 bitsAnthony Green1-0/+6
2014-12-24Add mul.x and umul.x instructions to moxie portAnthony Green1-0/+5
2014-12-16Add in a JALRC alias and fix the NAL instruction.Matthew Fortune1-0/+5
2014-12-12Add zex instructions for moxie portAnthony Green1-0/+4
2014-12-06Add Visium support to opcodesEric Botcazou1-0/+13
2014-11-30Power4 should treat mftb as extended mfspr mnemonicAlan Modra1-0/+5
2014-11-28Remove broken nios2 assembler dwim support.Sandra Loosemore1-0/+5
2014-11-28Don't deprecate powerpc mftb insnAlan Modra1-0/+6
2014-11-24Update libtool.m4 from GCC trunkH.J. Lu1-0/+4
2014-11-17Add AVX512VBMI instructionsIlya Tocar1-0/+14
2014-11-17Add AVX512IFMA instructionsIlya Tocar1-0/+13
2014-11-17Add pcommit instructionIlya Tocar1-0/+12
2014-11-17Add clwb instructionIlya Tocar1-0/+12
2014-11-06Add mach parameter to nios2_find_opcode_hash.Sandra Loosemore1-0/+5
2014-11-03Import updated translations supplied by the Translation Project.Nick Clifton1-0/+4
2014-10-31MIPS: Add Octeon 3 supportNaveen H.S1-0/+14
2014-10-29Updated/new translations provided by the Translations Project.Nick Clifton1-0/+4
2014-10-23Refactoring/cleanup of nios2 opcodes and assembler code.Sandra Loosemore1-0/+24
2014-10-21ppc: enable msgclr and msgsnd on Power8Jan Beulich1-0/+4
2014-10-17opcodes, elf: annotate instructions with HWCAP2_VIS3B.Jose E. Marchesi1-0/+1
2014-10-17opcodes: fix several misplaced hwcap entries.Jose E. Marchesi1-0/+5
2014-10-15Bump bfd version.Tristan Gingold1-0/+4
2014-10-09This is a series of patches that add support for the SPARC M7 cpu toJose E. Marchesi1-0/+21
2014-09-22Ignore MOD field for control/debug register moveH.J. Lu1-0/+11
2014-09-16NDS32/opcodes: Add audio ISA extension and modify the disassemble implemnt.Kuan-Lin Chen1-0/+18
2014-09-15Add support for MIPS R6.Andrew Bennett1-0/+30
2014-09-10Properly handle suffix for iret and sysretH.J. Lu1-0/+5
2014-09-03[PATCH/AArch64] Generic support for all system registers using mrs and msrJiong Wang1-0/+5
2014-09-03[PATCH/AArch64] Implement LSE featureJiong Wang1-0/+17
2014-08-26MIPS: Make the CODE10 operand code consistent between ISAsMaciej W. Rozycki1-0/+6
2014-08-22ARM/opcodes: Fix negative hexadecimal offset disassemblyMaciej W. Rozycki1-0/+6
2014-08-21MIPS/opcodes: Remove microMIPS 48-bit LI instructionMaciej W. Rozycki1-0/+5
2014-08-19This patch set mainly aims at improving the S/390 disassembler'sAndreas Arnez1-0/+27
2014-08-14opcodes: blackfin: convert ad-hoc ints to bfd_booleanMike Frysinger1-0/+10
2014-08-14opcodes: blackfin: simplify decode_CC2stat_0 logicMike Frysinger1-0/+6
2014-08-14opcodes: blackfin: avoid duplicate memory readsMike Frysinger1-0/+6
2014-08-13opcodes: blackfin: push down global stateMike Frysinger1-0/+14
2014-08-13opcodes: blackfin: do not force align the PCMike Frysinger1-0/+5
2014-08-13opcodes: blackfin: handle memory read errorsMike Frysinger1-0/+6
2014-07-29[MIPS] Rename COPROC related macrosMatthew Fortune1-0/+8
2014-07-29[MIPS] Implement O32 FPXX, FP64 and FP64A ABI extensionsMatthew Fortune1-0/+8
2014-07-22Add AVX512DQ instructions and their AVX512VL variants.Ilya Tocar1-0/+38
2014-07-22Add support for AVX512BW instructions and their AVX512VL versions.Ilya Tocar1-0/+74
2014-07-22Add support for AVX512VL versions of AVX512CD instructions.Ilya Tocar1-0/+14
2014-07-22Add support for AVX512VL. Add AVX512VL versions of AVX512F instructions.Ilya Tocar1-0/+23
2014-07-20or1k: add missing l.msync, l.psync and l.psync instructions.Stefan Kristiansson1-0/+5
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