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2017-01-02Update year range in copyright notice of all files.Alan Modra1-0/+4
2017-01-02ChangeLog rotationAlan Modra1-2167/+2
2016-12-31Fix riscv breakageAlan Modra1-0/+5
2016-12-31PRU Opcode PortDimitar Dimitrov1-0/+10
2016-12-29Return 'int' rather than 'unsigned short' in avrdis_opcodeYao Qi1-0/+8
2016-12-28Check bfd support for bfd_mips_elf_get_abiflags in mips make ruleAlan Modra1-0/+11
2016-12-23MIPS16: Add ASMACRO instruction supportMaciej W. Rozycki1-0/+6
2016-12-23MIPS16: Simplify extended operand handlingMaciej W. Rozycki1-0/+7
2016-12-23MIPS16: Reassign `0' and `4' operand codesMaciej W. Rozycki1-0/+6
2016-12-23MIPS16: Handle non-extensible instructions correctlyMaciej W. Rozycki1-0/+15
2016-12-23MIPS16: Remove "extended" BREAK/SDBBP handlingMaciej W. Rozycki1-0/+5
2016-12-23MIPS16/GAS: Disallow EXTEND delay-slot schedulingMaciej W. Rozycki1-0/+5
2016-12-23opcodes: Use autoconf to check for `bfd_mips_elf_get_abiflags' in BFDMaciej W. Rozycki1-0/+12
2016-12-23Bump version to 2.28.51Tristan Gingold1-0/+4
2016-12-23Regenerate pot files.Tristan Gingold1-0/+4
2016-12-22ChangeLog formatting fixesAlan Modra1-1/+1
2016-12-22Avoid creating symbol table entries for registersAndrew Waterman1-0/+4
2016-12-20MIPS16/opcodes: Respect ISA and ASE in disassemblyMaciej W. Rozycki1-0/+7
2016-12-20MIPS16: Switch to 32-bit opcode table interpretationMaciej W. Rozycki1-0/+11
2016-12-20MIPS16/opcodes: Correct 64-bit macros' ISA membershipMaciej W. Rozycki1-0/+6
2016-12-20MIPS16/opcodes: Correct I64/SDRASP opcode's ISA membershipMaciej W. Rozycki1-0/+6
2016-12-20Correct assembler mnemonic for RISC-V aqrl AMOsAndrew Waterman1-0/+5
2016-12-20Fix disassembly of RISC-V CSR instructions under -Mno-aliasesAndrew Waterman1-0/+5
2016-12-20Add canonical JALR for RISC-VAndrew Waterman1-0/+5
2016-12-20Re-work RISC-V gas flags: now we just support -mabi and -marchAndrew Waterman1-0/+5
2016-12-20Formatting changes for RISC-VAndrew Waterman1-0/+4
2016-12-20Add opcodes RISC-V dependenciesAlan Modra1-0/+6
2016-12-19MIPS/opcodes: Only examine ELF file structures if SYMTAB_AVAILABLEMaciej W. Rozycki1-0/+5
2016-12-19MIPS/opcodes: Only call `bfd_mips_elf_get_abiflags' if BFD64Maciej W. Rozycki1-0/+5
2016-12-16Fix compile time warning building arm-dis.cNick Clifton1-0/+5
2016-12-14MIPS/opcodes: Also set disassembler's ASE flags from ELF structuresMaciej W. Rozycki1-0/+6
2016-12-14MIPS/opcodes: Reorder ELF file header flag handling in disassemblerMaciej W. Rozycki1-0/+5
2016-12-14MIPS16: Fix SP-relative SD instruction annotationMaciej W. Rozycki1-0/+5
2016-12-14MIPS16/opcodes: Fix and clarify MIPS16e commentaryMaciej W. Rozycki1-0/+5
2016-12-13[Binutils][AARCH64]Remove Cn register for coprocessor CRn, CRm fieldRenlin Li1-0/+13
2016-12-12Handle memory error in print_insn_rxYao Qi1-0/+8
2016-12-12Handle memory error in print_insn_rl78_commonYao Qi1-0/+8
2016-12-09MIPS16: Remove unused `>' operand codeMaciej W. Rozycki1-0/+4
2016-12-09MIPS16/opcodes: Use hexadecimal interpretation for the `e' operand codeMaciej W. Rozycki1-0/+5
2016-12-09MIPS16/opcodes: Reformat raw EXTEND and undecoded outputMaciej W. Rozycki1-0/+7
2016-12-08MIPS16/opcodes: Fix off-by-one indentation in `print_mips16_insn_arg'Maciej W. Rozycki1-0/+5
2016-12-08MIPS16/opcodes: Fix PC-relative operation delay-slot adjustmentMaciej W. Rozycki1-0/+6
2016-12-08AArch64/opcodes: Correct another `index' global shadowing errorMaciej W. Rozycki1-0/+5
2016-12-08Fix crash when disassembling invalid range on powerpc vleLuis Machado1-0/+4
2016-12-07MIPS/opcodes: Correct an `interaction' comment typoMaciej W. Rozycki1-0/+4
2016-12-07MIPS16/opcodes: Update opcode table commentMaciej W. Rozycki1-0/+5
2016-12-07MIPS/opcodes: Reformat `-M' disassembler option's help textMaciej W. Rozycki1-0/+4
2016-12-05[ARM] Add ARMv8.3 VCMLA and VCADD instructionsSzabolcs Nagy1-0/+5
2016-12-05[ARM] Add ARMv8.3 VJCVT instructionSzabolcs Nagy1-0/+4
2016-12-01Fix abort in x86 disassembler.Nick Clifton1-0/+6
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