aboutsummaryrefslogtreecommitdiff
path: root/ld/testsuite
AgeCommit message (Collapse)AuthorFilesLines
2012-05-04Support x86_64-*-linux-gnux32H.J. Lu8-1/+23
gas/ * configure.tgt: Support x86_64-*-linux-gnux32. ld/ * configure.tgt: Support x86_64-*-linux-gnux32. ld/testsuite/ * ld-elf/eh1.d: Skip x86_64-*-linux-gnux32. * ld-elf/eh2.d: Likewise. * ld-elf/eh3.d: Likewise. * ld-elf/eh4.d: Likewise. * ld-elfvsb/elfvsb.exp: Xfail x86_64-*-linux-gnux32. * ld-shared/shared.exp: Likewise. * ld-ifunc/ifunc-3a-x86.d: Support x86_64-*-linux-gnux32.
2012-04-24* ld-x86-64/plt-nacl.pd: Fix expected nop padding.Roland McGrath3-6/+14
* ld-x86-64/tlsdesc-nacl.pd: Likewise.
2012-04-24 PR ld/13990Hans-Peter Nilsson7-0/+58
* ld-arm/arm-elf.exp: Run gc-hidden-1. * ld-arm/gc-hidden-1.d: New test-file. * ld-arm/gcdfn.s, ld-arm/hideall.ld, ld-arm/hidfn.s, ld-arm/main.s: New files.
2012-04-23* ld-pie/pie.exp: Remove extra braces.Andreas Schwab2-1/+5
2012-04-13Set reloc_count to 0 for reloc sectionsH.J. Lu4-0/+20
bfd/ 2012-04-13 Alan Modra <amodra@gmail.com> PR ld/13947 * elflink.c (bfd_elf_final_link): Set reloc_count to 0 for reloc sections. ld/testsuite/ 2012-04-13 H.J. Lu <hongjiu.lu@intel.com> PR ld/13947 * ld-x86-64/x86-64.exp: Run pr13947. * ld-x86-64/pr13947.d: New file. * ld-x86-64/pr13947.s: Likewise.
2012-04-13 * ld-arm/arm-elf.exp (armelftests_common): Move cases usingRoland McGrath2-7/+13
mixed-lib.so to ... (armelftests_nonacl): ... here.
2012-04-12 * elf32-arm.c (elf32_arm_nacl_plt0_entry, elf32_arm_nacl_plt_entry):Nick Clifton36-351/+418
New variables. (struct elf32_arm_link_hash_table): New member `nacl_p'. (elf32_arm_link_hash_table_create): Initialize it. (elf32_arm_nacl_link_hash_table_create): New function. (arm_movw_immediate, arm_movt_immediate): New functions. (elf32_arm_populate_plt_entry): Test HTAB->nacl_p. (elf32_arm_finish_dynamic_sections): Likewise. (elf32_arm_output_plt_map_1): Likewise. (bfd_elf32_littlearm_nacl_vec, bfd_elf32_bigarm_nacl_vec): New backend vector stanza. (elf32_arm_nacl_modify_segment_map): New function. * config.bfd: Handle arm-*-nacl*, armeb-*-nacl*. * targets.c: Support bfd_elf32_{big,little}_nacl_vec. * configure.in: Likewise. (bfd_elf32_bigarm_nacl_vec): Add elf-nacl.lo here. (bfd_elf32_littlearm_nacl_vec): Likewise. (bfd_elf32_bigarm_vec, bfd_elf32_littlearm_vec): Likewise. (bfd_elf32_bigarm_symbian_vec): Likewise. (bfd_elf32_littlearm_symbian_vec): Likewise. (bfd_elf32_bigarm_vxworks_vec): Likewise. (bfd_elf32_littlearm_vxworks_vec): Likewise. * configure: Regenerated. * configure.tgt (arm-*-nacl*): Match it. * config/te-nacl.h (FPU_DEFAULT, EABI_DEFAULT): Define. (LOCAL_LABELS_DOLLAR): Define. * config/tc-arm.c (elf32_arm_target_format) [TE_NACL]: Use nacl format variants. * gas/elf/elf.exp (run_elf_list_test): Treat arm-*-nacl* targets as -armeabi. * gas/arm/any-idiv.d: Match *-*-nacl* targets too. * gas/arm/arch4t.d: Likewise. * gas/arm/arch4t-eabi.d: Likewise. * gas/arm/attr-any-armv4t.d: Likewise. * gas/arm/attr-any-thumbv6.d: Likewise. * gas/arm/attr-cpu-directive.d: Likewise. * gas/arm/attr-default.d: Likewise. * gas/arm/attr-march-all.d: Likewise. * gas/arm/attr-march-armv1.d: Likewise. * gas/arm/attr-march-armv2a.d: Likewise. * gas/arm/attr-march-armv2.d: Likewise. * gas/arm/attr-march-armv2s.d: Likewise. * gas/arm/attr-march-armv3.d: Likewise. * gas/arm/attr-march-armv3m.d: Likewise. * gas/arm/attr-march-armv4.d: Likewise. * gas/arm/attr-march-armv4t.d: Likewise. * gas/arm/attr-march-armv4txm.d: Likewise. * gas/arm/attr-march-armv4xm.d: Likewise. * gas/arm/attr-march-armv5.d: Likewise. * gas/arm/attr-march-armv5t.d: Likewise. * gas/arm/attr-march-armv5te.d: Likewise. * gas/arm/attr-march-armv5tej.d: Likewise. * gas/arm/attr-march-armv5texp.d: Likewise. * gas/arm/attr-march-armv5txm.d: Likewise. * gas/arm/attr-march-armv6.d: Likewise. * gas/arm/attr-march-armv6j.d: Likewise. * gas/arm/attr-march-armv6k.d: Likewise. * gas/arm/attr-march-armv6k+sec.d: Likewise. * gas/arm/attr-march-armv6kt2.d: Likewise. * gas/arm/attr-march-armv6-m.d: Likewise. * gas/arm/attr-march-armv6-m+os.d: Likewise. * gas/arm/attr-march-armv6s-m.d: Likewise. * gas/arm/attr-march-armv6t2.d: Likewise. * gas/arm/attr-march-armv6z.d: Likewise. * gas/arm/attr-march-armv6zk.d: Likewise. * gas/arm/attr-march-armv6zkt2.d: Likewise. * gas/arm/attr-march-armv6zt2.d: Likewise. * gas/arm/attr-march-armv7-a.d: Likewise. * gas/arm/attr-march-armv7a.d: Likewise. * gas/arm/attr-march-armv7-a+idiv.d: Likewise. * gas/arm/attr-march-armv7-a+mp.d: Likewise. * gas/arm/attr-march-armv7-a+sec.d: Likewise. * gas/arm/attr-march-armv7-a+sec+virt.d: Likewise. * gas/arm/attr-march-armv7-a+virt.d: Likewise. * gas/arm/attr-march-armv7.d: Likewise. * gas/arm/attr-march-armv7em.d: Likewise. * gas/arm/attr-march-armv7-m.d: Likewise. * gas/arm/attr-march-armv7m.d: Likewise. * gas/arm/attr-march-armv7-r.d: Likewise. * gas/arm/attr-march-armv7r.d: Likewise. * gas/arm/attr-march-armv7-r+mp.d: Likewise. * gas/arm/attr-march-iwmmxt2.d: Likewise. * gas/arm/attr-march-iwmmxt.d: Likewise. * gas/arm/attr-march-xscale.d: Likewise. * gas/arm/attr-mcpu.d: Likewise. * gas/arm/attr-mfpu-arm1020e.d: Likewise. * gas/arm/attr-mfpu-arm1020t.d: Likewise. * gas/arm/attr-mfpu-arm1136jf-s.d: Likewise. * gas/arm/attr-mfpu-arm1136jfs.d: Likewise. * gas/arm/attr-mfpu-arm7500fe.d: Likewise. * gas/arm/attr-mfpu-fpa10.d: Likewise. * gas/arm/attr-mfpu-fpa11.d: Likewise. * gas/arm/attr-mfpu-fpa.d: Likewise. * gas/arm/attr-mfpu-fpe2.d: Likewise. * gas/arm/attr-mfpu-fpe3.d: Likewise. * gas/arm/attr-mfpu-fpe.d: Likewise. * gas/arm/attr-mfpu-maverick.d: Likewise. * gas/arm/attr-mfpu-neon.d: Likewise. * gas/arm/attr-mfpu-neon-fp16.d: Likewise. * gas/arm/attr-mfpu-softfpa.d: Likewise. * gas/arm/attr-mfpu-softvfp.d: Likewise. * gas/arm/attr-mfpu-softvfp+vfp.d: Likewise. * gas/arm/attr-mfpu-vfp10.d: Likewise. * gas/arm/attr-mfpu-vfp10-r0.d: Likewise. * gas/arm/attr-mfpu-vfp3.d: Likewise. * gas/arm/attr-mfpu-vfp9.d: Likewise. * gas/arm/attr-mfpu-vfp.d: Likewise. * gas/arm/attr-mfpu-vfpv2.d: Likewise. * gas/arm/attr-mfpu-vfpv3-d16.d: Likewise. * gas/arm/attr-mfpu-vfpv3.d: Likewise. * gas/arm/attr-mfpu-vfpv4-d16.d: Likewise. * gas/arm/attr-mfpu-vfpv4.d: Likewise. * gas/arm/attr-mfpu-vfpxd.d: Likewise. * gas/arm/attr-names.d: Likewise. * gas/arm/attr-order.d: Likewise. * gas/arm/attr-override-cpu-directive.d: Likewise. * gas/arm/attr-override-mcpu.d: Likewise. * gas/arm/got_prel.d: Likewise. * gas/arm/mapdir.d: Likewise. * gas/arm/mapmisc.d: Likewise. * gas/arm/mapsecs.d: Likewise. * gas/arm/mapshort-eabi.d: Likewise. * gas/arm/mapshort-elf.d: Likewise. * gas/arm/mov-highregs-any.d: Likewise. * gas/arm/mov-lowregs-any.d: Likewise. * gas/arm/pr12198-1.d: Likewise. * gas/arm/pr12198-2.d: Likewise. * gas/arm/thumb.d: Likewise. * gas/arm/thumb-eabi.d: Likewise. * gas/arm/thumbrel.d: Likewise. * configure.tgt (arm*-*-nacl*, arm*b-*-nacl*): Handle them. * emulparams/armelf_nacl.sh: New file. * emulparams/armelfb_nacl.sh: New file. * Makefile.am (ALL_EMULATION_SOURCES): Add earmelf_nacl.c and earmelfb_nacl.c here. (earmelf_nacl.c, earmelfb_nacl.c): New targets. * Makefile.in: Regenerated. * ld-arm/arm-elf.exp (armelftests): Split out into ... (armelftests_common, armelftests_nonacl): ... these two. (armeabitests): Split out into ... (armeabitests_common, armeabitests_nonacl): ... these two. Omit _nonacl sets for arm*-*-nacl* targets. * ld-arm/farcall-mix.d: Don't match exact addresses, only symbolic ones. * ld-arm/farcall-mix2.d: Likewise. * ld-arm/farcall-group.d: Likewise. * ld-arm/tls-gdesc-got.d: Match variant file formats too. Accept some variation in exact addresses. * ld-arm/thumb2-b-interwork.d: Match variant file formats too. Fix regexps not to care about exact addresses where not relevant. * ld-arm/thumb2-bl-undefweak.d: Match any hex strings, not any strings of particular exact lengths. * ld-arm/thumb2-bl-undefweak1.d: Likewise. * ld-arm/arm-app.r: Match variant file formats too. * ld-arm/arm-app-abs32.r: Likewise. * ld-arm/arm-lib.d: Likewise. * ld-arm/arm-lib.r: Likewise. * ld-arm/arm-static-app.r: Likewise. * ld-arm/armv4-bx.d: Likewise. * ld-arm/data-only-map.d: Likewise. * ld-arm/group-relocs.d: Likewise. * ld-arm/jump19.d: Likewise. * ld-arm/reloc-boundaries.d: Likewise. * ld-arm/thumb1-bl.d: Likewise. * ld-arm/thumb2-bl.d: Likewise. * ld-arm/tls-app.d: Likewise. * ld-arm/tls-app.r: Likewise. * ld-arm/tls-gdierelax.d: Likewise. * ld-arm/tls-gdierelax2.d: Likewise. * ld-arm/tls-gdlerelax.d: Likewise. * ld-arm/tls-lib.d: Likewise. * ld-arm/tls-lib.r: Likewise. * ld-arm/tls-mixed.r: Likewise. * ld-arm/vfp11-fix-none.d: Likewise. * ld-arm/vfp11-fix-scalar.d: Likewise. * ld-arm/vfp11-fix-vector.d: Likewise. * ld-arm/arm-static-app.d: Likewise. Fix regexps not to care about exact number of leading spaces. * ld-arm/arm-app-abs32.d: Likewise. * ld-arm/fix-arm1176-off.d: Likewise. * ld-arm/fix-arm1176-on.d: Likewise. * ld-arm/arm-elf.exp: Treat nacl targets like eabi targets.
2012-04-09ld/testsuite/Roland McGrath6-4/+27
* ld-elf/eh1.d: Add explicit --64 to as options, and explicit -melf_x86_64 and -Ttext to ld options, so we don't assume every x86_64-*-* target uses --64 (vs --x32) by default or has the same address space layout. * ld-elf/eh2.d: Likewise. * ld-elf/eh3.d: Likewise. * ld-elf/eh4.d: Likewise. * ld-elf/elf.exp: For target *-*-nacl*, use options_regsub(ld) to map -melf_x86_64 to -melf_x86_64_nacl.
2012-04-07gas/testsuite/David S. Miller3-2/+7
* gas/all/gas.exp: Sparc can handle BFD_RELOC_8 for constants. ld/testsuite/ * ld-sparc/tlssunbin32.rd: Fix regexp. * ld-sparc/tlssunbin64.rd: Likewise.
2012-04-03bfd/Roland McGrath103-2316/+4702
2012-04-03 Roland McGrath <mcgrathr@google.com> * elf-nacl.c: New file. * elf-nacl.h: New file. * elf32-i386.c (elf_backend_modify_segment_map): Define for bfd_elf32_i386_nacl_vec. (elf_backend_modify_program_headers): Likewise. * elf64-x86-64.c (elf_backend_modify_segment_map): Define for bfd_elf64_x86_64_nacl_vec and bfd_elf32_x86_64_nacl_vec. (elf_backend_modify_program_headers): Likewise. * Makefile.am (BFD32_BACKENDS, BFD64_BACKENDS): Add elf-nacl.lo here. (BFD32_BACKENDS_CFILES, BFD64_BACKENDS_CFILES): Add elf-nacl.c here. * Makefile.in: Regenerated. * configure.in (bfd_elf64_x86_64_nacl_vec): Add elf-nacl.o to tb here. (bfd_elf32_x86_64_nacl_vec): Likewise. (bfd_elf64_x86_64_vec, bfd_elf32_x86_64_vec): Likewise. (bfd_elf64_x86_64_freebsd_vec, bfd_elf64_x86_64_sol2_vec): Likewise. (bfd_elf64_l1om_vec, bfd_elf64_l1om_freebsd_vec): Likewise. (bfd_elf64_k1om_vec, bfd_elf64_k1om_freebsd_vec): Likewise. (bfd_elf32_i386_nacl_vec): Likewise. (bfd_elf32_i386_sol2_vec, bfd_elf32_i386_freebsd_vec): Likewise. (bfd_elf32_i386_vxworks_vec, bfd_elf32_i386_vec): Likewise. * configure: Regenerated. binutils/testsuite/ 2012-04-03 Roland McGrath <mcgrathr@google.com> * lib/binutils-common.exp (is_elf_format): Consider *-*-nacl* to be ELF too. * binutils-all/elfedit-4.d: Add "#as: --64" option. * binutils-all/i386/i386.exp: Accept nacl targets too. * binutils-all/x86-64/x86-64.exp: Likewise. gas/testsuite/ 2012-04-03 Roland McGrath <mcgrathr@google.com> * gas/i386/k1om.d: Add not-target match for *-*-nacl*. * gas/i386/l1om.d: Likewise. ld/ 2012-04-03 Roland McGrath <mcgrathr@google.com> * configure.tgt (i[3-7]86-*-nacl*, x86_64-*-nacl*): Handle them. * emulparams/elf_nacl.sh: New file. * emulparams/elf_i386_nacl.sh: New file. * emulparams/elf32_x86_64_nacl.sh: New file. * emulparams/elf_x86_64_nacl.sh: New file. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf_i386_nacl.c here. (ALL_64_EMULATION_SOURCES): Add eelf32_x86_64_nacl.c and eelf_x86_64_nacl.c here. (eelf_i386_nacl.c, eelf32_x86_64_nacl.c, eelf_x86_64_nacl.c): New targets. * Makefile.in: Regenerated. * scripttempl/elf.sc: Handle SEPARATE_CODE cases. ld/testsuite/ 2012-04-03 Roland McGrath <mcgrathr@google.com> * ld-x86-64/ilp32-4-nacl.d: New file. * ld-x86-64/x86-64.exp: Run it. * ld-discard/discard.exp: Accept nacl targets too. * ld-elf/binutils.exp: Likewise. * ld-elf/comm-data.exp: Likewise. * ld-elf/elf.exp: Likewise. * ld-elf/tls_common.exp: Likewise. * ld-elfvers/vers.exp: Likewise. * ld-elfvsb/elfvsb.exp: Likewise. * ld-elfweak/elfweak.exp: Likewise. * ld-gc/gc.exp: Likewise. * ld-ifunc/binutils.exp: Likewise. * ld-ifunc/ifunc.exp: Likewise. * ld-linkonce/linkonce.exp:Likewise. * ld-pie/pie.exp: Likewise. * ld-shared/shared.exp: Likewise. * ld-undefined/weak-undef.exp: Likewise. * ld-unique/unique.exp: Likewise. * ld-x86-64/dwarfreloc.exp: Likewise. * ld-x86-64/line.exp: Likewise. * lib/ld-lib.exp (slurp_options): Support global array options_regsub to apply substitutions to the contents of options lines read from the file. * ld-i386/emit-relocs.d: Renamed to ... * ld-i386/emit-relocs.rd: ... this. * ld-i386/i386.exp: Accept nacl targets too. For them, use options_regsub to replace elf_i386 with elf_i386_nacl in run_dump_test cases; apply the same substitution in $i386tests; replace foo.rd expectations files with foo-nacl.rd in $i386tests. (i386tests): Change emit-relocs.d to emit-relocs.rd here. * ld-i386/emit-relocs-nacl.rd: New file. * ld-i386/plt-nacl.pd: New file. * ld-i386/plt-pic-nacl.pd: New file. * ld-i386/tlsbin-nacl.rd: New file. * ld-i386/tlsbindesc-nacl.rd: New file. * ld-i386/tlsdesc-nacl.rd: New file. * ld-i386/tlsgdesc-nacl.rd: New file. * ld-i386/tlsnopic-nacl.rd: New file. * ld-i386/tlspic-nacl.rd: New file. * ld-x86-64/x86-64.exp: Accept nacl targets too. For them, use options_regsub to replace elf_x86_64 with elf_x86_64_nacl in run_dump_test cases; apply the same substitution in $x86_64tests; replace foo.rd expectations files with foo-nacl.rd in $x86_64tests. Add explicit -melf_x86_64 to ld options in tests that need it, in case the default emulation is x32 (as it is for x86_64-nacl). * ld/testsuite/ld-x86-64/plt-nacl.pd: New file. * ld/testsuite/ld-x86-64/split-by-file-nacl.rd: New file. * ld/testsuite/ld-x86-64/tlsbin-nacl.rd: New file. * ld/testsuite/ld-x86-64/tlsbindesc-nacl.rd: New file. * ld/testsuite/ld-x86-64/tlsdesc-nacl.pd: New file. * ld/testsuite/ld-x86-64/tlsdesc-nacl.rd: New file. * ld/testsuite/ld-x86-64/tlsgdesc-nacl.rd: New file. * ld/testsuite/ld-x86-64/tlspic-nacl.rd: New file. * ld-i386/hidden2.d: Loosen regexps to match any file format variant, and not to depend on exact addresses, displacements, etc. where they are irrelevant. * ld-i386/pcrel16.d: Likewise. * ld-i386/pcrel16abs.d: Likewise. * ld-i386/pr12718.d: Likewise. * ld-i386/pr12921.d: Likewise. * ld-i386/reloc.d: Likewise. * ld-i386/tlsbin.dd: Likewise. * ld-i386/tlsbin.sd: Likewise. * ld-i386/tlsbin.td: Likewise. * ld-i386/tlsbindesc.dd: Likewise. * ld-i386/tlsbindesc.sd: Likewise. * ld-i386/tlsbindesc.td: Likewise. * ld-i386/tlsdesc.dd: Likewise. * ld-i386/tlsdesc.sd: Likewise. * ld-i386/tlsdesc.td: Likewise. * ld-i386/tlsg.sd: Likewise. * ld-i386/tlsgdesc.dd: Likewise. * ld-i386/tlsindntpoff.dd: Likewise. * ld-i386/tlsnopic.dd: Likewise. * ld-i386/tlsnopic.sd: Likewise. * ld-i386/tlspic.dd: Likewise. * ld-i386/tlspic.sd: Likewise. * ld-i386/tlspic.td: Likewise. * ld-i386/tlspie2.d: Likewise. * ld-x86-64/hidden2.d: Likewise. * ld-x86-64/pcrel16.d: Likewise. * ld-x86-64/pr12718.d: Likewise. * ld-x86-64/pr12921.d: Likewise. * ld-x86-64/protected3.d: Likewise. * ld-x86-64/tlsbin.dd: Likewise. * ld-x86-64/tlsbin.sd: Likewise. * ld-x86-64/tlsbin.td: Likewise. * ld-x86-64/tlsbindesc.dd: Likewise. * ld-x86-64/tlsbindesc.sd: Likewise. * ld-x86-64/tlsbindesc.td: Likewise. * ld-x86-64/tlsdesc.dd: Likewise. * ld-x86-64/tlsdesc.sd: Likewise. * ld-x86-64/tlsdesc.td: Likewise. * ld-x86-64/tlsg.sd: Likewise. * ld-x86-64/tlsgd5.dd: Likewise. * ld-x86-64/tlsgd6.dd: Likewise. * ld-x86-64/tlsgdesc.dd: Likewise. * ld-x86-64/tlspic.dd: Likewise. * ld-x86-64/tlspic.sd: Likewise. * ld-x86-64/tlspic.td: Likewise. * ld-x86-64/ilp32-8.d: Match any file format variant. Use a -Ttext and adjust expected results, to handle variant layouts. * ld-x86-64/ilp32-9.d: Likewise. * ld-i386/alloc.t: Remove superfluous OUTPUT_FORMAT statement. * ld-i386/pr12627.t: Likewise. * ld-x86-64/abs-l1om.d: Add target: constraint. * ld-x86-64/protected2-l1om.d: Likewise. * ld-x86-64/protected3-l1om.d: Likewise. * ld-x86-64/ilp32-4.d: Likewise. * ld-x86-64/plt.s: New file. * ld-x86-64/pltlib.s: New file. * ld-x86-64/plt.pd: New file. * ld-x86-64/x86-64.exp (x86_64tests): Add them. * ld-i386/plt.s: New file. * ld-i386/pltlib.s: New file. * ld-i386/plt.pd: New file. * ld-i386/plt-pic.s: New file. * ld-i386/plt-pic.pd: New file. * ld-i386/i386.exp (i386tests): Add them.
2012-03-25ld/Alan Modra2-7/+12
* ldemul.c (before_allocation_default): Revert last change. ldlang.c (lang_add_section): Likewise. (strip_excluded_output_sections): Don't strip output sections with user input sections when emitrelocations, unless all are SEC_EXCLUDE. ld/testsuite/ * ld-powerpc/vxworks-relax.rd: Remove check on reloc section file offset and reloc symbol indices.
2012-03-21 PR ld/13813Hans-Peter Nilsson2-1/+10
* ld-mips-elf/comm-data.exp (mips_comm_data_test): For N32 and N64 tests, also specify assembler option -march=mips3.
2012-03-20Handle relocation against protected function for -BsymbolicH.J. Lu11-0/+87
bfd/ 2012-03-20 H.J. Lu <hongjiu.lu@intel.com> PR ld/13880 * elf32-i386.c (elf_i386_relocate_section): Don't issue an error for R_386_GOTOFF relocation against protected function if SYMBOLIC_BIND is true. * elf64-x86-64.c (elf_x86_64_relocate_section): Don't issue an error for R_X86_64_GOTOFF64 relocation against protected function when building executable or SYMBOLIC_BIND is true. ld/testsuite/ 2012-03-20 H.J. Lu <hongjiu.lu@intel.com> PR ld/13880 * ld-i386/i386.exp: Run protected4 and protected5. * ld-x86-64/x86-64.exp: Likewise. * ld-i386/protected4.d: New. * ld-i386/protected4.s: Likewise. * ld-i386/protected5.d: Likewise. * ld-i386/protected5.s: Likewise. * ld-x86-64/protected4.d: Likewise. * ld-x86-64/protected4.s: Likewise. * ld-x86-64/protected5.d: Likewise. * ld-x86-64/protected5.s: Likewise.
2012-03-19* ld-m68k/m68k.exp ("TLS indirect symbol use"): PassAndreas Schwab2-2/+7
--copy-dt-needed-entries.
2012-03-16 * gas/config/tc-arm.c (aeabi_set_public_attributes): CorrectMatthew Gretton-Dann59-41/+237
handling of Tag_DIV_use. * gas/testsuite/gas/testsuite/gas/arm/any-idiv.d: New testcase. * gas/testsuite/gas/testsuite/gas/arm/any-idiv.s: Likewise. * gas/testsuite/gas/arm/attr-any-armv4t.d: Update expected output. * gas/testsuite/gas/arm/attr-any-thumbv6.d: Likewise. * gas/testsuite/gas/arm/attr-cpu-directive.d: Likewise. * gas/testsuite/gas/arm/attr-default.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv1.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv2.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv2a.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv2s.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv3.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv3m.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv4.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv4t.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv4txm.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv4xm.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv5.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv5t.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv5te.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv5tej.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv5texp.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv5txm.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv6-m+os.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv6-m.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv6.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv6j.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv6k+sec.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv6k.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv6kt2.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv6s-m.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv6t2.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv6z.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv6zk.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv6zkt2.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv6zt2.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv7-a+mp.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv7-a+sec.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv7-a.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv7.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv7a.d: Likewise. * gas/testsuite/gas/arm/attr-march-iwmmxt.d: Likewise. * gas/testsuite/gas/arm/attr-march-iwmmxt2.d: Likewise. * gas/testsuite/gas/arm/attr-march-xscale.d: Likewise. * gas/testsuite/gas/arm/attr-mcpu.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-arm1020e.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-arm1020t.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-arm1136jf-s.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-arm1136jfs.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-arm7500fe.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-fpa.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-fpa10.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-fpa11.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-fpe.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-fpe2.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-fpe3.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-maverick.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-neon-fp16.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-neon.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-softfpa.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-softvfp+vfp.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-softvfp.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-vfp.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-vfp10-r0.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-vfp10.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-vfp3.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-vfp9.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-vfpv2.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-vfpv3-d16.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-vfpv3.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-vfpv4-d16.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-vfpv4.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-vfpxd.d: Likewise. * gas/testsuite/gas/arm/attr-order.d: Likewise. * gas/testsuite/gas/arm/attr-override-cpu-directive.d: Likewise. * gas/testsuite/gas/arm/attr-override-mcpu.d: Likewise. * gas/testsuite/gas/arm/eabi_attr_1.d: Likewise. * gas/testsuite/gas/arm/mov-highregs-any.d: Likewise. * gas/testsuite/gas/arm/mov-lowregs-any.d: Likewise. * gas/testsuite/gas/arm/pr12198-1.d: Likewise. * gas/testsuite/gas/arm/pr12198-2.d: Likewise. * ld/testsuite/ld-arm/arm-elf.exp: Add new testcases. * ld/testsuite/ld-arm/attr-merge-2.attr: Update ouput. * ld/testsuite/ld-arm/attr-merge-2a.s: Remove Tag_DIV_use test. * ld/testsuite/ld-arm/attr-merge-2b.s: Likewise. * ld/testsuite/ld-arm/attr-merge-3.attr: Updated expected output. * ld/testsuite/ld-arm/attr-merge-4.attr: Likewise. * ld/testsuite/ld-arm/attr-merge-5.attr: Likewise. * ld/testsuite/ld-arm/attr-merge-6.attr: Likewise. * ld/testsuite/ld-arm/attr-merge-7.attr: Likewise. * ld/testsuite/ld-arm/attr-merge-arch-1.attr: Likewise. * ld/testsuite/ld-arm/attr-merge-arch-2.attr: Likewise. * ld/testsuite/ld-arm/attr-merge-unknown-2.d: Likewise. * ld/testsuite/ld-arm/attr-merge-unknown-2r.d: Likewise. * ld/testsuite/ld-arm/attr-merge-unknown-3.d: Likewise. * ld/testsuite/ld-arm/attr-merge-vfp-1.d: Likewise. * ld/testsuite/ld-arm/attr-merge-vfp-1r.d: Likewise. * ld/testsuite/ld-arm/attr-merge-vfp-2.d: Likewise. * ld/testsuite/ld-arm/attr-merge-vfp-2r.d: Likewise. * ld/testsuite/ld-arm/attr-merge-vfp-3.d: Likewise. * ld/testsuite/ld-arm/attr-merge-vfp-3r.d: Likewise. * ld/testsuite/ld-arm/attr-merge-vfp-4.d: Likewise. * ld/testsuite/ld-arm/attr-merge-vfp-4r.d: Likewise. * ld/testsuite/ld-arm/attr-merge-vfp-5.d: Likewise. * ld/testsuite/ld-arm/attr-merge-vfp-5r.d: Likewise. * ld/testsuite/ld-arm/attr-merge-vfp-6.d: Likewise. * ld/testsuite/ld-arm/attr-merge-vfp-6r.d: Likewise. * ld/testsuite/ld-arm/attr-merge-wchar-00-nowarn.d: Likewise. * ld/testsuite/ld-arm/attr-merge-wchar-00.d: Likewise. * ld/testsuite/ld-arm/attr-merge-wchar-02-nowarn.d: Likewise. * ld/testsuite/ld-arm/attr-merge-wchar-02.d: Likewise. * ld/testsuite/ld-arm/attr-merge-wchar-04-nowarn.d: Likewise. * ld/testsuite/ld-arm/attr-merge-wchar-04.d: Likewise. * ld/testsuite/ld-arm/attr-merge-wchar-20-nowarn.d: Likewise. * ld/testsuite/ld-arm/attr-merge-wchar-20.d: Likewise. * ld/testsuite/ld-arm/attr-merge-wchar-22-nowarn.d: Likewise. * ld/testsuite/ld-arm/attr-merge-wchar-22.d: Likewise. * ld/testsuite/ld-arm/attr-merge-wchar-24-nowarn.d: Likewise. * ld/testsuite/ld-arm/attr-merge-wchar-40-nowarn.d: Likewise. * ld/testsuite/ld-arm/attr-merge-wchar-40.d: Likewise. * ld/testsuite/ld-arm/attr-merge-wchar-42-nowarn.d: Likewise. * ld/testsuite/ld-arm/attr-merge-wchar-44-nowarn.d: Likewise. * ld/testsuite/ld-arm/attr-merge-wchar-44.d: Likewise. * ld/testsuite/ld-arm/attr-merge.attr: Likewise. * ld/testsuite/ld-arm/attr-merge-div-0.s: New testcase. * ld/testsuite/ld-arm/attr-merge-div-00.d: Likewise. * ld/testsuite/ld-arm/attr-merge-div-01-m3.d: Likewise. * ld/testsuite/ld-arm/attr-merge-div-01.d: Likewise. * ld/testsuite/ld-arm/attr-merge-div-02.d: Likewise. * ld/testsuite/ld-arm/attr-merge-div-1.s: Likewise. * ld/testsuite/ld-arm/attr-merge-div-10-m3.d: Likewise. * ld/testsuite/ld-arm/attr-merge-div-10.d: Likewise. * ld/testsuite/ld-arm/attr-merge-div-11.d: Likewise. * ld/testsuite/ld-arm/attr-merge-div-12.d: Likewise. * ld/testsuite/ld-arm/attr-merge-div-120.d: Likewise. * ld/testsuite/ld-arm/attr-merge-div-2.s: Likewise. * ld/testsuite/ld-arm/attr-merge-div-20.d: Likewise. * ld/testsuite/ld-arm/attr-merge-div-21.d: Likewise. * ld/testsuite/ld-arm/attr-merge-div-22.d: Likewise.
2012-03-16 * ld-gc/pr13683.d: Accept powerpc64 function descriptor syms.Alan Modra2-2/+6
2012-03-15 * config/default.exp: Update copyright date.Alan Modra4-7/+15
* ld-elf/shared.exp: Pass --no-as-needed to various tests linking shared libs. * ld-elfvers/vers.exp: Likewise.
2012-03-14Add a testcase for PR ld/13839H.J. Lu4-0/+32
2012-03-14 H.J. Lu <hongjiu.lu@intel.com> PR ld/13839 * ld-elf/pr13839.d: New. * ld-elf/pr13839.s: Likewise. * ld-elf/pr13839.t: Likewise.
2012-03-09Restore R_386_IRELATIVE and R_X86_64_IRELATIVEH.J. Lu5-4/+12
bfd/ 2012-03-09 H.J. Lu <hongjiu.lu@intel.com> PR ld/13817 * bfd/elf32-i386.c (elf_i386_relocate_section): Restore R_386_IRELATIVE. * * elf64-x86-64.c (elf_x86_64_relocate_section): Restore R_X86_64_IRELATIVE. ld/testsuite/ 2012-03-09 H.J. Lu <hongjiu.lu@intel.com> PR ld/13817 * ld-i386/pr13302.d: Updated. * ld-x86-64/pr13082-5b.d: Likewise. * ld-x86-64/pr13082-6a.d: Likewise. * ld-x86-64/pr13082-6b.d: Likewise.
2012-03-05 PR ld/13683Alan Modra2-2/+7
* ld-gc/pr13683.d: Allow non-zero top address digit.
2012-03-05 PR ld/13803Hans-Peter Nilsson3-2/+8
* ld-arm/fix-arm1176-off.d, ld-arm/fix-arm1176-on.d: Regexpify address of func_to_branch_to.
2012-03-01 PR ld/13789Hans-Peter Nilsson2-1/+6
* ld-elf/zerosize1.d: Allow xyzzy to be either OBJECT or NOTYPE.
2012-02-25Add big-endian support for tilegx.Walter Lee4-7/+91
bfd/ * config.bfd (tilegx-*-*): rename little endian vector; add big endian vector. (tilegxbe-*-*): New case. * configure.in (bfd_elf32_tilegx_vec): Rename... (bfd_elf32_tilegx_le_vec): ... to this. (bfd_elf32_tilegx_be_vec): New vector. (bfd_elf64_tilegx_vec): Rename... (bfd_elf64_tilegx_le_vec): ... to this. (bfd_elf64_tilegx_be_vec): New vector. * configure: Regenerate. * elf32-tilegx.c (TARGET_LITTLE_SYM): Rename. (TARGET_LITTLE_NAME): Ditto. (TARGET_BIG_SYM): Define. (TARGET_BIG_NAME): Define. * elf64-tilegx.c (TARGET_LITTLE_SYM): Rename. (TARGET_LITTLE_NAME): Ditto. (TARGET_BIG_SYM): Define. (TARGET_BIG_NAME): Define. * targets.c (bfd_elf32_tilegx_vec): Rename... (bfd_elf32_tilegx_le_vec): ... to this. (bfd_elf32_tilegx_be_vec): Declare. (bfd_elf64_tilegx_vec): Rename... (bfd_elf64_tilegx_le_vec): ... to this. (bfd_elf64_tilegx_be_vec): Declare. (_bfd_target_vector): Add / rename above vectors. binutils/testsuite/ * binutils-all/objdump.exp (cpus_expected): Add tilegx. gas/ * tc-tilegx.c (tilegx_target_format): Handle big endian. (OPTION_EB): Define. (OPTION_EL): Define. (md_longopts): Add entries for "EB" and "EL". (md_parse_option): Handle OPTION_EB and OPTION_EL. (md_show_usage): Add -EB and -EL. (md_number_to_chars): New. * tc-tilegx.h (TARGET_BYTES_BIG_ENDIAN): Guard definition with ifndef. (md_number_to_chars): Delete. * configure.tgt (tilegx*be): Handle. * doc/as.texinfo [TILE-Gx]: Document -EB and -EL. * doc/c-tilegx.texi: Ditto. ld/ * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32tilegx_be.c. (ALL_64_EMULATION_SOURCES): Add eelf64tilegx_be.c. (eelf32tilegx_be.c): Add rule to build this file. (eelf64tilegx_be.c): Ditto. * Makefile.in: Regenerate. * configure.tgt (tilegx-*-*): Support big endian. (tilegxbe-*-*): New. * emulparams/elf32tilegx.sh (OUTPUT_FORMAT): Rename. (BIG_OUTPUT_FORMAT): Define. (LITTLE_OUTPUT_FORMAT): Define. * emulparams/elf32tilegx_be.sh: New. * emulparams/elf64tilegx.sh (OUTPUT_FORMAT): Rename. (BIG_OUTPUT_FORMAT): Define. (LITTLE_OUTPUT_FORMAT): Define. * emulparams/elf64tilegx_be.sh: New. ld/testsuite/ * ld-tilegx/reloc-be.d: New. * ld-tilegx/reloc-le.d: New. * ld-tilegx/reloc.d: Delete. * ld-tilegx/tilegx.exp: Test big and little endian.
2012-02-22 PR ld/13683Nick Clifton11-21/+81
* ldlang.c (lang_process): Rerun lang_do_assignments before starting garbage collection. * ldexp.c (fold_name): Generate a reloc for defined symbols found without an associated output section during the mark phase. (exp_fold_tree_1): Continue processing an expression, even if we are unable to fold it, if we are in the first two evaluation phases. * ldexp.h (enum lang_phase_type): Add descriptions of the phases. * ld-gc/pr13683.c: New test source file. * ld-gc/pr13683.d: New test control and output file. * ld-gc/gc.exp: Run the pr13683 test. * ld-cris/tls-gc-68: Update expected symbol table dump. * ld-cris/tls-gc-69: Likewise. * ld-cris/tls-gc-70: Likewise. * ld-cris/tls-gc-71: Likewise. * ld-cris/tls-gc-75: Likewise. * ld-cris/tls-gc-76.d: Likewise. * ld-cris/tls-gc-79.d: Likewise.
2012-02-20 * ld-elf/comm-data.exp: Run for *-*-gnu*.Alan Modra2-3/+8
2012-02-14 PR ld/13621Richard Henderson3-1/+14
* ld-elf/zerosize1.d, ld-elf/zerosize1.s: New test.
2012-02-14 * ld-elf/linkoncerdiff.d: Don't run for hppa64-hpux.Alan Modra6-10/+21
* ld-elf/pr11304a.s: Always have whitespace before directives. * ld-elf/pr11304b.s: Likewise. * ld-selective/selective.exp: Test m68hc1* variant of m6811, m6812. * lib/ld-lib.exp: Likewise, and vice versa.
2012-02-13PR ld/13621Richard Henderson2-1/+7
bfd/ * linker.c (fix_syms): Force symbols outside any section into bfd_abs_section_ptr. ld/testsuite/ * ld-elf/warn2.d: Expect ABS section for Foo. * ld-elf/zerosize1.d, zerosize1.s: New test.
2012-02-13 * ld-m68hc11/m68hc11.exp: Run for m68hc11-*-* and m68hc12-*-*.Alan Modra12-48/+51
* ld-m68hc11/adj-brset.d: Remove redundant #target line. Add -m m68hc11elf to ld invocation. * ld-m68hc11/adj-jump.d: Likewise. * ld-m68hc11/bug-1403.d: Likewise. * ld-m68hc11/bug-1417.d: Likewise. * ld-m68hc11/bug-3331.d: Likewise. * ld-m68hc11/relax-direct.d: Likewise. * ld-m68hc11/relax-group.d: Likewise. * ld-m68hc11/far-hc11.d: Remove redundant #target line. Adjust for changed addresses. * ld-m68hc11/far-hc12.d: Remove redundant #target line. * ld-m68hc11/link-hcs12.d: Likewise, and adjust for header changes.
2012-02-09Don't use multi byte nop instructions for i386H.J. Lu3-2/+10
bfd/ 2012-02-09 H.J. Lu <hongjiu.lu@intel.com> PR ld/13675 * cpu-i386.c (bfd_arch_i386_fill): Updated to support multi byte nop instructions. (bfd_arch_i386_short_nop_fill): New. (bfd_arch_i386_long_nop_fill): Likewise. Use bfd_arch_i386_short_nop_fill in 32bit bfd_arch_info initializers. Use bfd_arch_i386_long_nop_fill on 64bit bfd_arch_info initializers. * cpu-k1om.c (bfd_arch_i386_fill): Renamed to ... (bfd_arch_i386_short_nop_fill): This. Update bfd_arch_info initializers. * cpu-l1om.c: Likewise. ld/testsuite/ 2012-02-09 H.J. Lu <hongjiu.lu@intel.com> PR ld/13675 * ld-i386/tlsnopic.dd: Update no-op padding. * ld-i386/tlspic.dd: Likewise.
2012-01-31Support arch-dependent fillH.J. Lu7-16/+16
bfd/ 2012-01-31 H.J. Lu <hongjiu.lu@intel.com> PR ld/13616 * archures.c (bfd_arch_info): Add fill. (bfd_default_arch_struct): Add bfd_arch_default_fill. (bfd_arch_default_fill): New. * configure.in: Set bfd version to 2.22.52. * configure: Regenerated. * cpu-alpha.c: Add bfd_arch_default_fill to bfd_arch_info initializer. * cpu-arc.c: Likewise. * cpu-arm.c: Likewise. * cpu-avr.c: Likewise. * cpu-bfin.c: Likewise. * cpu-cr16.c: Likewise. * cpu-cr16c.c: Likewise. * cpu-cris.c: Likewise. * cpu-crx.c: Likewise. * cpu-d10v.c: Likewise. * cpu-d30v.c: Likewise. * cpu-dlx.c: Likewise. * cpu-epiphany.c: Likewise. * cpu-fr30.c: Likewise. * cpu-frv.c: Likewise. * cpu-h8300.c: Likewise. * cpu-h8500.c: Likewise. * cpu-hppa.c: Likewise. * cpu-i370.c: Likewise. * cpu-i860.c: Likewise. * cpu-i960.c: Likewise. * cpu-ia64.c: Likewise. * cpu-ip2k.c: Likewise. * cpu-iq2000.c: Likewise. * cpu-lm32.c: Likewise. * cpu-m10200.c: Likewise. * cpu-m10300.c: Likewise. * cpu-m32c.c: Likewise. * cpu-m32r.c: Likewise. * cpu-m68hc11.c: Likewise. * cpu-m68hc12.c: Likewise. * cpu-m68k.c: Likewise. * cpu-m88k.c: Likewise. * cpu-mcore.c: Likewise. * cpu-mep.c: Likewise. * cpu-microblaze.c: Likewise. * cpu-mips.c: Likewise. * cpu-mmix.c: Likewise. * cpu-moxie.c: Likewise. * cpu-msp430.c: Likewise. * cpu-mt.c: Likewise. * cpu-ns32k.c: Likewise. * cpu-openrisc.c: Likewise. * cpu-or32.c: Likewise. * cpu-pdp11.c: Likewise. * cpu-pj.c: Likewise. * cpu-plugin.c: Likewise. * cpu-powerpc.c: Likewise. * cpu-rl78.c: Likewise. * cpu-rs6000.c: Likewise. * cpu-rx.c: Likewise. * cpu-s390.c: Likewise. * cpu-score.c: Likewise. * cpu-sh.c: Likewise. * cpu-sparc.c: Likewise. * cpu-spu.c: Likewise. * cpu-tic30.c: Likewise. * cpu-tic4x.c: Likewise. * cpu-tic54x.c: Likewise. * cpu-tic6x.c: Likewise. * cpu-tic80.c: Likewise. * cpu-tilegx.c: Likewise. * cpu-tilepro.c: Likewise. * cpu-v850.c: Likewise. * cpu-vax.c: Likewise. * cpu-w65.c: Likewise. * cpu-we32k.c: Likewise. * cpu-xc16x.c: Likewise. * cpu-xstormy16.c: Likewise. * cpu-xtensa.c: Likewise. * cpu-z80.c: Likewise. * cpu-z8k.c: Likewise. * cpu-i386.c: Include "libiberty.h". (bfd_arch_i386_fill): New. Add bfd_arch_i386_fill to bfd_arch_info initializer. * cpu-k1om.c: Add bfd_arch_i386_fill to bfd_arch_info initializer. * cpu-l1om.c: Likewise. * linker.c (default_data_link_order): Call abfd->arch_info->fill if fill size is 0. * bfd-in2.h: Regenerated. include/ 2012-01-31 H.J. Lu <hongjiu.lu@intel.com> PR ld/13616 * bfdlink.h (bfd_link_order): Update comments on data size. ld/ 2012-01-31 H.J. Lu <hongjiu.lu@intel.com> PR ld/13616 * emulparams/elf32_x86_64.sh: Remove NOP. * emulparams/elf_i386.sh: Likewise. * emulparams/elf_i386_be.sh: Likewise. * emulparams/elf_i386_ldso.sh: Likewise. * emulparams/elf_i386_vxworks.sh: Likewise. * emulparams/elf_k1om.sh: Likewise. * emulparams/elf_l1om.sh: Likewise. * emulparams/elf_x86_64.sh: Likewise. * ldlang.c (zero_fill): Initialized to 0. * ldwrite.c (build_link_order): Set data size to linker odrder size when they are the same. * scripttempl/elf.sc: Don't specify fill if NOP is undefined. ld/testsuite/ 2012-01-31 H.J. Lu <hongjiu.lu@intel.com> PR ld/13616 * ld-i386/tlsbindesc.dd: Update no-op padding. * ld-i386/tlsnopic.dd: Likewise. * ld-i386/tlspic.dd: Likewise. * ld-x86-64/tlsbin.dd: Likewise. * ld-x86-64/tlsbindesc.dd: Likewise. * ld-x86-64/tlspic.dd: Likewise.
2012-01-17 * config/default.exp: Provide tmpdir/ld/collect-ld.Alan Modra2-0/+5
2012-01-10Remove ABI_64_P check on R_X86_64_PCXXH.J. Lu8-21/+38
bfd/ 2012-01-10 H.J. Lu <hongjiu.lu@intel.com> PR ld/13581 * elf64-x86-64.c (elf_x86_64_relocate_section): Remove ABI_64_P check on R_X86_64_PCXX. ld/testsuite/ 2012-01-10 H.J. Lu <hongjiu.lu@intel.com> PR ld/13581 * ld-x86-64/ilp32-4.s: New. * ld-x86-64/ilp32-10.d: Likewise. * ld-x86-64/ilp32-10.s: Likewise. * ld-x86-64/ilp32-4.d: Adjusted. * ld-x86-64/ilp32-5.d: Likewise. * ld-x86-64/ilp32-5.s: Likewise. * ld-x86-64/x86-64.exp: Run ilp32-10.
2012-01-05 * ld-x86-64/x86-64.exp: Add test of linking mixed 32-bit andNick Clifton5-0/+96
64-bit objects when the 32-bit object (loaded first) contains 32+ local symbols, all referenced by relocs and the 64-bit object contains a reloc that uses a symbol in the 32-bit object. * 32bit.s: New source file. * 64bit.s: New source file. * incompatible.l: New expected linker output file.
2012-01-05Rotate ChangeLogsNick Clifton2-1268/+1277
2011-12-162011-12-15 David Daney <david.daney@cavium.com>David Daney6-7/+56
Nick Clifton <nickc@redhat.com> * ld-elfvers/vers.exp (picflag): Set to -fpic for mips*-*-* when using GCC-4.3 or later. (pic): Set to "yes" for mips*-*-linux*. * ld-elfvsb/elfvsb.exp: Don't test non-PIC shared libraried on mips*-*-linux*. (picflag): Set to -fpic for mips*-*-* when using GCC-4.3 or later. * ld-elfweak/elfweak.exp (picflag): Set to -fpic for mips*-*-* when using GCC-4.3 or later. * ld-shared/shared.exp (picflag): Same. * lib/ld-lib.exp (at_least_gcc_version): New proc.
2011-12-112011-12-10 David Daney <david.daney@cavium.com>David Daney2-1/+6
* ld-mips-elf/pic-and-nonpic-6-n64.dd: Use correct encoding for 64-bit MOVE instruction.
2011-12-102011-12-09 David Daney <david.daney@cavium.com>David Daney4-3/+10
* ld-mips-elf/tls-multi-got-1.r: Add "0x" to match value for MIPS_BASE_ADDRESS. * ld-mips-elf/textrel-1.d: Same. * ld-mips-elf/multi-got-1.d: Same.
2011-12-05 * ld-cris/weakref4.d: Updated pattern match for the message fromNick Clifton10-9/+23
readelf stating that there are no decoded unwind sections. * tls-js1.d: Likewise. * tls-local-63.d: Likewise. * tls-local-64.d: Likewise. * tls-und-38.d: Likewise. * tls-und-42.d: Likewise. * tls-und-46.d: Likewise. * tls-und-50.d: Likewise. * weakref3.d: Likewise. * weakref4.d: Likewise.
2011-12-032011-12-03 David Daney <david.daney@cavium.com>David Daney2-2/+7
* ld-bootstrap/bootstrap.exp: Use consistent flags for final link in ia64 and mips cases.
2011-11-29 PR ld/10144Maciej W. Rozycki10-4/+228
* lib/ld-lib.exp (run_ld_link_tests): Handle sources from other directories. (run_ld_link_exec_tests): Likewise. (run_cc_link_tests): Likewise. * ld-elf/comm-data1.sd: New test. * ld-elf/comm-data1.s: Source for the new test. * ld-elf/comm-data2.sd: New test. * ld-elf/comm-data2.rd: Likewise. * ld-elf/comm-data2.xd: Likewise. * ld-elf/comm-data2.s: Source for the new tests. * ld-elf/comm-data.exp: New file. * ld-mips-elf/comm-data.exp: Likewise.
2011-11-09 * ld/testsuite/ld-arm/jump-reloc-veneers.s: Update for changes to assembler ↵Matthew Gretton-Dann2-1/+5
output.
2011-11-08bfd/Alan Modra3-1/+10
* elf64-ppc.c (struct ppc64_elf_obj_tdata): Rename ha_relocs_not_using_r2 to unexpected_toc_insn. (ok_lo_toc_insn): New function. (ppc64_elf_edit_toc): Check insn on lo toc reloc. Emit warning. (ppc64_elf_relocate_section): Don't check insn on lo toc reloc here. Handle addic on lo toc reloc. ld/testsuite/ * ld-powerpc/powerpc.exp: Expect ld warnings for tocopt test. * ld-powerpc/tocopt.out: New file.
2011-10-25bfd:Nick Clifton3-0/+13
* Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo . (ALL_MACHINES_CFILES): Add cpu-epiphany.c . (BFD32_BACKENDS): Add elf32-epiphany.lo . (BFD32_BACKENDS_CFILES): Add elf32-epiphany.c . * Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate. * archures.c (bfd_arch_epiphany): Add. (bfd_mach_epiphany16, bfd_mach_epiphany32): Define. (bfd_epiphany_arch): Declare. (bfd_archures_list): Add &bfd_epiphany_arch. * config.bfd (epiphany-*-elf): New target case. * configure.in (bfd_elf32_epiphany_vec): New target vector case. * reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation. (BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise. (BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise. (BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise. * targets.c (bfd_elf32_epiphany_vec): Declare. (_bfd_target_vector): Add bfd_elf32_epiphany_vec. * po/SRC-POTFILES.in, po/bfd.pot: Regenerate. * cpu-epiphany.c, elf32-epiphany.c: New files. binutils: * readelf.c (include "elf/epiphany.h") (guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY. (get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise. (is_16bit_abs_reloc, is_none_reloc): Likewise. * po/binutils.pot: Regenerate. cpu: * cpu/epiphany.cpu, cpu/epiphany.opc: New files. gas: * NEWS: Mention addition of Adapteva Epiphany support. * config/tc-epiphany.c, config/tc-epiphany.h: New files. * Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c . (TARGET_CPU_HFILES): Add config/tc-epiphany.h . * Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate. * configure.in: Also set using_cgen for epiphany. * configure.tgt: Handle epiphany. * doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi . * doc/all.texi: Set EPIPHANY. * doc/as.texinfo: Add EPIPHANY-specific text. * doc/c-epiphany.texi: New file. * po/gas.pot: Regenerate. gas/testsuite: * gas/epiphany: New directory. include: * dis-asm.h (print_insn_epiphany): Declare. * elf/epiphany.h: New file. * elf/common.h (EM_ADAPTEVA_EPIPHANY): Define. ld: * NEWS: Mention addition of Adapteva Epiphany support. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c . (eelf32epiphany.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Handle epiphany-*-elf. * po/ld.pot: Regenerate. * testsuite/ld-srec/srec.exp: xfail epiphany. * emulparams/elf32epiphany.sh: New file. opcodes: * Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h . (TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c, epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c . (CLEANFILES): Add stamp-epiphany. (EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it. (stamp-epiphany): New rule. * Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate. * configure.in: Handle bfd_epiphany_arch. * disassemble.c (ARCH_epiphany): Define. (disassembler): Handle bfd_arch_epiphany. * epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files. * epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise. * epiphany-opc.h: Likewise.
2011-10-21Replace IRELATIVE relocations with RELATIVE in .rel.dyn.H.J. Lu7-3/+39
bfd/ 2011-10-21 H.J. Lu <hongjiu.lu@intel.com> PR ld/13302 * elf32-i386.c (elf_i386_relocate_section): Replace R_386_IRELATIVE with R_386_RELATIVE. * elf64-x86-64.c (elf_x86_64_relocate_section): Replace R_X86_64_IRELATIVE with R_X86_64_RELATIVE. ld/testsuite/ 2011-10-21 H.J. Lu <hongjiu.lu@intel.com> PR ld/13302 * ld-i386/i386.exp: Run pr13302. * ld-i386/pr13302.d: New. * ld-i386/pr13302.s: Likewise. * ld-x86-64/pr13082-5b.d: Updated. * ld-x86-64/pr13082-6a.d: Likewise. * ld-x86-64/pr13082-6b.d: Likewise.
2011-10-21Put IRELATIVE relocations after JUMP_SLOT.H.J. Lu4-0/+44
bfd/ 2011-10-21 H.J. Lu <hongjiu.lu@intel.com> PR ld/13302 * elf32-i386.c (elf_i386_link_hash_table): Add next_jump_slot_index and next_irelative_index. (elf_i386_link_hash_table_create): Initialize next_jump_slot_index and next_irelative_index. (elf_i386_allocate_dynrelocs): Increment reloc_count instead of next_tls_desc_index. (elf_i386_size_dynamic_sections): Set next_tls_desc_index and next_irelative_index from reloc_count. (elf_i386_finish_dynamic_symbol): Put R_386_IRELATIVE after R_386_JUMP_SLOT. * elf64-x86-64.c (elf_x86_64_link_hash_table): Add next_jump_slot_index and next_irelative_index. (elf_x86_64_link_hash_table_create): Initialize next_jump_slot_index and next_irelative_index. (elf_x86_64_size_dynamic_sections): Set next_irelative_index from reloc_count. (elf_x86_64_finish_dynamic_symbol): Put R_X86_64_IRELATIVE after R_X86_64_JUMP_SLOT. ld/testsuite/ 2011-10-21 H.J. Lu <hongjiu.lu@intel.com> PR ld/13302 * ld-ifunc/ifunc-16-i386.d: New. * ld-ifunc/ifunc-16-x86-64.d: Likewise. * ld-ifunc/ifunc-16-x86.s: Likewise.
2011-10-20 * ld-selective/selective.exp: Use check_gc_sections_available.Alan Modra3-19/+8
Remove redundant xfails. * ld-selective/sel-dump.exp: Likewise.
2011-10-19 PR ld/13177Alan Modra7-35/+121
bfd/ * elflink.c (_bfd_elf_gc_mark_rsec): Set symbol "mark". (elf_gc_sweep_symbol): Don't test plt/got refcounts, instead test "mark". Hide undefweak too. Clear def_regular and ref_regular. * elf-m10300.c (mn10300_elf_relocate_section): Ignore unresolved reloc errors from garbage-collected code. * elf32-arm.c (elf32_arm_relocate_section): Likewise. * elf32-bfin.c (bfin_relocate_section): Likewise. (bfinfdpic_relocate_section): Likewise. * elf32-cris.c (cris_elf_relocate_section): Likewise. * elf32-frv.c (elf32_frv_relocate_section): Likewise. * elf32-i386.c (elf_i386_relocate_section): Likewise. * elf32-m32r.c (m32r_elf_relocate_section): Likewise. * elf32-m68k.c (elf_m68k_relocate_section): Likewise. * elf32-ppc.c (ppc_elf_relocate_section): Likewise. * elf32-s390.c (elf_s390_relocate_section): Likewise. * elf32-sh.c (sh_elf_relocate_section): Likewise. * elf32-spu.c (spu_elf_relocate_section): Likewise. * elf32-tilepro.c (tilepro_elf_relocate_section): Likewise. * elf32-xtensa.c (elf_xtensa_relocate_section): Likewise. * elf64-alpha.c (elf64_alpha_relocate_section): Likewise. * elf64-ppc.c (ppc64_elf_relocate_section): Likewise. * elf64-s390.c (elf_s390_relocate_section): Likewise. * elf64-sh64.c (sh_elf64_relocate_section): Likewise. * elf64-x86-64.c (elf_x86_64_relocate_section): Likewise. * elfxx-sparc.c (_bfd_sparc_elf_relocate_section): Likewise. * elfxx-tilegx.c (tilegx_elf_relocate_section): Likewise. ld/testsuite/ * ld-elf/elf.exp: Move test for shared lib support.. * lib/ld-lib.exp (check_shared_lib_support): ..to here. Add m68hc1*, and s/ms1/mt/. (check_gc_sections_available): Match hppa*64 not hppa64. Comment. * ld-gc/libpersonality.s: New. * ld-gc/personality.s, * ld-gc/personality.d: New. * ld-gc/gc.exp: Run personality test.
2011-10-19Fix sparc TLS call relaxation when the delay slot sets up %o0.David S. Miller5-24/+32
bfd/ PR binutils/13301 * elfxx-sparc.c (sparc_elf_find_reloc_at_ofs): New function. (_bfd_sparc_elf_relocate_section): Always move the __tls_get_addr call delay slot instruction forward 4 bytes when performing relaxation. gold/ PR binutils/13301 * sparc.cc (Target_sparc::Relocate::reloc_adjust_addr_): New member to track relocation locations that have moved during TLS reloc optimizations. (Target_sparc::Relocate::Relocate): Initialize to NULL. (Target_sparc::Relocate::relocate): Adjust view down by 4 bytes if it matches reloc_adjust_addr_. (Target_sparc::Relocate::relocate_tls): Always move the __tls_get_addr call delay slot instruction forward 4 bytes when performing relaxation. ld/testsuite/ * ld-sparc/tlssunbin32.dd: Update for TLS call relaxation fix for PR 13301. * ld-sparc/tlssunbin64.dd: Likewise. * ld-sparc/tlssunpic32.dd: Likewise. * ld-sparc/tlssunpic64.dd: Likewise.
2011-10-18 Jie Zhang <jie@codesourcery.com>Julian Brown19-133/+155
Julian Brown <julian@codesourcery.com> gas/ * config/tc-arm.c (parse_shifter_operand): Fix handling of explicit rotation. (encode_arm_shifter_operand): Likewise. gas/testsuite/ * gas/arm/adrl.d: Adjust. * gas/arm/immed2.d: New test. * gas/arm/immed2.s: New test. ld/testsuite/ * ld-arm/cortex-a8-fix-b-plt.d: Adjust. * ld-arm/cortex-a8-fix-bcc-plt.d: Adjust. * ld-arm/cortex-a8-fix-bl-plt.d: Adjust. * ld-arm/cortex-a8-fix-bl-rel-plt.d: Adjust. * ld-arm/cortex-a8-fix-blx-plt.d: Adjust. * ld-arm/ifunc-1.dd: Adjust. * ld-arm/ifunc-2.dd: Adjust. * ld-arm/ifunc-3.dd: Adjust. * ld-arm/ifunc-4.dd: Adjust. * ld-arm/ifunc-5.dd: Adjust. * ld-arm/ifunc-6.dd: Adjust. * ld-arm/ifunc-7.dd: Adjust. * ld-arm/ifunc-8.dd: Adjust. * ld-arm/ifunc-9.dd: Adjust. * ld-arm/ifunc-10.dd: Adjust. * ld-arm/ifunc-14.dd: Adjust. * ld-arm/ifunc-15.dd: Adjust. * ld-arm/ifunc-16.dd: Adjust. opcodes/ * arm-dis.c (print_insn_arm): Explicitly specify rotation if needed.