Add big-endian support for tilegx.

bfd/
	* config.bfd (tilegx-*-*): rename little endian vector; add big
	endian vector.
	(tilegxbe-*-*): New case.
	* configure.in (bfd_elf32_tilegx_vec): Rename...
	(bfd_elf32_tilegx_le_vec): ... to this.
	(bfd_elf32_tilegx_be_vec): New vector.
	(bfd_elf64_tilegx_vec): Rename...
	(bfd_elf64_tilegx_le_vec): ... to this.
	(bfd_elf64_tilegx_be_vec): New vector.
	* configure: Regenerate.
	* elf32-tilegx.c (TARGET_LITTLE_SYM): Rename.
	(TARGET_LITTLE_NAME): Ditto.
	(TARGET_BIG_SYM): Define.
	(TARGET_BIG_NAME): Define.
	* elf64-tilegx.c (TARGET_LITTLE_SYM): Rename.
	(TARGET_LITTLE_NAME): Ditto.
	(TARGET_BIG_SYM): Define.
	(TARGET_BIG_NAME): Define.
	* targets.c (bfd_elf32_tilegx_vec): Rename...
	(bfd_elf32_tilegx_le_vec): ... to this.
	(bfd_elf32_tilegx_be_vec): Declare.
	(bfd_elf64_tilegx_vec): Rename...
	(bfd_elf64_tilegx_le_vec): ... to this.
	(bfd_elf64_tilegx_be_vec): Declare.
	(_bfd_target_vector): Add / rename above vectors.

binutils/testsuite/
	* binutils-all/objdump.exp (cpus_expected): Add tilegx.

gas/
	* tc-tilegx.c (tilegx_target_format): Handle big endian.
	(OPTION_EB): Define.
	(OPTION_EL): Define.
	(md_longopts): Add entries for "EB" and "EL".
	(md_parse_option): Handle OPTION_EB and OPTION_EL.
	(md_show_usage): Add -EB and -EL.
	(md_number_to_chars): New.
	* tc-tilegx.h (TARGET_BYTES_BIG_ENDIAN): Guard definition with
	ifndef.
	(md_number_to_chars): Delete.
	* configure.tgt (tilegx*be): Handle.
	* doc/as.texinfo [TILE-Gx]: Document -EB and -EL.
	* doc/c-tilegx.texi: Ditto.

ld/
	* Makefile.am (ALL_EMULATION_SOURCES): Add eelf32tilegx_be.c.
	(ALL_64_EMULATION_SOURCES): Add eelf64tilegx_be.c.
	(eelf32tilegx_be.c): Add rule to build this file.
	(eelf64tilegx_be.c): Ditto.
	* Makefile.in: Regenerate.
	* configure.tgt (tilegx-*-*): Support big endian.
	(tilegxbe-*-*): New.
	* emulparams/elf32tilegx.sh (OUTPUT_FORMAT): Rename.
	(BIG_OUTPUT_FORMAT): Define.
	(LITTLE_OUTPUT_FORMAT): Define.
	* emulparams/elf32tilegx_be.sh: New.
	* emulparams/elf64tilegx.sh (OUTPUT_FORMAT): Rename.
	(BIG_OUTPUT_FORMAT): Define.
	(LITTLE_OUTPUT_FORMAT): Define.
	* emulparams/elf64tilegx_be.sh: New.

ld/testsuite/
	* ld-tilegx/reloc-be.d: New.
	* ld-tilegx/reloc-le.d: New.
	* ld-tilegx/reloc.d: Delete.
	* ld-tilegx/tilegx.exp: Test big and little endian.

4 files changed, 91 insertions, 7 deletions

diff --git a/ld/testsuite/ChangeLog b/ld/testsuite/ChangeLog
index 5845e8c..f5eca8c 100644
--- a/ld/testsuite/ChangeLog
+++ b/ld/testsuite/ChangeLog
@@ -1,3 +1,10 @@
+2012-02-25  Walter Lee  <walt@tilera.com>
+
+	* ld-tilegx/reloc-be.d: New.
+	* ld-tilegx/reloc-le.d: New.
+	* ld-tilegx/reloc.d: Delete.
+	* ld-tilegx/tilegx.exp: Test big and little endian.
+
 2012-02-22  Nick Clifton  <nickc@redhat.com>
 
 	PR ld/13683
diff --git a/ld/testsuite/ld-tilegx/reloc-be.d b/ld/testsuite/ld-tilegx/reloc-be.d
new file mode 100644
index 0000000..7d6f9de
--- /dev/null
+++ b/ld/testsuite/ld-tilegx/reloc-be.d
@@ -0,0 +1,70 @@
+
+.*:     file format .*tilegx.*
+
+Contents of section .text:
+ 100b0 .*
+ 100c0 .*
+ 100d0 .*
+ 100e0 .*
+ 100f0 .*
+ 10100 .*
+ 10110 .*
+ 10120 .*
+ 10130 .*
+ 10140 .*
+ 10150 .*
+ 10160 .*
+ 10170 .*
+ 10180 .*
+ 10190 .*
+ 101a0 .*
+ 101b0 .*
+ 101c0 .*
+Contents of section .data:
+ 201e0 000101b8 000101c0 827a4b64 11770000  .*
+ 201f0 0032002e 2c827a12 34567812 3456789a  .*
+ 20200 bc123456 789abcde f0000000 00000000  .*
+ 20210 00000000 00000000 00000000 00000000  .*
+
+Disassembly of section .text:
+
+00000000000100b0 <_start>:
+   100b0:	[0-9a-f]* 	{ add r2, zero, zero }
+   100b8:	[0-9a-f]* 	{ j 101b8 <external1> }
+   100c0:	[0-9a-f]* 	{ add r3, r2, r2 }
+   100c8:	[0-9a-f]* 	{ beqzt zero, 101c0 <external2> }
+   100d0:	[0-9a-f]* 	{ movei r2, 17 ; movei r3, 119 }
+   100d8:	[0-9a-f]* 	{ movei r2, 17 ; movei r3, 119 ; ld zero, zero }
+   100e0:	[0-9a-f]* 	{ mtspr 17, zero }
+   100e8:	[0-9a-f]* 	{ mfspr zero, 17 }
+   100f0:	[0-9a-f]* 	{ moveli r2, -32134 ; moveli r3, 19300 }
+   100f8:	[0-9a-f]* 	{ moveli r2, 4660 ; moveli r3, -30293 }
+   10100:	[0-9a-f]* 	{ shl16insli r2, r2, 22136 ; shl16insli r3, r3, -12816 }
+   10108:	[0-9a-f]* 	{ moveli r2, 4660 ; moveli r3, 30292 }
+   10110:	[0-9a-f]* 	{ shl16insli r2, r2, 22136 ; shl16insli r3, r3, 12816 }
+   10118:	[0-9a-f]* 	{ shl16insli r2, r2, -25924 ; shl16insli r3, r3, -292 }
+   10120:	[0-9a-f]* 	{ moveli r2, 4660 ; moveli r3, -292 }
+   10128:	[0-9a-f]* 	{ shl16insli r2, r2, 22136 ; shl16insli r3, r3, -17768 }
+   10130:	[0-9a-f]* 	{ shl16insli r2, r2, -25924 ; shl16insli r3, r3, 30292 }
+   10138:	[0-9a-f]* 	{ shl16insli r2, r2, -8464 ; shl16insli r3, r3, 12816 }
+   10140:	[0-9a-f]* 	{ ld_add r0, r0, 17 }
+   10148:	[0-9a-f]* 	{ st_add r0, r0, 17 }
+   10150:	[0-9a-f]* 	{ mm r2, r3, 19, 31 }
+   10158:	[0-9a-f]* 	{ shli r2, r3, 19 ; shli r4, r5, 31 }
+   10160:	[0-9a-f]* 	{ shli r2, r3, 19 ; shli r4, r5, 31 ; ld zero, zero }
+   10168:	[0-9a-f]* 	{ moveli r0, 80 ; moveli r1, 80 }
+   10170:	[0-9a-f]* 	{ moveli r0, 1 ; moveli r1, 1 }
+   10178:	[0-9a-f]* 	{ moveli r0, 168 ; moveli r1, 168 }
+   10180:	[0-9a-f]* 	{ moveli r0, 4096 ; moveli r1, 4096 }
+   10188:	[0-9a-f]* 	{ moveli r0, 1 ; moveli r1, 1 }
+   10190:	[0-9a-f]* 	{ moveli r0, 144 ; moveli r1, 144 }
+   10198:	[0-9a-f]* 	{ moveli r0, 4096 ; moveli r1, 4096 }
+   101a0:	[0-9a-f]* 	{ moveli r0, 0 ; moveli r1, 0 }
+   101a8:	[0-9a-f]* 	{ moveli r0, 1 ; moveli r1, 1 }
+   101b0:	[0-9a-f]* 	{ moveli r0, 112 ; moveli r1, 112 }
+
+00000000000101b8 <external1>:
+   101b8:	[0-9a-f]* 	{ j 101b8 <external1> }
+
+00000000000101c0 <external2>:
+   101c0:	[0-9a-f]* 	{ j 101b8 <external1> }
diff --git a/ld/testsuite/ld-tilegx/reloc.d b/ld/testsuite/ld-tilegx/reloc-le.d
index c9acdac..8d41bd0 100644
--- a/ld/testsuite/ld-tilegx/reloc.d
+++ b/ld/testsuite/ld-tilegx/reloc-le.d
@@ -1,5 +1,5 @@
 
-.*:     file format elf64-tilegx.*
+.*:     file format .*tilegx.*
 
 Contents of section .text:
  100b0 .*
diff --git a/ld/testsuite/ld-tilegx/tilegx.exp b/ld/testsuite/ld-tilegx/tilegx.exp
index 856b41e..fbc80a2 100644
--- a/ld/testsuite/ld-tilegx/tilegx.exp
+++ b/ld/testsuite/ld-tilegx/tilegx.exp
@@ -24,14 +24,21 @@ if {!([istarget "tilegx-*-*"]) } {
 
 # Set up a list as described in ld-lib.exp
 
-set tilepro_tests {
-    {   "tilegx relocation resolution linker test"
-        ""
-        ""
+set tilegx_tests {
+    {   "tilegx little-endian relocation resolution linker test"
+        "-EL"
+        "-EL"
         { "reloc.s" "external.s" }
-        { {objdump -ds reloc.d} }
+        { {objdump -ds reloc-le.d} }
+        "reloc"
+    }
+    {   "tilegx big-endian relocation resolution linker test"
+        "-EB"
+        "-EB"
+        { "reloc.s" "external.s" }
+        { {objdump -ds reloc-be.d} }
         "reloc"
     }
 }
 
-run_ld_link_tests $tilepro_tests
+run_ld_link_tests $tilegx_tests