aboutsummaryrefslogtreecommitdiff
path: root/include
AgeCommit message (Collapse)AuthorFilesLines
2006-12-07bfd/Kazu Hirata2-12/+24
* elf32-m68k.c: Update uses of EF_M68K_*. binutils/ * readelf.c: Update uses of EF_M68K_*. gas/ * config/tc-m68k.c: Update uses of EF_M68K_*. include/elf * m68k.h (EF_M68K_ISA_MASK, EF_M68K_ISA_A_NODIV, EF_M68K_ISA_A, EF_M68K_ISA_A_PLUS, EF_M68K_ISA_B_NOUSP, EF_M68K_ISA_B, EF_M68K_ISA_C, EF_M68K_MAC_MASK, EF_M68K_MAC, EF_M68K_EMAC, EF_M68K_EMAC_B, EF_M68K_FLOAT): Rename to EF_M68K_CF_ISA_MASK, EF_M68K_CF_ISA_A_NODIV, EF_M68K_CF_ISA_A, EF_M68K_CF_ISA_A_PLUS, EF_M68K_CF_ISA_B_NOUSP, EF_M68K_CF_ISA_B, EF_M68K_CF_ISA_C, EF_M68K_CF_MAC_MASK, EF_M68K_CF_MAC, EF_M68K_CF_EMAC, EF_M68K_CF_EMAC_B, EF_M68K_CF_FLOAT, respectively.
2006-12-06merge from gccDJ Delorie1-1/+1
2006-12-06Define ATTRIBUTE_PACKED and use as necessary.Nick Clifton6-8/+27
2006-11-30include:Joern Rennecke2-0/+13
2006-05-03 Andrew Stubbs <andrew.stubbs@st.com> J"orn Rennecke <joern.rennecke@st.com> PR driver/29931 * libiberty.h (make_relative_prefix_ignore_links): Declare. libiberty: 2006-05-03 Andrew Stubbs <andrew.stubbs@st.com> J"orn Rennecke <joern.rennecke@st.com> PR driver/29931 * make-relative-prefix.c (make_relative_prefix_1): New function, broken out of make_relative_prefix. Make link resolution dependent on new parameter. (make_relative_prefix): Use make_relative_prefix_1. (make_relative_prefix_ignore_links): New function.
2006-11-27Remove entries checked in by accident.H.J. Lu1-610/+0
2006-11-27bfd/Bob Wilson2-1/+15
* elf32-xtensa.c (elf_xtensa_special_sections): Add .xtensa.info. gas/ * config/tc-xtensa.c (XSHAL_ABI): Add default definition. (directive_state): Disable scheduling by default. (xtensa_add_config_info): New. (xtensa_end): Call xtensa_add_config_info. gas/testsuite/ * gas/elf/section2.e-xtensa: New file. * gas/elf/elf.exp: Use it. include/ * xtensa-config.h (XSHAL_ABI): New. (XTHAL_ABI_WINDOWED, XTHAL_ABI_CALL0): New. ld/ * emultempl/xtensaelf.em (XSHAL_ABI): Add default definition. (replace_insn_sec_with_prop_sec): Use bfd_make_section_with_flags. Delete redundant code to set sections flags and alignment. (xt_config_info_unpack_and_check, check_xtensa_info): New. (elf_xtensa_after_open): Iterate over input statements instead of link_info.input_bfds. (elf_xtensa_before_allocation): Likewise. Call check_xtensa_info for each input, and write a new .xtensa.info section in the output.
2006-11-27 * xtensa-isa.h (STATIC_LIBISA): Delete.Bob Wilson2-6/+7
2006-11-14* peXXigen.c: Updates for PE/COFF V8.0, and clarificationNick Clifton3-0/+26
(dir_names): Added CLR Runtime Header to dir_names[]. (_bfd_XX_print_private_bfd_data_common): Added EFI_ROM and XBOX subsystem names (_bfd_XXi_swap_aouthdr_in, _bfd_XXi_swap_aouthdr_out) (pe_print_idata, pe_print_edata) (_bfd_XX_bfd_copy_private_bfd_data_common) (_bfd_XXi_final_link_postscript): Use #DEFINEs for index into DataDirectory. * pe.h: Added defines for IMAGE_SUBSYSTEM_EFI_ROM and IMAGE_SUBSYSTEM_XBOX. * internal.h: Added defines for PE directory entry types. NB: in internal.h because IMAGE_NUMBEROF_DIRECTORY_ENTRYIES is in pe.h
2006-11-08gas/H.J. Lu2-22/+26
2006-11-08 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.h (CpuPNI): Removed. (CpuUnknownFlags): Replace CpuPNI with CpuSSE3. * config/tc-i386.c (md_assemble): Likewise. include/opcode/ 2006-11-08 H.J. Lu <hongjiu.lu@intel.com> * i386.h (i386_optab): Replace CpuPNI with CpuSSE3.
2006-10-312006-10-30 Paul Brook <paul@codesourcery.com>Paul Brook2-0/+11
binutils/ * objdump.c (disassemble_section): Set info->symtab_pos. (disassemble_data): Set info->symtab and info->symtab_size. include/ * dis-asm.h (disassemble_info): Add symtab, symtab_pos and symtab_size. opcodes/ * arm-dis.c (last_is_thumb, last_mapping_sym, last_mapping_addr): New. (get_sym_code_type): New function. (print_insn): Search for mapping symbols.
2006-10-31* tc-score.c (data_op2): Check invalid operands.Nick Clifton2-0/+615
(my_get_expression): Const operand of some instructions can not be symbol in assembly. (get_insn_class_from_type): Handle instruction type Insn_internal. (do_macro_ldst_label): Modify inst.type. (Insn_PIC): Delete. * score-inst.h (enum score_insn_type): Add Insn_internal. * tc-score.c (data_op2): The immediate value in lw is 15 bit signed. * score-dis.c (print_insn): Correct the error code to print correct PCE instruction disassembly.
2006-10-30bfd/H.J. Lu2-0/+10
2006-10-30 H.J. Lu <hongjiu.lu@intel.com> PR ld/3111 * elf-bfd.h (elf_obj_tdata): Add symbuf. (_bfd_elf_section_already_linked): Add struct bfd_link_info *. (_bfd_elf_check_kept_section): Likewise. (bfd_elf_match_symbols_in_sections): Likewise. * elf.c (assign_section_numbers): Updated to add struct bfd_link_info *. (bfd_elf_match_symbols_in_sections): Updated. Cache symbol buffer if info->reduce_memory_overheads is false. * elflink.c (match_group_member): Updated to add struct bfd_link_info *. (_bfd_elf_check_kept_section): Likewise. (elf_link_input_bfd): Likewise. (_bfd_elf_section_already_linked): Likewise. (bfd_elf_final_link): Free symbol buffer if info->reduce_memory_overheads is false. * libbfd-in.h (_bfd_nolink_section_already_linked): Add struct bfd_link_info *. (_bfd_generic_section_already_linked): Likewise. * libbfd.h: Regenerated. * linker.c (bfd_section_already_linked): Add struct bfd_link_info *. (_bfd_generic_section_already_linked): Likewise. * targets.c (bfd_target): Add struct bfd_link_info * to _section_already_linked. * bfd-in2.h: Regenerated. include/ 2006-10-30 H.J. Lu <hongjiu.lu@intel.com> PR ld/3111 * bfdlink.h (bfd_link_info): Add reduce_memory_overheads. ld/ 2006-10-30 H.J. Lu <hongjiu.lu@intel.com> PR ld/3111 * ld.h (args_type): Remove reduce_memory_overheads. * ldlang.c (lang_map): Updated. (section_already_linked): Likewise. (print_input_section): Likewise. * ldmain.c (main): Likewise. * lexsup.c (parse_args): Likewise.
2006-10-28include/elf/Richard Sandiford2-1/+7
* mips.h (R_MIPS_GLOB_DAT): Define (R_MIPS_max): Bump by 1. bfd/ * elf32-mips.c (elf_mips_howto_table_rel): Add R_MIPS_GLOB_DAT. * elfn32-mips.c (elf_mips_howto_table_rel): Likewise. (elf_mips_howto_table_rela): Likewise. * elf64-mips.c (mips_elf64_howto_table_rel): Likewise. (mips_elf64_howto_table_rela): Likewise.
2006-10-25New Cell SPU port.Alan Modra8-0/+621
2006-10-24Add powerpc cell support.Alan Modra2-0/+6
2006-10-23Fix AMDFAM10 POPCNT instructionMichael Meissner2-1/+6
2006-10-19Fix score bugsNick Clifton2-10/+15
2006-10-17 bfd/Mark Shinwell2-0/+17
* elf32-arm.c (elf32_arm_howto_table_1): Change offset for R_THM_CALL to 25 and remove FIXME comment. (using_thumb2): New function. (elf32_arm_final_link_relocate): Cope with Thumb-2 BL encoding. include/ * elf/arm.h: Define TAG_CPU_ARCH_* constants. ld/testsuite/ * ld-arm/arm-elf.exp: Add thumb1-bl, thumb2-bl, thumb2-bl-as-thumb1-bad and thumb2-bl-bad tests. * ld-arm/thumb1-bl.d: New. * ld-arm/thumb1-bl.s: New. * ld-arm/thumb2-bl-as-thumb1-bad.d: New. * ld-arm/thumb2-bl-as-thumb1-bad.s: New. * ld-arm/thumb2-bl-bad.d: New. * ld-arm/thumb2-bl-bad.s: New. * ld-arm/thumb2-bl.d: New. * ld-arm/thumb2-bl.s: New.
2006-09-28gas/H.J. Lu2-34/+38
2006-09-28 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.h (CpuMNI): Renamed to ... (CpuSSSE3): This. (CpuUnknownFlags): Updated. (processor_type): Replace PROCESSOR_YONAH with PROCESSOR_CORE and PROCESSOR_MEROM with PROCESSOR_CORE2. * config/tc-i386.c: Updated. * doc/c-i386.texi: Likewise. * config/tc-i386.c (cpu_arch): Add ".ssse3", "core" and "core2". include/opcode/ 2006-09-28 H.J. Lu <hongjiu.lu@intel.com> * i386.h: Replace CpuMNI with CpuSSSE3.
2006-09-26bfd/Joseph Myers2-0/+10
2006-09-26 Mark Shinwell <shinwell@codesourcery.com> Joseph Myers <joseph@codesourcery.com> Ian Lance Taylor <ian@wasabisystems.com> Ben Elliston <bje@wasabisystems.com> * archures.c: Add definition for bfd_mach_arm_iWMMXt2. * cpu-arm.c (processors): Add bfd_mach_arm_iWMMXt2. (arch_info_struct, bfd_arm_update_notes): Likewise. (architectures): Likewise. (bfd_arm_merge_machines): Check for iWMMXt2. * bfd-in2.h: Rebuild. gas/ 2006-09-26 Mark Shinwell <shinwell@codesourcery.com> Joseph Myers <joseph@codesourcery.com> Ian Lance Taylor <ian@wasabisystems.com> Ben Elliston <bje@wasabisystems.com> * config/tc-arm.c (arm_cext_iwmmxt2): New. (enum operand_parse_code): New code OP_RIWR_I32z. (parse_operands): Handle OP_RIWR_I32z. (do_iwmmxt_wmerge): New function. (do_iwmmxt_wldstd): Handle iwmmxt2 case where second operand is a register. (do_iwmmxt_wrwrwr_or_imm5): New function. (insns): Mark instructions as RIWR_I32z as appropriate. Also add torvsc<b,h,w>, wabs<b,h,w>, wabsdiff<b,h,w>, waddbhus<l,m>, waddhc, waddwc, waddsubhx, wavg4{r}, wmaddu{x,n}, wmadds{x,n}, wmerge, wmiaxy{n}, wmiawxy{n}, wmul<sm,um>{r}, wmulw<um,sm,l>{r}, wqmiaxy{n}, wqmulm{r}, wqmulwm{r}, wsubaddhx. (md_begin): Handle IWMMXT2. (arm_cpus): Add iwmmxt2. (arm_extensions): Likewise. (arm_archs): Likewise. gas/testsuite/ 2006-09-26 Mark Shinwell <shinwell@codesourcery.com> Joseph Myers <joseph@codesourcery.com> Ian Lance Taylor <ian@wasabisystems.com> Ben Elliston <bje@wasabisystems.com> * gas/arm/iwmmxt2.s: New file. * gas/arm/iwmmxt2.d: New file. include/opcode/ 2006-09-26 Mark Shinwell <shinwell@codesourcery.com> Joseph Myers <joseph@codesourcery.com> Ian Lance Taylor <ian@wasabisystems.com> Ben Elliston <bje@wasabisystems.com> * arm.h (ARM_CEXT_IWMMXT2, ARM_ARCH_IWMMXT2): Define. opcodes/ 2006-09-26 Mark Shinwell <shinwell@codesourcery.com> Joseph Myers <joseph@codesourcery.com> Ian Lance Taylor <ian@wasabisystems.com> Ben Elliston <bje@wasabisystems.com> * arm-dis.c (coprocessor_opcodes): The X-qualifier to WMADD may only be used with the default multiply-add operation, so if N is set, don't bother printing X. Add new iwmmxt instructions. (IWMMXT_INSN_COUNT): Update. (iwmmxt_wwssnames): Qualify "wwss" names at index 2, 6, 10 and 14 with a 'c' suffix. (print_insn_coprocessor): Check for iWMMXt2. Handle format specifiers 'r', 'i'.
2006-09-20Add x86_64-mingw64 targetNick Clifton5-5/+114
2006-09-16Add support for Score target.Nick Clifton8-39/+970
2006-09-07bfd/H.J. Lu2-0/+18
2006-09-07 H.J. Lu <hongjiu.lu@intel.com> * elf-bfd.h (elf_link_hash_entry): Add a dynamic field. (bfd_elf_link_mark_dynamic_symbol): New. (SYMBOLIC_BIND): New. * elf32-i386.c (elf_i386_check_relocs): Replace info->symbolic with SYMBOLIC_BIND (info, h). (elf_i386_relocate_section): Likewise. * elf64-x86-64.c (elf64_x86_64_check_relocs): Likewise. (elf64_x86_64_relocate_section): Likewise. * elfxx-ia64.c (elfNN_ia64_check_relocs): Likewise. * elflink.c (bfd_elf_link_mark_dynamic_symbol): New. (bfd_elf_record_link_assignment): Call bfd_elf_link_mark_dynamic_symbol on new entry. (_bfd_elf_merge_symbol): Likewise. (_bfd_elf_export_symbol): Return if the symbol isn't exported. (_bfd_elf_fix_symbol_flags): Replace info->symbolic with SYMBOLIC_BIND (info, h). (_bfd_elf_dynamic_symbol_p): Likewise. (_bfd_elf_symbol_refs_local_p): Likewise. (bfd_elf_size_dynamic_sections): Updated. include/ 2006-09-07 H.J. Lu <hongjiu.lu@intel.com> * bfdlink.h (bfd_elf_dynamic_list): New. (bfd_link_info): Add a dynamic field. ld/ 2006-09-07 H.J. Lu <hongjiu.lu@intel.com> * Makefile.am (CXX): Set to g++. (CXX_FOR_TARGET): Likewise. * Makefile.in: Regenerated. * NEWS: Mention --dynamic-list. * ld.texinfo: Document --dynamic-list. * ldgram.y: Support dynamic list. * ldlang.c (lang_process): Call lang_finalize_version_expr_head on link_info.dynamic if needed. (lang_append_dynamic_list): New. (lang_append_dynamic_list_cpp_typeinfo): New. * ldlang.h (lang_append_dynamic_list): Likewise. * ldlang.h (lang_append_dynamic_list_cpp_typeinfo): Likewise. * ldlex.h (input_enum): Add input_dynamic_list. * ldlex.l: Handle it. * ldmain.c (main): Initialize link_info.dynamic. * lexsup.c (option_values): Add OPTION_DYNAMIC_LIST and OPTION_DYNAMIC_LIST_CPP_TYPEINFO. (ld_options): Add entries for OPTION_DYNAMIC_LIST and OPTION_DYNAMIC_LIST_CPP_TYPEINFO. (parse_args): Handle OPTION_DYNAMIC_LIST and OPTION_DYNAMIC_LIST_CPP_TYPEINFO. ld/testsuite/ 2006-09-07 H.J. Lu <hongjiu.lu@intel.com> * ld-elf/dl1.c: New file. * ld-elf/dl1.list: Likewise. * ld-elf/dl1.out: Likewise. * ld-elf/dl1main.c: Likewise. * ld-elf/dl2.c: Likewise. * ld-elf/dl2.list: Likewise. * ld-elf/dl2a.out: Likewise. * ld-elf/dl2b.out: Likewise. * ld-elf/dl2main.c: Likewise. * ld-elf/dl2xxx.c: Likewise. * ld-elf/dl2xxx.list: Likewise. * ld-elf/dl3.cc: Likewise. * ld-elf/dl3.list: Likewise. * ld-elf/dl3a.out: Likewise. * ld-elf/dl3b.out: Likewise. * ld-elf/dl3header.h: Likewise. * ld-elf/dl3main.cc: Likewise. * ld-elf/shared.exp: Updated. * lib/ld-lib.exp (run_ld_link_exec_tests): Take an optional argument for source language. Use CC/CXX for link, depending on source language. (run_cc_link_tests): Likewise.
2006-08-04* ldmain.c (main): Initialise print_gc_sections field of link_info structure.Nick Clifton2-0/+7
* lexsup.c: Add --print-gc-sections and --no-print-gc-sections switches. * ld.texinfo: Document new switches. * NEWS: Mention new switches. * bfdlink.h (struct bfd_link_info): New field: print_gc_sections. * elflink.c (elf_gc_sweep): If info.print_gc_sections is true, list removed sections to stderr.
2006-07-142006-07-14 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2-12/+18
* i386.h (i386_optab): Remove InvMem from maskmovq, movhlps, movlhps, movmskps, pextrw, pmovmskb, movmskpd, maskmovdqu, movdq2q and movq2dq.
2006-07-13Add amdfam10 instructionsMichael Meissner2-0/+19
2006-07-10include/Jakub Jelinek4-0/+17
* bfdlink.h (struct bfd_link_info): Add emit_hash and emit_gnu_hash bitfields. include/elf/ * common.h (SHT_GNU_HASH, DT_GNU_HASH): Define. ld/ * scripttempl/elf.sc: Add .gnu.hash section. * emultempl/elf32.em (OPTION_HASH_STYLE): Define. (gld${EMULATION_NAME}_add_options): Register --hash-style option. (gld${EMULATION_NAME}_handle_option): Handle it. (gld${EMULATION_NAME}_list_options): Document it. * ldmain.c (main): Initialize emit_hash and emit_gnu_hash. * ld.texinfo: Document --hash-style option. bfd/ * elf.c (_bfd_elf_print_private_bfd_data): Handle DT_GNU_HASH. (bfd_section_from_shdr, elf_fake_sections, assign_section_numbers): Handle SHT_GNU_HASH. (special_sections_g): Include .gnu.hash section. (bfd_elf_gnu_hash): New function. * elf-bfd.h (bfd_elf_gnu_hash, _bfd_elf_hash_symbol): New prototypes. (struct elf_backend_data): Add elf_hash_symbol method. * elflink.c (_bfd_elf_link_create_dynamic_sections): Create .hash only if info->emit_hash, create .gnu.hash section if info->emit_gnu_hash. (struct collect_gnu_hash_codes): New type. (elf_collect_gnu_hash_codes, elf_renumber_gnu_hash_syms, _bfd_elf_hash_symbol): New functions. (compute_bucket_count): Don't compute HASHCODES array, instead add that and NSYMS as arguments. Use bed->s->sizeof_hash_entry instead of bed->s->arch_size / 8. Fix .hash size estimation. When not optimizing, use the number of hashed symbols rather than dynsymcount. (bfd_elf_size_dynamic_sections): Only add DT_HASH if info->emit_hash, and ADD DT_GNU_HASH if info->emit_gnu_hash. (bfd_elf_size_dynsym_hash_dynstr): Size .hash only if info->emit_hash, adjust compute_bucket_count caller. Create and populate .gnu.hash section if info->emit_gnu_hash. (elf_link_output_extsym): Only populate .hash section if finfo->hash_sec != NULL. (bfd_elf_final_link): Adjust assertion. Handle DT_GNU_HASH. * elfxx-target.h (elf_backend_hash_symbol): Define if not yet defined. (elfNN_bed): Add elf_backend_hash_symbol. * elf64-x86-64.c (elf64_x86_64_hash_symbol): New function. (elf_backend_hash_symbol): Define. * elf32-i386.c (elf_i386_hash_symbol): New function. (elf_backend_hash_symbol): Define. binutils/ * readelf.c (get_dynamic_type): Handle DT_GNU_HASH. (get_section_type_name): Handle SHT_GNU_HASH. (dynamic_info_DT_GNU_HASH): New variable. (process_dynamic_section): Handle DT_GNU_HASH. (process_symbol_table): Print also DT_GNU_HASH histogram. ld/testsuite/ * ld-powerpc/tlsso32.r: Adjust. * ld-powerpc/tlsso32.d: Adjust. * ld-powerpc/tlsso32.g: Adjust. * ld-powerpc/tlsso.r: Adjust. * ld-powerpc/tlsso.g: Adjust. * ld-powerpc/tlstocso.g: Adjust.
2006-06-15 * include/elf/arm.h: Correct names of R_ARM_LDC_G{0,1,2}Mark Shinwell1-4/+3
to R_ARM_LDC_SB_G{0,1,2} respectively. bfd/ * bfd-in2.h: Regenerate. * elf32-arm.c (R_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0, R_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1, R_ARM_ALU_PC_G2, R_ARM_LDR_PC_G1, R_ARM_LDR_PC_G2, R_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G2, R_ARM_LDC_PC_G0, R_ARM_LDC_PC_G1, R_ARM_LDC_PC_G2, R_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0, R_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1, R_ARM_ALU_SB_G2, R_ARM_LDR_SB_G0, R_ARM_LDR_SB_G1, R_ARM_LDR_SB_G2, R_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G2, R_ARM_LDC_SB_G0, R_ARM_LDC_SB_G1, R_ARM_LDC_SB_G2): New relocation types. (R_ARM_PC13): Rename to AAELF name R_ARM_LDR_PC_G0 and adjust HOWTO entry to be consistent with R_ARM_LDR_PC_G1 and friends. (elf32_arm_howto_table_3): Delete; contents merged into elf32_arm_howto_table_2. (elf32_arm_howto_from_type): Adjust correspondingly. (elf32_arm_reloc_map): Extend with the above relocations. (calculate_group_reloc_mask): New function. (identify_add_or_sub): New function. (elf32_arm_final_link_relocate): Support for the above relocations. * reloc.c: Add enumeration entries for BFD_RELOC_ARM_... codes to correspond to the above relocations. gas/ * config/tc-arm.c (enum parse_operand_result): New. (struct group_reloc_table_entry): New. (enum group_reloc_type): New. (group_reloc_table): New array. (find_group_reloc_table_entry): New function. (parse_shifter_operand_group_reloc): New function. (parse_address_main): New function, incorporating code from the old parse_address function. To be used via... (parse_address): wrapper for parse_address_main; and (parse_address_group_reloc): new function, likewise. (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR, OP_ADDRGLDRS, OP_ADDRGLDC. (parse_operands): Support for these new operand codes. New macro po_misc_or_fail_no_backtrack. (encode_arm_cp_address): Preserve group relocations. (insns): Modify to use the above operand codes where group relocations are permitted. (md_apply_fix): Handle the group relocations ALU_PC_G0_NC through LDC_SB_G2. (tc_gen_reloc): Likewise. (arm_force_relocation): Leave group relocations for the linker. (arm_fix_adjustable): Likewise. gas/testsuite/ * gas/arm/group-reloc-alu.d: New test. * gas/arm/group-reloc-alu-encoding-bad.d: New test. * gas/arm/group-reloc-alu-encoding-bad.l: New test. * gas/arm/group-reloc-alu-encoding-bad.s: New test. * gas/arm/group-reloc-alu-parsing-bad.d: New test. * gas/arm/group-reloc-alu-parsing-bad.l: New test. * gas/arm/group-reloc-alu-parsing-bad.s: New test. * gas/arm/group-reloc-alu.s: New test. * gas/arm/group-reloc-ldc.d: New test. * gas/arm/group-reloc-ldc-encoding-bad.d: New test. * gas/arm/group-reloc-ldc-encoding-bad.l: New test. * gas/arm/group-reloc-ldc-encoding-bad.s: New test. * gas/arm/group-reloc-ldc-parsing-bad.d: New test. * gas/arm/group-reloc-ldc-parsing-bad.l: New test. * gas/arm/group-reloc-ldc-parsing-bad.s: New test. * gas/arm/group-reloc-ldc.s: New test. * gas/arm/group-reloc-ldr.d: New test. * gas/arm/group-reloc-ldr-encoding-bad.d: New test. * gas/arm/group-reloc-ldr-encoding-bad.l: New test. * gas/arm/group-reloc-ldr-encoding-bad.s: New test. * gas/arm/group-reloc-ldr-parsing-bad.d: New test. * gas/arm/group-reloc-ldr-parsing-bad.l: New test. * gas/arm/group-reloc-ldr-parsing-bad.s: New test. * gas/arm/group-reloc-ldr.s: New test. * gas/arm/group-reloc-ldrs.d: New test. * gas/arm/group-reloc-ldrs-encoding-bad.d: New test. * gas/arm/group-reloc-ldrs-encoding-bad.l: New test. * gas/arm/group-reloc-ldrs-encoding-bad.s: New test. * gas/arm/group-reloc-ldrs-parsing-bad.d: New test. * gas/arm/group-reloc-ldrs-parsing-bad.l: New test. * gas/arm/group-reloc-ldrs-parsing-bad.s: New test. * gas/arm/group-reloc-ldrs.s: New test. ld/testsuite/ * ld-arm/group-relocs-alu-bad.d: New test. * ld-arm/group-relocs-alu-bad.s: New test. * ld-arm/group-relocs.d: New test. * ld-arm/group-relocs-ldc-bad.d: New test. * ld-arm/group-relocs-ldc-bad.s: New test. * ld-arm/group-relocs-ldr-bad.d: New test. * ld-arm/group-relocs-ldr-bad.s: New test. * ld-arm/group-relocs-ldrs-bad.d: New test. * ld-arm/group-relocs-ldrs-bad.s: New test. * ld-arm/group-relocs.s: New test. * ld-arm/arm-elf.exp: Wire in new tests.
2006-06-12gas/testsuite/H.J. Lu2-1/+9
2006-06-12 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/i386.exp: Run nops and x86-64-nops. * gas/i386/nops.d: New file. * gas/i386/nops.s: Likewise. * gas/i386/x86-64-nops.d: Likewise. * gas/i386/x86-64-nops.s: Likewise. include/opcode/ 2006-06-12 H.J. Lu <hongjiu.lu@intel.com> * i386.h (i386_optab): Add "nop" with memory reference. opcodes/ 2006-06-12 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (dis386_twobyte): Use "nopQ" for 0x1f. (twobyte_has_modrm): Set 1 for 0x1f.
2006-06-12gas/H.J. Lu2-9/+5
2006-06-12 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (process_suffix): Don't add rex64 for "xchg %rax,%rax". gas/testsuite/ 2006-06-12 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/opcode.s: Add "xchg %ax,%ax". * gas/i386/opcode.d: Updated. * gas/i386/x86-64-opcode.s: Add xchg %ax,%ax, xchg %eax,%eax, xchg %rax,%rax, rex64 xchg %rax,%rax and xchg %rax,%r8. * gas/i386/x86-64-opcode.d: Updated. include/opcode/ 2006-06-12 H.J. Lu <hongjiu.lu@intel.com> * i386.h (i386_optab): Update comment for 64bit NOP. opcodes/ 2006-06-12 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (NOP_Fixup): Removed. (NOP_Fixup1): New. (NOP_Fixup2): Likewise. (dis386): Use NOP_Fixup1 and NOP_Fixup2 on 0x90.
2006-06-07include/opcode/Alan Modra2-3/+13
* ppc.h (PPC_OPCODE_POWER6): Define. Adjust whitespace. gas/ * config/tc-ppc.c (parse_cpu): Handle "-mpower6". (md_show_usage): Document it. (ppc_setup_opcodes): Test power6 opcode flag bits. * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6". opcodes/ * ppc-dis.c (powerpc_dialect): Handle power6 option. (print_ppc_disassembler_options): Mention power6.
2006-06-06 [ gas/ChangeLog ]Thiemo Seufer1-8/+8
* config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro. (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete. (macro_build): Update comment. (mips_ip): Allow DSP64 instructions for MIPS64R2. (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and CPU_HAS_MDMX. (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and MIPS_CPU_ASE_MDMX flags for sb1. [ gas/testsuite/ChangeLog ] * gas/mips/mips64-dsp.s, gas/mips/mips64-dsp.d: New DSP64 tests. * gas/mips/mips.exp: Run DSP64 tests. [ opcodes/ChangeLog ] * mips-dis.c: Disassemble DSP64 instructions for MIPS64R2. * mips-opc.c: Add DSP64 instructions.
2006-06-05 [ gas/ChangeLog ]Thiemo Seufer2-2/+6
* config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew appropriate. (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate. (mips_ip): Make overflowed/underflowed constant arguments in DSP and MT instructions a fatal error. Use INSERT_OPERAND where appropriate. Improve warnings for break and wait code overflows. Use symbolic constant of OP_MASK_COPZ. (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate. [ gas/testsuite/ChangeLog ] * gas/mips/mips32-dsp.d, gas/mips/mips32-dsp.s, gas/mips/mips32-mt.d, gas/mips/mips32-mt.s: Remove instructions with invalid arguments. * gas/mips/mips32-dsp.l, gas/mips/mips32-mt.l: Delete file. [ include/opcode/ChangeLog ] * mips.h: Improve description of MT flags.
2006-06-01merge from gccDJ Delorie1-0/+17
2006-06-01include/elf/H.J. Lu2-15/+35
2006-05-31 H.J. Lu <hongjiu.lu@intel.com> * internal.h (ELF_SECTION_SIZE): New. (ELF_IS_SECTION_IN_SEGMENT): Likewise. (ELF_IS_SECTION_IN_SEGMENT_FILE): Updated. (ELF_IS_SECTION_IN_SEGMENT_MEMORY): Likewise. ld/testsuite/ 2006-05-31 H.J. Lu <hongjiu.lu@intel.com> * ld-elf/binutils.exp: Make it Linux only. (strip_test): Renamed to binutils_test. Check for unsupported options. Add more tests. * ld-elf/commonpage1.d: Make it Linux only. * ld-elf/maxpage1.d: Likewise. * ld-elf/maxpage1.s: Add main, start and __start. * ld-elf/maxpage2.d: New file. * ld-elf/tbss1.s: Likewise. * ld-elf/tbss2.s: Likewise. * ld-elf/tdata1.s: Likewise. * ld-elf/tdata2.s: Likewise.
2006-05-27bfd/Alan Modra2-1/+10
* elf.c (assign_file_positions_for_load_sections): Retrieve maxpagesize from m->p_align if it is valid. Set p_vaddr, p_paddr and p_align earlier. Revert 2006-05-19 change to p_align. (copy_elf_program_header): Copy p_align. Set p_align_valid. include/elf/ * internal.h (elf_segment_map): Add p_align and p_align_valid.
2006-05-25include/opcodes/Richard Sandiford2-0/+5
* m68k.h (mcf_mask): Define. opcodes/ * m68k-opc.c (m68k_opcodes): Fix the masks of the Coldfire fmovemd and fmovem entries. Put register list entries before immediate mask entries. Use "l" rather than "L" in the fmovem entries. * m68k-dis.c (match_insn_m68k): Remove the PRIV argument and work it out from INFO. (m68k_scan_mask): New function, split out from... (print_insn_m68k): ...here. If no architecture has been set, first try printing an m680x0 instruction, then try a Coldfire one. gas/testsuite/ * gas/m68k/mcf-fpu.s: Add fmovemd and fmovem instructions. * gas/m68k/mcf-fpu.d: Adjust accordingly.
2006-05-24Add TLS support for hppa-linuxNick Clifton2-15/+46
2006-05-24Add support for AVR6 familyNick Clifton2-1/+8
2006-05-05 [ gas/ChangeLog ]Thiemo Seufer2-0/+6
* config/tc-mips.c (macro_build): Add case 'k' to handle cache instruction. (macro): Add new case M_CACHE_AB. [ opcodes/ChangeLog ] * mips-opc.c: Add macro for cache instruction. [ include/opcode/ChangeLog ] * mips.h (enum): Add macro M_CACHE_AB.
2006-05-04[ gas/testsuite/ChangeLog ]Thiemo Seufer2-1/+11
2006-05-04 Thiemo Seufer <ths@mips.com> Nigel Stephens <nigel@mips.com> * gas/mips/mips.exp: Run mips32-dsp tests only for mips32r2. * gas/mips/set-arch.d: Adjust according to opcode table changes. [ include/opcode/ChangeLog ] 2006-05-04 Thiemo Seufer <ths@mips.com> Nigel Stephens <nigel@mips.com> David Ung <davidu@mips.com> * mips.h: Add INSN_SMARTMIPS define. [ opcodes/ChangeLog ] 2006-05-04 Thiemo Seufer <ths@mips.com> Nigel Stephens <nigel@mips.com> David Ung <davidu@mips.com> * mips-dis.c (mips_arch_choices): Add smartmips instruction decoding to MIPS32 and MIPS32R2. Limit DSP decoding to release 2 ISAs. Add MIPS3D decoding to MIPS32R2. Add MT decoding to MIPS64R2. * mips-opc.c: fix random typos in comments. (INSN_SMARTMIPS): New defines. (mips_builtin_opcodes): Add paired single support for MIPS32R2. Move bc3f, bc3fl, bc3t, bc3tl downwards. Move flushi, flushd, flushid, wb upwards. Move cfc3, ctc3 downwards. Rework the FP_S and FP_D flags to denote single and double register accesses separately. Move dmfc3, dmtc3, mfc3, mtc3 downwards. Allow jr.hb and jalr.hb for release 1 ISAs. Allow luxc1, suxc1 for MIPS32R2. Add SmartMIPS instructions. Add two-argument variants of bc2f, bc2fl, bc2t, bc2tl. Add mfhc2, mthc2 to release 2 ISAs. * mips16-opc.c (mips16_opcodes): Add sdbbp instruction.
2006-04-30[ gas/ChangeLog ]Thiemo Seufer2-0/+24
2006-04-30 Thiemo Seufer <ths@mips.com> David Ung <davidu@mips.com> * config/tc-mips.c (validate_mips_insn): Handling of udi cases. (mips_immed): New table that records various handling of udi instruction patterns. (mips_ip): Adds udi handling. [ include/opcode/ChangeLog ] 2006-04-30 Thiemo Seufer <ths@mips.com> David Ung <davidu@mips.com> * mips.h: Defines udi bits and masks. Add description of characters which may appear in the args field of udi instructions. [ opcodes/ChangeLog ] 2006-04-30 Thiemo Seufer <ths@mips.com> David Ung <davidu@mips.com> * mips-opc.c (mips_builtin_opcodes): Add udi instructions "udi0" to "udi15". * mips-dis.c (print_insn_args): Adds udi argument handling.
2006-04-29Move opcode ChangeLog entry to opcode/ChangeLog.H.J. Lu2-8/+8
2006-04-26 * mips.h: Improve comments describing the bitfield instructionThiemo Seufer2-6/+12
fields.
2006-04-26 * opcode/arm.h (FPU_VFP_EXT_V3): Define constant.Julian Brown2-1/+17
(FPU_NEON_EXT_V1): Likewise. (FPU_VFP_HARD): Update. (FPU_VFP_V3): Define macro. (FPU_ARCH_VFP_V3, FPU_ARCH_VFP_V3_PLUS_NEON_V1): Define macros.
2006-04-26Add missing changelog entryAndreas Jaeger1-0/+5
2006-04-12merge from gccDJ Delorie2-0/+45
2006-04-07Add support for attiny261, attiny461, attiny861, attiny25, attiny45,Nick Clifton2-13/+18
attiny85, attiny24, attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324, atmega644, atmega329, atmega3290, atmega649, atmega6490, atmega406, atmega640, atmega1280, atmega1281, at90can32, at90can64, at90usb646, at90usb647, at90usb1286 and at90usb1287. Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
2006-04-06bfd/H.J. Lu2-3/+11
2006-04-06 H.J. Lu <hongjiu.lu@intel.com> * elfxx-ia64.c (elfNN_ia64_relax_section): Skip unneeded passes with the skip_relax_pass_0 and skip_relax_pass_1 bits in the section structure. include/ 2006-04-06 H.J. Lu <hongjiu.lu@intel.com> * bfdlink.h (bfd_link_info): Replace need_relax_finalize with relax_pass. ld/ 2006-04-06 H.J. Lu <hongjiu.lu@intel.com> * emultempl/ia64elf.em: Set link_info.relax_pass to 2. Remove link_info.need_relax_finalize. * ldlang.c (relax_sections): New. (lang_process): Use. Call relax_sections link_info.relax_pass times. * ldmain.c (main): Set link_info.relax_pass to 1. Remove link_info.need_relax_finalize.
2006-03-28 gas:Nathan Sidwell2-38/+8
* config/tc-m68k.c (m68000_control_regs, m68010_control_regs, m68020_control_regs, m68040_control_regs, m68060_control_regs, mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs, mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs, mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ... (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl, mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl, mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl, mcf5282_ctrl, mcfv4e_ctrl): ... these. (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New. (struct m68k_cpu): Change chip field to control_regs. (current_chip): Remove. (control_regs): New. (m68k_archs, m68k_extensions): Adjust. (m68k_cpus): Reorder to be in cpu number order. Adjust. (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove. (find_cf_chip): Reimplement for new organization of cpu table. (select_control_regs): Remove. (mri_chip): Adjust. (struct save_opts): Save control regs, not chip. (s_save, s_restore): Adjust. (m68k_lookup_cpu): Give deprecated warning when necessary. (m68k_init_arch): Adjust. (md_show_usage): Adjust for new cpu table organization. include/opcodes: * m68k.h (cpu_m68k, cpu_cf, cpu_m68000, cpu_m68008, cpu_m68010, cpu_m68020, cpu_m68ec030, cpu_m68040, cpu_m68060, cpu_m68851, cpu_m68881, cpu_m68882, cpu_cpu32, cpu_cf5200, cpu_cf5206e, cpu_cf5208, cpu_cf521x, cpu_cf5213, cpu_cf5249, cpu_cf528x, cpu_cf5307, cpu_cf5329, cpu_cf5407, cpu_cf547x, cpu_cf548x): Remove.
generated by cgit v1.1 at 2024-11-27 05:01:50 +0000