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2022-04-20Stubs (added in a later patch) will generate new .loader symbols, once the al...Cl?ment Chigot1-0/+5
2022-04-07Add support for COFF secidx relocationsMark Harmstone1-0/+5
2022-04-01Recognize FreeBSD core dump note for x86 segment base registers.John Baldwin1-0/+4
2022-03-16binutils/readelf: handle AMDGPU relocation typesSimon Marchi1-0/+4
2022-03-16binutils/readelf: handle NT_AMDGPU_METADATA note nameSimon Marchi1-0/+4
2022-03-16binutils/readelf: decode AMDGPU-specific e_flagsSimon Marchi1-0/+5
2022-03-16binutils/readelf: handle AMDGPU OS ABIsSimon Marchi1-0/+5
2022-03-16bfd: add AMDGCN architectureSimon Marchi1-0/+5
2022-03-11gprofng: a new GNU profilerVladimir Mezentsev1-0/+6
2022-01-25Fix a probem building the binutils on SPARC/amd64Klaus Ziegler1-0/+5
2022-01-22Add markers for 2.38 branchNick Clifton1-0/+4
2022-01-13Synchronize binutils libiberty sources with gcc version.Nick Clifton1-0/+8
2022-01-02Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2021-12-07Support AT_FXRNG and AT_KPRELOAD on FreeBSD.John Baldwin1-0/+4
2021-12-01Fix the fields in the x_n union inside the the x_file structure so that point...Nick Clifton1-0/+6
2021-11-26opcodes/riscv: add disassembler options support to libopcodesAndrew Burgess1-0/+5
2021-11-16readelf: Support SHT_RELR/DT_RELR for -rFangrui Song1-0/+6
2021-09-07Revert: [AArch64] MTE corefile supportLuis Machado1-0/+9
2021-07-03Add markers for 2.37 branchNick Clifton1-0/+4
2021-07-03Synchronize libiberty sources (and include/demangle.h) with GCC master versionNick Clifton1-0/+9
2021-07-01opcodes: constify aarch64_opcode_tablesMike Frysinger1-0/+4
2021-07-01arm: don't treat XScale features as part of the FPU [PR 28031]Richard Earnshaw1-0/+5
2021-06-18elf: Add GNU_PROPERTY_UINT32_AND_XXX/GNU_PROPERTY_UINT32_OR_XXXH.J. Lu1-0/+7
2021-06-15Allow readelf to recognise GO buildid notes.Nick Clifton1-0/+4
2021-06-02arc: Construct disassembler options dynamicallyShahab Vahedi1-0/+4
2021-05-29MIPS/opcodes: Properly handle ISA exclusionMaciej W. Rozycki1-0/+6
2021-05-29MIPS/opcodes: Factor out ISA matching against flagsMaciej W. Rozycki1-0/+6
2021-05-29MIPS/opcodes: Do not use CP0 register names for control registersMaciej W. Rozycki1-0/+6
2021-05-29MIPS/opcodes: Free up redundant `g' operand codeMaciej W. Rozycki1-0/+5
2021-05-28x86: Restore PC16 relocation overflow checkH.J. Lu1-0/+5
2021-05-26x86: Propery check PC16 reloc overflow in 16-bit mode instructionsH.J. Lu1-0/+5
2021-05-23elf: Use official name LoongArch for EM_LOONGARCH.Chenghua Xu1-0/+5
2021-05-21[AArch64] MTE corefile supportLuis Machado1-0/+5
2021-05-07Fix .dwsect generation for XCOFF. Handle .function generated with DWARF on X...Cl?ment Chigot1-0/+6
2021-05-06or1k: Implement relocation R_OR1K_GOT_AHI16 for gotha()Stafford Horne1-0/+5
2021-05-06libctf, include: support an alternative encoding for nonrepresentable typesNick Alcock1-0/+6
2021-04-22Harmonize and improve auxiliary entries support for XCOFFCl?ment Chigot1-0/+9
2021-04-21Extend the description of PE header flags.Eli Zaretskii1-0/+6
2021-04-16PR27567, Linking PE files adds alignment section flags to executablesAlan Modra1-0/+12
2021-04-09PowerPC disassembly of pcrel referencesAlan Modra1-0/+4
2021-04-06Return symbol from symbol_at_address_funcAlan Modra1-0/+5
2021-04-01Remove strneq macro and use startswith.Martin Liska1-0/+4
2021-03-31Use bool in includeAlan Modra1-0/+14
2021-03-31Remove bfd_stdint.hAlan Modra1-0/+9
2021-03-29TRUE/FALSE simplificationAlan Modra1-0/+6
2021-03-29opcodes int vs bfd_boolean fixesAlan Modra1-0/+4
2021-03-25include: always do unsigned left-shift in CTF_SET_STIDNick Alcock1-0/+7
2021-03-19elf: Rename EM_INTEL205 to EM_INTELGTH.J. Lu1-0/+5
2021-03-16Fix a potential buffer overrun qwhen writing out PE aux entries.Nick Clifton1-0/+5
2021-03-16RISC-V : Support bitmanip-0.93 ZBA/ZBB/ZBC instructionsKuan-Lin Chen1-0/+5
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