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Adds two new external authors to etc/update-copyright.py to cover
bfd/ax_tls.m4, and adds gprofng to dirs handled automatically, then
updates copyright messages as follows:
1) Update cgen/utils.scm emitted copyrights.
2) Run "etc/update-copyright.py --this-year" with an extra external
author I haven't committed, 'Kalray SA.', to cover gas testsuite
files (which should have their copyright message removed).
3) Build with --enable-maintainer-mode --enable-cgen-maint=yes.
4) Check out */po/*.pot which we don't update frequently.
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Caused by commit 5a97377e5513, specifically this code added to
Target_powerpc::do_relax
+ if (parameters->options().output_is_position_independent())
+ this->rela_dyn_size_
+ = this->rela_dyn_section(layout)->current_data_size();
The problem here is that if .rela.dyn isn't already created then the
call to rela_dyn_section creates it, and as this comment in
Target_powerpc::do_finalize_sections says:
// Annoyingly, we need to make these sections now whether or
// not we need them. If we delay until do_relax then we
// need to mess with the relaxation machinery checkpointing.
We can't be creating sections in do_relax.
PR 30794
* powerpc.cc (Target_powerpc::do_relax): Only set rela_dyn_size_
for size == 64, and assert that rela_dyn_ already exists.
Tidy code setting plt_thread_safe, which also only needs to be
set when size == 64 for ELFv1.
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This reverts commit 675b9d612cc59446e84e2c6d89b45500cb603a8d.
See https://sourceware.org/pipermail/binutils/2023-August/128761.html.
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get_symbol_name currently returns "" for the usual STT_SECTION symbols
generated by gas. That's not very helpful, return the section name.
Demangle local symbols too, fixing an inconsistency in
issue_discarded_error where global symbols are demangled.
* object.cc (Sized_relobj_file::get_symbol_name): Return a
std::string. Return section name for STT_SECTION symbols with
zero st_name. Sanity check st_name, and don't run off the end
of an improperly terminated .strtab. Demangle sym names.
* object.h (Sized_relobj_file::get_symbol_name): Update decl.
* target-reloc.h (issue_discarded_error): Adjust.
* powerpc.cc (Target_powerpc::Relocate::relocate): Report reloc
type and symbol for relocation overflows.
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It is possible to build huge binaries on powerpc64, where 32-bit
addresses in debug info are insufficient to descibe locations in the
binary. Help out the user, and only warn about debug overflows.
* powerpc.cc (Target_powerpc::Relocate::relocate): Warn on
relocation overflows in debug info.
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PowerPC64 gold and ld.bfd implement an indirect branch trampoline,
used when the destination of a branch exceeds a bounce through another
"b" instruction. When generating PIEs or shared libraries, the
addresses need dynamic relocations. This was implemented in gold
using a dedicated relocation section, but this means the relative
relocations for these addresses are not sorted properly with other
dynamic relative relocations: gold doesn't support merging relocation
sections, then sorting. Instead we need to use a single .rela.dyn
section.
This is done by increasing the size of rela_dyn_ during do_relax to
account for needed dynamic relocations, delaying adding the actual
relocations until the end of relaxation once the layout has
stabilised.
* powerpc.cc (Target_powerpc): Add rela_dyn_size_;
(update_current_size): New function.
(Target_powerpc::do_relax): Capture the size of rela_dyn_ at
the start of relaxation. Artifically increase its size during
relaxation to account for needed indirect branches, and add
those relocations at the end.
(Output_data_brlt_powerpc::rel_, reset_brlt_sizes),
(finalize_brlt_sizes, add_reloc, set_current_size): Delete.
(Target_powerpc::make_brlt_section): Don't make reloc section.
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PowerPC gold adds relative dynamic relocs in do_relax. These aren't
accounted for in the value set in add_target_dynamic_tags, which is
called before do_relax. Provide a way of setting DT_RELCOUNT and
DT_RELACOUNT at the point where .dynamic is written.
* layout.cc (Layout::add_target_dynamic_tags): Add custom_relcount
parameter. Emit DT_RELCOUNT/RELACOUNT as a custom target handled
dynamic tag if set.
* layout.h(Layout::add_target_dynamic_tags): Update prototype.
* aarch64.cc (Target_aarch64::do_finalize_sections): Adjust
add_target_dynamic_tags call.
* arm.cc (Target_arm::do_finalize_sections): Likewise.
* i386.cc (Target_i386::do_finalize_sections): Likewise.
* mips.cc (Target_mips::do_finalize_sections): Likewise.
* s390.cc (Target_s390::do_finalize_sections): Likewise.
* sparc.cc (Target_sparc::do_finalize_sections): Likewise.
* tilegx.cc (Target_tilegx::do_finalize_sections): Likewise.
* x86_64.cc (Target_x86_64::do_finalize_sections): Likewise.
* powerpc.cc (Target_powerpc::do_finalize_sections): Likewise.
(Target_powerpc::do_dynamic_tag_custom_value): New function.
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DT_RELACOUNT was calculated incorrectly, and relative relocs not
sorted as they should be to the start of .rela.dyn, due to adding one
particular class of dynamic reloc using the wrong "add" method.
* powerpc.cc (Target_powerpc::Scan::global): Add relative
dyn relocs for ADDR64 and similar using add_global_relative.
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In commit 0961e631575b, the fix for PR30217, make_lplt_section and
make_brlt_section were changed to use rela_dyn_ rather than their own
separate dynamic reloc sections. This fails miserably whenever brlt_
is needed for long branches, due to needing to iterate sizing and thus
reset brlt_ sizes.
PR 30536
PR 30217
* powerpc.cc (Target_powerpc::make_brlt_section): Don't use
rela_dyn_.
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glibc's ld.so ignores local dynamic symbols. It's been that way
forever. We therefore can't use them on dynamic relocations. Fixing
that problem uncovered another problem in sorting of dynamic relocs,
caused no doubt by copying make_iplt_section (where we don't want
reloc sorting by the generic gold function, we want iplt relocs last)
to make_lplt_section (where we do want sorting).
PR 30217
* powerpc.cc (branch_needs_plt_entry): New function.
(Target_powerpc::plt_off): Use it here..
(Target_powerpc::Scan::global): ..and here to correct PLT16 reloc
handling for forced-local global symbols.
(Output_data_plt_powerpc::add_entry): Rename "stash"
parameter "is_local". Emit relative relocs for globals that
are forced local, and don't set_needs_dynsym_entry.
(Target_powerpc::make_lplt_section): Don't create a separate
reloc section, use rela_dyn.
(Target_powerpc::make_brlt_section): Likewise.
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The newer update-copyright.py fixes file encoding too, removing cr/lf
on binutils/bfdtest2.c and ld/testsuite/ld-cygwin/exe-export.exp, and
embedded cr in binutils/testsuite/binutils-all/ar.exp string match.
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We were attempting to set a BSS style section contents.
PR 29542
* powerpc.cc (Output_data_plt_powerpc::do_write): Don't set .plt,
.iplt or .lplt section contents when position independent.
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Prior to the inline plt call support (commit 08be322439), the only
local syms with plt entries were local ifunc symbols. There shouldn't
be stubs for other local symbols so don't look for them. The patch
also fixes minor bugs in get_reference_flags; Many relocs are valid
only for ppc64 and a couple only for ppc32.
PR 29462
* powerpc.cc (Target_powerpc::Relocate::relocate): Rename
use_plt_offset to pltcal_to_direct, invert logic. For relocs
not used with inline plt sequences against local symbols, only
look for stubs when the symbol is an ifunc.
(Target_powerpc::Scan::get_reference_flags): Correct reloc
handling for relocs not valid for both 32-bit and 64-bit.
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The result of running etc/update-copyright.py --this-year, fixing all
the files whose mode is changed by the script, plus a build with
--enable-maintainer-mode --enable-cgen-maint=yes, then checking
out */po/*.pot which we don't update frequently.
The copy of cgen was with commit d1dd5fcc38ead reverted as that commit
breaks building of bfp opcodes files.
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Gold version of commit 7aba54da42.
elfcpp/
* powerpc.h (R_PPC64_REL24_P9NOTOC): Define.
gold/
* powerpc.cc (Target_powerpc::maybe_skip_tls_get_addr_call,
is_branch_reloc, max_branch_delta): Handle R_PPC64_REL24_P9NOTOC.
(Target_powerpc::Branch_info::make_stub): Likewise.
(struct Plt_stub_ent): Add p9notoc_, p9off_, tsize_.
(struct Branch_stub_ent): Add p9notoc_, p9off_.
(Stub_table::add_plt_call_entry): Handle R_PPC64_REL24_P9NOTOC.
(Stub_table::add_long_branch_entry): Likewise.
(Stub_table::add_eh_frame): Likewise.
(Stub_table::plt_call_size): Return aligned size. Adjust callers.
Handle p9notoc_ sizing.
(Stub_table::do_write): Write out p9notoc_ stubs.
(Target_powerpc::Scan::get_reference_flags, local, global):
Handle R_PPC64_REL24_P9NOTOC.
(Target_powerpc::Relocate::relocate): Likewise.
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The fixes gold failures to handle inline PLT sequences properly.
PowerPC gold was always turning these back into direct calls due to
gsym->use_plt_offset() returning false. This is fixed for dynamic
linking by correcting get_reference_flags, and for static linking by
overriding use_plt_offset() in relocate(). The rest of the patch
revolves around needing to create PLT entries for inline PLT calls
when statically linking (for gcc -mlongcall). The lplt section
handled that for local symbols, now it does globals too.
* powerpc.cc (Target_powerpc::plt_off): Return proper section
for static link.
(Target_powerpc::symval_for_branch): Make public.
(Target_powerpc::make_lplt_section): Add Symbol_table* param.
Adjust all calls.
(Target_powerpc::make_local_plt_entry): Likewise.
(Target_powerpc::make_local_plt_entry): New variant for global syms.
(Powerpc_relobj::do_relocate_sections): Don't write lplt contents.
(Output_data_plt_powerpc::do_write): Write lplt contents here.
(Output_data_plt_powerpc::Output_data_plt_powerpc): Save
symbol table pointer. Adjust all uses.
(Output_data_plt_powerpc::add_entry): Add stash parameter. Don't
do dynamic reloc handling when no reloc section. Save symbol
for local plt entries.
(Output_data_plt_powerpc::add_local_entry): Save symbol.
(Output_data_plt_powerpc::Local_plt_ent): New class.
(Output_data_plt_powerpc::sym_ents_): New vector.
(Target_powerpc::Scan::get_reference_flags): Return
FUNCTION_CALL|RELATIVE_REF for inline plt relocs.
(Target_powerpc::Scan::global): Make entries in lplt for inline
plt call relocation symbols.
(Target_powerpc::Relocate::relocate): Rename has_plt_offset to
use_plt_offset. Set use_plt_offset for inline plt relocs.
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My previous PR27625 patch had a problem or two. For one, the error
"__tls_get_addr call lacks marker reloc" on processing some calls
before hitting a call without markers typically isn't seen. Instead a
gold assertion fails. Either way it would be a hard error, which
triggers on a file contained in libphobos.a when running the gcc
testsuite. A warning isn't even appropriate since the call involved
is one built by hand without any of the arg setup relocations that
might result in linker optimisation.
So this patch reverts most of commit 0af4fcc25dd5, instead entirely
ignoring the problem of mis-optimising old-style __tls_get_addr calls
without marker relocs. We can't handle them gracefully without
another pass over relocations before decisions are made about GOT
entries in Scan::global or Scan::local. That seems too costly, just
to link object files from 2009. What's more, there doesn't seem to be
any way to allow the libphobos explicit __tls_get_addr call, but not
old TLS sequences without marker relocs. Examining instructions
before the __tls_get_addr call is out of the question: program flow
might reach the call via a branch. Putting an R_PPC64_TLSGD marker
with zero sym on the call might be a solution, but current linkers
will then merrily optimise away the call!
PR gold/27625
* powerpc.cc (Powerpc_relobj): Delete no_tls_marker_, tls_marker_,
and tls_opt_error_ variables and accessors. Remove all uses.
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We can't get at section->address() until everything is laid out, so
trying to generalise the offset calculation rather than using a value
of 0x8000 (the old object->toc_base_offset()) was bound to fail.
got->g_o_t() is a little better than a hard-coded 0x8000.
* powerpc.cc (Target_powerpc::Scan::local, global): Don't use
toc_pointer() here.
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Split .got into two piece, one with the header and entries for small
model got entries, the other with entries for medium/large model got
entries. The idea is to better support mixed pcrel/non-pcrel code
where non-pcrel small-model .toc entries need to be within 32k of the
toc pointer.
* target.h (Target::tls_offset_for_local): Add got param.
(Target::tls_offset_for_global): Likewise.
(Target::do_tls_offset_for_local, do_tls_offset_for_global): Likewise.
* output.h (Output_data_got::Got_entry::write): Add got param.
* output.cc (Output_data_got::Got_entry::write): Likewise, pass to
tls_offset_for_local/global calls.
(Output_data_got::do_write): Adjust to suit.
* s390.cc (Target_s390::do_tls_offset_for_local): Likewise.
(Target_s390::do_tls_offset_for_global): Likewise.
* powerpc.cc (enum Got_type): Extend with small types, move from
class Target_powerpc.
(Target_powerpc::biggot_): New.
(Traget_powerpc::do_tls_offset_for_local, do_tls_offset_for_global,
got_size, got_section, got_base_offset): Handle biggot_.
(Target_powerpc::do_define_standard_symbols): Adjust.
(Target_powerpc::make_plt_section, do_finalize_sections): Likewise.
(Output_data_got_powerpc::Output_data_got_powerpc): Only make
64-bit header for small got section.
(Output_data_got_powerpc::g_o_t): Only return a result for small
got section.
(Output_data_got_powerpc::write): Only write small got section
header.
(Target_powerpc::Scan::local, global): Select small/big Got_type
and section to suit reloc.
(Target_powerpc::Relocate::relocate): Similarly.
(Sort_toc_sections): Rewrite.
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Code in powerpc.cc is pretending to support a per-object toc pointer
value, but powerpc gold has no real support for multi-toc. This patch
removes the pretense, tidying quite a lot in preparation for a
followup patch. If multi-toc is ever to be supported, don't revert
this patch but start by adding object parameter to toc_pointer() and
an object to Branch_stub_key.
* powerpc.cc (Powerpc_relobj::toc_base_offset): Delete.
(Target_powerpc::toc_pointer): New function. Use throughout.
(Target_powerpc::got_base_offset): New function. Use throughout..
(Output_data_got_powerpc::got_base_offset): ..in place of
this. Delete.
(Output_data_got_powerpc::Output_data_got_powerpc): Init
header_index_ to -1u for 64-bit, and make header here.
(Output_data_got_powerpc::set_final_data_size, reserve_ent): Don't
make 64-bit header here.
(Output_data_got_powerpc::g_o_t): Return toc pointer offset in
section for 64-bit. Use throughout.
(Stub_table): Remove toc_base_off_ from Branch_stub_key, and
object param on add_long_branch_entry and find_long_branch_entry.
Adjust all uses.
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Pass addends to all the GOT handling functions, plus remove some
extraneous asserts.
PR 28192
* powerpc.cc (Output_data_got_powerpc): Add addend parameter to
all methods creating got entries.
(Target_powerpc::Scan::local): Pass reloc addend to got handling
functions, and when creating dynamic got relocations.
(Target_powerpc::Scan::global): Likewise.
(Target_powerpc::Relocate::relocate): Likewise. Remove extraneous
assertions.
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This takes care of writing out GOT entries with addends. The local
symbol case was already largely handled, except for passing the addend
to tls_offset_for_local which might need the addend in a
local_got_offset call. That's needed also in tls_offset_for_global.
I'm assuming here that GOT entries for function symbols won't ever
have addends, and in particular that a GOT entry referencing PLT call
stub code won't want an offset into the code.
PR 28192
* output.cc (Output_data_got::Got_entry::write): Include addend
in global symbol value. Pass addend to tls_offset_for_*.
* powerpc.cc (Target_powerpc::do_tls_offset_for_local): Handle addend.
(Target_powerpc::do_tls_offset_for_global): Likewise.
* s390.cc (Target_s390::do_tls_offset_for_local): Likewise.
(Target_s390::do_tls_offset_for_global): Likewise.
* target.h (Target::tls_offset_for_local): Add addend param.
(Target::tls_offset_for_global): Likewise.
(Target::do_tls_offset_for_local): Likewise.
(Target::do_tls_offset_for_global): Likewise.
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Fixes a silly mistake in calculating the address of -Os out-of-line
register save/restore function copies. Copies of these linker defined
functions are added to stub sections when the original (in
target->savres_section) can't be reached.
* powerpc.cc (Target_powerpc::Relocate::relocate): Correct address
calculation of out-of-line save/restore function copies.
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This patch supports linking powerpc64 glibc with gold, specifically
the __tls_get_addr call in elf/dl-sym.c. That call lacks marker
relocations tying it to the arg setup instructions, but the arg setup
insns are also contructed lacking the usual relocations on a Global
Dynamic TLS code sequence. So there is no chance that anything in
that sequence might be wrongly edited by the linker.
In fact, the aim of linking glibc could have been supported by simply
omitting the error whenever TLS optimisation is disabled, as it is
when linking a shared library. The patch goes further than that,
disabling TLS GD and LD sequence optimisation on a per-object basis
for object files lacking marker relocs.
PR gold/27625
* powerpc.cc (Powerpc_relobj): Add no_tls_marker_, tls_marker_,
and tls_opt_error_ variables and accessors.
(Target_powerpc::Scan::local, global): Call set_tls_marker and
set_no_tls_marker for GD and LD code sequence relocations.
(Target_powerpc::Relocate::relocate): Downgrade the "lacks marker
reloc" error to a warning when safe to do so, and omit the error
entirely if not optimising TLS sequences. Do not optimise GD and
LD sequences for objects lacking marker relocs.
(Target_powerpc::relocate_relocs): Heed no_tls_marker here too.
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A testcase with only ifuncs can result in no plt section (ifunc plt
entries might instead be in iplt), which means we can get to this code
without a static link.
PR 27203
* powerpc.cc (do_plt_fde_location): Remove doing_static_link
assertion.
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This fixes a thinko in commit fa40fbe4849. st_other global entry bits
are relevant only for 64-bit ELFv2. PowerPC gold leaves local sym
vector of st_other bits as NULL for 32-bit, hence the segfault.
PR 27140
* powerpc.cc (Target_powerpc::Branch_info::make_stub): Only access
object->st_other() when 64-bit.
(Stub_table::add_long_branch_entry): Ignore "other" when 32-bit.
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incremental-dump wants to instantiate Target_powerpc without options
being set up. This patch fixes
internal error in options, at gold/parameters.h:92
* powerpc.cc (Target_powerpc::no_tprel_opt_): Rename from tprel_opt_.
Init to false.
(Target_powerpc::tprel_opt): Test parameters->options().tls_optimize().
(Target_powerpc::set_tprel_opt): Delete.
(Target_powerpc::set_no_tprel_opt): New function. Update all uses
of set_tprel_opt.
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PR 26902
* powerpc.cc (Relocate::relocate): Do not include local entry
offset of target function when computing the address of a stub.
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* powerpc.cc (Target_powerpc::tocsave_loc): Return a pointer.
(Target_powerpc::Relocate::relocate): Avoid -Wdangling-gsl error.
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Calling non-pcrel functions from pcrel code requires a stub to set up
r2. Gold created the stub, but an "optimisation" made the stub jump
to the function local entry, ie. r2 was not initialised.
This patch fixes that long branch stub problem, and another that might
occur for plt call stubs to local functions.
bfd/
* elf64-ppc.c (write_plt_relocs_for_local_syms): Don't do local
entry offset optimisation.
gold/
* powerpc.cc (Powerpc_relobj::do_relocate_sections): Don't do
local entry offset optimisation for lplt_section.
(Target_powerpc::Branch_info::make_stub): Don't add local
entry offset to long branch dest passed to
add_long_branch_entry. Do pass st_other bits.
(Stub_table::Branch_stub_ent): Add "other_" field.
(Stub_table::add_long_branch_entry): Add "other" param, and
save.
(Stub_table::branch_stub_size): Adjust long branch offset.
(Stub_table::do_write): Likewise.
(Target_powerpc::Relocate::relocate): Likewise.
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GOT relocations can refer directly to a function in a fixed position
executable, unlike ADDR64 which needs a global entry stub, or branch
relocs, which need PLT stubs.
* powerpc.cc (is_got_reloc): New function.
(Target_powerpc::Relocate::relocate): Use it here, exclude GOT
relocs when looking for stubs.
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Gold version of commit 3cd7c7d7ef.
* powerpc.cc (Target_powerpc): Rename power10_stubs_ to
power10_relocs_.
(Target_powerpc::set_power10_relocs): New accessor.
(Target_powerpc::set_power10_stubs): Delete.
(Target_powerpc::power10_stubs): Adjust.
(Target_powerpc::has_localentry0): New accessor.
(ld_0_11): New constant.
(glink_eh_frame_fde_64v1, glink_eh_frame_fde_64v2): Adjust.
(glink_eh_frame_fde_64v2_localentry0): New.
(Output_data_glink::pltresolve_size): Update.
(Output_data_glink::add_eh_frame): Use localentry0 version eh_frame.
(Output_data_glink::do_write): Move r2 save to start of ELFv2 stub
and only emit for has_localentry0. Don't use r2 in the stub.
(Target_powerpc::Scan::local, global): Adjust for
set_power10_relocs renaming.
(Target_powerpc::scan_relocs): Warn and reset plt_localentry0_.
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This stub doesn't have the r2 store at the beginning.
* powerpc.cc (Target_powerpc::Relocate::relocate): Don't skip
first insn of __tls_get_addr_opt stub.
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ppc64 ld optimises sequences like the following
addis 3,13,wot@tprel@ha
lwz 3,wot@tprel@l(3)
to
nop
lwz 3,wot@tprel(13)
when "wot" is located near enough to the thread pointer.
However, the ABI doesn't require that R_PPC64_TPREL16_HA always be on
an addis rt,13,imm instruction, and while ld checked for that on the
high-part instruction it didn't disable the optimisation on the
low-part instruction. This patch fixes that problem, disabling the
tprel optimisation globally if high-part instructions don't pass
sanity checks. The optimisation is also enabled for ppc32, where
before ld.bfd had the code in the wrong place and ld.gold had it in a
block only enabled for ppc64.
bfd/
* elf32-ppc.c (ppc_elf_check_relocs): Set has_tls_reloc for
high part tprel16 relocs.
(ppc_elf_tls_optimize): Sanity check high part tprel16 relocs.
Clear do_tls_opt on odd instructions.
(ppc_elf_relocate_section): Move TPREL16_HA/LO optimisation later.
Don't sanity check them here.
* elf64-ppc.c (ppc64_elf_check_relocs): Set has_tls_reloc for
high part tprel16 relocs.
(ppc64_elf_tls_optimize): Sanity check high part tprel16 relocs.
Clear do_tls_opt on odd instructions.
(ppc64_elf_relocate_section): Don't sanity check TPREL16_HA.
ld/
* testsuite/ld-powerpc/tls32.d: Update for TPREL_HA/LO optimisation.
* testsuite/ld-powerpc/tlsexe32.d: Likewise.
* testsuite/ld-powerpc/tlsldopt32.d: Likewise.
* testsuite/ld-powerpc/tlsmark32.d: Likewise.
* testsuite/ld-powerpc/tlsopt4_32.d: Likewise.
* testsuite/ld-powerpc/tprel.s,
* testsuite/ld-powerpc/tprel.d,
* testsuite/ld-powerpc/tprel32.d: New tests.
* testsuite/ld-powerpc/tprelbad.s,
* testsuite/ld-powerpc/tprelbad.d: New test.
* testsuite/ld-powerpc/powerpc.exp: Run them.
gold/
* powerpc.cc (Target_powerpc): Add tprel_opt_ and accessors.
(Target_powerpc::Scan::local): Sanity check tprel high relocs.
(Target_powerpc::Scan::global): Likewise.
(Target_powerpc::Relocate::relocate): Control tprel optimisation
with tprel_opt_ and enable for 32-bit.
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gold version of commit e10a07b32dc1.
* options.h (DEFINE_enum): Add optional_arg__ param, adjust
all uses.
(General_options): Add --power10-stubs and --no-power10-stubs.
* options.cc (General_options::finalize): Handle --power10-stubs.
* powerpc.cc (set_power10_stubs): Don't set when --power10-stubs=no.
(power10_stubs_auto): New.
(struct Plt_stub_ent): Add toc_ and tocoff_. Don't use a bitfield
for indx_.
(struct Branch_stub_ent): Add toc_and tocoff_. Use bitfields for
iter_, notoc_ and save_res_.
(add_plt_call_entry): Set toc_. Adjust resizing conditions for
--power10-stubs=auto.
(add_long_branch_entry): Set toc_.
(add_eh_frame, define_stub_syms): No longer use const_iterators
for plt and long branch stub iteration.
(build_tls_opt_head, build_tls_opt_tail): Change parameters and
return value. Move tests for __tls_get_addr to callers.
(plt_call_size): Handle --power10-stubs=auto.
(branch_stub_size): Likewise.
(Stub_table::do_write): Likewise.
(relocate): Likewise.
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These relocations should have had REL in their names, to reflect the
fact that they are pc-relative. Fix that now by adding _PCREL.
I've added some back-compatibility code to support anyone using
.reloc with the old relocations.
include/
* elf/ppc64.h (elf_ppc64_reloc_type): Rename
R_PPC64_GOT_TLSGD34 to R_PPC64_GOT_TLSGD_PCREL34,
R_PPC64_GOT_TLSLD34 to R_PPC64_GOT_TLSLD_PCREL34,
R_PPC64_GOT_TPREL34 to R_PPC64_GOT_TPREL_PCREL34, and
R_PPC64_GOT_DTPREL34 to R_PPC64_GOT_DTPREL_PCREL34.
bfd/
* reloc.c: Rename
BFD_RELOC_PPC64_GOT_TLSGD34 to BFD_RELOC_PPC64_GOT_TLSGD_PCREL34,
BFD_RELOC_PPC64_GOT_TLSLD34 to BFD_RELOC_PPC64_GOT_TLSLD_PCREL34,
BFD_RELOC_PPC64_GOT_TPREL34 to BFD_RELOC_PPC64_GOT_TPREL_PCREL34,
BFD_RELOC_PPC64_GOT_DTPREL34 to BFD_RELOC_PPC64_GOT_DTPREL_PCREL34.
* elf64-ppc.c: Update throughout for reloc renaming.
(ppc64_elf_reloc_name_lookup): Handle old reloc names.
* libbfd.h: Regenerate.
* bfd-in2.h: Regenerate.
gas/
* config/tc-ppc.c: Update throughout for reloc renaming.
elfcpp/
* powerpc.h: Rename
R_PPC64_GOT_TLSGD34 to R_PPC64_GOT_TLSGD_PCREL34,
R_PPC64_GOT_TLSLD34 to R_PPC64_GOT_TLSLD_PCREL34,
R_PPC64_GOT_TPREL34 to R_PPC64_GOT_TPREL_PCREL34, and
R_PPC64_GOT_DTPREL34 to R_PPC64_GOT_DTPREL_PCREL34.
gold/
* powerpc.cc: Update throughout for reloc renaming.
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PR 25882
bfd/
* elf32-ppc.c (_bfd_elf_ppc_merge_fp_attributes): Don't init FP
attributes from shared libraries, and do not return an error if
they don't match.
gold/
* powerpc.cc (merge_object_attributes): Replace name param with
obj param. Update callers. Don't init FP attributes from shared
libraries, and do not emit an error if they don't match.
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sym->object() could be either a Plugin or Powerpc_relobj. There could
be a situation when Pluginobj would be proccessed in
ppc_object->get_opd_ent(dst_off) as Powerpc_relobj and it leads to the
segmentation fault.
* powerpc.cc (do_gc_mark_symbol): Don't segfault on plugin symbols.
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Now that ISA3.1 is out we can finish with the powerxx silliness.
bfd/
* elf64-ppc.c: Rename powerxx to power10 throughout.
gas/
* config/tc-ppc.c (md_assemble): Update for PPC_OPCODE_POWER10
renaming.
* testsuite/gas/ppc/prefix-align.d: Use -mpower10/-Mpower10 in
place of -mfuture/-Mfuture.
* testsuite/gas/ppc/prefix-pcrel.d: Likewise.
* testsuite/gas/ppc/prefix-reloc.d: Likewise.
gold/
* powerpc.cc: Rename powerxx to power10 throughout.
include/
* elf/ppc64.h: Update comment.
* opcode/ppc.h (PPC_OPCODE_POWER10): Rename from PPC_OPCODE_POWERXX.
ld/
* testsuite/ld-powerpc/callstub-1.d: Use -mpower10/-Mpower10 in
place of -mfuture/-Mfuture.
* testsuite/ld-powerpc/notoc2.d: Likewise.
* testsuite/ld-powerpc/powerpc.exp: Likewise.
* testsuite/ld-powerpc/tlsgd.d: Likewise.
* testsuite/ld-powerpc/tlsie.d: Likewise.
* testsuite/ld-powerpc/tlsld.d: Likewise.
opcodes/
* ppc-dis.c (ppc_opts): Add "power10" entry.
(print_insn_powerpc): Update for PPC_OPCODE_POWER10 renaming.
* ppc-opc.c (POWER10): Rename from POWERXX. Update all uses.
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This patch corrects the set of dynamic relocations recognised by gold
as supported by glibc, and teaches ld.bfd to report an error similar
to the gold error. Note that ld --noinhibit-exec can be used to
produce an output, supporting older ld with newer glibc if the set of
supported glibc dynamic relocations changes.
bfd/
* elf64-ppc.c (ppc64_glibc_dynamic_reloc): New function.
(ppc64_elf_relocate_section): Error if emitting unsupported
dynamic relocations.
gold/
* powerpc.cc (Target_powerpc::Scan::check_non_pic): Move REL24
to 32-bit supported.
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Gold version of git commit c213164ad2.
elfcpp/
* powerpc.h (R_PPC64_TPREL34, R_PPC64_DTPREL34),
(R_PPC64_GOT_TLSGD34, R_PPC64_GOT_TLSLD34),
(R_PPC64_GOT_TPREL34, R_PPC64_GOT_DTPREL34): Define.
gold/
* powerpc.cc (Target_powerpc::Scan::get_reference_flags): Set
flags for new relocations, and some missing older relocs.
(Target_powerpc::Scan::local): Handle new pcrel tls relocs.
Call set_has_static_tls for tprel relocs.
(Target_powerpc::Scan::global): Likewise.
(Target_powerpc::Relocate::relocate): Handle new pcrel tls relocs.
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Relocations with right shifts were calculating wrong overflow status.
Since the addr34 split-field reloc is implemented as an 18-bit high
part with value shifted right by 16 and a 16-bit low part, most of the
pc-relative relocs were affected.
* powerpc.cc (Powerpc_relocate_functions::rela, rela_ua): Perform
signed right shift for signed overflow check.
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* powerpc.cc (xlate_pcrel_opt): New function.
(Target_powerpc::Relocate::relocate): Optimise PCREL34 and
GOT_PCREL34 sequences marked with PCREL_OPT.
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Note that gold won't remove unused GOT entries, in contrast to ld.bfd
which will.
* powerpc.cc (Powerpc_relobj::make_got_relative): New function.
(relative_value_is_known): New functions.
(Target_powerpc::Relocate::relocate): Edit code using
GOT16_HA, GOT16_LO_DS, and GOT_PCREL34 relocs.
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Also use pc-relative instructions for notoc stubs.
elfcpp/
* powerpc.h (R_PPC64_PCREL_OPT, R_PPC64_D34, R_PPC64_D34_LO),
(R_PPC64_D34_HI30, R_PPC64_D34_HA30, R_PPC64_PCREL34),
(R_PPC64_GOT_PCREL34, R_PPC64_PLT_PCREL34, R_PPC64_PLT_PCREL34_NOTOC),
(R_PPC64_ADDR16_HIGHER34, R_PPC64_ADDR16_HIGHERA34),
(R_PPC64_ADDR16_HIGHEST34, R_PPC64_ADDR16_HIGHESTA34),
(R_PPC64_REL16_HIGHER34, R_PPC64_REL16_HIGHERA34),
(R_PPC64_REL16_HIGHEST34, R_PPC64_REL16_HIGHESTA34),
(R_PPC64_D28, R_PPC64_PCREL28): Define.
gold/
* powerpc.cc (Target_powerpc): Add powerxx_stubs_ and accessor
functions.
(Target_powerpc::maybe_skip_tls_get_addr_call): Handle PLT_PCREL34
and PLT_PCREL34_NOTOC relocs.
(Powerpc_relocate_functions): Add addr34, addr34_hi, addr34_ha,
addr28, addr16_higher34, addr16_highera34, addr16_highest34,
addr16_highest34a functions.
(li_11_0, ori_11_11_0, sldi_11_11_34): Define.
(paddi_12_pc, pld_12_pc, pnop): Define.
(d34, ha34): New inline functions.
(Stub_table::add_plt_call_entry): Handle powerxx_stubs.
(Stub_table::add_eh_frame): Likewise.
(build_powerxx_offset): New function.
(Stub_table::plt_call_size): Handle powerxx_stubs.
(Stub_table::branch_stub_size): Likewise.
(Stub_table::do_write): Likewise.
(Target_powerpc::Scan::get_reference_flags): Handle new relocs.
(Target_powerpc::Scan::reloc_needs_plt_for_ifunc: Likewise.
(Target_powerpc::Scan::local, global, relocate): Likewise.
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When generating notoc call and branch stubs without the benefit of
pc-relative insns, the stubs need to use LR to access the run time PC.
All LR changes must be described in .eh_frame if we're to support
unwinding through asynchronous exceptions. That's what this patch
does.
The patch has gone through way too many iterations. At first I
attempted to add multiple FDEs, one for each stub. That ran into
difficulties with do_plt_fde_location which is only capable of setting
the address of a single FDE per Output_data section, and with removing
any FDEs added on a previous do_relax pass. Removing FDEs (git commit
be897fb774) went overboard in matching the FDE contents. That means
either stashing the contents created for add_eh_frame_for_plt to use
when calling remove_eh_frame_for_plt, or recreating contents on the
fly (*) just to remove FDEs. In fact, FDE content matching is quite
unnecesary. FDEs added by a previous do_relax pass are those with
u_.from_linker.post_map set. So they can easily be recognised just by
looking at that flag. This patch keeps that part of the multiple FDE
changes.
In the end I went for just one FDE per stub group to describe the call
stubs. That's reasonably efficient for the common case of only
needing to describe the __tls_get_addr_opt call stub. We don't expect
to be making many calls using notoc stubs without pc-relative insns.
*) Which has it's own set of problems. The contents must be recreated
using the old stub layout, but .eh_frame size can affect stub
requirements so you need to temporarily keep the old .eh_frame size
when creating new stubs, then reset .eh_frame size before adding new
FDEs.
* ehframe.cc (Fde::operator==): Delete.
(Cie::remove_fde): Delete.
(Eh_frame::remove_ehframe_for_plt): Delete fde_data and fde_length
parameters. Remove all post-map plt FDEs.
* ehframe.h (Fde:post_map): Make const, add variant to compare plt.
(Fde::operator==): Delete.
(Cie::remove_fde): Implement here.
(Cie::last_fde): New accessor.
(Eh_frame::remove_ehframe_for_plt): Update prototype.
* layout.cc (Layout::remove_eh_frame_for_plt): Delete fde_data and
fde_length parameters.
* layout.h (Layout::remove_eh_frame_for_plt): Update prototype.
* powerpc.cc (Stub_table::tls_get_addr_opt_bctrl_): Delete.
(Stub_table::plt_fde_len_, plt_fde_, init_plt_fde): Delete.
(Stub_table::add_plt_call_entry): Don't set tls_get_addr_opt_bctrl_.
(eh_advance): New function.
(stub_sort): New function.
(Stub_table::add_eh_frame): Emit eh_frame for notoc plt calls and
branches as well as __tls_get_addr_opt plt call stub.
(Stub_table::remove_eh_frame): Update to suit.
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Calls from notoc functions via the PLT need different stubs. Even
calls to local functions requiring a valid toc pointer must go via a
stub. This patch provides the support in gold.
elfcpp/
* powerpc.h (R_PPC64_PLTSEQ_NOTOC, R_PPC64_PLTCALL_NOTOC): Define.
gold/
* powerpc.cc (Target_powerpc::maybe_skip_tls_get_addr_call): Handle
notoc calls.
(is_branch_reloc): Template on size. Return true for REL24_NOTOC.
Update all callers.
(max_branch_delta): Likewise.
(Target_powerpc::Branch_info::make_stub): Add a stub for notoc
calls to functions needing a valid toc pointer.
(Target_powerpc::do_relax): Layout stubs again if any need resize.
(add_12_11_12, addi_12_11, addis_12_11, ldx_12_11_12, ori_12_12_0),
(oris_12_12_0, sldi_12_12_32): Define.
(Stub_table::Plt_stub_ent): Add notoc_ and iter_ fields.
(Stub_table::Branch_stub_key, Branch_stub_key_hash): Rename from
Branch_stub_ent and Branch_stub_ent hash. Remove save_res_ from key.
(Stub_table::Branch_stub_ent): New struct.
(class Stub_table): Add need_resize and resizing vars.
(Stub_table::need_resize, branch_size): New accessors.
(Stub_table::set_resizing): New function.
(Stub_table::add_plt_call_entry): Handle notoc calls and resizing
on seeing such or a tocsave stubs after a normal stub using the
same sym.
(Stub_table::add_long_branch_entry): Similarly.
(Stub_table::find_long_branch_entry): Return a Branch_stub_ent*.
(Stub_table::define_stub_syms): Adjust
(Stub_table::build_tls_opt_head, build_tls_opt_tail): New functions.
(build_notoc_offset): New function.
(Stub_table::plt_call_size): Move out of line. Handle notoc calls.
(Stub_table::branch_stub_size): Similarly.
(Stub_table::do_write): Separate loop for ELFv2 stubs, handling
notoc calls. Simplify ELFv1 loop. Output notoc branch stubs.
Use build_tls_opt_head and build_tls_opt_tail.
(Target_powerpc::Scan::get_reference_flags): Handle REL24_NOTOC.
(Target_powerpc::Scan::reloc_needs_plt_for_ifunc): Likewise,
and PLTSEQ_NOTOC and PLTCALL_NOTOC.
(Target_powerpc::Scan::local, global, relocate): Likewise.
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