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Plus some paranoia in symval_for_branch. We shouldn't get there with
dynamic symbols, but if we ever did the static_cast to Powerpc_relobj
would be wrong.
* powerpc.cc: Use shorter equivalent elfcpp typedef for
Reltype and reloc_size throughout.
(Target_powerpc::symval_for_branch): Exclude dynamic symbols.
(Target_powerpc::Scan::local): Use local var r_sym.
(Target_powerpc::Scan::global: Likewise.
(Target_powerpc::Relocate::relocate): Delete shadowing r_sym.
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A branch in a non-exec section that needs a stub can lead to this
assertion.
* powerpc.cc (Powerpc_relobj::stub_table): Return NULL rather
then asserting.
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Adds a new option, defaulting to off, that allows a group of stubs to
serve multiple output sections. Prior to this patch powerpc gold
allowed this unconditionally, which is a little unsafe with clever
code that discards/reuses sections at runtime.
* options.h (--stub-group-multi): New PowerPC option.
* powerpc.cc (Stub_control): Add multi_os_ var and param
to constructor. Sort start_ var later. Comment State.
(Stub_control::can_add_to_stub_group): Heed multi_os_.
(Target_powerpc::group_sections): Update.
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Gold attaches stubs to an existing section in contrast to ld.bfd which
inserts a new section for stubs. If we want stubs before branches,
then the stubs must be added to the previous section. Adding to the
previous section is a disaster if there is a large gap between the
previous section and the group.
PR gold/20878
* powerpc.cc (Stub_control): Replace stubs_always_before_branch_
with stubs_always_after_branch_, group_end_addr_ with
group_start_addr_.
(Stub_control::can_add_to_stub_group): Rewrite to suit scanning
sections by increasing address.
(Target_powerpc::group_sections): Scan that way. Delete corner
case.
* options.h (--stub-group-size): Update help string.
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Some more debug output, and a little hardening.
* powerpc.cc (Stub_table_owner): Provide constructor.
(Powerpc_relobj::set_stub_table): Resize fill with -1.
(Target_powerpc::Branch_info::make_stub): Provide target debug
output on returning false.
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gold/
PR gold/20807
* aarch64.cc (Target_aarch64::scan_reloc_section_for_stubs): Handle
section symbols correctly.
* arm.cc (Target_arm): Likewise.
* powerpc.cc (Target_powerpc): Likewise.
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* powerpc.cc (Target_powerpc::Relocate::relocate): Add fall
through comment.
* tilegx.cc (Target_tilegx::Relocate::relocate): Likewise.
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* aarch64.cc: Spell fall through comments as "// Fall through.".
* arm.cc: Likewise.
* mips.cc: Likewise.
* powerpc.cc: Likewise.
* s390.cc: Likewise.
* sparc.cc: Likewise.
* x86_64.cc: Likewise.
* powerpc.cc (Target_powerpc::Relocate::relocate): Add missing
fall through comments.
* sparc.cc: (Target_sparc::Scan::global): Likewise.
(Target_sparc::Relocate::relocate): Likewise.
* tilegx.cc (Target_tilegx::Relocate::relocate): Likewise.
* resolve.cc (symbol_to_bits): Add missing break.
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This patch adds a little more debug output, and replaces two variables
with one, tracking current max group size by group_size_ rather than
by has14_.
* powerpc.cc (class Stub_control): Delete stub14_group_size_
and has14_. Add group_size_.
(Stub_control::can_add_to_stub_group): Adjust to suit. Print
debug info when switching to adding sections before stubs.
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* debug.h (DEBUG_TARGET): New.
(DEBUG_ALL): Add DEBUG_TARGET.
(gold_debug): Delete FORMAT param.
* powerpc.cc (Stub_control::can_add_to_stub_group): Print debug ourput.
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This patch rewrites the rather obscure can_add_to_stub_group, fixing
a problem with the handling of sections containing conditional
external branches. When a section group contains any such section,
the group size needs to be limited to a much smaller size than groups
with only non-conditional external branches.
PR 20523
* powerpc.cc (class Stub_control): Add has14_. Comment owner_.
(Stub_control::can_add_to_stub_group): Correct grouping of
sections containing 14-bit external branches. When returning
false, set state_ to reflect the fact that we have one section
for the next group. Rewrite most of function for clarity.
Add and expand comments.
(Target_powerpc::do_relax): Print stub group size retry in hex.
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gold/ChangeLog
2016-08-26 Han Shen <shenhan@google.com>
* powerpc.cc (Stub_table::min_size_threshold_): New member to
limit size.
(Stub_table::set_min_size_threshold): New member function.
(Stub_table::set_address_and_size): Add code to only allow size
increase.
(Target_powerpc::do_relax): Add code to record last size.
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bfd/
* elf64-ppc.c (ppc64_elf_relocate_section): Adjust last patch
for big-endian.
gold/
* powerpc.cc (relocate): Adjust last patch for big-endian.
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This tightens the condition under which ld optimizes PIC entry code
to non-PIC.
bfd/
* elf64-ppc.c (ppc64_elf_relocate_section): Further restrict
ELFv2 entry optimization.
gold/
* powerpc.cc (relocate): Further restrict ELFv2 entry optimization.
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For MIPS-64, the r_info field in the relocation format is
replaced by several individual fields, including r_sym and
r_type. To enable support for this format, I've refactored
target-independent code to remove almost all uses of the r_info
field. (I've left alone a couple of routines used only for
incremental linking, which I can update if/when the MIPS target
adds support for incremental linking.)
For routines that are already templated on a Classify_reloc class
(namely, gc_process_relocs, relocate_section, and
relocate_relocs), I've extended the Classify_reloc interface to
include sh_type (which no longer needs to be a separate template
parameter) as well as get_r_sym() and get_r_type() methods for
extracting the r_sym and r_type fields. For
scan_relocatable_relocs, I've extended the
Default_scan_relocatable_relocs class by converting it to a class
template with Classify_reloc as a template parameter. For the
remaining routines that need to access r_sym, I've added a
virtual Target::get_r_sym() method with an override for the MIPS
target.
In elfcpp, I've added Mips64_rel, etc., accessor classes and
corresponding internal data structures. The MIPS target uses
these new classes within its own Mips_classify_reloc class.
The Mips64_ accessor classes also expose the r_ssym, r_type2,
and r_type3 fields from the relocation.
These changes should be functionally the same for all but the
MIPS target.
elfcpp/
* elfcpp.h (Mips64_rel, Mips64_rel_write): New classes.
(Mips64_rela, Mips64_rela_write): New classes.
* elfcpp_internal.h (Mips64_rel_data, Mips64_rela_data): New structs.
gold/
* gc.h (get_embedded_addend_size): Remove sh_type parameter.
(gc_process_relocs): Remove sh_type template parameter.
Use Classify_reloc to access r_sym, r_type, and r_addend fields.
* object.h (Sized_relobj_file::split_stack_adjust): Add target
parameter.
(Sized_relobj_file::split_stack_adjust_reltype): Likewise.
* reloc-types.h (Reloc_types::copy_reloc_addend): (SHT_REL and SHT_RELA
specializations) Remove.
* reloc.cc (Emit_relocs_strategy): Rename and move to target-reloc.h.
(Sized_relobj_file::emit_relocs_scan): Call Target::emit_relocs_scan().
(Sized_relobj_file::emit_relocs_scan_reltype): Remove.
(Sized_relobj_file::split_stack_adjust): Add target parameter.
Adjust all callers.
(Sized_relobj_file::split_stack_adjust_reltype): Likewise. Call
Target::get_r_sym() to get r_sym field from relocations.
(Track_relocs::next_symndx): Call Target::get_r_sym().
* target-reloc.h (scan_relocs): Remove sh_type template parameter;
add Classify_reloc template parameter. Use for accessing r_sym and
r_type.
(relocate_section): Likewise.
(Default_classify_reloc): New class (renamed and moved from reloc.cc).
(Default_scan_relocatable_relocs): Remove sh_type template parameter.
(Default_scan_relocatable_relocs::Reltype): New typedef.
(Default_scan_relocatable_relocs::reloc_size): New const.
(Default_scan_relocatable_relocs::sh_type): New const.
(Default_scan_relocatable_relocs::get_r_sym): New method.
(Default_scan_relocatable_relocs::get_r_type): New method.
(Default_emit_relocs_strategy): New class.
(scan_relocatable_relocs): Replace sh_type template parameter with
Scan_relocatable_relocs class. Use it to access r_sym and r_type
fields.
(relocate_relocs): Replace sh_type template parameter with
Classify_reloc class. Use it to access r_sym and r_type fields.
* target.h (Target::is_call_to_non_split): Replace r_type parameter
with pointer to relocation. Adjust all callers.
(Target::do_is_call_to_non_split): Likewise.
(Target::emit_relocs_scan): New virtual method.
(Sized_target::get_r_sym): New virtual method.
* target.cc (Target::do_is_call_to_non_split): Replace r_type parameter
with pointer to relocation.
* aarch64.cc (Target_aarch64::emit_relocs_scan): New method.
(Target_aarch64::Relocatable_size_for_reloc): Remove.
(Target_aarch64::gc_process_relocs): Use Default_classify_reloc.
(Target_aarch64::scan_relocs): Likewise.
(Target_aarch64::relocate_section): Likewise.
(Target_aarch64::Relocatable_size_for_reloc::get_size_for_reloc):
Remove.
(Target_aarch64::scan_relocatable_relocs): Use Default_classify_reloc.
(Target_aarch64::relocate_relocs): Use Default_classify_reloc.
* arm.cc (Target_arm::Arm_scan_relocatable_relocs): Remove sh_type
template parameter.
(Target_arm::emit_relocs_scan): New method.
(Target_arm::Relocatable_size_for_reloc): Replace with...
(Target_arm::Classify_reloc): ...this.
(Target_arm::gc_process_relocs): Use Classify_reloc.
(Target_arm::scan_relocs): Likewise.
(Target_arm::relocate_section): Likewise.
(Target_arm::scan_relocatable_relocs): Likewise.
(Target_arm::relocate_relocs): Likewise.
* i386.cc (Target_i386::emit_relocs_scan): New method.
(Target_i386::Relocatable_size_for_reloc): Replace with...
(Target_i386::Classify_reloc): ...this.
(Target_i386::gc_process_relocs): Use Classify_reloc.
(Target_i386::scan_relocs): Likewise.
(Target_i386::relocate_section): Likewise.
(Target_i386::scan_relocatable_relocs): Likewise.
(Target_i386::relocate_relocs): Likewise.
* mips.cc (Mips_scan_relocatable_relocs): Remove sh_type template
parameter.
(Mips_reloc_types): New class template.
(Mips_classify_reloc): New class template.
(Target_mips::Reltype): New typedef.
(Target_mips::Relatype): New typedef.
(Target_mips::emit_relocs_scan): New method.
(Target_mips::get_r_sym): New method.
(Target_mips::Relocatable_size_for_reloc): Replace with
Mips_classify_reloc.
(Target_mips::copy_reloc): Use Mips_classify_reloc.
(Target_mips::gc_process_relocs): Likewise.
(Target_mips::scan_relocs): Likewise.
(Target_mips::relocate_section): Likewise.
(Target_mips::scan_relocatable_relocs): Likewise.
(Target_mips::relocate_relocs): Likewise.
(mips_get_size_for_reloc): New function, factored out from
Relocatable_size_for_reloc::get_size_for_reloc.
(Target_mips::Scan::local): Use Mips_classify_reloc.
(Target_mips::Scan::global): Likewise.
(Target_mips::Relocate::relocate): Likewise.
* powerpc.cc (Target_powerpc::emit_relocs_scan): New method.
(Target_powerpc::Relocatable_size_for_reloc): Remove.
(Target_powerpc::gc_process_relocs): Use Default_classify_reloc.
(Target_powerpc::scan_relocs): Likewise.
(Target_powerpc::relocate_section): Likewise.
(Powerpc_scan_relocatable_reloc): Convert to class template.
(Powerpc_scan_relocatable_reloc::Reltype): New typedef.
(Powerpc_scan_relocatable_reloc::reloc_size): New const.
(Powerpc_scan_relocatable_reloc::sh_type): New const.
(Powerpc_scan_relocatable_reloc::get_r_sym): New method.
(Powerpc_scan_relocatable_reloc::get_r_type): New method.
(Target_powerpc::scan_relocatable_relocs): Use
Powerpc_scan_relocatable_reloc.
(Target_powerpc::relocate_relocs): Use Default_classify_reloc.
* s390.cc (Target_s390::emit_relocs_scan): New method.
(Target_s390::Relocatable_size_for_reloc): Remove.
(Target_s390::gc_process_relocs): Use Default_classify_reloc.
(Target_s390::scan_relocs): Likewise.
(Target_s390::relocate_section): Likewise.
(Target_s390::Relocatable_size_for_reloc::get_size_for_reloc):
Remove.
(Target_s390::scan_relocatable_relocs): Use Default_classify_reloc.
(Target_s390::relocate_relocs): Use Default_classify_reloc.
* sparc.cc (Target_sparc::emit_relocs_scan): New method.
(Target_sparc::Relocatable_size_for_reloc): Remove.
(Target_sparc::gc_process_relocs): Use Default_classify_reloc.
(Target_sparc::scan_relocs): Likewise.
(Target_sparc::relocate_section): Likewise.
(Target_sparc::Relocatable_size_for_reloc::get_size_for_reloc):
Remove.
(Target_sparc::scan_relocatable_relocs): Use Default_classify_reloc.
(Target_sparc::relocate_relocs): Use Default_classify_reloc.
* tilegx.cc (Target_tilegx::emit_relocs_scan): New method.
(Target_tilegx::Relocatable_size_for_reloc): Remove.
(Target_tilegx::gc_process_relocs): Use Default_classify_reloc.
(Target_tilegx::scan_relocs): Likewise.
(Target_tilegx::relocate_section): Likewise.
(Target_tilegx::Relocatable_size_for_reloc::get_size_for_reloc):
Remove.
(Target_tilegx::scan_relocatable_relocs): Use Default_classify_reloc.
(Target_tilegx::relocate_relocs): Use Default_classify_reloc.
* x86_64.cc (Target_x86_64::emit_relocs_scan): New method.
(Target_x86_64::Relocatable_size_for_reloc): Remove.
(Target_x86_64::gc_process_relocs): Use Default_classify_reloc.
(Target_x86_64::scan_relocs): Likewise.
(Target_x86_64::relocate_section): Likewise.
(Target_x86_64::Relocatable_size_for_reloc::get_size_for_reloc):
Remove.
(Target_x86_64::scan_relocatable_relocs): Use Default_classify_reloc.
(Target_x86_64::relocate_relocs): Use Default_classify_reloc.
* testsuite/testfile.cc (Target_test::emit_relocs_scan): New method.
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gold/
* target.h (Target::calls_non_split): Add prelocs, reloc_count
parameters.
(Target::do_calls_non_split): Likewise.
* target.cc (Target::do_calls_non_split): Likewise.
* reloc.cc (Sized_relobj_file::split_stack_adjust_reltype): Adjust
call to Target::calls_non_split.
* i386.cc (Target_i386::do_calls_non_split): Add prelocs, reloc_count
parameters.
* powerpc.cc (Target_powerpc::do_calls_non_split): Likewise.
* x86_64.cc (Target_x86_64::do_calls_non_split): Likewise.
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* powerpc.cc (Target_powerpc::Relocate::relocate): New constant
d_offset. Use throughout.
(Target_powerpc::relocate_relocs): Likewise.
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In an fixed position executable, the entry code does not need to be
PIC and can thus lose a dependency on r12.
* powerpc.cc (Target_powerpc::Relocate::relocate): Edit ELFv2
entry code.
(Target_powerpc::relocate_relocs): Edit relocs to suit.
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Some linker code editing needs to change multiple insns. In some
cases multiple relocations are involved and it is not sufficient to
make the changes independently as relocations are processed, because
doing so might lead to a partial edit. So in order to safely edit we
need all the relocations available in relocate(). Also, to emit
edited relocs corresponding to the edited code sequence we need some
way to pass information from relocate() to relocate_relocs(),
particularly if the edit depends on insns. We can't modify input
relocs in relocate() as they are mmapped PROT_READ, nor it is
particularly clean to write relocs to the output at that stage. So
add a Relocatable_relocs* field to relinfo to mark edited relocs.
Given that relocate is passed the raw reloc pointer, it makes sense to
remove the rel/rela parameter and r_type too. However, that means the
mips relocate() needs to know whether SHT_REL or SHT_RELA relocs are
being processed. So add a rel_type for mips, which also has the
benefit of removing relocate() overloading there.
This patch adds the infrastructure without making use of it.
Note that relinfo->rr will be NULL if not outputting relocations.
* object.h (struct Relocate_info): Add "rr".
* reloc.h (Relocatable_relocs::set_strategy): New accessor.
* reloc.cc (Sized_relobj_file::do_relocate_sections): Init
relinfo.rr for relocate_section and relocate_relocs.
* powerpc.cc (relocate): Add rel_type and preloc parameters.
Delete rela and r_type params, instead recalculate these from
preloc.
(relocate_relocs): Delete Relocatable_relocs* param, instead
use relinfo->rr.
* aarch64.cc: Likewise.
* arm.cc: Likewise.
* i386.cc: Likewise.
* mips.cc: Likewise.
* s390.cc: Likewise.
* sparc.cc: Likewise.
* target.h: Likewise.
* tilegx.cc: Likewise.
* x86_64.cc: Likewise.
* testsuite/testfile.cc: Likewise.
* target-reloc.h (relocate_section): Adjust to suit.
(apply_relocation, relocate_relocs): Likewise.
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elfcpp/
* powerpc.h (R_PPC64_ENTRY): Define.
gold/
* powerpc.cc (add_2_2_12, ld_2_12, lis_2): Define.
(Target_powerpc::Scan::local, global): Handle R_PPC64_ENTRY.
(Target_powerpc::Relocate::relocate): Edit code at R_PPC64_ENTRY.
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As done in a27e685f for bfd ld.
* powerpc.cc (Output_data_got_powerpc::Output_data_got_powerpc): Align
to 256 byte boundary.
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* powerpc.cc (Target_powerpc::Scan::get_reference_flags): Correct
GOT16 and TOC16 relocs to RELATIVE_REF.
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include/opcode/
* ppc.h (PPC_OPCODE_POWER9): New define.
(PPC_OPCODE_VSX3): Likewise.
opcodes/
* ppc-dis.c (ppc_opts): Add "power9" and "pwr9" entries.
Add PPC_OPCODE_VSX3 to the vsx entry.
(powerpc_init_dialect): Set default dialect to power9.
* ppc-opc.c (insert_dcmxs, extract_dcmxs, insert_dxd, extract_dxd,
insert_dxdn, extract_dxdn, insert_l0, extract_l0, insert_l1,
extract_l1 insert_xtq6, extract_xtq6): New static functions.
(insert_esync): Test for illegal L operand value.
(DCMX, DCMXS, DXD, NDXD, L0, L1, RC, FC, UIM6, X_R, RIC, PRS, XSQ6,
XTQ6, LRAND, IMM8, DQX, DQX_MASK, DX, DX_MASK, VXVAPS_MASK, VXVA,XVA,
XX2VA, XVARC, XBF_MASK, XX2UIM4_MASK, XX2BFD_MASK, XX2DCMXS_MASK,
XVA_MASK, XRLA_MASK, XBFRARB_MASK, XLRAND_MASK, POWER9, PPCVEC3,
PPCVSX3): New defines.
(powerpc_opcodes) <ps_cmpu0, ps_cmpo0, ps_cmpu1, ps_cmpo1, fcmpu,
fcmpo, ftdiv, ftsqrt>: Use XBF_MASK.
<mcrxr>: Use XBFRARB_MASK.
<addpcis, bcdcfn., bcdcfsq., bcdcfz., bcdcpsgn., bcdctn., bcdctsq.,
bcdctz., bcds., bcdsetsgn., bcdsr., bcdtrunc., bcdus., bcdutrunc.,
cmpeqb, cmprb, cnttzd, cnttzd., cnttzw, cnttzw., copy, copy_first,
cp_abort, darn, dtstsfi, dtstsfiq, extswsli, extswsli., ldat, ldmx,
lwat, lxsd, lxsibzx, lxsihzx, lxssp, lxv, lxvb16x, lxvh8x, lxvl, lxvll,
lxvwsx, lxvx, maddhd, maddhdu, maddld, mcrxrx, mfvsrld, modsd, modsw,
modud, moduw, msgsync, mtvsrdd, mtvsrws, paste, paste., paste_last,
rmieg, setb, slbieg, slbsync, stdat, stop, stwat, stxsd, stxsibx,
stxsihx, stxssp, stxv, stxvb16x, stxvh8x, stxvl, stxvll, stxvx,
subpcis, urfid, vbpermd, vclzlsbb, vcmpneb, vcmpneb., vcmpneh,
vcmpneh., vcmpnew, vcmpnew., vcmpnezb, vcmpnezb., vcmpnezh, vcmpnezh.,
vcmpnezw, vcmpnezw., vctzb, vctzd, vctzh, vctzlsbb, vctzw, vextractd,
vextractub, vextractuh, vextractuw, vextsb2d, vextsb2w, vextsh2d,
vextsh2w, vextsw2d, vextublx, vextubrx, vextuhlx, vextuhrx, vextuwlx,
vextuwrx, vinsertb, vinsertd, vinserth, vinsertw, vmul10cuq,
vmul10ecuq, vmul10euq, vmul10uq, vnegd, vnegw, vpermr, vprtybd,
vprtybq, vprtybw, vrldmi, vrldnm, vrlwmi, vrlwnm, vslv, vsrv, wait,
xsabsqp, xsaddqp, xsaddqpo, xscmpeqdp, xscmpexpdp, xscmpexpqp,
xscmpgedp, xscmpgtdp, xscmpnedp, xscmpoqp, xscmpuqp, xscpsgnqp,
xscvdphp, xscvdpqp, xscvhpdp, xscvqpdp, xscvqpdpo, xscvqpsdz,
xscvqpswz, xscvqpudz, xscvqpuwz, xscvsdqp, xscvudqp, xsdivqp,
xsdivqpo, xsiexpdp, xsiexpqp, xsmaddqp, xsmaddqpo, xsmaxcdp,
xsmaxjdp, xsmincdp, xsminjdp, xsmsubqp, xsmsubqpo, xsmulqp, xsmulqpo,
xsnabsqp, xsnegqp, xsnmaddqp, xsnmaddqpo, xsnmsubqp, xsnmsubqpo,
xsrqpi, xsrqpix, xsrqpxp, xssqrtqp, xssqrtqpo, xssubqp, xssubqpo,
xststdcdp, xststdcqp, xststdcsp, xsxexpdp, xsxexpqp, xsxsigdp,
xsxsigqp, xvcmpnedp, xvcmpnedp., xvcmpnesp, xvcmpnesp., xvcvhpsp,
xvcvsphp, xviexpdp, xviexpsp, xvtstdcdp, xvtstdcsp, xvxexpdp,
xvxexpsp, xvxsigdp, xvxsigsp, xxbrd, xxbrh, xxbrq, xxbrw, xxextractuw,
xxinsertw, xxperm, xxpermr, xxspltib>: New instructions.
<doze, nap, sleep, rvwinkle, waitasec, lxvx, stxvx>: Disable on POWER9.
<tlbiel, tlbie, sync, slbmfev, slbmfee>: Add additional operands.
include/elf/
* ppc.h (R_PPC_REL16DX_HA): New reloction.
* ppc64.h (R_PPC64_REL16DX_HA): Likewise.
bfd/
* elf32-ppc.c (ppc_elf_howto_raw): Add R_PPC_REL16DX_HA.
(ppc_elf_reloc_type_lookup): Handle R_PPC_REL16DX_HA.
(ppc_elf_addr16_ha_reloc): Likewise.
(ppc_elf_check_relocs): Likewise.
(ppc_elf_relocate_section): Likewise.
(is_insn_dq_form): Handle lxv and stxv instructions.
* elf64-ppc.c (ppc64_elf_howto_raw): Add R_PPC64_REL16DX_HA.
(ppc64_elf_reloc_type_lookup): Handle R_PPC64_REL16DX_HA.
(ppc64_elf_ha_reloc): Likewise.
(ppc64_elf_check_relocs): Likewise.
(ppc64_elf_relocate_section): Likewise.
* bfd-in2.h: Regenerate.
* libbfd.h: Likewise.
* reloc.c (BFD_RELOC_PPC_REL16DX_HA): New.
elfcpp/
* powerpc.h (R_POWERPC_REL16DX_HA): Define.
gas/
* doc/as.texinfo (Target PowerPC): Document -mpower9 and -mpwr9.
* doc/c-ppc.texi (PowerPC-Opts): Likewise.
* config/tc-ppc.c (md_show_usage): Likewise.
(md_assemble): Handle BFD_RELOC_PPC_REL16DX_HA.
(md_apply_fix): Likewise.
(ppc_handle_align): Handle power9's group ending nop.
gas/testsuite/
* gas/ppc/altivec3.s: New test.
* gas/ppc/altivec3.d: Likewise.
* gas/ppc/vsx3.s: Likewise.
* gas/ppc/vsx3.d: Likewise.
* gas/ppc/power9.s: Likewise.
* gas/ppc/power9.d: Likewise.
* gas/ppc/ppc.exp: Run them.
* gas/ppc/power8.s <lxvx, lxvd2x, stxvx, stxvd2x>: Add new tests.
* gas/ppc/power8.d: Likewise.
* gas/ppc/vsx.s: <lxvx, stxvx>: Rename invalid mnemonics ...
<lxvd2x, stxvd2x>: ...to this.
* gas/ppc/vsx.d: Likewise.
gold/
* gold/powerpc.cc (Powerpc_relocate_functions::addr16_dq): New function.
(Powerpc_relocate_functions::addr16dx_ha): Likewise.
(Target_powerpc::Scan::local): Handle R_POWERPC_REL16DX_HA.
(Target_powerpc::Scan::global): Likewise.
(Target_powerpc::Relocate::relocate): Likewise.
ld/testsuite/
* ld-powerpc/addpcis.d: New test.
* ld-powerpc/addpcis.s: New test.
* ld-powerpc/powerpc.exp: Run it.
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2015-11-09 Cary Coutant <ccoutant@gmail.com>
Vladimir Radosavljevic <Vladimir.Radosavljevic@imgtec.com>
gold/
* copy-relocs.h (Copy_relocs::copy_reloc): Replace reloc parameter
with type, offset, addend.
(Copy_relocs::save): Likewise.
* copy-relocs.cc (Copy_relocs::copy_reloc): Likewise.
(Copy_relocs::save): Likewise.
* aarch64.cc (Target_aarch64::copy_reloc): Pass r_type, r_offset,
and r_addend to Copy_relocs::copy_reloc.
* arm.cc (Target_arm::copy_reloc): Likewise.
* i386.cc (Target_i386::copy_reloc): Likewise.
* mips.cc (Target_mips::copy_reloc): Likewise.
* powerpc.cc (Target_powerpc::copy_reloc): Likewise.
* s390.cc (Target_s390::copy_reloc): Likewise.
* sparc.cc (Target_sparc::copy_reloc): Likewise.
* tilegx.cc (Target_tilegx::copy_reloc): Likewise.
* x86_64.cc (Target_x86_64::copy_reloc): Likewise.
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gold/
* dynobj.cc (Dynobj::create_elf_hash_table): Create hash table with
target-specific entry size.
(Dynobj::sized_create_elf_hash_table): Add size template parameter.
* dynobj.h (Dynobj::sized_create_elf_hash_table): Likewise.
* layout.cc (Layout::create_dynamic_symtab): Set entsize to
hash_entry_size.
* target.h (Target::hash_entry_size): New method.
(Target::Target_info::hash_entry_size): New data member.
* aarch64.cc (Target_aarch64::aarch64_info): Add hash_entry_size.
* arm.cc (Target_arm::arm_info): Likewise.
(Target_arm_nacl::arm_nacl_info): Likewise.
* i386.cc (Target_i386::i386_info): Likewise.
(Target_i386_nacl::i386_nacl_info): Likewise.
(Target_iamcu::iamcu_info): Likewise.
* mips.cc (Target_mips::mips_info): Likewise.
(Target_mips_nacl::mips_nacl_info): Likewise.
* powerpc.cc (Target_powerpc::powerpc_info): Likewise.
* sparc.cc (Target_sparc::sparc_info): Likewise.
* tilegx.cc (Target_tilegx::tilegx_info): Likewise.
* x86_64.cc (Target_x86_64::x86_64_info): Likewise.
(Target_x86_64_nacl::x86_64_nacl_info): Likewise.
* testsuite/testfile.cc (Target_test::test_target_info): Likewise.
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Gold version of a4b6fadd. Don't emit long branch or plt branch stubs
to save/restore functions. Copy them instead.
PR 18878
* powerpc.cc (Target_powerpc): Add savres_section_ and accessor.
(Target_powerpc::Branch_info::make_stub): Determine whether long
branch stub is for save/restore function.
(Branch_stub_ent): Add save_res_, and extra parm to constructor.
(Stub_table): Add need_save_res_.
(Stub_table:clear_stubs): Clear need_save_res_.
(Stub_table:set_address_and_size): Add save/restore section size.
(Stub_table::add_long_branch_entry): Add save_res param. Set
need_save_res_, but don't add space for save/restore stubs.
(Stub_table::find_long_branch_entry): Return offset to local copy
of save/restore func.
(Stub_table::do_write): Don't output save/restore stubs. Instead
copy the save/restore functions.
(Output_data_save_res:contents): New accessor.
(Target_powerpc::define_save_restore_funcs): Set savres_section_.
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A symbol value in an ELF final linked binary is absolute, in contrast
to a relocatable object file where the value is section relative. For
--emit-relocs it is therefore incorrect to use the value of a section
symbol as the addend when adjusting relocs against input section
symbols to output section symbols.
PR gold/18846
* target-reloc.h (relocate_relocs <RELOC_ADJUST_FOR_SECTION_RELA>):
Subtract os->address() from addend.
* powerpc.cc (relocate_relocs): Likewise.
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PowerPC64 ELFv1 requires a tweak to find_functions in order to return
code addresses, rather than OPD entry addresses.
* reloc.cc (Sized_relobj_file::find_functions): Use function_location.
* powerpc.cc (Target_powerpc::do_calls_non_split): New function.
(addi_12_1, addis_2_12, addis_12_1, cmpld_7_12_0): New constants.
(lis_0): Rename from lis_0_0.
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2015-04-29 Cary Coutant <cary@google.com>
Rafael Ávila de Espíndola <rafael.espindola@gmail.com>
gold/
* gc.h (Garbage_collection::is_section_garbage): Change Object*
to Relobj*.
(Garbage_collection::add_reference): Likewise.
(Garbage_collection::gc_process_relocs): Likewise. Don't push
object/shndx pair onto *secvec for dynamic objects. Don't follow
relocations pointing to dynamic objects for GC.
* icf.cc (Icf::find_identical_sections): Change Object* to Relobj*.
(Icf::unfold_section): Likewise.
(Icf::is_section_folded): Likewise.
(Icf::get_folded_section): Likewise.
* icf.h: (Icf::get_folded_section): Likewise.
(Icf::unfold_section): Likewise.
(Icf::is_section_folded): Likewise.
(Icf::section_has_function_pointers): Likewise.
(Icf::set_section_has_function_pointers): Likewise.
* object.h (Section_id): Likewise.
(Const_section_id): Likewise.
* output.cc (Output_section::update_section_layout): Likewise.
* output.h: (Output_section_lookup_maps::find_relaxed_input_section):
Likewise.
* plugin.cc (update_section_order): Likewise.
(unique_segment_for_sections): Likewise.
* powerpc.cc (Powerpc_relobj::add_reference): Likewise.
(Target_powerpc::do_gc_add_reference): Likewise.
(Target_powerpc::gc_process_relocs): Likewise.
(Target_powerpc::do_gc_add_reference): Likewise.
* symtab.cc (Symbol_table::is_section_folded): Likewise.
(Symbol_table::gc_mark_symbol): Likewise.
* symtab.h: (Symbol_table::is_section_folded): Likewise.
* target.h: (Sized_target::gc_add_reference): Likewise.
(Sized_target::do_gc_add_reference): Likewise.
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Completely removing the assert probably wasn't the best idea, so
reinstate it for allocated sections. Also cope with debug info
potentially referring to a missing plt call stub.
And a tidy. find_global_entry now returns an Address, so make temps
holding the return value of type Address, and compare against
invalid_address.
* powerpc.cc (Target_powerpc::do_dynsym_value): Use Address rather
than unsigned int for find_global_entry result temp. Compare
against invalid_address.
(Target_powerpc::do_plt_address_for_global): Likewise.
(Target_powerpc::Relocate::relocate): Likewise. Don't assert
on plt call stub existence for debug info. Do assert for plt
and global entry stub existence if an alloc section.
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Global entry stubs are used on ELFv2 to provide addresses for
functions not defined in a non-PIC executable but whose address is
taken, in much the same way as PLT stub code is used on other
targets to provide function addresses. We don't want to insert a
global entry stub just because (bogus) debug info refers to the
address of a non-local function, but we also don't want gold to die.
* powerpc.cc (Target_powerpc::Relocate::relocate): Don't assert
on missing global entry stub due to bogus debug info.
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FIFO is harder to implement and has less locality than LIFO. It is
also not necessary to implement a transitive closure, a LIFO works
just as well.
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If ignoring unresolved symbols, ignore reloc overflows too. If not
ignoring unresolved symbols we will report an error about the symbol
being undefined, making any report about reloc overflow superfluous.
PR18147
* powerpc.cc (Target_powerpc::Relocate::relocate): Don't report
relocation errors for branches to strong undefined symbols.
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PR 18010
* powerpc.cc (Powerpc_relocate_functions::addr16_ds): Always
complain if value is not a multiple of four.
(Target_powerpc::Relocate::relocate): Correct handling of
R_POWERPC_GOT_TPREL16 and R_POWERPC_GOT_TPREL16_LO for ppc64.
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Found when applying relocs in .debug that reference removed functions.
PR 17954
* powerpc.cc (Global_symbol_visitor_opd::operator()): Set default
visibility.
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Similar to b86ac8e3
* powerpc.cc (Target_powerpc::Relocate::relocate): Correct GOT_TLSLD
and GOT_TLSGD to LE optimization.
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Found when attempting to build an ELFv2 Linux kernel. We don't
generally need a plt entry for ELFv2 got relocs, only on ifunc, just
like ppc32.
* powerpc.cc (Target_powerpc::Scan::local <got relocs>): Correct
condition for need of ifunc plt entry.
(Target_powerpc::Scan::global <got relocs>): Likewise.
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* powerpc.cc (Target_powerpc::relocate): Fix overflow check.
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Mixing 64-bit and 32-bit types led to the wrong promotions. Keep
calculation in same type. Also fix a case where PLTREL25 reloc addend
should be ignored.
* Powerpc.cc (Target_powerpc::Branch_info::make_stub): Ignore
addend of PLTREL24 reloc when not generating a plt stub. Make
max_branch_offset an "Address".
(Stub_table::can_read_stub): Make max_branch_offset an "Address".
(Target_powerpc::Relocate::relocate): Likewise.
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pr17670 is about an assert triggering on a branch to an undefined
weak symbol, the symbol being undefined due to dropping its comdat
group section. (Well sort of. The symbol is actually defined in
an .opd section which isn't part of the group, but the code section
the opd entry points at is dropped.) So don't assert.
Also, don't make long branch stubs to such symbols, and arrange to
have target-reloc.h code warn when applying relocs that use the sym.
PR 17670
* symtab.cc (Symbol::set_undefined): Remove assertion.
* powerpc.cc (Target_powerpc::symval_for_branch): Don't assert
on symbols defined in discarded sections, instead return false.
Rearrange params, update all callers.
(Target_powerpc::Branch_info::make_stub): Don't make stubs for
branches to syms in discarded sections.
(Global_symbol_visitor_opd::operator()): Set discarded opd syms
undefined and flag as discarded.
(Target_powerpc::Relocate::relocate): Localize variable.
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Code stolen from arm.cc.
PR 17566
* powerpc.cc (Target_powerpc::Scan::local): Use add_local_section
when adding dynamic relocations against section symbols.
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An unusually large number of stubs can result in the default section
group size being too large; sections plus stubs exceed the range of a
branch. Restarting the relaxation pass with a smaller group size can
sometimes help.
* powerpc.cc (struct Stub_table_owner): New.
(Powerpc_relobj): Rename stub_table_ to stub_table_index_, an
unsigned int vector. Update all references.
(powerpc_relobj::set_stub_table): Take an unsigned int param
rather than a Stub_table. Update callers.
(Powerpc_relobj::clear_stub_table): New function.
(Target_powerpc): Add relax_failed_, relax_fail_count_ and
stub_group_size_ vars.
(Target_powerpc::new_stub_table): Delete.
(max_branch_delta): New function, extracted from..
(Target_powerpc::Relocate::relocate): ..here..
(Target_powerpc::Branch_info::make_stub): ..and here. Return
status on whether stub created successfully.
(Stub_control::Stub_control): Add "no_size_errors" param. Move
default sizing to..
(Target_powerpc::do_relax): ..here. Init stub_group_size_ and
reduce on relax failure.
(Target_powerpc::group_sections): Add "no_size_errors" param.
Use stub_group_size_. Set up group info in a temp vector,
before building Stub_table vector. Account for input sections
possibly already converted to relaxed sections.
(Stub_table::init): Delete. Merge into..
(Stub_table::Stub_table): ..here.
(Stub_table::can_reach_stub): New function.
(Stub_table::add_plt_call_entry): Add "from" parameter and
return true iff stub could be reached.
(Stub_table::add_long_branch_entry): Similarly. Add "r_type"
param too.
(Stub_table::clear_stubs): Add "all" param.
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It's possible for the section grouping code to decide that the last
section looked at (the first section by address) doesn't fit into a
group. In one case that section is already a group owner and that is
handled correctly. In other cases the section should be put into its
own group. Like this:
* powerpc.cc (Stub_control::set_output_and_owner): New function.
(Target_powerpc::group_sections): Use it.
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* powerpc.cc (Target_powerpc::Relocate::relocate): Correct test
for undefined weaks.
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Corrects overflow test for rel14, addr14, rel24, addr24 branch relocs,
and prints an information message to give a hint as to how a branch
that can't reach a stub might be cured.
bfd/
* elf64-ppc.c (group_sections): Init stub14_group_size from
--stub-group-size parameter divided by 1024.
gold/
* powerpc.cc (Stub_control::Stub_control): Init stub14_group_size_
from --stub-group-size parameter divided by 1024.
(Powerpc_relocate_functions::rela, rela_ua): Add fieldsize
template parameter. Update all uses.
(Target_powerpc::Relocate::relocate): Rename has_plt_value to
has_stub_value. Set for long branches. Don't report overflow for
branch to undefined weak symbols. Print info message on
overflowing branch to stub.
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Go is multi-threaded, so use thread-safe plt stubs. __go_go doesn't
actually start threads, but is a convenient libgo function with a
reasonably unique name that is called by all Go executables. (Threads
are started by a static function of libgo, runtime_newosproc, called
by a whole lot of global functions, including runtime_starttheworld
and runtime_main.)
bfd/
* elf64-ppc.c (ppc64_elf_size_stubs): Add __go_go to thread_starters.
gold/
* powerpc.cc (Target_powerpc::do_relax): Add __go_go to thread_starters.
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As for bfd.ld. Refer 2300b5a14
* powerpc.cc (do_relax): Add gcc-4.9 libgomp functions to
thread_starter.
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