aboutsummaryrefslogtreecommitdiff
path: root/gdb/arch
AgeCommit message (Collapse)AuthorFilesLines
2019-02-07Normalize include guards in gdbTom Tromey8-15/+31
While working on my other scripts to deal with gdb headers, I noticed that some files were missing include guards. I wrote a script to add the missing ones, but found that using the obvious names for the guards ran into clashes -- for example, gdb/nat/linux-nat.h used "LINUX_NAT_H", but this was also the script's choice for gdb/linux-nat.h. So, I changed the script to normalize all include guards in gdb. This patch is the result. As usual the script is available here: https://github.com/tromey/gdb-refactoring-scripts Tested by rebuilding; I also ran it through "Fedora-x86_64-m64" on the buildbot. gdb/ChangeLog 2019-02-07 Tom Tromey <tom@tromey.com> * yy-remap.h: Add include guard. * xtensa-tdep.h: Add include guard. * xcoffread.h: Rename include guard. * varobj-iter.h: Add include guard. * tui/tui.h: Rename include guard. * tui/tui-winsource.h: Rename include guard. * tui/tui-wingeneral.h: Rename include guard. * tui/tui-windata.h: Rename include guard. * tui/tui-win.h: Rename include guard. * tui/tui-stack.h: Rename include guard. * tui/tui-source.h: Rename include guard. * tui/tui-regs.h: Rename include guard. * tui/tui-out.h: Rename include guard. * tui/tui-layout.h: Rename include guard. * tui/tui-io.h: Rename include guard. * tui/tui-hooks.h: Rename include guard. * tui/tui-file.h: Rename include guard. * tui/tui-disasm.h: Rename include guard. * tui/tui-data.h: Rename include guard. * tui/tui-command.h: Rename include guard. * tic6x-tdep.h: Add include guard. * target/waitstatus.h: Rename include guard. * target/wait.h: Rename include guard. * target/target.h: Rename include guard. * target/resume.h: Rename include guard. * target-float.h: Rename include guard. * stabsread.h: Add include guard. * rs6000-tdep.h: Add include guard. * riscv-fbsd-tdep.h: Add include guard. * regformats/regdef.h: Rename include guard. * record.h: Rename include guard. * python/python.h: Rename include guard. * python/python-internal.h: Rename include guard. * python/py-stopevent.h: Rename include guard. * python/py-ref.h: Rename include guard. * python/py-record.h: Rename include guard. * python/py-record-full.h: Rename include guard. * python/py-record-btrace.h: Rename include guard. * python/py-instruction.h: Rename include guard. * python/py-events.h: Rename include guard. * python/py-event.h: Rename include guard. * procfs.h: Add include guard. * proc-utils.h: Add include guard. * p-lang.h: Add include guard. * or1k-tdep.h: Rename include guard. * observable.h: Rename include guard. * nto-tdep.h: Rename include guard. * nat/x86-linux.h: Rename include guard. * nat/x86-linux-dregs.h: Rename include guard. * nat/x86-gcc-cpuid.h: Add include guard. * nat/x86-dregs.h: Rename include guard. * nat/x86-cpuid.h: Rename include guard. * nat/ppc-linux.h: Rename include guard. * nat/mips-linux-watch.h: Rename include guard. * nat/linux-waitpid.h: Rename include guard. * nat/linux-ptrace.h: Rename include guard. * nat/linux-procfs.h: Rename include guard. * nat/linux-osdata.h: Rename include guard. * nat/linux-nat.h: Rename include guard. * nat/linux-namespaces.h: Rename include guard. * nat/linux-btrace.h: Rename include guard. * nat/glibc_thread_db.h: Rename include guard. * nat/gdb_thread_db.h: Rename include guard. * nat/gdb_ptrace.h: Rename include guard. * nat/fork-inferior.h: Rename include guard. * nat/amd64-linux-siginfo.h: Rename include guard. * nat/aarch64-sve-linux-sigcontext.h: Rename include guard. * nat/aarch64-sve-linux-ptrace.h: Rename include guard. * nat/aarch64-linux.h: Rename include guard. * nat/aarch64-linux-hw-point.h: Rename include guard. * mn10300-tdep.h: Add include guard. * mips-linux-tdep.h: Add include guard. * mi/mi-parse.h: Rename include guard. * mi/mi-out.h: Rename include guard. * mi/mi-main.h: Rename include guard. * mi/mi-interp.h: Rename include guard. * mi/mi-getopt.h: Rename include guard. * mi/mi-console.h: Rename include guard. * mi/mi-common.h: Rename include guard. * mi/mi-cmds.h: Rename include guard. * mi/mi-cmd-break.h: Rename include guard. * m2-lang.h: Add include guard. * location.h: Rename include guard. * linux-record.h: Rename include guard. * linux-nat.h: Add include guard. * linux-fork.h: Add include guard. * i386-darwin-tdep.h: Rename include guard. * hppa-linux-offsets.h: Add include guard. * guile/guile.h: Rename include guard. * guile/guile-internal.h: Rename include guard. * gnu-nat.h: Rename include guard. * gdb-stabs.h: Rename include guard. * frv-tdep.h: Add include guard. * f-lang.h: Add include guard. * event-loop.h: Add include guard. * darwin-nat.h: Rename include guard. * cp-abi.h: Rename include guard. * config/sparc/nm-sol2.h: Rename include guard. * config/nm-nto.h: Rename include guard. * config/nm-linux.h: Add include guard. * config/i386/nm-i386gnu.h: Rename include guard. * config/djgpp/nl_types.h: Rename include guard. * config/djgpp/langinfo.h: Rename include guard. * compile/gcc-cp-plugin.h: Add include guard. * compile/gcc-c-plugin.h: Add include guard. * compile/compile.h: Rename include guard. * compile/compile-object-run.h: Rename include guard. * compile/compile-object-load.h: Rename include guard. * compile/compile-internal.h: Rename include guard. * compile/compile-cplus.h: Rename include guard. * compile/compile-c.h: Rename include guard. * common/xml-utils.h: Rename include guard. * common/x86-xstate.h: Rename include guard. * common/version.h: Rename include guard. * common/vec.h: Rename include guard. * common/tdesc.h: Rename include guard. * common/selftest.h: Rename include guard. * common/scoped_restore.h: Rename include guard. * common/scoped_mmap.h: Rename include guard. * common/scoped_fd.h: Rename include guard. * common/safe-iterator.h: Rename include guard. * common/run-time-clock.h: Rename include guard. * common/refcounted-object.h: Rename include guard. * common/queue.h: Rename include guard. * common/ptid.h: Rename include guard. * common/print-utils.h: Rename include guard. * common/preprocessor.h: Rename include guard. * common/pathstuff.h: Rename include guard. * common/observable.h: Rename include guard. * common/netstuff.h: Rename include guard. * common/job-control.h: Rename include guard. * common/host-defs.h: Rename include guard. * common/gdb_wait.h: Rename include guard. * common/gdb_vecs.h: Rename include guard. * common/gdb_unlinker.h: Rename include guard. * common/gdb_unique_ptr.h: Rename include guard. * common/gdb_tilde_expand.h: Rename include guard. * common/gdb_sys_time.h: Rename include guard. * common/gdb_string_view.h: Rename include guard. * common/gdb_splay_tree.h: Rename include guard. * common/gdb_setjmp.h: Rename include guard. * common/gdb_ref_ptr.h: Rename include guard. * common/gdb_optional.h: Rename include guard. * common/gdb_locale.h: Rename include guard. * common/gdb_assert.h: Rename include guard. * common/filtered-iterator.h: Rename include guard. * common/filestuff.h: Rename include guard. * common/fileio.h: Rename include guard. * common/environ.h: Rename include guard. * common/common-utils.h: Rename include guard. * common/common-types.h: Rename include guard. * common/common-regcache.h: Rename include guard. * common/common-inferior.h: Rename include guard. * common/common-gdbthread.h: Rename include guard. * common/common-exceptions.h: Rename include guard. * common/common-defs.h: Rename include guard. * common/common-debug.h: Rename include guard. * common/cleanups.h: Rename include guard. * common/buffer.h: Rename include guard. * common/btrace-common.h: Rename include guard. * common/break-common.h: Rename include guard. * cli/cli-utils.h: Rename include guard. * cli/cli-style.h: Rename include guard. * cli/cli-setshow.h: Rename include guard. * cli/cli-script.h: Rename include guard. * cli/cli-interp.h: Rename include guard. * cli/cli-decode.h: Rename include guard. * cli/cli-cmds.h: Rename include guard. * charset-list.h: Add include guard. * buildsym-legacy.h: Rename include guard. * bfin-tdep.h: Add include guard. * ax.h: Rename include guard. * arm-linux-tdep.h: Add include guard. * arm-fbsd-tdep.h: Add include guard. * arch/xtensa.h: Rename include guard. * arch/tic6x.h: Add include guard. * arch/i386.h: Add include guard. * arch/arm.h: Rename include guard. * arch/arm-linux.h: Rename include guard. * arch/arm-get-next-pcs.h: Rename include guard. * arch/amd64.h: Add include guard. * arch/aarch64-insn.h: Rename include guard. * arch-utils.h: Rename include guard. * annotate.h: Add include guard. * amd64-darwin-tdep.h: Rename include guard. * aarch64-linux-tdep.h: Add include guard. * aarch64-fbsd-tdep.h: Add include guard. * aarch32-linux-nat.h: Add include guard. gdb/gdbserver/ChangeLog 2019-02-07 Tom Tromey <tom@tromey.com> * x86-tdesc.h: Rename include guard. * x86-low.h: Add include guard. * wincecompat.h: Rename include guard. * win32-low.h: Add include guard. * utils.h: Rename include guard. * tracepoint.h: Rename include guard. * tdesc.h: Rename include guard. * target.h: Rename include guard. * server.h: Rename include guard. * remote-utils.h: Rename include guard. * regcache.h: Rename include guard. * nto-low.h: Rename include guard. * notif.h: Add include guard. * mem-break.h: Rename include guard. * lynx-low.h: Add include guard. * linux-x86-tdesc.h: Add include guard. * linux-s390-tdesc.h: Add include guard. * linux-ppc-tdesc-init.h: Add include guard. * linux-low.h: Add include guard. * linux-aarch64-tdesc.h: Add include guard. * linux-aarch32-low.h: Add include guard. * inferiors.h: Rename include guard. * i387-fp.h: Rename include guard. * hostio.h: Rename include guard. * gdbthread.h: Rename include guard. * gdb_proc_service.h: Rename include guard. * event-loop.h: Rename include guard. * dll.h: Rename include guard. * debug.h: Rename include guard. * ax.h: Rename include guard.
2019-01-25Normalize includes to use common/Tom Tromey9-15/+15
This changes all includes to use the form "common/filename.h" rather than just "filename.h". This was written by a script. gdb/ChangeLog 2019-01-25 Tom Tromey <tom@tromey.com> * xtensa-linux-nat.c: Fix common/ includes. * xml-support.h: Fix common/ includes. * xml-support.c: Fix common/ includes. * x86-linux-nat.c: Fix common/ includes. * windows-nat.c: Fix common/ includes. * varobj.h: Fix common/ includes. * varobj.c: Fix common/ includes. * value.c: Fix common/ includes. * valops.c: Fix common/ includes. * utils.c: Fix common/ includes. * unittests/xml-utils-selftests.c: Fix common/ includes. * unittests/utils-selftests.c: Fix common/ includes. * unittests/unpack-selftests.c: Fix common/ includes. * unittests/tracepoint-selftests.c: Fix common/ includes. * unittests/style-selftests.c: Fix common/ includes. * unittests/string_view-selftests.c: Fix common/ includes. * unittests/scoped_restore-selftests.c: Fix common/ includes. * unittests/scoped_mmap-selftests.c: Fix common/ includes. * unittests/scoped_fd-selftests.c: Fix common/ includes. * unittests/rsp-low-selftests.c: Fix common/ includes. * unittests/parse-connection-spec-selftests.c: Fix common/ includes. * unittests/optional-selftests.c: Fix common/ includes. * unittests/offset-type-selftests.c: Fix common/ includes. * unittests/observable-selftests.c: Fix common/ includes. * unittests/mkdir-recursive-selftests.c: Fix common/ includes. * unittests/memrange-selftests.c: Fix common/ includes. * unittests/memory-map-selftests.c: Fix common/ includes. * unittests/lookup_name_info-selftests.c: Fix common/ includes. * unittests/function-view-selftests.c: Fix common/ includes. * unittests/environ-selftests.c: Fix common/ includes. * unittests/copy_bitwise-selftests.c: Fix common/ includes. * unittests/common-utils-selftests.c: Fix common/ includes. * unittests/cli-utils-selftests.c: Fix common/ includes. * unittests/array-view-selftests.c: Fix common/ includes. * ui-file.c: Fix common/ includes. * tui/tui-io.c: Fix common/ includes. * tracepoint.h: Fix common/ includes. * tracepoint.c: Fix common/ includes. * tracefile-tfile.c: Fix common/ includes. * top.h: Fix common/ includes. * top.c: Fix common/ includes. * thread.c: Fix common/ includes. * target/waitstatus.h: Fix common/ includes. * target/waitstatus.c: Fix common/ includes. * target.h: Fix common/ includes. * target.c: Fix common/ includes. * target-memory.c: Fix common/ includes. * target-descriptions.c: Fix common/ includes. * symtab.h: Fix common/ includes. * symfile.c: Fix common/ includes. * stap-probe.c: Fix common/ includes. * spu-linux-nat.c: Fix common/ includes. * sparc-nat.c: Fix common/ includes. * source.c: Fix common/ includes. * solib.c: Fix common/ includes. * solib-target.c: Fix common/ includes. * ser-unix.c: Fix common/ includes. * ser-tcp.c: Fix common/ includes. * ser-pipe.c: Fix common/ includes. * ser-base.c: Fix common/ includes. * selftest-arch.c: Fix common/ includes. * s12z-tdep.c: Fix common/ includes. * rust-exp.y: Fix common/ includes. * rs6000-aix-tdep.c: Fix common/ includes. * riscv-tdep.c: Fix common/ includes. * remote.c: Fix common/ includes. * remote-notif.h: Fix common/ includes. * remote-fileio.h: Fix common/ includes. * remote-fileio.c: Fix common/ includes. * regcache.h: Fix common/ includes. * regcache.c: Fix common/ includes. * record-btrace.c: Fix common/ includes. * python/python.c: Fix common/ includes. * python/py-type.c: Fix common/ includes. * python/py-inferior.c: Fix common/ includes. * progspace.h: Fix common/ includes. * producer.c: Fix common/ includes. * procfs.c: Fix common/ includes. * proc-api.c: Fix common/ includes. * printcmd.c: Fix common/ includes. * ppc-linux-nat.c: Fix common/ includes. * parser-defs.h: Fix common/ includes. * osdata.c: Fix common/ includes. * obsd-nat.c: Fix common/ includes. * nat/x86-linux.c: Fix common/ includes. * nat/x86-linux-dregs.c: Fix common/ includes. * nat/x86-dregs.h: Fix common/ includes. * nat/x86-dregs.c: Fix common/ includes. * nat/ppc-linux.c: Fix common/ includes. * nat/mips-linux-watch.h: Fix common/ includes. * nat/mips-linux-watch.c: Fix common/ includes. * nat/linux-waitpid.c: Fix common/ includes. * nat/linux-ptrace.h: Fix common/ includes. * nat/linux-ptrace.c: Fix common/ includes. * nat/linux-procfs.c: Fix common/ includes. * nat/linux-personality.c: Fix common/ includes. * nat/linux-osdata.c: Fix common/ includes. * nat/linux-namespaces.c: Fix common/ includes. * nat/linux-btrace.h: Fix common/ includes. * nat/linux-btrace.c: Fix common/ includes. * nat/fork-inferior.c: Fix common/ includes. * nat/amd64-linux-siginfo.c: Fix common/ includes. * nat/aarch64-sve-linux-ptrace.c: Fix common/ includes. * nat/aarch64-linux.c: Fix common/ includes. * nat/aarch64-linux-hw-point.h: Fix common/ includes. * nat/aarch64-linux-hw-point.c: Fix common/ includes. * namespace.h: Fix common/ includes. * mips-linux-tdep.c: Fix common/ includes. * minsyms.c: Fix common/ includes. * mi/mi-parse.h: Fix common/ includes. * mi/mi-main.c: Fix common/ includes. * mi/mi-cmd-env.c: Fix common/ includes. * memrange.h: Fix common/ includes. * memattr.c: Fix common/ includes. * maint.h: Fix common/ includes. * maint.c: Fix common/ includes. * main.c: Fix common/ includes. * machoread.c: Fix common/ includes. * location.c: Fix common/ includes. * linux-thread-db.c: Fix common/ includes. * linux-nat.c: Fix common/ includes. * linux-fork.c: Fix common/ includes. * inline-frame.c: Fix common/ includes. * infrun.c: Fix common/ includes. * inflow.c: Fix common/ includes. * inferior.h: Fix common/ includes. * inferior.c: Fix common/ includes. * infcmd.c: Fix common/ includes. * inf-ptrace.c: Fix common/ includes. * inf-child.c: Fix common/ includes. * ia64-linux-nat.c: Fix common/ includes. * i387-tdep.c: Fix common/ includes. * i386-tdep.c: Fix common/ includes. * i386-linux-tdep.c: Fix common/ includes. * i386-linux-nat.c: Fix common/ includes. * i386-go32-tdep.c: Fix common/ includes. * i386-fbsd-tdep.c: Fix common/ includes. * i386-fbsd-nat.c: Fix common/ includes. * guile/scm-type.c: Fix common/ includes. * guile/guile.c: Fix common/ includes. * go32-nat.c: Fix common/ includes. * gnu-nat.c: Fix common/ includes. * gdbthread.h: Fix common/ includes. * gdbarch-selftests.c: Fix common/ includes. * gdb_usleep.c: Fix common/ includes. * gdb_select.h: Fix common/ includes. * gdb_bfd.c: Fix common/ includes. * gcore.c: Fix common/ includes. * fork-child.c: Fix common/ includes. * findvar.c: Fix common/ includes. * fbsd-nat.c: Fix common/ includes. * event-top.c: Fix common/ includes. * event-loop.c: Fix common/ includes. * dwarf2read.c: Fix common/ includes. * dwarf2loc.c: Fix common/ includes. * dwarf2-frame.c: Fix common/ includes. * dwarf-index-cache.c: Fix common/ includes. * dtrace-probe.c: Fix common/ includes. * disasm-selftests.c: Fix common/ includes. * defs.h: Fix common/ includes. * csky-tdep.c: Fix common/ includes. * cp-valprint.c: Fix common/ includes. * cp-support.h: Fix common/ includes. * cp-support.c: Fix common/ includes. * corelow.c: Fix common/ includes. * completer.h: Fix common/ includes. * completer.c: Fix common/ includes. * compile/compile.c: Fix common/ includes. * compile/compile-loc2c.c: Fix common/ includes. * compile/compile-cplus-types.c: Fix common/ includes. * compile/compile-cplus-symbols.c: Fix common/ includes. * command.h: Fix common/ includes. * cli/cli-dump.c: Fix common/ includes. * cli/cli-cmds.c: Fix common/ includes. * charset.c: Fix common/ includes. * build-id.c: Fix common/ includes. * btrace.h: Fix common/ includes. * btrace.c: Fix common/ includes. * breakpoint.h: Fix common/ includes. * breakpoint.c: Fix common/ includes. * ax.h: (enum agent_op): Fix common/ includes. * ax-general.c (struct aop_map): Fix common/ includes. * ax-gdb.c: Fix common/ includes. * auxv.c: Fix common/ includes. * auto-load.c: Fix common/ includes. * arm-tdep.c: Fix common/ includes. * arch/riscv.c: Fix common/ includes. * arch/ppc-linux-common.c: Fix common/ includes. * arch/i386.c: Fix common/ includes. * arch/arm.c: Fix common/ includes. * arch/arm-linux.c: Fix common/ includes. * arch/arm-get-next-pcs.c: Fix common/ includes. * arch/amd64.c: Fix common/ includes. * arch/aarch64.c: Fix common/ includes. * arch/aarch64-insn.c: Fix common/ includes. * arch-utils.c: Fix common/ includes. * amd64-windows-tdep.c: Fix common/ includes. * amd64-tdep.c: Fix common/ includes. * amd64-sol2-tdep.c: Fix common/ includes. * amd64-obsd-tdep.c: Fix common/ includes. * amd64-nbsd-tdep.c: Fix common/ includes. * amd64-linux-tdep.c: Fix common/ includes. * amd64-linux-nat.c: Fix common/ includes. * amd64-fbsd-tdep.c: Fix common/ includes. * amd64-fbsd-nat.c: Fix common/ includes. * amd64-dicos-tdep.c: Fix common/ includes. * amd64-darwin-tdep.c: Fix common/ includes. * agent.c: Fix common/ includes. * ada-lang.h: Fix common/ includes. * ada-lang.c: Fix common/ includes. * aarch64-tdep.c: Fix common/ includes. gdb/gdbserver/ChangeLog 2019-01-25 Tom Tromey <tom@tromey.com> * win32-low.c: Fix common/ includes. * win32-i386-low.c: Fix common/ includes. * tracepoint.c: Fix common/ includes. * thread-db.c: Fix common/ includes. * target.h: Fix common/ includes. * symbol.c: Fix common/ includes. * spu-low.c: Fix common/ includes. * server.h: Fix common/ includes. * server.c: Fix common/ includes. * remote-utils.c: Fix common/ includes. * regcache.h: Fix common/ includes. * regcache.c: Fix common/ includes. * nto-x86-low.c: Fix common/ includes. * notif.h: Fix common/ includes. * mem-break.h: Fix common/ includes. * lynx-low.c: Fix common/ includes. * lynx-i386-low.c: Fix common/ includes. * linux-x86-tdesc-selftest.c: Fix common/ includes. * linux-x86-low.c: Fix common/ includes. * linux-low.c: Fix common/ includes. * inferiors.h: Fix common/ includes. * i387-fp.c: Fix common/ includes. * hostio.c: Fix common/ includes. * hostio-errno.c: Fix common/ includes. * gdbthread.h: Fix common/ includes. * gdbreplay.c: Fix common/ includes. * fork-child.c: Fix common/ includes. * event-loop.c: Fix common/ includes. * ax.c: (enum gdb_agent_op): Fix common/ includes.
2019-01-01gdb/riscv: Split ISA and ABI featuresAndrew Burgess1-13/+2
The goal of this commit is to allow RV64 binaries compiled for the 'F' extension to run on a target that supports both the 'F' and 'D' extensions. The 'D' extension depends on the 'F' extension and chapter 9 of the RISC-V ISA manual implies that running a program compiled for 'F' on a 'D' target should be fine. To support this the gdbarch now holds two feature sets, one represents the features that are present on the target, and one represents the features requested in the ELF flags. The existing error checks are relaxed slightly to allow binaries compiled for 32-bit 'F' extension to run on targets with the 64-bit 'D' extension. A new set of functions called riscv_abi_{xlen,flen} are added to compliment the existing riscv_isa_{xlen,flen}, and some callers to the isa functions now call the abi functions when that is appropriate. In riscv_call_arg_struct two asserts are removed, these asserts no longer make sense. The asserts were both like this: gdb_assert (TYPE_LENGTH (ainfo->type) <= (cinfo->flen + cinfo->xlen)); And were made in two cases, when passing structures like these: struct { integer field1; float field2; }; or, struct { float field1; integer field2; }; When running on an RV64 target which only has 32-bit float then the integer field could be 64-bits, while if the float field is 32-bits the overall size of the structure can be 128-bits (with 32-bits of padding). In this case the assertion would fail, however, the code isn't incorrect, so its safe to just remove the assertion. This was tested by running on an RV64IMFDC target using a compiler configured for RV64IMFC, and comparing the results with those obtained when using a compiler configured for RV64IMFDC. The only regressions I see (now) are in gdb.base/store.exp and are related too different code generation choices GCC makes between the two targets. Finally, this commit does not make any attempt to support running binaries compiled for RV32 on an RV64 target, though nothing in here should prevent that being supported in the future. gdb/ChangeLog: * arch/riscv.h (struct riscv_gdbarch_features) <hw_float_abi>: Delete. <operator==>: Update with for removed field. <hash>: Likewise. * riscv-tdep.h (struct gdbarch_tdep) <features>: Renamed to... <isa_features>: ...this. <abi_features>: New field. (riscv_isa_flen): Update comment. (riscv_abi_xlen): New declaration. (riscv_abi_flen): New declaration. * riscv-tdep.c (riscv_isa_xlen): Update to get answer from isa_features. (riscv_abi_xlen): New function. (riscv_isa_flen): Update to get answer from isa_features. (riscv_abi_flen): New function. (riscv_has_fp_abi): Update to get answer from abi_features. (riscv_call_info::riscv_call_info): Use abi xlen and flen, not isa xlen and flen. (riscv_call_info) <xlen, flen>: Update comment. (riscv_call_arg_struct): Remove invalid assertions (riscv_features_from_gdbarch_info): Update now hw_float_abi field is removed. (riscv_gdbarch_init): Gather isa features and abi features separately, ensure both match on the gdbarch when reusing an old gdbarch. Relax an error check to allow 32-bit abi float to run on a target with 64-bit float hardware.
2019-01-01Update copyright year range in all GDB files.Joel Brobecker22-22/+22
This commit applies all changes made after running the gdb/copyright.py script. Note that one file was flagged by the script, due to an invalid copyright header (gdb/unittests/basic_string_view/element_access/char/empty.cc). As the file was copied from GCC's libstdc++-v3 testsuite, this commit leaves this file untouched for the time being; a patch to fix the header was sent to gcc-patches first. gdb/ChangeLog: Update copyright year range in all GDB files.
2018-11-30gdb/riscv: Create each unique target description only onceAndrew Burgess2-0/+40
GDB relies on the fact that if two target descriptions have the same contents, then they will be the same object instance (having the same address). One place where this is a requirement is in GDBARCH_LIST_LOOKUP_BY_INFO which is used to find previously created gdbarch objects. In GDBARCH_LIST_LOOKUP_BY_INFO a pointer comparison is made on the gdbarch's target description, if the pointers are different then it is assumed the gdbarches have different, non-compatible target descriptions. Previously we would create duplicate target descriptions in the belief that RISCV_GDBARCH_INIT would spot this duplication and discard the second instance. However, this was incorrect, and instead we ended up creating duplicate gdbarch objects. With this commit every unique feature set will create one and only one target description, the feature set and resulting target description is then cached so that the same target description object can be returned later. Many other target avoid this problem by creating a small number of named target descriptions, and returning one of these. However, we currently have 8 possible target descriptions (32 vs 64 bit for x-reg and f-reg, and h/w or s/w float abi) and creating each of these just to avoid a dynamic cache seems pointless. gdb/ChangeLog: * arch/riscv.h (riscv_gdbarch_features::hash): New method. * arch/riscv.c (struct riscv_gdbarch_features_hasher): New. (riscv_tdesc_cache): New global. (riscv_create_target_description): Look in the cache before creating a new target description.
2018-11-30gdb/riscv: Add equality operators to riscv_gdb_featuresAndrew Burgess1-0/+13
Add '==' and '!=' operators for the struct riscv_gdb_features, allowing a small simplification. gdb/ChangeLog: * arch/riscv.h (riscv_gdb_features::operator==): New. (riscv_gdb_features::operator!=): New. * riscv-tdep.c (riscv_gdbarch_init): Make use of the inequality operator.
2018-11-30gdb/riscv: Make some target description functions constantAndrew Burgess2-2/+2
Makes more of the interface related to fetching target descriptions constant. gdb/ChangeLog: * arch/riscv.h (riscv_create_target_description): Make return type const. * arch/riscv.c (riscv_create_target_description): Likewise. * riscv-tdep.c (riscv_find_default_target_description): Likewise.
2018-11-21gdb/riscv: Add target description supportAndrew Burgess2-0/+133
This commit adds target description support for riscv. I've used the split feature approach for specifying the architectural features, and the CSR feature is auto-generated from the riscv-opc.h header file. If the target doesn't provide a suitable target description then GDB will build one by looking at the bfd headers. This commit does not implement target description creation for the Linux or FreeBSD native targets, both of these will need to add read_description methods into their respective target classes, which probe the target features, and then call riscv_create_target_description to build a suitable target description. Until this is done Linux and FreeBSD will get the same default target description based on the bfd that bare-metal targets get. I've only added feature descriptions for 32 and 64 bit registers, 128 bit registers (for RISC-V) are not supported in the reset of GDB yet. This commit removes the special reading of the MISA register in order to establish the target features, this was only used for figuring out the f-register size, and even that wasn't done consistently. We now rely on the target to tell us what size of registers it has (or look in the BFD as a last resort). The result of this is that we should now support RV64 targets with 32-bit float, though I have not extensively tested this combination yet. * Makefile.in (ALL_TARGET_OBS): Add arch/riscv.o. (HFILES_NO_SRCDIR): Add arch/riscv.h. * arch/riscv.c: New file. * arch/riscv.h: New file. * configure.tgt: Add cpu_obs list of riscv, move riscv-tdep.o into this list, and add arch/riscv.o. * features/Makefile: Add riscv features. * features/riscv/32bit-cpu.c: New file. * features/riscv/32bit-cpu.xml: New file. * features/riscv/32bit-csr.c: New file. * features/riscv/32bit-csr.xml: New file. * features/riscv/32bit-fpu.c: New file. * features/riscv/32bit-fpu.xml: New file. * features/riscv/64bit-cpu.c: New file. * features/riscv/64bit-cpu.xml: New file. * features/riscv/64bit-csr.c: New file. * features/riscv/64bit-csr.xml: New file. * features/riscv/64bit-fpu.c: New file. * features/riscv/64bit-fpu.xml: New file. * features/riscv/rebuild-csr-xml.sh: New file. * riscv-tdep.c: Add 'arch/riscv.h' include. (riscv_gdb_reg_names): Delete. (csr_reggroup): New global. (struct riscv_register_alias): Delete. (struct riscv_register_feature): New structure. (riscv_register_aliases): Delete. (riscv_xreg_feature): New global. (riscv_freg_feature): New global. (riscv_virtual_feature): New global. (riscv_csr_feature): New global. (riscv_create_csr_aliases): New function. (riscv_read_misa_reg): Delete. (riscv_has_feature): Delete. (riscv_isa_xlen): Simplify, just return cached xlen. (riscv_isa_flen): Simplify, just return cached flen. (riscv_has_fp_abi): Update for changes in struct gdbarch_tdep. (riscv_register_name): Update to make use of tdesc_register_name. Look up xreg and freg names in the new globals riscv_xreg_feature and riscv_freg_feature. Don't supply csr aliases here. (riscv_fpreg_q_type): Delete. (riscv_register_type): Use tdesc_register_type in almost all cases, override the returned type in a few specific cases only. (riscv_print_one_register_info): Handle errors reading registers. (riscv_register_reggroup_p): Use tdesc_register_in_reggroup_p for registers that are otherwise unknown to GDB. Also check the csr_reggroup. (riscv_print_registers_info): Remove assert about upper register number, and use gdbarch_register_reggroup_p instead of short-cutting. (riscv_find_default_target_description): New function. (riscv_check_tdesc_feature): New function. (riscv_add_reggroups): New function. (riscv_setup_register_aliases): New function. (riscv_init_reggroups): New function. (_initialize_riscv_tdep): Add calls to setup CSR aliases, and setup register groups. Register new riscv debug variable. * riscv-tdep.h: Add 'arch/riscv.h' include. (struct gdbarch_tdep): Remove abi union, and add riscv_gdbarch_features field. Remove cached quad floating point type, and provide initialisation for double type field. * target-descriptions.c (maint_print_c_tdesc_cmd): Add riscv to the list of targets using the feature based target descriptions. * NEWS: Mention target description support. gdb/doc/ChangeLog: * gdb.texinfo (Standard Target Features): Add RISC-V Features sub-section.
2018-10-26[PowerPC] Add support for HTM registersEdjunior Barbosa Machado3-2/+17
This patch adds support for Hardware Transactional Memory registers for the powerpc linux native and core file targets, and for the pwoerpc linux server stub. These registers include both the HTM special-purpose registers (TFHAR, TEXASR and TFIAR) as well as the set of registers that are checkpointed (saved) when a transaction is initiated, which the processor restores in the event of a transaction failure. The set of checkpointed general-purpose registers is returned by the linux kernel in the same format as the regular general-purpose registers, defined in struct pt_regs. However, the architecture specifies that only some of the registers present in pt_regs are checkpointed (GPRs 0-31, CR, XER, LR and CTR). The kernel fills the slots for MSR and NIP with other info. The other fields usually don't have meaningful values. GDB doesn't define registers that are not checkpointed in the architecture, but when generating a core file, GDB fills the slot for the checkpointed MSR with the regular MSR. These are usually similar, although some bits might be different, and in some cases the checkpointed MSR will have a value of 0 in a kernel-generated core-file. The checkpointed NIP is filled with TFHAR by GDB in the core-file, which is what the kernel does. The other fields are set to 0 by GDB. Core files generated by the kernel have a note section for checkpointed GPRs with the same size for both 32-bit and 64-bit threads, and the values for the registers of a 32-bit thread are squeezed in the first half, with no useful data in the second half. GDB generates a smaller note section for 32-bit threads, but can read both sizes. The checkpointed XER is required to be 32-bit in the target description documentation, even though the more recent ISAs define it as 64-bit wide, since the high-order 32-bits are reserved, and because in Linux there is no way to get a 64-bit checkpointed XER for 32-bit threads. If this changes in the future, the target description feature requirement can be relaxed to allow for a 64-bit checkpointed XER. Access to the checkpointed CR (condition register) can be confusing. The architecture only specifies that CR fields 1 to 7 (the 24 least significant bits) are checkpointed, but the kernel provides all 8 fields (32 bits). The value of field 0 is not masked by ptrace, so it will sometimes show the result of some kernel operation, probably treclaim., which sets this field. The checkpointed registers are marked not to be saved and restored. Inferior function calls during an active transaction don't work well, and it's unclear what should be done in this case. TEXASR and TFIAR can be altered asynchronously, during transaction failure recording, so they are also not saved and restored. For consistency neither is TFHAR. Record and replay also doesn't work well when transactions are involved. This patch doesn't address this, so the values of the HTM SPRs will sometimes be innacurate when the record/relay target is enabled. For instance, executing a "tbegin." alters TFHAR and TEXASR, but these changes are not currently recorded. Because the checkpointed registers are only available when a transaction is active (or suspended), ptrace can return ENODATA when gdb tries to read these registers and the inferior is not in a transactional state. The registers are set to the unavailable state when this happens. When gbd tries to write to one of these registers, and it is unavailable, an error is raised. The "fill" functions for checkpointed register sets in the server stub are not implemented for the same reason as for the EBB register set, since ptrace can also return ENODATA for checkpointed regsets. The same issues with 'G' packets apply here. Just like for the EBB registers, tracepoints will not mark the checkpointed registers as unavailable if the inferior was not in a transaction, so their content will also show 0 instead of <unavailable> when inspecting trace data. The new tests record the values of the regular registers before stepping the inferior through a "tbegin." instruction to start a transaction, then the checkpointed registers are checked against the recorded pre-transactional values. New values are written to the checkpointed registers and recorded, the inferior continues until the transaction aborts (which is usually immediately when it is resumed), and the regular registers are checked against the recorded values, because the abort should have reverted the registers to these values. Like for the EBB registers, target_store_registers will ignore the checkpointed registers when called with -1 as the regno argument (store all registers in one go). gdb/ChangeLog: 2018-10-26 Edjunior Barbosa Machado <emachado@linux.vnet.ibm.com> Pedro Franco de Carvalho <pedromfc@linux.ibm.com> * arch/ppc-linux-tdesc.h (tdesc_powerpc_isa207_htm_vsx32l) (tdesc_powerpc_isa207_htm_vsx64l): Declare. * arch/ppc-linux-common.h (PPC_LINUX_SIZEOF_TM_SPRREGSET) (PPC32_LINUX_SIZEOF_CGPRREGSET, PPC64_LINUX_SIZEOF_CGPRREGSET) (PPC_LINUX_SIZEOF_CFPRREGSET, PPC_LINUX_SIZEOF_CVMXREGSET) (PPC_LINUX_SIZEOF_CVSXREGSET, PPC_LINUX_SIZEOF_CPPRREGSET) (PPC_LINUX_SIZEOF_CDSCRREGSET, PPC_LINUX_SIZEOF_CTARREGSET): Define. (struct ppc_linux_features) <htm>: New field. (ppc_linux_no_features): Add initializer for htm field. * arch/ppc-linux-common.c (ppc_linux_match_description): Return new tdescs. * nat/ppc-linux.h (PPC_FEATURE2_HTM, NT_PPC_TM_CGPR) (NT_PPC_TM_CFPR, NT_PPC_TM_CVMX, NT_PPC_TM_CVSX) (NT_PPC_TM_SPR, NT_PPC_TM_CTAR, NT_PPC_TM_CPPR, NT_PPC_TM_CDSCR): Define if not already defined. * features/Makefile (WHICH): Add rs6000/powerpc-isa207-htm-vsx32l and rs6000/powerpc-isa207-htm-vsx64l. (XMLTOC): Add rs6000/powerpc-isa207-htm-vsx32l.xml and rs6000/powerpc-isa207-htm-vsx64l.xml. * features/rs6000/power-htm-spr.xml: New file. * features/rs6000/power-htm-core.xml: New file. * features/rs6000/power64-htm-core.xml: New file. * features/rs6000/power-htm-fpu.xml: New file. * features/rs6000/power-htm-altivec.xml: New file. * features/rs6000/power-htm-vsx.xml: New file. * features/rs6000/power-htm-ppr.xml: New file. * features/rs6000/power-htm-dscr.xml: New file. * features/rs6000/power-htm-tar.xml: New file. * features/rs6000/powerpc-isa207-htm-vsx32l.xml: New file. * features/rs6000/powerpc-isa207-htm-vsx64l.xml: New file. * features/rs6000/powerpc-isa207-htm-vsx32l.c: Generate. * features/rs6000/powerpc-isa207-htm-vsx64l.c: Generate. * regformats/rs6000/powerpc-isa207-htm-vsx32l.dat: Generate. * regformats/rs6000/powerpc-isa207-htm-vsx64l.dat: Generate. * ppc-linux-nat.c (fetch_register, fetch_ppc_registers): Call fetch_regset with HTM regsets. (store_register, store_ppc_registers): Call store_regset with HTM regsets. (ppc_linux_nat_target::read_description): Set htm field in the features struct if needed. * ppc-linux-tdep.c: Include features/rs6000/powerpc-isa207-htm-vsx32l.c and features/rs6000/powerpc-isa207-htm-vsx64l.c. (ppc32_regmap_tm_spr, ppc32_regmap_cgpr, ppc64_le_regmap_cgpr) (ppc64_be_regmap_cgpr, ppc32_regmap_cfpr, ppc32_le_regmap_cvmx) (ppc32_be_regmap_cvmx, ppc32_regmap_cvsx, ppc32_regmap_cppr) (ppc32_regmap_cdscr, ppc32_regmap_ctar): New globals. (ppc32_linux_tm_sprregset, ppc32_linux_cgprregset) (ppc64_be_linux_cgprregset, ppc64_le_linux_cgprregset) (ppc32_linux_cfprregset, ppc32_le_linux_cvmxregset) (ppc32_be_linux_cvmxregset, ppc32_linux_cvsxregset) (ppc32_linux_cpprregset, ppc32_linux_cdscrregset) (ppc32_linux_ctarregset): New globals. (ppc_linux_cgprregset, ppc_linux_cvmxregset): New functions. (ppc_linux_collect_core_cpgrregset): New function. (ppc_linux_iterate_over_regset_sections): Call back with the htm regsets. (ppc_linux_core_read_description): Check if the tm spr section is present and set htm in the features struct. (_initialize_ppc_linux_tdep): Call initialize_tdesc_powerpc_isa207_htm_vsx32l and initialize_tdesc_powerpc_isa207_htm_vsx64l. * ppc-linux-tdep.h (ppc_linux_cgprregset, ppc_linux_cvmxregset): Declare. (ppc32_linux_tm_sprregset, ppc32_linux_cfprregset) (ppc32_linux_cvsxregset, ppc32_linux_cpprregset) (ppc32_linux_cdscrregset, ppc32_linux_ctarregset): Declare. * ppc-tdep.h (struct gdbarch_tdep) <have_htm_spr, have_htm_core>: New fields. <have_htm_fpu, have_htm_altivec, have_htm_vsx>: Likewise. <ppc_cppr_regnum, ppc_cdscr_regnum, ppc_ctar_regnum>: Likewise. <ppc_cdl0_regnum, ppc_cvsr0_regnum, ppc_cefpr0_regnum>: Likewise. (enum) <PPC_TFHAR_REGNUM, PPC_TEXASR_REGNUM, PPC_TFIAR_REGNUM>: New enum fields. <PPC_CR0_REGNUM, PPC_CCR_REGNUM, PPC_CXER_REGNUM>: Likewise. <PPC_CLR_REGNUM, PPC_CCTR_REGNUM, PPC_CF0_REGNUM>: Likewise. <PPC_CFPSCR_REGNUM, PPC_CVR0_REGNUM, PPC_CVSCR_REGNUM>: Likewise. <PPC_CVRSAVE_REGNUM, PPC_CVSR0_UPPER_REGNUM>: Likewise. <PPC_CPPR_REGNUM, PPC_CDSCR_REGNUM>: Likewise. <PPC_CTAR_REGNUM>: Likewise. (PPC_IS_TMSPR_REGNUM, PPC_IS_CKPTGP_REGNUM, PPC_IS_CKPTFP_REGNUM) (PPC_IS_CKPTVMX_REGNUM, PPC_IS_CKPTVSX_REGNUM): Define. * rs6000-tdep.c (IS_CDFP_PSEUDOREG, IS_CVSX_PSEUDOREG) (IS_CEFP_PSEUDOREG): Define. (rs6000_register_name): Hide the upper halves of checkpointed VSX registers. Return names for the checkpointed DFP, VSX, and EFP pseudo registers. (rs6000_pseudo_register_type): Remove initial assert and raise an internal error in the else clause instead. Return types for the checkpointed DFP, VSX, and EFP pseudo registers. (dfp_pseudo_register_read, dfp_pseudo_register_write): Handle checkpointed DFP pseudo registers. (vsx_pseudo_register_read, vsx_pseudo_register_write): Handle checkpointed VSX pseudo registers. (efp_pseudo_register_read, efp_pseudo_register_write): Rename from efpr_pseudo_register_read and efpr_pseudo_register_write. Handle checkpointed EFP pseudo registers. (rs6000_pseudo_register_read, rs6000_pseudo_register_write): Handle checkpointed DFP, VSX, and EFP registers. (dfp_ax_pseudo_register_collect, vsx_ax_pseudo_register_collect) (efp_ax_pseudo_register_collect): New functions. (rs6000_ax_pseudo_register_collect): Move DFP, VSX and EFP pseudo register logic to new functions. Handle checkpointed DFP, VSX, and EFP pseudo registers. (rs6000_gdbarch_init): Look for and validate the htm features. Include checkpointed DFP, VSX and EFP pseudo-registers. * NEWS: Mention access to PPR, DSCR, TAR, EBB/PMU registers and HTM registers. gdb/gdbserver/ChangeLog: 2018-10-26 Pedro Franco de Carvalho <pedromfc@linux.ibm.com> * configure.srv (ipa_ppc_linux_regobj): Add powerpc-isa207-htm-vsx32l-ipa.o and powerpc-isa207-htm-vsx64l-ipa.o. (powerpc*-*-linux*): Add powerpc-isa207-htm-vsx32l.o and powerpc-isa207-htm-vsx64l.o to srv_regobj. Add rs6000/power-htm-spr.xml, rs6000/power-htm-core.xml, rs6000/power64-htm-core.xml, rs6000/power-htm-fpu.xml, rs6000/power-htm-altivec.xml, rs6000/power-htm-vsx.xml, rs6000/power-htm-ppr.xml, rs6000/power-htm-dscr.xml, rs6000/power-htm-tar.xml, rs6000/powerpc-isa207-htm-vsx32l.xml, and rs6000/powerpc-isa207-htm-vsx64l.xml to srv_xmlfiles. * linux-ppc-tdesc-init.h (enum ppc_linux_tdesc) <PPC_TDESC_ISA207_HTM_VSX>: New enum value. (init_registers_powerpc_isa207_htm_vsx32l) (init_registers_powerpc_isa207_htm_vsx64l): Declare. * linux-ppc-low.c (ppc_fill_tm_sprregset, ppc_store_tm_sprregset) (ppc_store_tm_cgprregset, ppc_store_tm_cfprregset) (ppc_store_tm_cvrregset, ppc_store_tm_cvsxregset) (ppc_store_tm_cpprregset, ppc_store_tm_cdscrregset) (ppc_store_tm_ctarregset): New functions. (ppc_regsets): Add entries for HTM regsets. (ppc_arch_setup): Set htm in features struct when needed. Set sizes for the HTM regsets. (ppc_get_ipa_tdesc_idx): Return PPC_TDESC_ISA207_HTM_VSX. (initialize_low_arch): Call init_registers_powerpc_isa207_htm_vsx32l and init_registers_powerpc_isa207_htm_vsx64l. * linux-ppc-ipa.c (get_ipa_tdesc): Handle PPC_TDESC_ISA207_HTM_VSX. (initialize_low_tracepoint): Call init_registers_powerpc_isa207_htm_vsx32l and init_registers_powerpc_isa207_htm_vsx64l. gdb/testsuite/ChangeLog: 2018-10-26 Pedro Franco de Carvalho <pedromfc@linux.ibm.com> * gdb.arch/powerpc-htm-regs.c: New file. * gdb.arch/powerpc-htm-regs.exp: New file. gdb/doc/ChangeLog: 2018-10-26 Pedro Franco de Carvalho <pedromfc@linux.ibm.com> * gdb.texinfo (PowerPC Features): Describe new features "org.gnu.gdb.power.htm.spr", "org.gnu.gdb.power.htm.core", "org.gnu.gdb.power.htm.fpu", "org.gnu.gdb.power.htm.altivec", "org.gnu.gdb.power.htm.vsx", "org.gnu.gdb.power.htm.ppr", "org.gnu.gdb.power.htm.dscr", "org.gnu.gdb.power.htm.tar".
2018-10-26[PowerPC] Add support for EBB and PMU registersEdjunior Barbosa Machado1-0/+2
This patch adds support for registers of the Event Based Branching and Performance Monitoring Units for the powerpc linux native and core file targets, and for the powerpc linux server stub. All three EBB registers are accessible. Only a subset of the PMU registers can be accessed through ptrace. Because of this, the PMU registers are enumerated individually in gdbarch_tdep, as opposed to having a single "have_pmu" flag. This is intended to make it easier to add additional PMU registers in the future, since checking a "have_pmu" flag elsewhere in the code would no longer be correct. The tdesc feature is named org.gnu.gdb.power.linux.pmu because of this. It's unclear if it makes sense to save and restore these registers across function calls, since some of them can be modified asynchronously. They are also not tracked in record-replay mode. The kernel can return ENODATA when ptrace is used to get the EBB registers, unless a linux performance event that uses EBB is open in the inferior. For this reason, the "fill" functions in the server stub for the ebb register sets is not implemented. Since gdbserver writes all registers in one go before resuming the inferior, this error would not be detected at the time the user tries to write to one of the registers on the client side, and gdbserver would print out warnings every time it resumes the inferior when no ebb performance event is opened, so there is currently no straightforward way to handle this case. This means the ebb registers in the client-side regcache can become dirty when the user tries to write to them, until the inferior is resumed and stopped again. A related issue is that 'G' packets used to write to unrelated registers will include bad data for the EBB registers if they are unavailable, since no register status information is included in the 'G' packet. This data won't be written to the inferior by the gdbserver stub because the "fill" functions are not implemented, and currently the gdbserver stub doesn't change the status of the registers in its own regcache in response to 'G' packets. Another limitation for the ebb registers is that traceframes don't record if registers are available or not, so if these registers are collected when a tracepoint is hit and the inferior has no ebb event opened, the user will see zero values for all of them, instead of the usual <unavailable>. Because these registers are often unavailable, trying to store them with target_store_registers with -1 for the regno argument (all registers) would almost always fail, so they are ignored in this case. gdb/ChangeLog: 2018-10-26 Edjunior Barbosa Machado <emachado@linux.vnet.ibm.com> Pedro Franco de Carvalho <pedromfc@linux.ibm.com> * arch/ppc-linux-common.h (PPC_LINUX_SIZEOF_EBBREGSET) (PPC_LINUX_SIZEOF_PMUREGSET): Declare. * nat/ppc-linux.h (PPC_FEATURE2_EBB, NT_PPC_EBB, NT_PPC_PMU): Define if not already defined. * features/rs6000/power-ebb.xml: New file. * features/rs6000/power-linux-pmu.xml: New file. * features/rs6000/powerpc-isa207-vsx32l.xml: Include ebb and pmu features. * features/rs6000/powerpc-isa207-vsx64l.xml: Likewise. * features/rs6000/powerpc-isa207-vsx32l.c: Re-generate. * features/rs6000/powerpc-isa207-vsx64l.c: Re-generate. * regformats/rs6000/powerpc-isa207-vsx32l.dat: Re-generate. * regformats/rs6000/powerpc-isa207-vsx64l.dat: Re-generate. * ppc-linux-nat.c (fetch_register, fetch_ppc_registers): Call fetch_regset with ebb and pmu regsets. (store_register, store_ppc_registers): Call store_regset with ebb and pmu regsets. (ppc_linux_nat_target::read_description): Set isa207 field in the features struct if ebb and pmu are avaiable. * ppc-linux-tdep.c (ppc32_regmap_ebb, ppc32_regmap_pmu) (ppc32_linux_ebbregset, ppc32_linux_pmuregset): New globals. (ppc_linux_iterate_over_regset_sections): Call back with the ebb and pmu regsets. (ppc_linux_core_read_description): Check if the pmu section is present and set isa207 in the features struct. * ppc-linux-tdep.h (ppc32_linux_ebbregset) (ppc32_linux_pmuregset): Declare. * ppc-tdep.h (struct gdbarch_tdep) <ppc_mmcr0_regnum>: New field. <ppc_mmcr2_regnum, ppc_siar_regnum, ppc_sdar_regnum>: New fields. <ppc_sier_regnum>: New field. (enum): <PPC_BESCR_REGNUM, PPC_EBBHR_REGNUM, PPC_EBBRR_REGNUM>: New enum values. <PPC_MMCR0_REGNUM, PPC_MMCR2_REGNUM, PPC_SIAR_REGNUM>: New enum values. <PPC_SDAR_REGNUM, PPC_SIER_REGNUM>: New enum values. (PPC_IS_EBB_REGNUM, PPC_IS_PMU_REGNUM): Define. * rs6000-tdep.c (rs6000_gdbarch_init): Look for and validate the ebb and pmu features. gdb/gdbserver/ChangeLog: 2018-10-26 Pedro Franco de Carvalho <pedromfc@linux.ibm.com> * configure.srv (powerpc*-*-linux*): Add rs6000/power-ebb.xml and rs6000/power-linux-pmu.xml to srv_xmlfiles. * linux-ppc-low.c (ppc_store_ebbregset, ppc_fill_pmuregset) (ppc_store_pmuregset): New functions. (ppc_regsets): Add entries for ebb and pmu regsets. (ppc_arch_setup): Set isa207 in features struct if the ebb and pmu regsets are available. Set sizes for these regsets. gdb/doc/ChangeLog: 2018-10-26 Pedro Franco de Carvalho <pedromfc@linux.ibm.com> * gdb.texinfo (PowerPC Features): Describe new features "org.gnu.gdb.power.ebb" and "org.gnu.gdb.power.linux.pmu".
2018-10-26[PowerPC] Add support for TAREdjunior Barbosa Machado3-2/+9
This patch adds support for the Target Address Register for powerpc linux native and core file targets, and in the powerpc linux server stub. gdb/ChangeLog: 2018-10-26 Edjunior Barbosa Machado <emachado@linux.vnet.ibm.com> Pedro Franco de Carvalho <pedromfc@linux.ibm.com> * arch/ppc-linux-tdesc.h (tdesc_powerpc_isa207_vsx32l) (tdesc_powerpc_isa207_vsx64l): Declare. * arch/ppc-linux-common.h (PPC_LINUX_SIZEOF_TARREGSET): Define. (struct ppc_linux_features) <isa207>: New field. (ppc_linux_no_features): Add initializer for isa207 field. * arch/ppc-linux-common.c (ppc_linux_match_description): Return new tdescs. * nat/ppc-linux.h (PPC_FEATURE2_ARCH_2_07, PPC_FEATURE2_TAR) (NT_PPC_TAR): Define if not already defined. * features/Makefile (WHICH): Add rs6000/powerpc-isa207-vsx32l and rs6000/powerpc-isa207-vsx64l. (XMLTOC): Add rs6000/powerpc-isa207-vsx32l.xml and rs6000/powerpc-isa207-vsx64l.xml. * features/rs6000/power-tar.xml: New file. * features/rs6000/powerpc-isa207-vsx32l.xml: New file. * features/rs6000/powerpc-isa207-vsx64l.xml: New file. * features/rs6000/powerpc-isa207-vsx32l.c: Generate. * features/rs6000/powerpc-isa207-vsx64l.c: Generate. * regformats/rs6000/powerpc-isa207-vsx32l.dat: Generate. * regformats/rs6000/powerpc-isa207-vsx64l.dat: Generate. * ppc-linux-nat.c (fetch_register, fetch_ppc_registers): Call fetch_regset with the TAR regset. (store_register, store_ppc_registers): Call store_regset with the TAR regset. (ppc_linux_nat_target::read_description): Set isa207 field in the features struct if needed. * ppc-linux-tdep.c: Include features/rs6000/powerpc-isa207-vsx32l.c and features/rs6000/powerpc-isa207-vsx64l.c. (ppc32_regmap_tar, ppc32_linux_tarregset): New globals. (ppc_linux_iterate_over_regset_sections): Call back with the tar regset. (ppc_linux_core_read_description): Check if the tar section is present and set isa207 in the features struct. (_initialize_ppc_linux_tdep): Call initialize_tdesc_powerpc_isa207_vsx32l and initialize_tdesc_powerpc_isa207_vsx64l. * ppc-linux-tdep.h (ppc32_linux_tarregset): Declare. * ppc-tdep.h (gdbarch_tdep) <ppc_tar_regnum>: New field. (enum) <PPC_TAR_REGNUM>: New enum value. * rs6000-tdep.c (rs6000_gdbarch_init): Look for and validate tar feature. (ppc_process_record_op31): Record changes to TAR. gdb/gdbserver/ChangeLog: 2018-10-26 Pedro Franco de Carvalho <pedromfc@linux.ibm.com> * configure.srv (ipa_ppc_linux_regobj): Add powerpc-isa207-vsx64l-ipa.o and powerpc-isa207-vsx32l-ipa.o. (powerpc*-*-linux*): Add powerpc-isa207-vsx32l.o and powerpc-isa207-vsx64l.o to srv_regobj, add rs6000/power-tar.xml, rs6000/powerpc-isa207-vsx32l.xml, and rs6000/powerpc-isa207-vsx64l.xml to srv_xmlfiles. * linux-ppc-tdesc-init.h (enum ppc_linux_tdesc) <PPC_TDESC_ISA207_VSX>: New enum value. (init_registers_powerpc_isa207_vsx32l): Declare. (init_registers_powerpc_isa207_vsx64l): Declare. * linux-ppc-low.c (ppc_fill_tarregset): New function. (ppc_store_tarregset): New function. (ppc_regsets): Add entry for the TAR regset. (ppc_arch_setup): Set isa207 in features struct when needed. Set size for the TAR regsets. (ppc_get_ipa_tdesc_idx): Return PPC_TDESC_ISA207_VSX. (initialize_low_arch): Call init_registers_powerpc_isa207_vsx32l and init_registers_powerpc_isa207_vsx64l. * linux-ppc-ipa.c (get_ipa_tdesc): Handle PPC_TDESC_ISA207_VSX. (initialize_low_tracepoint): Call init_registers_powerpc_isa207_vsx32l and init_registers_powerpc_isa207_vsx64l. gdb/testsuite/ChangeLog: 2018-10-26 Pedro Franco de Carvalho <pedromfc@linux.ibm.com> * gdb.arch/powerpc-tar.c: New file. * gdb.arch/powerpc-tar.exp: New file. gdb/doc/ChangeLog: 2018-10-26 Pedro Franco de Carvalho <pedromfc@linux.ibm.com> * gdb.texinfo (PowerPC Features): Describe new feature "org.gnu.gdb.power.tar".
2018-10-26[PowerPC] Add support for PPR and DSCREdjunior Barbosa Machado3-2/+10
This patch adds gdb support for the Program Priorty Register and the Data Stream Control Register, for the powerpc linux native and core file targets, and for the powerpc linux server stub. gdb/ChangeLog: 2018-10-26 Edjunior Barbosa Machado <emachado@linux.vnet.ibm.com> Pedro Franco de Carvalho <pedromfc@linux.ibm.com> * arch/ppc-linux-tdesc.h (tdesc_powerpc_isa205_ppr_dscr_vsx32l) (tdesc_powerpc_isa205_ppr_dscr_vsx64l): Declare. * arch/ppc-linux-common.h (PPC_LINUX_SIZEOF_PPRREGSET) (PPC_LINUX_SIZEOF_DSCRREGSET): Define. (struct ppc_linux_features) <ppr_dscr>: New field. (ppc_linux_no_features): Add initializer for ppr_dscr field. * arch/ppc-linux-common.c (ppc_linux_match_description): Return new tdescs. * nat/ppc-linux.h (PPC_FEATURE2_DSCR, NT_PPC_PPR, NT_PPC_DSCR): Define if not already defined. * features/Makefile (WHICH): Add rs6000/powerpc-isa205-ppr-dscr-vsx32l and rs6000/powerpc-isa205-ppr-dscr-vsx64l. (XMLTOC): Add rs6000/powerpc-isa205-ppr-dscr-vsx32l.xml and rs6000/powerpc-isa205-ppr-dscr-vsx64l.xml. * features/rs6000/power-dscr.xml: New file. * features/rs6000/power-ppr.xml: New file. * features/rs6000/powerpc-isa205-ppr-dscr-vsx32l.xml: New file. * features/rs6000/powerpc-isa205-ppr-dscr-vsx64l.xml: New file. * features/rs6000/powerpc-isa205-ppr-dscr-vsx32l.c: Generate. * features/rs6000/powerpc-isa205-ppr-dscr-vsx64l.c: Generate. * regformats/rs6000/powerpc-isa205-ppr-dscr-vsx32l.dat: Generate. * regformats/rs6000/powerpc-isa205-ppr-dscr-vsx64l.dat: Generate. * ppc-linux-nat.c: Include <sys/uio.h>. (fetch_regset, store_regset, check_regset): New functions. (fetch_register, fetch_ppc_registers): Call fetch_regset with DSCR and PPR regsets. (store_register, store_ppc_registers): Call store_regset with DSCR and PPR regsets. (ppc_linux_get_hwcap2): New function. (ppc_linux_nat_target::read_description): Call ppc_linux_get_hwcap2 and check_regset, set ppr_dscr field in the features struct if needed. * ppc-linux-tdep.c: Include features/rs6000/powerpc-isa205-ppr-dscr-vsx32l.c and features/rs6000/powerpc-isa205-ppr-dscr-vsx64l.c. (ppc32_regmap_ppr, ppc32_regmap_dscr, ppc32_linux_pprregset) (ppc32_linux_dscrregset): New globals. (ppc_linux_iterate_over_regset_sections): Call back with the ppr and dscr regsets. (ppc_linux_core_read_description): Check if the ppr and dscr sections are present and set ppr_dscr in the features struct. (_initialize_ppc_linux_tdep): Call initialize_tdesc_powerpc_isa205_ppr_dscr_vsx32l and initialize_tdesc_powerpc_isa205_ppr_dscr_vsx64l. * ppc-linux-tdep.h (ppc32_linux_pprregset) (ppc32_linux_dscrregset): Declare. * ppc-tdep.h (struct gdbarch_tdep) <ppc_ppr_regnum>: New field. <ppc_dscr_regnum>: New field. (enum) <PPC_PPR_REGNUM, PPC_DSCR_REGNUM>: New enum values. * rs6000-tdep.c (rs6000_gdbarch_init): Look for and validate ppr and dscr features. (ppc_process_record_op31): Record changes to PPR and DSCR. gdb/gdbserver/ChangeLog: 2018-10-26 Edjunior Barbosa Machado <emachado@linux.vnet.ibm.com> Pedro Franco de Carvalho <pedromfc@linux.ibm.com> * configure.srv (ipa_ppc_linux_regobj): Add powerpc-isa205-ppr-dscr-vsx32l-ipa.o and powerpc-isa205-ppr-dscr-vsx64l-ipa.o. (powerpc*-*-linux*): Add powerpc-isa205-ppr-dscr-vsx32l.o and powerpc-isa205-ppr-dscr-vsx64l.o to srv_regobj, add rs6000/power-dscr.xml, rs6000/power-ppr.xml, rs6000/powerpc-isa205-ppr-dscr-vsx32l.xml and rs6000/powerpc-isa205-ppr-dscr-vsx64l.xml to srv_xmlfiles. * linux-ppc-tdesc-init.h (enum ppc_linux_tdesc) <PPC_TDESC_ISA205_PPR_DSCR_VSX>: New enum value. (init_registers_powerpc_isa205_ppr_dscr_vsx32l) (init_registers_powerpc_isa205_ppr_dscr_vsx64l): Declare. * linux-ppc-low.c: Include "elf/common.h" and <sys/uio.h>. (ppc_hwcap): Add comment. (ppc_hwcap2): New global. (ppc_check_regset, ppc_fill_pprregset, ppc_store_pprregset) (ppc_fill_dscrregset, ppc_store_dscrregset): New functions. (ppc_regsets): Add entries for the DSCR and PPR regsets. (ppc_arch_setup): Get AT_HWCAP2. Set ppr_dscr in features struct when needed. Set sizes for the the DSCR and PPR regsets. (ppc_get_ipa_tdesc_idx): Return PPC_TDESC_ISA205_PPR_DSCR_VSX. (initialize_low_arch): Call init_registers_powerpc_isa205_ppr_dscr_vsx32l and init_registers_powerpc_isa205_ppr_dscr_vsx64l. * linux-ppc-ipa.c (get_ipa_tdesc): Handle PPC_TDESC_ISA205_PPR_DSCR_VSX. (initialize_low_tracepoint): Call init_registers_powerpc_isa205_ppr_dscr_vsx32l and init_registers_powerpc_isa205_ppr_dscr_vsx64l. gdb/testsuite/ChangeLog: 2018-10-26 Pedro Franco de Carvalho <pedromfc@linux.ibm.com> * gdb.arch/powerpc-ppr-dscr.c: New file. * gdb.arch/powerpc-ppr-dscr.exp: New file. gdb/doc/ChangeLog: 2018-10-26 Pedro Franco de Carvalho <pedromfc@linux.ibm.com> * gdb.texinfo (PowerPC Features): Describe new features "org.gnu.gdb.power.ppr" and "org.gnu.gdb.power.dscr".
2018-10-26[PowerPC] Fix indentation in arch/ppc-linux-common.cPedro Franco de Carvalho1-12/+12
This patch parenthesizes the tdesc selection expressions in arch/ppc-linux-common.c so that they can be tab-indented. gdb/ChangeLog: 2018-10-26 Pedro Franco de Carvalho <pedromfc@linux.ibm.com> * arch/ppc-linux-common.c (ppc_linux_match_description): Parenthesize tdesc assignements and indent them properly.
2018-10-04Simple -Wshadow=local fixesTom Tromey1-4/+4
This fixes all the straightforward -Wshadow=local warnings in gdb. A few standard approaches are used here: * Renaming an inner (or outer, but more commonly inner) variable; * Lowering a declaration to avoid a clash; * Moving a declaration into a more inner scope to avoid a clash, including the special case of moving a declaration into a loop header. I did not consider any of the changes in this patch to be particularly noteworthy, though of course they should all still be examined. gdb/ChangeLog 2018-10-04 Tom Tromey <tom@tromey.com> * ctf.c (SET_ARRAY_FIELD): Rename "u32". * p-valprint.c (pascal_val_print): Split inner "i" variable. * xtensa-tdep.c (xtensa_push_dummy_call): Declare "i" in loop header. * xstormy16-tdep.c (xstormy16_push_dummy_call): Declare "val" in more inner scope. * xcoffread.c (read_xcoff_symtab): Rename inner "symbol". * varobj.c (varobj_update): Rename inner "newobj", "type_changed". * valprint.c (generic_emit_char): Rename inner "buf". * valops.c (find_overload_match): Rename inner "temp". (value_struct_elt_for_reference): Declare "v" in more inner scope. * v850-tdep.c (v850_push_dummy_call): Rename "len". * unittests/array-view-selftests.c (run_tests): Rename inner "vec". * tui/tui-stack.c (tui_show_frame_info): Declare "i" in loop header. * tracepoint.c (merge_uploaded_trace_state_variables): Declare "tsv" in more inner scope. (print_one_static_tracepoint_marker): Rename inner "tuple_emitter". * tic6x-tdep.c (tic6x_analyze_prologue): Declare "inst" lower. (tic6x_push_dummy_call): Don't redeclare "addr". * target-float.c: Declare "dto" lower. * symtab.c (lookup_local_symbol): Rename inner "sym". (find_pc_sect_line): Rename inner "pc". * stack.c (print_frame): Don't redeclare "gdbarch". (return_command): Rename inner "gdbarch". * s390-tdep.c (s390_prologue_frame_unwind_cache): Renam inner "sp". * rust-lang.c (rust_internal_print_type): Declare "i" in loop header. * rs6000-tdep.c (ppc_process_record): Rename inner "addr". * riscv-tdep.c (riscv_push_dummy_call): Declare "info" in inner scope. * remote.c (remote_target::update_thread_list): Don't redeclare "tp". (remote_target::process_initial_stop_replies): Rename inner "thread". (remote_target::remote_parse_stop_reply): Don't redeclare "p". (remote_target::wait_as): Don't redeclare "stop_reply". (remote_target::get_thread_local_address): Rename inner "result". (remote_target::get_tib_address): Likewise.
2018-10-01Aarch64: Move pseudo defines to headerAlan Hayward1-0/+8
gdb/ * aarch64-tdep.c (AARCH64_Q0_REGNUM): Move to here. (AARCH64_D0_REGNUM): Likewise. (AARCH64_S0_REGNUM): Likewise. (AARCH64_H0_REGNUM): Likewise. (AARCH64_B0_REGNUM): Likewise. (AARCH64_SVE_V0_REGNUM): Likewise. * arch/aarch64.h (AARCH64_Q0_REGNUM): Move from here. (AARCH64_D0_REGNUM): Likewise. (AARCH64_S0_REGNUM): Likewise. (AARCH64_H0_REGNUM): Likewise. (AARCH64_B0_REGNUM): Likewise. (AARCH64_SVE_V0_REGNUM): Likewise.
2018-08-27Use CORE_ADDR_MAX in various "breaks" arraysTom Tromey1-2/+2
Code like this: CORE_ADDR breaks[2] = {-1, -1}; ... gives a warning with -Wnarrowing. This patch changes all instances of this to use CORE_ADDR_MAX instead. gdb/ChangeLog 2018-08-27 Tom Tromey <tom@tromey.com> * rs6000-tdep.c (ppc_deal_with_atomic_sequence): Use CORE_ADDR_MAX. * mips-tdep.c (mips_deal_with_atomic_sequence) (micromips_deal_with_atomic_sequence): Use CORE_ADDR_MAX. * arch/arm-get-next-pcs.c (thumb_deal_with_atomic_sequence_raw) (arm_deal_with_atomic_sequence_raw): Use CORE_ADDR_MAX. * alpha-tdep.c (alpha_deal_with_atomic_sequence): Use CORE_ADDR_MAX. * aarch64-tdep.c (aarch64_software_single_step): Use CORE_ADDR_MAX.
2018-08-22Aarch64 SVE VG is Vector GranuleAlan Hayward1-2/+2
...not Vector Gradient. See: DWARF for the ARM® 64-bit Architecture (AArch64) with SVE support gdb/ * arch/aarch64.h (aarch64_regnum): Update comment.
2018-06-29x86_64-windows GDB crash due to fs_base/gs_base registersPedro Alves2-4/+7
GDB is currently crashing anytime we try to access the fs_base/gs_base registers, either to read them, or to write them. This can be observed under various scenarios: - Explicit reference to those registers (eg: print $fs_base) -- probably relatively rare; - Calling a function in the inferior, with the crash happening because we are trying to read those registers in order to save their value ahead of making the function call; - Just a plain "info registers"; The crash was introduced by the following commit: | commit 48aeef91c248291dd03583798904612426b1f40a | Date: Mon Jun 26 18:14:43 2017 -0700 | Subject: Include the fs_base and gs_base registers in amd64 target descriptions. The Windows-nat implementation was unfortunately not prepared to deal with those new registers. In particular, the way it fetches registers is done by using a table where the index is the register number, and the value at that index is the offset in the area in the thread's CONTEXT data where the corresponding register value is stored. For instance, in amd64-windows-nat.c, we can find the mappings static array containing the following 57 elements in it: #define context_offset(x) (offsetof (CONTEXT, x)) static const int mappings[] = { context_offset (Rax), [...] context_offset (FloatSave.MxCsr) }; That array is then used by windows_fetch_one_register via: char *context_offset = ((char *) &th->context) + mappings[r]; The problem is that fs_base's register number is 172, which is well past the end of the mappings array (57 elements in total). We end up getting an undefined offset, which happens to be so large that it then causes the address where we try to read the register value (a little bit later) to be invalid, thus crashing GDB with a SEGV. This patch side-steps the issue entirely by removing support for those registers in GDB on x86_64-windows, because a look at the CONTEXT structure indicates no support for getting those registers. A more comprehensive fix would patch the potential buffer overflow of the mappings array, but this can be done as a separate commit. gdb/ChangeLog: * gdb/amd64-tdep.h (amd64_create_target_description): Add "segments" parameter. * gdb/amd64-tdep.c (amd64_none_init_abi, amd64_x32_none_init_abi) (_initialize_amd64_tdep): Update call to amd64_create_target_description. (amd64_target_description): Add "segments" parameter. Adjust the implementation to use it. * gdb/amd64-linux-tdep.c (amd64_linux_read_description): Update call to amd64_create_target_description. * gdb/amd64-windows-tdep.c (amd64_windows_init_abi): Likewise. * gdb/arch/amd64.h (amd64_create_target_description): Add "segments" register. * gdb/arch/amd64.c (amd64_create_target_description): Add "segments" parameter. Call create_feature_i386_64bit_segments only if SEGMENTS is true. * gdb/gdbserver/win32-i386-low.c (i386_arch_setup): Update call to amd64_create_target_description. Tested on x86_64-windows using AdaCore's testsuite (by Joel Brobecker <brobecker at adacore dot com>).
2018-06-06Guard declarations of 'sve_{vq,vl}_from_{vl,vq}' macros on Aarch64 (and ↵Sergio Durigan Junior1-0/+4
unbreak build) Commit 122394f1476b1c925a281b15399119500c8231c1 ("Function for reading the Aarch64 SVE vector length") has added macros to manipulate SVE vector sizes based on Linux kernel sources, but did not guard them with #ifndef's, which breaks the build when the system headers already have these macros: CXX aarch64-linux-nat.o In file included from ../../gdb/aarch64-tdep.h:25, from ../../gdb/aarch64-linux-nat.c:30: ../../gdb/arch/aarch64.h:79: error: "sve_vq_from_vl" redefined [-Werror] #define sve_vq_from_vl(vl) ((vl) / 0x10) In file included from /usr/include/bits/sigcontext.h:30, from /usr/include/signal.h:291, from build-gnulib/import/signal.h:52, from ../../gdb/linux-nat.h:23, from ../../gdb/aarch64-linux-nat.c:26: /usr/include/asm/sigcontext.h:154: note: this is the location of the previous definition #define sve_vq_from_vl(vl) ((vl) / SVE_VQ_BYTES) In file included from ../../gdb/aarch64-tdep.h:25, from ../../gdb/aarch64-linux-nat.c:30: ../../gdb/arch/aarch64.h:80: error: "sve_vl_from_vq" redefined [-Werror] #define sve_vl_from_vq(vq) ((vq) * 0x10) In file included from /usr/include/bits/sigcontext.h:30, from /usr/include/signal.h:291, from build-gnulib/import/signal.h:52, from ../../gdb/linux-nat.h:23, from ../../gdb/aarch64-linux-nat.c:26: /usr/include/asm/sigcontext.h:155: note: this is the location of the previous definition #define sve_vl_from_vq(vq) ((vq) * SVE_VQ_BYTES) In order to fix this breakage, this commit guards the declaration of the macros using #ifndef's. gdb/ChangeLog: 2018-06-06 Sergio Durigan Junior <sergiodj@redhat.com> * arch/aarch64.h (sve_vg_from_vl): Guard with #ifndef. (sve_vl_from_vg): Likewise. (sve_vq_from_vl): Likewise. (sve_vl_from_vq): Likewise. (sve_vq_from_vg): Likewise. (sve_vg_from_vq): Likewise.
2018-06-04Use uint64_t for SVE VQAlan Hayward2-2/+2
Previously VQ was of type long. Using uint64_t ensures it always matches the same type as the VG register. Note that in the Linux kernel, VQ is 16bits. We cast it up to 64bits immediately after reading to ensure we always use the same type throughout the code. gdb/ * aarch64-tdep.c (aarch64_read_description): Use uint64_t for VQ. * aarch64-tdep.h (aarch64_read_description): Likewise. * arch/aarch64.c (aarch64_create_target_description): Likewise. * arch/aarch64.h (aarch64_create_target_description): Likewise. * features/aarch64-sve.c (create_feature_aarch64_sve): Likewise. * nat/aarch64-sve-linux-ptrace.c(aarch64_sve_get_vq): Likewise. * nat/aarch64-sve-linux-ptrace.h (aarch64_sve_get_vq): Likewise.
2018-06-01Add SVE register definesAlan Hayward1-1/+14
In order to prevent gaps in the register numbering, the Z registers reuse the V register numbers (which become pseudos on SVE). 2018-06-01 Alan Hayward <alan.hayward@arm.com> * aarch64-tdep.c (aarch64_sve_register_names): New const var. * arch/aarch64.h (enum aarch64_regnum): Add SVE entries. (AARCH64_SVE_Z_REGS_NUM): New define. (AARCH64_SVE_P_REGS_NUM): Likewise. (AARCH64_SVE_NUM_REGS): Likewise.
2018-05-31Function for reading the Aarch64 SVE vector lengthAlan Hayward1-0/+17
Returns 0 for systems without SVE support. Note the defines taken from Linux kernel headers in aarch64-sve-linux-ptrace.h. gdb/ * Makefile.in: Add new header. * gdb/arch/aarch64.h (sve_vg_from_vl): New macro. (sve_vl_from_vg): Likewise. (sve_vq_from_vl): Likewise. (sve_vl_from_vq): Likewise. (sve_vq_from_vg): Likewise. (sve_vg_from_vq): Likewise. * configure.nat: Add new c file. * nat/aarch64-sve-linux-ptrace.c: New file. * nat/aarch64-sve-linux-ptrace.h: New file. gdbserver/ * configure.srv: Add new c/h file.
2018-05-31Add Aarch64 SVE target descriptionAlan Hayward2-4/+16
No code uses the new descriptions yet. gdb/ * aarch64-linux-nat.c (aarch64_linux_read_description): Add parmeter zero. * aarch64-linux-tdep.c (aarch64_linux_core_read_description): Likewise. * aarch64-tdep.c (tdesc_aarch64_list): Add. (aarch64_read_description): Use VQ to index tdesc_aarch64_list. (aarch64_gdbarch_init): Add parmeter zero. * aarch64-tdep.h (aarch64_read_description): Add VQ parmeter. * arch/aarch64.c (aarch64_create_target_description): Check VQ. * arch/aarch64.h (aarch64_create_target_description): Add VQ. parmeter. * doc/gdb.texinfo: Describe SVE feature * features/aarch64-sve.c: New file. gdbserver/ * linux-aarch64-tdesc.c (aarch64_linux_read_description): Add null VQ.
2018-05-22[PowerPC] Recognize isa205 in linux core filesPedro Franco de Carvalho2-2/+2
Currently the ppc linux core file target doesn't return target descriptions with the lager FPSCR introduced in isa205. This patch changes the core file target so that the auxv is read from the core file to determine the size of FPSCR, so that the appropriate target description is selected. gdb/ChangeLog: 2018-05-22 Pedro Franco de Carvalho <pedromfc@linux.vnet.ibm.com> * arch/ppc-linux-common.c (ppc_linux_has_isa205): Change the parameter type to CORE_ADDR. * arch/ppc-linux-common.h (ppc_linux_has_isa205): Change the parameter type in declaration to CORE_ADDR. * ppc-linux-tdep.c (ppc_linux_core_read_description): Call target_auxv_search to get AT_HWCAP and use the result to get the target description. * ppc-linux-nat.c (ppc_linux_get_hwcap): Change the return type to CORE_ADDR. Remove the cast of the return value to unsigned long. Fix error predicate of target_auxv_search. (ppc_linux_nat_target::read_description): Change the type of the hwcap variable to CORE_ADDR. gdb/testsuite/ChangeLog: 2018-05-22 Pedro Franco de Carvalho <pedromfc@linux.vnet.ibm.com> * gdb.arch/powerpc-fpscr-gcore.exp: New file.
2018-05-22[PowerPC] Consolidate linux vector regset sizesPedro Franco de Carvalho1-0/+9
This patch defines constants for the sizes of the two vector regsets (vector-scalar registers and regular vector registers). The native, gdbserver and core file targets are changed to use these constants. The Linux ptrace calls return (or read) a smaller regset than the one found in core files for vector registers, because ptrace uses a single 4-byte quantity for vrsave at the end of the regset, while the core-file regset uses a full 16-byte field for vrsave. For simplicity, the larger size is used in both cases, and so a buffer with 12 unused additional bytes is passed to ptrace in the native target. gdb/ChangeLog: 2018-05-22 Pedro Franco de Carvalho <pedromfc@linux.vnet.ibm.com> * arch/ppc-linux-common.h (PPC_LINUX_SIZEOF_VRREGSET) (PPC_LINUX_SIZEOF_VSXREGSET): Define. * ppc-linux-nat.c (SIZEOF_VSXREGS, SIZEOF_VRREGS): Remove. (gdb_vrregset_t): Change array type size to PPC_LINUX_SIZEOF_VRREGSET. (gdb_vsxregset_t): Change array type size to PPC_LINUX_SIZEOF_VSXREGSET. * ppc-linux-tdep.c (ppc_linux_iterate_over_regset_sections): Change integer literals to PPC_LINUX_SIZEOF_VRREGSET and PPC_LINUX_SIZEOF_VSXREGSET. gdb/gdbserver/ChangeLog: 2018-05-22 Pedro Franco de Carvalho <pedromfc@linux.vnet.ibm.com> * linux-ppc-low.c (SIZEOF_VSXREGS, SIZEOF_VRREGS): Remove. (ppc_arch_setup): Change SIZEOF_VRREGS and SIZEOF_VSXREGS to PPC_LINUX_SIZEOF_VRREGSET and PPC_LINUX_SIZEOF_VSXREGSET.
2018-05-22[PowerPC] Consolidate linux target description selectionPedro Franco de Carvalho3-0/+178
Share target description declarations and selection among ppc linux native targets, core files, gdbserver and IPA. To avoid complicated define guards, gdbserver and IPA now have declarations for all descriptions, including 64-bit generated descriptions when compiled in 32-bit mode. These have always been linked into the gdbserver and IPA binaries. Because they might be uninitialized, the selection function checks that the selected description is initialized. gdb/ChangeLog: 2018-05-22 Pedro Franco de Carvalho <pedromfc@linux.vnet.ibm.com> * arch/ppc-linux-common.c: New file. * arch/ppc-linux-common.h: New file. * arch/ppc-linux-tdesc.h: New file. * configure.tgt (powerpc*-*-linux*): Add arch/ppc-linux-common.o. * Makefile.in (ALL_TARGET_OBS): Add arch/ppc-linux-common.o. (HFILES_NO_SRCDIR): Add arch/ppc-linux-common.h and arch/ppc-linux-tdesc.h. * ppc-linux-nat.c: Include arch/ppc-linux-common.h and arch/ppc-linux-tdesc.h. (ppc_linux_nat_target::read_description): Remove target description matching code. Fill a ppc_linux_features struct and call ppc_linux_match_description with it. Move comment about ISA 2.05 to ppc-linux-common.c. * ppc-linux-tdep.c: Include arch/ppc-linux-common.h and arch/ppc-linux-tdesc.h. (ppc_linux_core_read_description): Remove target description matching code. Fill a ppc_linux_features struct and call ppc_linux_match_description with it. * ppc-linux-tdep.h (tdesc_powerpc_32l, tdesc_powerpc_64l) (tdesc_powerpc_altivec32l, tdesc_powerpc_altivec64l) (tdesc_powerpc_cell32l, tdesc_powerpc_cell64l) (tdesc_powerpc_vsx32l, tdesc_powerpc_vsx64l) (tdesc_powerpc_isa205_32l, tdesc_powerpc_isa205_64l) (tdesc_powerpc_isa205_altivec32l, tdesc_powerpc_isa205_altivec64l) (tdesc_powerpc_isa205_vsx32l, tdesc_powerpc_isa205_vsx64l) (tdesc_powerpc_e500l): Remove. gdb/gdbserver/ChangeLog: 2018-05-22 Pedro Franco de Carvalho <pedromfc@linux.vnet.ibm.com> * configure.srv (srv_tgtobj): Add arch/ppc-linux-common.o. * Makefile.in (SFILES): Add arch/ppc-linux-common.c. * linux-ppc-tdesc.h: Rename to linux-ppc-tdesc-init.h. * linux-ppc-tdesc-init.h (tdesc_powerpc_32l, tdesc_powerpc_64l) (tdesc_powerpc_altivec32l, tdesc_powerpc_altivec64l) (tdesc_powerpc_cell32l, tdesc_powerpc_cell64l) (tdesc_powerpc_vsx32l, tdesc_powerpc_vsx64l) (tdesc_powerpc_isa205_32l, tdesc_powerpc_isa205_64l) (tdesc_powerpc_isa205_altivec32l, tdesc_powerpc_isa205_altivec64l) (tdesc_powerpc_isa205_vsx32l, tdesc_powerpc_isa205_vsx64l) (tdesc_powerpc_e500l): Remove. * linux-ppc-ipa.c: Include arch/ppc-linux-tdesc.h and linux-ppc-tdesc-init.h. Don't include linux-ppc-tdesc.h. * linux-ppc-low.c: Include arch/ppc-linux-common.h, arch/ppc-linux-tdesc.h, and linux-ppc-tdesc-init.h. Don't include linux-ppc-tdesc.h. (ppc_arch_setup): Remove target description matching code. Fill a ppc_linux_features struct and call ppc_linux_match_description with it.
2018-05-04Fix "fall through" commentsTom Tromey1-1/+2
This patch updates existing "fall through" comments so that they can be recognized by gcc's -Wimplicit-fallthrough comment-parsing heuristic. ChangeLog 2018-05-04 Tom Tromey <tom@tromey.com> * s390-tdep.c (s390_process_record): Fix fall-through comments. * xcoffread.c (scan_xcoff_symtab): Move comment later. * symfile.c (section_is_mapped): Fix fall-through comment. * stabsread.c (define_symbol, read_member_functions): Fix fall-through comment. * s390-linux-tdep.c (s390_process_record): Fix fall-through comment. * remote.c (remote_wait_as): Fix fall-through comment. * p-exp.y (yylex): Fix fall-through comment. * nat/x86-dregs.c (x86_length_and_rw_bits): Fix fall-through comment. * msp430-tdep.c (msp430_gdbarch_init): Fix fall-through comment. * mdebugread.c (parse_partial_symbols): Fix fall-through comment. * jv-exp.y (yylex): Fix fall-through comment. * go-exp.y (lex_one_token): Fix fall-through comment. * gdbtypes.c (get_discrete_bounds, rank_one_type): Fix fall-through comment. * f-exp.y (yylex): Fix fall-through comment. * dwarf2read.c (process_die): Fix fall-through comments. * dbxread.c (process_one_symbol): Fix fall-through comment. * d-exp.y (lex_one_token): Fix fall-through comment. * cp-name-parser.y (yylex): Fix fall-through comment. * coffread.c (coff_symtab_read): Fix fall-through comment. * c-exp.y (lex_one_token): Fix fall-through comment. * arm-tdep.c (arm_decode_miscellaneous): Fix fall-through comment. * arch/arm.c (arm_instruction_changes_pc): Fix fall-through comment.
2018-02-27Explicitly specify common tdesc.h for use with aarch64.hAlan Hayward1-1/+1
gdb/ * arch/aarch64.h: Use common/tdesc.h.
2018-02-26Move arch/tdesc.h to common/tdesc.hAlan Hayward5-99/+4
gdb/ * arch/amd64.h: Use common/tdesc.h. * arch/i386.c: Likewise. * arch/i386.h: Likewise. * arch/tic6x.c: Likewise. * arch/tdesc.h: Move file from here... * common/tdesc.h: ...to here. * features/aarch64-core.c: Regenerate. * features/aarch64-fpu.c: Regenerate. * features/i386/32bit-avx.c: Regenerate. * features/i386/32bit-avx512.c: Regenerate. * features/i386/32bit-core.c: Regenerate. * features/i386/32bit-linux.c: Regenerate. * features/i386/32bit-mpx.c: Regenerate. * features/i386/32bit-pkeys.c: Regenerate. * features/i386/32bit-sse.c: Regenerate. * features/i386/64bit-avx.c: Regenerate. * features/i386/64bit-avx512.c: Regenerate. * features/i386/64bit-core.c: Regenerate. * features/i386/64bit-linux.c: Regenerate. * features/i386/64bit-mpx.c: Regenerate. * features/i386/64bit-pkeys.c: Regenerate. * features/i386/64bit-segments.c: Regenerate. * features/i386/64bit-sse.c: Regenerate. * features/i386/x32-core.c: Regenerate. * features/tic6x-c6xp.c: Regenerate. * features/tic6x-core.c: Regenerate. * features/tic6x-gp.c: Regenerate. * target-descriptions.c: Use common/tdesc.h. * target-descriptions.h: Likewise. gdbserver/ * tdesc.c: Use common/tdesc.h. * tdesc.h: Likewise.
2018-02-21Add "common-defs.h" include to files in arch/ subdir not yet including it.John Baldwin3-1/+3
This fixes a build breakage on FreeBSD hosts. gdb/ChangeLog: * arch/aarch64.c: Include "common-defs.h". * arch/amd64.c: Likewise. * arch/i386.c: Likewise.
2018-01-02Update copyright year range in all GDB filesJoel Brobecker18-18/+18
gdb/ChangeLog: Update copyright year range in all GDB files
2017-12-05Split tdesc_type into multiple classesSimon Marchi1-11/+14
This patch makes tdesc_type an abstract base class and creates three subclasses: - tdesc_type_builtin, for builtin types - tdesc_type_vector, for vector types - tdesc_type_with_fields, for struct, union, flag and enum types This allows getting rid of the union in tdesc_type and to not allow the std::vector separately. I tried to go further and create separate classes for struct, union, flag and enum, but it proved too difficult. One problem is that from the point of the of the target description code, the types tdesc_type_* are opaque (only forward-declared). Therefore, it doesn't know about inheritance relationship between those classes. This makes it impossible to make functions that accept a pointer to a base class and pass a pointer to a derived class, for example. I think this patch here is a good compromise, and if somebody wants to improve things further, the door is open. A make_gdb_type virtual pure method is added to tdesc_type, which replaces the current tdesc_gdb_type function. Calling this method on a tdesc_type returns the corresponding built gdb type. gdb/ChangeLog: * target-descriptions.c (struct tdesc_type): Use default destructor. <u>: Remove. <accept>: Remove. (struct tdesc_type_builtin): New. (struct tdesc_type_vector): New. (struct tdesc_type_with_fields): New. (tdesc_predefined_types): Change type to tdesc_type_builtin[]. (tdesc_gdb_type): Remove. (tdesc_register_type): Adjust. (tdesc_create_vector): Create tdesc_type_vector. (tdesc_create_struct): Create tdesc_type_with_fields. (tdesc_set_struct_size): Change parameter type. (tdesc_create_union): Create tdesc_type_with_fields. (tdesc_create_flags): Likewise. (tdesc_create_enum): Likewise. (tdesc_add_field): Change parameter type. (tdesc_add_typed_bitfield): Likewise. (tdesc_add_bitfield): Likewise. (tdesc_add_flag): Likewise. (tdesc_add_enum_value): Likewise. (print_c_tdesc) <visit>: Remove overload with tdesc_type parameter, add overloads for tdesc_type_builtin, tdesc_type_with_fields and tdesc_type_vector. <m_printed_type>: Remove. <m_printed_element_type, m_printed_type_with_fields>: Add. * target-descriptions.h (tdesc_create_enum): Change return type. (tdesc_add_typed_bitfield): Change parameter type. (tdesc_add_enum_value): Change parameter type. * xml-tdesc.c (struct tdesc_parsing_data) <current_type>: Change type to tdesc_type_with_fields. (tdesc_start_struct): Adjust. (tdesc_start_flags): Adjust. (tdesc_start_enum): Adjust. (tdesc_start_field): Adjust. * arch/tdesc.h (struct tdesc_type_builtin): Forward-declare. (struct tdesc_type_vector): Forward-declare. (struct tdesc_type_with_fields): Forward-declare. (tdesc_create_struct): Change return type. (tdesc_create_union): Likewise. (tdesc_create_flags): Likewise. (tdesc_add_field): Change parameter type. (tdesc_set_struct_size): Likewise. (tdesc_add_bitfield): Likewise. (tdesc_add_flag): Likewise. * features: Re-generate C files. gdb/gdbserver/ChangeLog: * tdesc.c (struct tdesc_type): Change return type. (tdesc_add_flag): Change parameter type. (tdesc_add_bitfield): Likewise. (tdesc_add_field): Likewise. (tdesc_set_struct_size): Likewise.
2017-11-24Use flexible target descriptors for aarch64Alan Hayward1-3/+15
gdb/ * aarch64-tdep.c (_initialize_aarch64_tdep): Remove init. * arch/aarch64.c (aarch64_create_target_description): Create new target description. * features/Makefile: Add new files. * features/aarch64.c: Remove file. * features/aarch64-core.c: New autogenerated file. * features/aarch64-fpu.c: New autogenerated file. * target-descriptions.c (maint_print_c_tdesc_cmd): Check for aarch64. gdbserver/ * linux-aarch64-ipa.c (initialize_low_tracepoint): Remove init. * linux-aarch64-low.c (initialize_low_arch): Remove init. * linux-aarch64-tdesc.c (aarch64_linux_read_description): Add init.
2017-11-24Add aarch64_create_target_descriptionAlan Hayward2-0/+34
gdb/ * Makefile.in: Add new files. * aarch64-linux-nat.c (aarch64_linux_read_description): Call aarch64_read_description. * aarch64-linux-tdep.c (aarch64_linux_core_read_description): Call aarch64_read_description. * aarch64-tdep.c (aarch64_read_description): New function. (aarch64_gdbarch_init): Call aarch64_read_description. * aarch64-tdep.h (aarch64_read_description): New function. * arch/aarch64.c: New file. * configure.tgt: Add new files.
2017-11-24Change tic6x target descriptionsYao Qi2-0/+73
This patch changes tic6x target descriptions to be more flexible. Rebuild tic6x-uclinux GDBserver with my x86 g++, and the unit test passes. gdb: 2017-11-24 Yao Qi <yao.qi@linaro.org> * arch/tic6x.c: New file. * arch/tic6x.h: New file. * features/Makefile (FEATURE_XMLFILES): Add tic6x-c6xp.xml, tic6x-core.xml and tic6x-gp.xml. * features/tic6x-c6xp.c: Generated. * features/tic6x-core.c: Generated. * features/tic6x-gp.c: Generated. * target-descriptions.c (maint_print_c_tdesc_cmd): Match "tic6x-". gdb/gdbserver: 2017-11-24 Yao Qi <yao.qi@linaro.org> * configure.srv: Set $srv_regobj for tic6x-linux. * linux-tic6x-low.c: Include "arch/tic6x.h" and "tdesc.h". (tic6x_read_description): Move some code to tic6x_arch_setup. (tic6x_tdesc_test): New function. (initialize_low_arch): Call selftests::register_test.
2017-10-25Add common AARCH64 REGNUM definesAlan Hayward1-0/+47
gdb/ * aarch64-tdep.h (enum aarch64_regnum): Remove. * arch/aarch64.h: New file. gdbserver/ * linux-aarch64-low.c (aarch64_fill_gregset): Replace defines with REGNO. (aarch64_store_gregset): Likewise. (aarch64_fill_fpregset): Likewise. (aarch64_store_fpregset): Likewise.
2017-09-05Convert the rest x86 target descriptionsYao Qi4-9/+15
This patch changes the rest of x86 target descriptions in GDB and GDBserver. gdb: 2017-09-05 Yao Qi <yao.qi@linaro.org> * amd64-tdep.c (amd64_target_description): Create target descriptions. (_initialize_amd64_tdep): Don't call functions initialize_tdesc_amd64_*. Add self tests. * arch/amd64.c (amd64_create_target_description): Add parameter is_linux. Call set_tdesc_osabi if is_linux is true. * arch/amd64.h (amd64_create_target_description): Update the declaration. * arch/i386.c (i386_create_target_description): Add parameter is_linux. Call set_tdesc_osabi if is_linux is true. * arch/i386.h (i386_create_target_description): Update declaration. * configure.tgt: Add i386.o to gdb_target_obs. * features/Makefile (XMLTOC): Remove i386/*.xml. * features/i386/amd64-avx-avx512.c: Remove. * features/i386/amd64-avx-mpx-avx512-pku.c: Remove. * features/i386/amd64-avx-mpx.c: Remove. * features/i386/amd64-avx.c: Remove. * features/i386/amd64-mpx.c: Remove. * features/i386/amd64.c: Remove. * features/i386/i386-avx-avx512.c: Remove. * features/i386/i386-avx-mpx-avx512-pku.c: Remove. * features/i386/i386-avx-mpx.c: Remove. * features/i386/i386-avx.c: Remove. * features/i386/i386-mmx.c: Remove. * features/i386/i386-mpx.c: Remove. * features/i386/i386.c: Remove. * i386-tdep.c: Don't include features/i386/i386*.c., include target-descriptions.h and arch/i386.h. (i386_target_description): Create target descriptions. (i386_gdbarch_init): Don't call initialize_tdesc_i386_* functions. Do self tests. gdb/gdbserver: 2017-09-05 Yao Qi <yao.qi@linaro.org> * configure.srv (srv_i386_regobj): Remove. (srv_amd64_regobj): Remove. (srv_regobj): Set it to "" for x86 non-linux targets. * linux-x86-tdesc.c (i386_linux_read_description): * lynx-i386-low.c: Include x86-xstate.h and arch/i386.h. (init_registers_i386): Remove the declaration. (tdesc_i386): Remove the declaration. (lynx_i386_arch_setup): Call i386_create_target_description. * nto-x86-low.c: Likewise. * win32-i386-low.c [__x86_64__]: include arch/amd64.h. [!__x86_64__]: include arch/i386.h. (i386_arch_setup) [__x86_64__]: Call amd64_create_target_description.
2017-09-05Convert amd64-linux target descriptionsYao Qi2-0/+92
This patch changes amd64-linux target descriptions so that they can be dynamically generated in both GDB and GDBserver. gdb/gdbserver: 2017-09-05 Yao Qi <yao.qi@linaro.org> * Makefile.in (arch-amd64.o): New rule. * configure.srv: Append arch-amd64.o. * linux-amd64-ipa.c: Include common/x86-xstate.h. (get_ipa_tdesc): Call amd64_linux_read_description. (initialize_low_tracepoint): Don't call init_registers_x32_XXX and init_registers_amd64_XXX. * linux-x86-low.c (x86_linux_read_description): Call amd64_linux_read_description. (x86_get_ipa_tdesc_idx): Call amd64_get_ipa_tdesc_idx. (initialize_low_arch): Don't call init_registers_x32_XXX and init_registers_amd64_XXX. * linux-x86-tdesc-selftest.c: Declare init_registers_amd64_XXX and tdesc_amd64_XXX. [__x86_64__] (amd64_tdesc_test): New function. (initialize_low_tdesc) [__x86_64__]: Call init_registers_x32_XXX and init_registers_amd64_XXX. * linux-x86-tdesc.c: Include arch/amd64.h. (xcr0_to_tdesc_idx): New function. (i386_linux_read_description): New function. (amd64_get_ipa_tdesc_idx): New function. * linux-x86-tdesc.h (amd64_get_ipa_tdesc_idx): Declare. (amd64_get_ipa_tdesc): Declare. gdb: 2017-09-05 Yao Qi <yao.qi@linaro.org> * amd64-linux-tdep.c: Include arch/amd64.h. Don't include features/i386/*.c. (amd64_linux_read_description): Call amd64_create_target_description. * arch/amd64.c: New file. * arch/amd64.h: New file. * configure.tgt (x86_64-*-linux*): Append amd64.o. * Makefile.in (ALL_64_TARGET_OBS): Append amd64.o.
2017-09-05Share i386-linux target description between GDB and GDBserverYao Qi3-0/+97
The code on creating i386-linux target descriptions are quite similar between GDB and GDBserver, so this patch moves them into a shared file arch/i386.c. I didn't name it as i386-linux.c, because I want to reuse it to create other i386 non-linux target descriptions later. gdb: 2017-09-05 Yao Qi <yao.qi@linaro.org> * Makefile.in (ALL_TARGET_OBS): Add i386.o. (SFILES): Add arch/i386.c. (HFILES_NO_SRCDIR): Add arch/i386.h. * arch/i386.c: New file. * arch/i386.h: New file. * arch/tdesc.h (allocate_target_description): Declare. (set_tdesc_architecture): Declare. (set_tdesc_osabi): Declare. * configure.tgt (i[34567]86-*-linux*): Add i386.o. * i386-linux-tdep.c: Don't include ../features/i386/32bit-XXX.c. include arch/i386.h. (i386_linux_read_description): Remove code and call i386_create_target_description. (set_tdesc_architecture): New function. (set_tdesc_osabi): New function. * target-descriptions.h (allocate_target_description): Remove. gdb/gdbserver: 2017-09-05 Yao Qi <yao.qi@linaro.org> * Makefile.in (arch-i386.o): New rule. * configure.srv (i[34567]86-*-linux*): Add arch-i386.o. (x86_64-*-linux*): Likewise. * linux-x86-tdesc.c: Don't include ../features/i386/32bit-XXX.c, include arch/i386.h. (i386_linux_read_description): Remove code and call i386_create_target_description. * tdesc.c (allocate_target_description): New function. * tdesc.h (set_tdesc_architecture): Remove declaration. (set_tdesc_osabi): Likewise.
2017-09-05Dynamically composite xml in reply to GDBYao Qi1-1/+3
GDBserver still uses pre-generated target descriptions in order to reply to GDB's query on target description (see xml-builtin-generated.c in GDBserver build directory). This patch teaches GDBserver to create XML contents according to the target descriptions rather than using pre-generated ones. First, change target feature c files to pass the feature xml file name to tdesc_create_feature, so that target description in GDBserver can record them, and create XML contents from these features in buffer, like ... <xi:include href="$FEATURE1_XML_NAME"/> <xi:include href="$FEATURE2_XML_NAME"/> ... and send this buffer back to GDB. Note that this patch reuses target_desc.xmltarget a little bit, which is to hold the XML contents dynamically generated in tdesc_get_features_xml. However, it is not xfree'ed in ~target_desc, because we can't tell it is from xstrdup or a literal string. Since we don't delete target_desc, there is no memory leak yet. After we change all target descriptions to the new style, target_desc.xmltarget is from xstrdup, then, we can safely xfree it in ~target_desc. gdb: 2017-09-05 Yao Qi <yao.qi@linaro.org> * arch/tdesc.h (tdesc_create_feature): Add an argument xml. * target-descriptions.c (tdesc_create_feature): Likewise, and adjust code. * features/i386/32bit-avx.c: Re-generated. * features/i386/32bit-avx512.c: Re-generated. * features/i386/32bit-core.c: Re-generated. * features/i386/32bit-linux.c: Re-generated. * features/i386/32bit-mpx.c: Re-generated. * features/i386/32bit-pkeys.c: Re-generated. * features/i386/32bit-sse.c: Re-generated. gdb/gdbserver: 2017-09-05 Yao Qi <yao.qi@linaro.org> * linux-x86-tdesc.c: Don't include <inttypes.h>. (i386_linux_read_description) [!IN_PROCESS_AGENT]: Call set_tdesc_architecture and set_tdesc_osabi. Remove code setting .xmltarget. * server.c (get_features_xml): Call tdesc_get_features_xml. * tdesc.c (set_tdesc_architecture): New function. (set_tdesc_osabi): New function. (tdesc_get_features_xml): New function. (tdesc_create_feature): Add an argument. * tdesc.h (struct target_desc) <features>: New field. <arch, osabi>: New field. (~target_desc): xfree features, arch, and osabi. (target_desc::oerator==): Don't compare .xmltarget. [!IN_PROCESS_AGENT] (set_tdesc_architecture): Declare. (set_tdesc_osabi): Likewise. (tdesc_get_features_xml): Likewise.
2017-09-05[GDBserver] Centralize tdesc for i386-linuxYao Qi1-0/+80
tdesc_i386_XXX_linux is used in many places in linux-x86-low.c and this patch adds a new function i386_linux_read_description to return the right tdesc according to xcr0. i386_linux_read_description is quite similar to the counterpart in GDB, and the following patch will share the duplicated code, so this patch adds arch/tdesc.h includes the declarations of various tdesc apis which are used by the shared code. The generated c feature files can include arch/tdesc.h only. gdb/gdbserver: 2017-09-05 Yao Qi <yao.qi@linaro.org> * configure.srv (srv_tgtobj): Append linux-x86-tdesc.o. (ipa_obj): Likewise. * linux-i386-ipa.c: Include common/x86-xstate.h (get_ipa_tdesc): Call i386_linux_read_description. (initialize_low_tracepoint): Don't call init_registers_XXX functions, call initialize_low_tdesc instead. * linux-x86-low.c (x86_linux_read_description): Call i386_linux_read_description. (initialize_low_arch): Don't call init_registers_i386_XXX functions, call initialize_low_tdesc. * linux-x86-tdesc.c: New file. * linux-x86-tdesc.h (x86_linux_tdesc): New X86_TDESC_LAST. (i386_get_ipa_tdesc_idx): Declare. (i386_get_ipa_tdesc): Declare. (initialize_low_tdesc): Declare. gdb: 2017-09-05 Yao Qi <yao.qi@linaro.org> * arch/tdesc.h: New file. * regformats/regdat.sh: Generate code using tdesc_create_reg. * target-descriptions.c: Update comments. * target-descriptions.h: Include "arch/tdesc.h". Remove the declarations. * features/i386/32bit-avx.c: Re-generated. * features/i386/32bit-avx512.c: Re-generated. * features/i386/32bit-core.c: Re-generated. * features/i386/32bit-linux.c: Re-generated. * features/i386/32bit-mpx.c: Re-generated. * features/i386/32bit-pkeys.c: Re-generated. * features/i386/32bit-sse.c: Re-generated.
2017-05-02Change return type of gdbarch_software_single_step to vector<CORE_ADDR>Simon Marchi2-48/+46
This is a relatively straightforward patch that changes gdbarch_software_single_step so it returns an std::vector<CORE_ADDR> instead of a VEC (CORE_ADDR). gdb/ChangeLog: * gdbarch.sh (software_single_step): Change return type to std::vector<CORE_ADDR>. * gdbarch.c, gdbarch.h: Re-generate. * arch/arm-get-next-pcs.c (thumb_deal_with_atomic_sequence_raw): Adjust. (arm_deal_with_atomic_sequence_raw): Adjust. (thumb_get_next_pcs_raw): Adjust. (arm_get_next_pcs_raw): Adjust. (arm_get_next_pcs): Adjust. * arch/arm-get-next-pcs.h (arm_get_next_pcs): Adjust. * aarch64-tdep.c (aarch64_software_single_step): Adjust. * alpha-tdep.c (alpha_deal_with_atomic_sequence): Adjust. (alpha_software_single_step): Adjust. * alpha-tdep.h (alpha_software_single_step): Adjust. * arm-linux-tdep.c (arm_linux_software_single_step): Adjust. * arm-tdep.c (arm_software_single_step): Adjust. (arm_breakpoint_kind_from_current_state): Adjust. * arm-tdep.h (arm_software_single_step): Adjust. * breakpoint.c (insert_single_step_breakpoint): Adjust. * cris-tdep.c (cris_software_single_step): Adjust. * mips-tdep.c (mips_deal_with_atomic_sequence): Adjust. (micromips_deal_with_atomic_sequence): Adjust. (deal_with_atomic_sequence): Adjust. (mips_software_single_step): Adjust. * mips-tdep.h (mips_software_single_step): Adjust. * moxie-tdep.c (moxie_software_single_step): Adjust. * nios2-tdep.c (nios2_software_single_step): Adjust. * ppc-tdep.h (ppc_deal_with_atomic_sequence): Adjust. * rs6000-aix-tdep.c (rs6000_software_single_step): Adjust. * rs6000-tdep.c (ppc_deal_with_atomic_sequence): Adjust. * s390-linux-tdep.c (s390_software_single_step): Adjust. * sparc-tdep.c (sparc_software_single_step): Adjust. * spu-tdep.c (spu_software_single_step): Adjust. * tic6x-tdep.c (tic6x_software_single_step): Adjust. gdb/gdbserver/ChangeLog: * linux-arm-low.c (arm_gdbserver_get_next_pcs): Adjust to software_single_step change of return type to std::vector<CORE_ADDR>. * linux-low.c (install_software_single_step_breakpoints): Likewise. * linux-low.h (install_software_single_step_breakpoints): Likewise.
2017-03-27gdb: gdbserver: xtensa: make C0_NREGS availableMax Filippov1-0/+2
Both gdb and gdbserver need this definition to properly work with call0 ABI. Make it available to both. gdb/ 2017-03-27 Max Filippov <jcmvbkbc@gmail.com> * arch/xtensa.h (C0_NREGS): Add definition. * xtensa-tdep.c (C0_NREGS): Remove definition.
2017-01-01update copyright year range in GDB filesJoel Brobecker9-9/+9
This applies the second part of GDB's End of Year Procedure, which updates the copyright year range in all of GDB's files. gdb/ChangeLog: Update copyright year range in all GDB files.
2016-10-10Share enum arm_breakpoint_kindsYao Qi1-0/+8
This patch shares "enum arm_breakpoint_kinds", and use ARM_BP_KIND_THUMB2 in GDB. gdb: 2016-10-10 Yao Qi <yao.qi@linaro.org> * arch/arm.h (enum arm_breakpoint_kinds): New. * arm-tdep.c (arm_remote_breakpoint_from_pc): Use ARM_BP_KIND_THUMB2. gdb/gdbserver: 2016-10-10 Yao Qi <yao.qi@linaro.org> * linux-aarch32-low.c (enum arm_breakpoint_kinds): Remove.
2016-04-20Move ARM_CPSR_GREGNUM to arch/arm-linux.hYao Qi1-0/+3
This patch moves macro ARM_CPSR_GREGNUM to arch/arm-linux.h so that it can be used in GDBserver side. gdb: 2016-04-20 Yao Qi <yao.qi@linaro.org> * arm-linux-tdep.h (ARM_CPSR_GREGNUM): Move it to ... * arch/arm-linux.h: ... here. gdb/gdbserver: 2016-04-20 Yao Qi <yao.qi@linaro.org> * linux-aarch32-low.c: Include "arch/arm-linux.h". (arm_fill_gregset): Use ARM_CPSR_GREGNUM rather than magic number 16. (arm_store_gregset): Likewise.
2016-02-16Remove PC from syscall_next_pcYao Qi2-3/+3
Method syscall_next_pc of struct arm_get_next_pcs_ops has an argument PC, which is not necessary, because PC can be got from regcache in 'struct arm_get_next_pcs'. This patch removes the PC argument of syscall_next_pc. gdb: 2016-02-16 Yao Qi <yao.qi@linaro.org> * arch/arm-get-next-pcs.h (struct arm_get_next_pcs_ops) <syscall_next_pc>: Remove argument PC. Callers updated. * arm-linux-tdep.c (arm_linux_get_next_pcs_syscall_next_pc): Remove argument PC. Get pc from regcache_read_pc. * arm-tdep.c (arm_get_next_pcs_syscall_next_pc): Remove argument PC. gdb/gdbserver: 2016-02-16 Yao Qi <yao.qi@linaro.org> * linux-arm-low.c (get_next_pcs_syscall_next_pc): Remove argument PC. Get pc from regcache_read_pc.
2016-02-12[ARM] Software single step cross kernel helpersYao Qi1-4/+66
GDB step cross kernel helpers only works if the kernel helpers are tail called, which is the case how it is used in glibc. See __aeabi_read_tp in sysdeps/unix/sysv/linux/arm/aeabi_read_tp.S. In __aeabi_read_tp, branch/jump to the kernel helper is the last instruction, and the next instruction address is in LR, which is in caller function. GDB can handle this correctly. For example, glibc function __GI___ctype_init calls __aeabi_read_tp 0xb6e19b30 <__GI___ctype_init+4>: ldr r3, [pc, #80] ; 0xb6e19b34 <__GI___ctype_init+8>: bl 0xb6e0a6e0 <__aeabi_read_tp> 0xb6e19b38 <__GI___ctype_init+12>: ldr r3, [pc, r3] and __aeabi_read_tp calls kernel helper, (gdb) disassemble __aeabi_read_tp 0xb6fef5d0 <+0>: mvn r0, #61440 ; 0xf000 0xb6fef5d4 <+4>: sub pc, r0, #31 once GDB or GDBserver single step instruction on 0xb6fef5d4, LR is 0xb6e19b38, which is right address of next instruction to set breakpoint on. However, if the kernel helpers are not tail-called, the LR is still the address in the caller function of kernel helper's caller, which isn't the right address of next instruction to set breakpoint on. For example, we use kernel helper in main, (gdb) disassemble main .... 0x00008624 <+32>: mov r3, #4064 ; 0xfe0^M 0x00008628 <+36>: movt r3, #65535 ; 0xffff^M 0x0000862c <+40>: blx r3 0x00008630 <+44>: ldr r3, [r11, #-8] kernel helper is called on 0x0000862c and the expected next instruction address is 0x00008630, but the LR now is the return address of main. The problem here is LR may not have the right address because when we single step the instruction, it isn't executed yet, so the LR isn't updated. This patch fix this problem by decoding instruction, if the instruction updates LR (BL and BLX), the next instruction address is PC + INSN_SIZE, otherwise, get the address of next instruction from LR. gdb: 2016-02-12 Yao Qi <yao.qi@linaro.org> * arch/arm-linux.c (arm_linux_get_next_pcs_fixup): Calculate nextpc according to instruction. gdb/testsuite: 2016-02-12 Yao Qi <yao.qi@linaro.org> * gdb.arch/arm-single-step-kernel-helper.c: New. * gdb.arch/arm-single-step-kernel-helper.exp: New.
2016-02-12[ARM] Fixup PC in software single stepYao Qi4-0/+39
When I exercise GDBserver software single step, I see the following error, which has been already handled by GDB properly. In GDBserver log, we can see, GDBserver tries to single step instruction on 0xb6e0a6e4, and destination address is 0xffff0fe0, stop pc is 0xb6e0a6e4 Writing f001f0e7 to 0xffff0fe0 in process 7132 Failed to insert breakpoint at 0xffff0fe0 (Input/output error). Failed to insert breakpoint at 0xffff0fe0 (-1). (gdb) disassemble __aeabi_read_tp,+8 Dump of assembler code from 0xb6e0a6e0 to 0xb6e0a6e8: 0xb6e0a6e0 <__aeabi_read_tp+0>: mvn r0, #61440 ; 0xf000 0xb6e0a6e4 <__aeabi_read_tp+4>: sub pc, r0, #31 however, it fails inserting breakpoint there. This problem has already fixed by GDB, see comments in arm-linux-tdep.c:arm_linux_software_single_step /* The Linux kernel offers some user-mode helpers in a high page. We can not read this page (as of 2.6.23), and even if we could then we couldn't set breakpoints in it, and even if we could then the atomic operations would fail when interrupted. They are all called as functions and return to the address in LR, so step to there instead. */ so we need to do the same thing in GDB side as well. This patch adds a new field fixup in arm_get_next_pcs_ops, so that we can fix up PC for arm-linux target. In this way, both GDB and GDBserver can single step instructions going to kernel helpers. gdb: 2016-02-12 Yao Qi <yao.qi@linaro.org> * arch/arm-get-next-pcs.c (arm_get_next_pcs): Call self->ops->fixup if it isn't NULL. * arch/arm-get-next-pcs.h: Include gdb_vecs.h. (struct arm_get_next_pcs_ops) <fixup>: New field. * arch/arm-linux.c: Include common-regcache.h and arch/arm-get-next-pcs.h. (arm_linux_get_next_pcs_fixup): New function. * arch/arm-linux.h (arm_linux_get_next_pcs_fixup): Declare. * arm-linux-tdep.c (arm_linux_get_next_pcs_ops): Initialize it with arm_linux_get_next_pcs_fixup. (arm_linux_software_single_step): Move code to arm_linux_get_next_pcs_fixup. * arm-tdep.c (arm_get_next_pcs_ops): Initialize it. gdb/gdbserver: 2016-02-12 Yao Qi <yao.qi@linaro.org> * linux-arm-low.c (get_next_pcs_ops): Initialize it with arm_linux_get_next_pcs_fixup.
2016-01-26Remove argument pc in get_next_pcsYao Qi2-13/+14
Nowadays, get_next_pcs in linux_target_ops has two parameters PC and REGCACHE. Parameter PC looks redundant because it can be go from REGCACHE. The patch is to remove PC from the arguments for various functions. gdb: 2016-01-26 Yao Qi <yao.qi@linaro.org> * arch/arm-get-next-pcs.c (thumb_deal_with_atomic_sequence_raw): Remove argument pc. Get pc by regcache_read_pc. Callers updated. (arm_deal_with_atomic_sequence_raw): Likewise. (thumb_get_next_pcs_raw): Likewise. (arm_get_next_pcs_raw): Likewise. (arm_get_next_pcs): Remove argument pc. Callers updated. * arch/arm-get-next-pcs.h (arm_get_next_pcs): Update declaration. gdb/gdbserver: 2016-01-26 Yao Qi <yao.qi@linaro.org> * linux-arm-low.c (arm_gdbserver_get_next_pcs): Remove argument pc. * linux-low.c (install_software_single_step_breakpoints): Don't call regcache_read_pc. * linux-low.h (struct linux_target_ops) <get_next_pcs>: Remove argument pc.