Age | Commit message (Collapse) | Author | Files | Lines |
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* config/tc-crx.c: Support 'bcop' relaxation (dealt as in 'cmp&branch' case).
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* configure.in: Move setting of cpu_type, fmt, etc., to
configure.tgt.
* Makefile.am (CONFIG_STATUS_DEPENDENCIES): Add
$(srcdir)/configure.tgt.
* configure, Makefile.in: Rebuild.
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LDI, ADIW/SBIW and LDD/STD instructions.
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* gas/crx/beq_insn.d: Update reference file according to
disassembler printing method.
* gas/crx/bit_insn.d: Likewise.
* gas/crx/br_insn.d: Likewise.
* gas/crx/cmpbr_insn.d: Likewise.
* gas/crx/cop_insn.d: Likewise.
* gas/crx/load_stor_insn.d: Likewise.
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* gas/crx/beq_insn.d: Update reference file according to disassembler printing method.
* gas/crx/bit_insn.d: Likewise.
* gas/crx/br_insn.d: Likewise.
* gas/crx/cmpbr_insn.d: Likewise.
* gas/crx/cop_insn.d: Likewise.
* gas/crx/load_stor_insn.d: Likewise.
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[:xdigit:] and {N} in regexps with [0-9], [0-9a-fA-F] and N
copies, to cater to tcl versions before Tcl 8.2.3.
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* config/tc-sh64.c (shmedia_md_apply_fix3): Add missing
BFD_RELOC_SH_IMMS10BY8 relocation.
* config/tc-sh64.c (shmedia_build_Mytes): Emit an error message rather
than just ignoring bad code.
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* config/tc-sh64.c (shmedia_build_Mytes): Emit an error message rather
than just ignoring bad code.
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* config/tc-sh64.c (shmedia_md_apply_fix3): Add missing
BFD_RELOC_SH_IMMS10BY8 relocation.
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* v850.h (R_V850_LO16_SPLIT_OFFSET): New reloc.
bfd/
* reloc.c (BFD_RELOC_V850_LO16_SPLIT_OFFSET): New bfd_reloc_code_type.
* elf32-v850.c (v850_elf_howto_table): Add entry for
R_V850_LO16_SPLIT_OFFSET.
(v850_elf_reloc_map): Map it to BFD_RELOC_V850_LO16_SPLIT_OFFSET.
(v850_elf_perform_lo16_relocation): New function, extracted from...
(v850_elf_perform_relocation): ...here. Use it to handle
R_V850_LO16_SPLIT_OFFSET.
(v850_elf_check_relocs, v850_elf_final_link_relocate): Handle
R_V850_LO16_SPLIT_OFFSET.
* libbfd.h, bfd-in2.h: Regenerate.
gas/
* config/tc-v850.c (handle_lo16): New function.
(v850_reloc_prefix): Use it to check lo().
(md_assemble, md_apply_fix3): Handle BFD_RELOC_V850_LO16_SPLIT_OFFSET.
gas/testsuite/
* gas/v850/split-lo16.{s,d}: New test.
* gas/v850/v850.exp: Run it.
ld/testsuite/
* ld-v850: New directory.
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2004-12-15 Jan Beulich <jbeulich@novell.com>
* config/obj-elf.c (obj_elf_change_section): Only set type and
attributes on new sections. Emit warning when type of re-declared
section doesn't match.
gas/testsuite/
2004-12-15 Jan Beulich <jbeulich@novell.com>
* gas/elf/section5.[els]: New.
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2004-12-15 Jan Beulich <jbeulich@novell.com>
* dw2gencfi.c (dot.cfi.startproc): Clear cur_cfa_offset so
'.cfi_startproc simple' doesn't inherit the old value.
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2004-12-15 Jan Beulich <jbeulich@novell.com>
* dw2gencfi.c (output_cfi_insn): Adjust DW_CFA_def_cfa_sf generation
to emit a signed and factored offset. Adjust DW_CFA_def_cfa_offset_sf
generation to emit a factored offset.
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.text alignments.
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* elfcode.h (elf_slurp_symbol_table): Use bfd_elf_sym_name so that
canonical sections syms have a name.
gas/testsuite/
Update for changed section syms.
ld/testsuite/
Update for changed section syms.
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which is too large in the case of NO_PIC without 64-bit
addresses.
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* gas/mips/elf-rel23b.d: New test.
* gas/mips/elf-rel25.s: New test.
* gas/mips/elf-rel25.d: New test.
* gas/mips/elf-rel25a.d: New test.
* gas/mips/mips.exp: Run new tests.
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(macro_build_lui): Permit "_gp" if !mips_in_shared.
(md_longopts): Add -mshared and -mno-shared.
(md_parse_option): Handle OPTION_MSHARED and OPTION_MNO_SHARED.
(s_cpload): Implement !mips_in_shared case.
(s_cpsetup): Likewise.
* doc/c-mips.texi (MIPS Opts): Document -mno-shared.
* NEWS: Mention -mno-shared.
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for function start.
* testsuite/gas/arm/unwind.d: Expect R_ARM_PREL31 relocations.
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sequence, increase the size of the sequence.
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use CPU_RM9000.
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signed/unsigned comparison warning.
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* configure.in: Use it for arm*-*-linux-gnueabi*.
* config/tc-arm.c: Allow emulation file to set FPU_DEFAULT.
* config/te-armlinuxeabi.h: New file.
* Makefile.in: Regenerated.
* aclocal.m4: Likewise.
* configure: Likewise.
* doc/Makefile.in: Regenerated.
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(xtensa_restore_emit_state): Likewise.
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(s_align): Use it.
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* gas/crx/br_insn.d: Fix error in expected disassembly.
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* gas/crx/br_insn.d: Fix error in expected disassembly.
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config/tc-crx.c: Major code cleanup. Remove unused variables and functions,
give functions a meaningful name, add comments.
(check_range): New function - Replace operand size calculation
with range checking.
(assemble_insn): Update Algorithm, improve error issuing.
(enum op_err): New - Operand error (for issuing operand error messages).
(process_label_constant): Bug fix regarding COP_BRANCH_INS relocation handling.
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* config/tc-crx.c: Major code cleanup. Remove unused variables and functions,
give functions a meaningful name, add comments.
(check_range): New function - Replace operand size calculation
with range checking.
(assemble_insn): Update Algorithm, improve error issuing.
(enum op_err): New - Operand error (for issuing operand error messages).
(process_label_constant): Bug fix regarding COP_BRANCH_INS relocation
handling.
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of dump pattern.
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* gas/ia64/group-1.d: Adjust expected secion ordering.
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2004-11-25 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (optimize_imm): Adjust immediates to only those
permissible for the selected instruction suffix.
(process_suffix): For DefaultSize instructions, suppressing the
guessing of a 'q' suffix if the instruction doesn't support it is
pointless, because only an 'l' suffix can be guessed in this place.
gas/testsuite/
2004-11-25 Jan Beulich <jbeulich@novell.com>
* gas/i386/x86-64-inval.[sl]: Remove sahf/lahf.
include/opcode/
2004-11-25 Jan Beulich <jbeulich@novell.com>
* i386.h: CpuNo64 mov can't reasonably have a 'q' suffix. Moves
to/from test registers are illegal in 64-bit mode. Add missing
NoRex64 to sidt. fxsave/fxrstor now allow for a 'q' suffix
(previously one had to explicitly encode a rex64 prefix). Re-enable
lahf/sahf in 64-bit mode as at least some Athlon64/Opteron steppings
support it there. Add cmpxchg16b as per Intel's 64-bit documentation.
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bfd/
* elf.c (assign_section_numbers): Number SHT_GROUP sections first.
gas/testsuite/
* gas/elf/group0a.d: Adjust expected secion ordering.
* gas/elf/group1a.d: Ditto.
* gas/elf/section4.d: Ditto.
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They should be correct now.
* gas/mn10300/relax.s: Add further tests of the relaxing of branch instructions.
* gas/mn10300/relax.d: Add expected relocations.
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2004-11-23 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.h (CpuMMX2): Declare. Artificial classifier to
indicate the MMX extensions added by both SSE and 3DNow!A.
(Cpu3dnowA): Declare.
(CpuUnknownFlags): Update.
* config/tc-i386.c (cpu_sub_arch_name): Declare.
(cpu_arch): i586 and pentium do not imply MMX. i686 and pentiumpro do
neither imply SSE nor MMX. k6 implies MMX. k6_2 additionally implies
3DNow!. Athlon additionally implies 3DNow!A. Several new
entries (those starting with a dot are for sub-arch specification).
(set_cpu_arch): Handle sub-arch specifications.
(parse_insn): Distinguish between instructions not supported because
of insufficient CPU features and because of 64-bit mode.
* doc/c-i386.texi: Describe enhanced .arch directive.
include/opcode/
2004-11-23 Jan Beulich <jbeulich@novell.com>
* i386.h (i386_optab): paddq and psubq, even in their MMX form, are
available only with SSE2. Change the MMX additions introduced by SSE
and 3DNow!A to CpuMMX2 (rather than CpuMMX). Indicate the 3DNow!A
instructions by their now designated identifier (since combining i686
and 3DNow! does not really imply 3DNow!A).
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change to the short immediate syntax.
* gas/arc/ld.s: Add check of load of a long immediate.
* gas/arc/ld.d: Add expected disassembly.
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without a corresponding .debug_info section.
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(s_errwarn): New function.
* read.h (s_errwarn): Declare.
* doc/as.texinfo (Error, Warning): Document .error and .warning.
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* gas/all/err-1.s, gas/all/warn-1.s: New tests.
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