| Age | Commit message (Collapse) | Author | Files | Lines |
|---|
|
By making the flgp field of struct arc_flags constant we can remove a
place where we cast away the const-ness of a variable. Also, given that
the value assigned to this field almost always comes from compile-time
constant data, having the field non-constant is probably a bad thing.
gas/ChangeLog:
* config/tc-arc.c (find_opcode_match): Remove casting away of
const.
* config/tc-arc.h (struct arc_flags): Make flgp field const.
|
|
Some debug code has the wrong printf format specifier for some types
that are (ultimately) bfd_vma. Fixed by using BFD_VMA_FMT string. This
only becomes an issue when building the tc-arc.c file with -DDEBUG=1 to
build in the debug code.
gas/ChangeLog:
* config/tc-arc.c (md_pcrel_from_section): Use BFD_VMA_FMT where
appropriate.
(md_convert_frag): Likewise.
|
|
The opcode array iterator mechanism can, in some situations, result in
reading memory outside of the opcode array. When using the
iterator-next mechanism to find the next possible arc_opcode, if we find
an opcode where the name field is NULL, or the name does not match, then
the cached opcode pointer is not set to NULL. The result is that
another call to iterator-next will again increment the opcode
pointer (which might now point outside the opcode array) and attempt to
access the name field of this undefined opcode.
Fixed in this commit by clearing the cached opcode pointer.
I've added a test case, which currently shows the bug, however, this
will only expose this bug while the opcode used (dsp_fp_cmp) is the last
opcode in the table.
gas/ChangeLog:
* config/tc-arc.c (arc_opcode_hash_entry_iterator_next): Set
cached opcode to NULL when we reach a non-matching opcode.
* testsuite/gas/arc/asm-errors-2.d: New file.
* testsuite/gas/arc/asm-errors-2.err: New file.
* testsuite/gas/arc/asm-errors-2.s: New file.
|
|
Currently supplying an input file with too many operands to an
instruction will cause the assembler to overflow and array and trigger
undefined behaviour.
This change checks that we don't access outside the limits of the
operand array.
gas/ChangeLog:
* config/tc-arc.c (tokenize_arguments): Add checks for array
overflow.
* testsuite/gas/arc/asm-errors.s: Addition test line added.
* testsuite/gas/arc/asm-errors.err: Update expected results.
|
|
gas/ChangeLog:
2016-05-18 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
* config/tc-rx.c (struct cpu_type): Change the type of a field from
int to enum rx_cpu_types.
|
|
gas/ChangeLog:
2016-05-18 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
* config/tc-dlx.c (struct machine_it): change the type of a field from
int to bfd_reloc_code_real_type.
* config/tc-tic4x.c: Likewise.
|
|
|
|
gas/ChangeLog:
2016-05-18 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
* config/tc-v850.c (v850_target_arch): change type to enum
bfd_architecture.
* config/tc-v850.h (v850_target_arch): Likewise.
|
|
Commit b84bf58a accidentally extended the range of allowed negative
numbers.
* config/tc-ppc.c (ppc_insert_operand): Trim PPC_OPERAND_SIGNOPT
allowed negative range.
* testsuite/gas/ppc/power9.s: Test xxspltib of -128, not -256.
* testsuite/gas/ppc/power9.d: Update.
|
|
2016-05-17 Thomas Preud'homme <thomas.preudhomme@arm.com>
gas/
* testsuite/gas/arm/archv8m-cmse-msr-base.d: Force Thumb when
disassembling and stop skipping targets.
* testsuite/gas/arm/archv8m-cmse-msr-main.d: Likewise.
* testsuite/gas/arm/archv8m-main-dsp-4.d: Likewise.
* testsuite/gas/arm/archv8m-base.d: Also allow nops after the last
instruction for targets that have stronger alignment requirement.
* testsuite/gas/arm/archv8m-cmse-base.d: Likewise.
* testsuite/gas/arm/archv8m-cmse-main-1.d: Likewise.
* testsuite/gas/arm/archv8m-cmse-main-2.d: Likewise.
* testsuite/gas/arm/archv8m-main-dsp-1.d: Likewise.
* testsuite/gas/arm/archv8m-main-dsp-2.d: Likewise.
* testsuite/gas/arm/archv8m-main-dsp-3.d: Likewise.
* testsuite/gas/arm/archv8m-main.d: Likewise.
* testsuite/gas/arm/archv8m.s: Add label.
* testsuite/gas/arm/archv8m-cmse.s: Likewise.
* testsuite/gas/arm/archv8m-cmse-msr.s: Likewise.
* testsuite/gas/arm/archv8m-cmse-main.s: Likewise.
|
|
It is only read in tc-m32r.c, so it might as well be static and const, and
that should help the compiler slightly.
gas/ChangeLog:
2016-05-16 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
* config/tc-m32r.c (mach_table): Make static and const.
|
|
gas/ChangeLog:
2016-05-16 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
* config/tc-vax.c (flonum_gen2vax): Adjust prototype to match
definition.
|
|
Defining linkrelax to have different values in as.c and tc-msp430.c /
tc-mn10300.c is at least rather tricky, and seems fragile, when we can just set
it in md_begin instead.
gas/ChangeLog:
2016-05-16 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
* config/tc-mn10300.c (md_begin): set linkrelax here instead of
defining it.
* config/tc-msp430.c (md_begin): Likewise.
|
|
These variables only hold values from the bfd_reloc_code_real_type enum, and
are passed to functions that expect the argument to be of type
bfd_reloc_code_real_type, so it seems to make sense that there type is
bfd_reloc_code_real_type rather than int.
gas/ChangeLog:
2016-05-16 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
* config/tc-m68hc11.c (fixup8): Change variables type from int to
bfd_reloc_code_real_type where appropriate.
(fixup16): Likewise.
(fixup8_xg): Likewise.
|
|
Fix a commit 6757cf57697d ("enable -Wwrite-strings for gas") regression.
gas/
* config/tc-sh64.c (shmedia_check_limits): Constify `msg'.
|
|
opcodes/
* ppc-opc.c (IMM8): Use PPC_OPERAND_SIGNOPT.
gas/
* testsuite/gas/ppc/power9.d <xxspltib>: Add additional operand tests.
* testsuite/gas/ppc/power9.s: Likewise.
|
|
* config/obj-coff.c (weak_uniquify): Delete unused var.
|
|
Its a bit shorter and simpler than raw xmalloc.
gas/ChangeLog:
2016-05-13 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
* app.c (app_push): Use XNEW and related macros.
* as.c (parse_args): Likewise.
* cgen.c (make_right_shifted_expr): Likewise.
(gas_cgen_tc_gen_reloc): Likewise.
* config/bfin-defs.h: Likewise.
* config/bfin-parse.y: Likewise.
* config/obj-coff.c (stack_init): Likewise.
(stack_push): Likewise.
(coff_obj_symbol_new_hook): Likewise.
(coff_obj_symbol_clone_hook): Likewise.
(add_lineno): Likewise.
(coff_frob_symbol): Likewise.
* config/obj-elf.c (obj_elf_section_name): Likewise.
(build_group_lists): Likewise.
* config/obj-evax.c (evax_symbol_new_hook): Likewise.
* config/obj-macho.c (obj_mach_o_indirect_symbol): Likewise.
* config/tc-aarch64.c (insert_reg_alias): Likewise.
(find_or_make_literal_pool): Likewise.
(add_to_lit_pool): Likewise.
(fill_instruction_hash_table): Likewise.
* config/tc-alpha.c (load_expression): Likewise.
(emit_jsrjmp): Likewise.
(s_alpha_ent): Likewise.
(s_alpha_end): Likewise.
(s_alpha_linkage): Likewise.
(md_begin): Likewise.
(tc_gen_reloc): Likewise.
* config/tc-arc.c (arc_insert_opcode): Likewise.
(arc_extcorereg): Likewise.
* config/tc-bfin.c: Likewise.
* config/tc-cr16.c: Likewise.
* config/tc-cris.c: Likewise.
* config/tc-crx.c (preprocess_reglist): Likewise.
* config/tc-d10v.c: Likewise.
* config/tc-frv.c (frv_insert_vliw_insn): Likewise.
(frv_tomcat_shuffle): Likewise.
* config/tc-h8300.c: Likewise.
* config/tc-i370.c (i370_macro): Likewise.
* config/tc-i386.c (lex_got): Likewise.
(md_parse_option): Likewise.
* config/tc-ia64.c (alloc_record): Likewise.
(set_imask): Likewise.
(save_prologue_count): Likewise.
(dot_proc): Likewise.
(dot_endp): Likewise.
(ia64_frob_label): Likewise.
(add_qp_imply): Likewise.
(add_qp_mutex): Likewise.
(mark_resource): Likewise.
(dot_alias): Likewise.
* config/tc-m68hc11.c: Likewise.
* config/tc-m68k.c (m68k_frob_label): Likewise.
(s_save): Likewise.
(mri_control_label): Likewise.
(push_mri_control): Likewise.
(build_mri_control_operand): Likewise.
(s_mri_else): Likewise.
(s_mri_break): Likewise.
(s_mri_next): Likewise.
(s_mri_for): Likewise.
(s_mri_endw): Likewise.
* config/tc-metag.c (create_mnemonic_htab): Likewise.
* config/tc-microblaze.c: Likewise.
* config/tc-mmix.c (s_loc): Likewise.
* config/tc-nds32.c (nds32_relax_hint): Likewise.
* config/tc-nios2.c (nios2_insn_reloc_new): Likewise.
* config/tc-rl78.c: Likewise.
* config/tc-rx.c (rx_include): Likewise.
* config/tc-sh.c: Likewise.
* config/tc-sh64.c (shmedia_frob_section_type): Likewise.
* config/tc-sparc.c: Likewise.
* config/tc-spu.c: Likewise.
* config/tc-tic6x.c (static tic6x_unwind_info *tic6x_get_unwind): Likewise.
(tic6x_start_unwind_section): Likewise.
* config/tc-tilegx.c: Likewise.
* config/tc-tilepro.c: Likewise.
* config/tc-v850.c: Likewise.
* config/tc-visium.c: Likewise.
* config/tc-xgate.c: Likewise.
* config/tc-xtensa.c (xtensa_translate_old_userreg_ops): Likewise.
(new_resource_table): Likewise.
(resize_resource_table): Likewise.
(xtensa_create_trampoline_frag): Likewise.
(xtensa_maybe_create_literal_pool_frag): Likewise.
(cache_literal_section): Likewise.
* config/xtensa-relax.c (append_transition): Likewise.
(append_condition): Likewise.
(append_value_condition): Likewise.
(append_constant_value_condition): Likewise.
(append_literal_op): Likewise.
(append_label_op): Likewise.
(append_constant_op): Likewise.
(append_field_op): Likewise.
(append_user_fn_field_op): Likewise.
(enter_opname_n): Likewise.
(enter_opname): Likewise.
(split_string): Likewise.
(parse_insn_templ): Likewise.
(clone_req_or_option_list): Likewise.
(clone_req_option_list): Likewise.
(parse_option_cond): Likewise.
(parse_insn_pattern): Likewise.
(parse_insn_repl): Likewise.
(build_transition): Likewise.
(build_transition_table): Likewise.
* dw2gencfi.c (alloc_fde_entry): Likewise.
(alloc_cfi_insn_data): Likewise.
(cfi_add_CFA_remember_state): Likewise.
(dot_cfi_escape): Likewise.
(dot_cfi_fde_data): Likewise.
(select_cie_for_fde): Likewise.
* dwarf2dbg.c (dwarf2_directive_loc): Likewise.
* ecoff.c (ecoff_add_bytes): Likewise.
(ecoff_build_debug): Likewise.
* input-scrub.c (input_scrub_push): Likewise.
(input_scrub_begin): Likewise.
(input_scrub_next_buffer): Likewise.
* itbl-ops.c (append_insns_as_macros): Likewise.
(alloc_entry): Likewise.
(alloc_field): Likewise.
* listing.c (listing_newline): Likewise.
(listing_listing): Likewise.
* macro.c (get_any_string): Likewise.
(delete_macro): Likewise.
* stabs.c (generate_asm_file): Likewise.
(stabs_generate_asm_lineno): Likewise.
* subsegs.c (subseg_change): Likewise.
(subseg_get): Likewise.
* symbols.c (define_dollar_label): Likewise.
(symbol_relc_make_sym): Likewise.
* write.c (write_relocs): Likewise.
|
|
gas/ChangeLog:
2016-05-13 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
* config/obj-coff.c (obj_coff_def): Simplify string copying.
(weak_name2altname): Likewise.
(weak_uniquify): Likewise.
(obj_coff_section): Likewise.
(obj_coff_init_stab_section): Likewise.
* config/obj-elf.c (obj_elf_section_name): Likewise.
(obj_elf_init_stab_section): Likewise.
* config/obj-evax.c (evax_shorten_name): Likewise.
* config/obj-macho.c (obj_mach_o_make_or_get_sect): Likewise.
* config/tc-aarch64.c (create_register_alias): Likewise.
* config/tc-alpha.c (load_expression): Likewise.
(s_alpha_file): Likewise.
(s_alpha_section_name): Likewise.
(tc_gen_reloc): Likewise.
* config/tc-arc.c (md_assemble): Likewise.
* config/tc-arm.c (create_neon_reg_alias): Likewise.
(start_unwind_section): Likewise.
* config/tc-hppa.c (pa_build_unwind_subspace): Likewise.
(hppa_elf_mark_end_of_function): Likewise.
* config/tc-nios2.c (nios2_modify_arg): Likewise.
(nios2_negate_arg): Likewise.
* config/tc-rx.c (rx_section): Likewise.
* config/tc-sh64.c (sh64_consume_datalabel): Likewise.
* config/tc-tic30.c (tic30_find_parallel_insn): Likewise.
* config/tc-tic54x.c (tic54x_include): Likewise.
(tic54x_macro_info): Likewise.
(subsym_get_arg): Likewise.
(subsym_substitute): Likewise.
(tic54x_start_line_hook): Likewise.
* config/tc-xtensa.c (xtensa_literal_prefix): Likewise.
(xg_reverse_shift_count): Likewise.
* config/xtensa-relax.c (enter_opname_n): Likewise.
(split_string): Likewise.
* dwarf2dbg.c (get_filenum): Likewise.
(process_entries): Likewise.
* expr.c (operand): Likewise.
* itbl-ops.c (alloc_entry): Likewise.
* listing.c (listing_message): Likewise.
(listing_title): Likewise.
* macro.c (check_macro): Likewise.
* stabs.c (s_xstab): Likewise.
* symbols.c (symbol_relc_make_expr): Likewise.
* write.c (compress_debug): Likewise.
|
|
|
|
|
|
bfd/
* elfxx-mips.c (print_mips_ases): Add DSPR3.
binutils/
* readelf.c (print_mips_ases): Add DSPR3.
gas/
* config/tc-mips.c (options): Add OPTION_DSPR3 and
OPTION_NO_DSPR3.
(md_longopts): Likewise.
(md_show_usage): Add help for -mdspr3 and -mno-dspr3.
(mips_ases): Define availability for DSPr3.
(mips_ase_groups): Add ASE_DSPR3 to the DSP group.
(mips_convert_ase_flags): Map ASE_DSPR3 to AFL_ASE_DSPR3.
* doc/as.texinfo: Document -mdspr3, -mno-dspr3. Fix -mdspr2
formatting.
* doc/c-mips.texi: Document -mdspr3, -mno-dspr3, .set dspr3 and
.set nodspr3. Fix -mdspr2 formatting.
* testsuite/gas/mips/mips32-dspr3.d: New file.
* testsuite/gas/mips/mips32-dspr3.s: Likewise.
* testsuite/gas/mips/mips.exp: Run mips32-dspr3 test.
include/
* elf/mips.h (AFL_ASE_DSPR3): New macro.
(AFL_ASE_MASK): Update to include AFL_ASE_DSPR3.
* opcode/mips.h (ASE_DSPR3): New macro.
opcodes/
* mips-dis.c (mips_arch_choices): Add ASE_DSPR3 to mips32r6 and
mips64r6.
* mips-opc.c (D34): New macro.
(mips_builtin_opcodes): Define bposge32c for DSPr3.
|
|
PR target/20068
* config/tc-arm.c (add_to_lit_pool): Ensure that the padding added
to the pool uses O_constant.
* testsuite/gas/arm/pr20068.s: New test.
* testsuite/gas/arm/pr20068.d: Test driver.
|
|
|
|
* testsuite/gas/arm/archv8m-cmse-base.d: Skip for non-ELF ARM targets.
* testsuite/gas/arm/archv8m-cmse-main-1.d: Likewise.
* testsuite/gas/arm/archv8m-cmse-main-2.d: Likewise.
* testsuite/gas/arm/archv8m-cmse-msr-base.d: Likewise.
* testsuite/gas/arm/archv8m-cmse-msr-main.d: Likewise.
* testsuite/gas/arm/archv8m-main-dsp-1.d: Likewise.
* testsuite/gas/arm/archv8m-main-dsp-2.d: Likewise.
* testsuite/gas/arm/archv8m-main-dsp-3.d: Likewise.
* testsuite/gas/arm/archv8m-main-dsp-4.d: Likewise.
|
|
This patch enables Intel RDPID instruction described in Intel64 and
IA-32 Architectures Software Developer's Manual, April 2016.
gas/
* config/tc-i386.c (cpu_arch): Add RDPID.
* doc/c-i386.texi: Document RDPID.
gas/testsuite/
* gas/i386/i386.exp: Run RDPID tests.
* gas/i386/prefix.d: Adjust.
* gas/i386/rdpid.s: New test.
* gas/i386/rdpid.d: Ditto.
* gas/i386/rdpid-intel.d: Ditto.
* gas/i386/x86-64-rdpid.s: Ditto.
* gas/i386/x86-64-rdpid.d: Ditto.
* gas/i386/x86-64-rdpid-intel.d: Ditto.
opcodes/
* i386-dis.c (prefix_table): Add RDPID instruction.
* i386-gen.c (cpu_flag_init): Add RDPID flag.
(cpu_flags): Add RDPID bitfield.
* i386-opc.h (enum): Add RDPID element.
(i386_cpu_flags): Add RDPID field.
* i386-opc.tbl: Add RDPID instruction.
* i386-init.h: Regenerate.
* i386-tbl.h: Regenerate.
|
|
2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
bfd/
* elf32-arm.c (elf32_arm_size_stubs): Use new macros
ARM_GET_SYM_BRANCH_TYPE and ARM_SET_SYM_BRANCH_TYPE to respectively get
and set branch type of a symbol.
(bfd_elf32_arm_process_before_allocation): Likewise.
(elf32_arm_relocate_section): Likewise and fix identation along the
way.
(allocate_dynrelocs_for_symbol): Likewise.
(elf32_arm_finish_dynamic_symbol): Likewise.
(elf32_arm_swap_symbol_in): Likewise.
(elf32_arm_swap_symbol_out): Likewise.
gas/
* config/tc-arm.c (arm_adjust_symtab): Use ARM_SET_SYM_BRANCH_TYPE to
set branch type of a symbol.
gdb/
* arm-tdep.c (arm_elf_make_msymbol_special): Use
ARM_GET_SYM_BRANCH_TYPE to get branch type of a symbol.
include/
* arm.h (enum arm_st_branch_type): Add new ST_BRANCH_ENUM_SIZE
enumerator.
(NUM_ENUM_ARM_ST_BRANCH_TYPE_BITS): New macro.
(ENUM_ARM_ST_BRANCH_TYPE_BITMASK): Likewise.
(ARM_SYM_BRANCH_TYPE): Replace by ...
(ARM_GET_SYM_BRANCH_TYPE): This and ...
(ARM_SET_SYM_BRANCH_TYPE): This in two versions depending on whether
BFD_ASSERT is defined or not.
ld/
* emultempl/armelf.em (gld${EMULATION_NAME}_finish): Use
ARM_GET_SYM_BRANCH_TYPE to get branch type of a symbol.
opcodes/
* arm-dis.c (get_sym_code_type): Use ARM_GET_SYM_BRANCH_TYPE to get
branch type of a symbol.
(print_insn): Likewise.
|
|
2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
bfd/
(elf32_arm_merge_eabi_attributes): Add merging logic for
Tag_DSP_extension.
binutils/
* readelf.c (display_arm_attribute): Add output for Tag_DSP_extension.
(arm_attr_public_tags): Define DSP_extension attribute.
gas/
* NEWS: Document ARMv8-M and ARMv8-M Security and DSP Extensions.
* config/tc-arm.c (arm_ext_dsp): New feature for Thumb DSP
instructions.
(arm_extensions): Add dsp extension for ARMv8-M Mainline.
(aeabi_set_public_attributes): Memorize the feature bits of the
architecture selected for Tag_CPU_arch. Use it to set
Tag_DSP_extension to 1 for ARMv8-M Mainline with DSP extension.
(arm_convert_symbolic_attribute): Define Tag_DSP_extension.
* testsuite/gas/arm/arch7em-bad.d: Rename to ...
* testsuite/gas/arm/arch7em-bad-1.d: This.
* testsuite/gas/arm/arch7em-bad-2.d: New file.
* testsuite/gas/arm/arch7em-bad-3.d: Likewise.
* testsuite/gas/arm/archv8m-main-dsp-1.d: Likewise.
* testsuite/gas/arm/archv8m-main-dsp-2.d: Likewise.
* testsuite/gas/arm/archv8m-main-dsp-3.d: Likewise.
* testsuite/gas/arm/archv8m-main-dsp-4.d: Likewise.
* testsuite/gas/arm/archv8m-main-dsp-5.d: Likewise.
* testsuite/gas/arm/attr-march-armv8m.main.dsp.d: Likewise.
include/
* elf/arm.h (Tag_DSP_extension): Define.
ld/
* testsuite/ld-arm/arm-elf.exp (EABI attribute merging 10 (DSP)): New
test.
* testsuite/ld-arm/attr-merge-10b-dsp.s: New file.
* testsuite/ld-arm/attr-merge-10-dsp.attr: Likewise.
|
|
2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
gas/
* config/tc-arm.c (struct arm_option_extension_value_table): Make
allowed_archs an array with 2 entries.
(ARM_EXT_OPT): Adapt to only fill the first entry of allowed_archs.
(ARM_EXT_OPT2): New macro filling the two entries of allowed_archs.
(arm_extensions): Use separate entries in allowed_archs when several
archs are allowed to use an extension and change ARCH_ANY in
ARM_ARCH_NONE in allowed_archs.
(arm_parse_extension): Check that, for each allowed_archs entry, all
bits are set in the current architecture, ignoring ARM_ANY entries.
(s_arm_arch_extension): Likewise.
include/
* arm.h (ARM_FSET_CPU_SUBSET): Define macro.
|
|
2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
gas/
* config/tc-arm.c (arm_ext_m): Add feature bit ARM_EXT2_V8M_MAIN.
(arm_ext_v8m_main): New feature set for bit ARM_EXT2_V8M_MAIN.
(arm_ext_v8m_m_only): New feature set for instructions in ARMv8-M not
shared with a non M profile architecture.
(do_rn): New function.
(known_t32_only_insn): Check opcode against arm_ext_v8m_m_only rather
than arm_ext_v8m.
(v7m_psrs): Add ARMv8-M security extensions new special registers.
(insns): Add ARMv8-M Security Extensions instructions.
(aeabi_set_public_attributes): Use arm_ext_v8m_m_only instead of
arm_ext_v8m_m to decide the profile and the Thumb ISA.
* testsuite/gas/arm/archv8m-cmse.s: New file.
* testsuite/gas/arm/archv8m-cmse-main.s: Likewise..
* testsuite/gas/arm/archv8m-cmse-msr.s: Likewise.
* testsuite/gas/arm/any-cmse.d: Likewise.
* testsuite/gas/arm/any-cmse-main.d: Likewise.
* testsuite/gas/arm/archv8m-cmse-base.d: Likewise.
* testsuite/gas/arm/archv8m-cmse-msr-base.d: Likewise.
* testsuite/gas/arm/archv8m-cmse-main-1.d: Likewise.
* testsuite/gas/arm/archv8m-cmse-main-2.d: Likewise.
* testsuite/gas/arm/archv8m-cmse-msr-main.d: Likewise.
include/
* opcode/arm.h (ARM_EXT2_V8M_MAIN): new feature bit.
(ARM_AEXT2_V8M_MAIN): New architecture extension feature set.
(ARM_ARCH_V8M_MAIN): Use ARM_AEXT2_V8M_MAIN instead of ARM_AEXT2_V8M
for the high core bits.
opcodes/
* arm-dis.c (coprocessor_opcodes): Add entries for VFP ARMv8-M
Mainline Security Extensions instructions.
(thumb_opcodes): Add entries for narrow ARMv8-M Security
Extensions instructions.
(thumb32_opcodes): Add entries for wide ARMv8-M Security Extensions
instructions.
(psr_name): Add new MSP_NS and PSP_NS ARMv8-M Security Extensions
special registers.
|
|
opcodes/ChangeLog:
2016-05-09 Jose E. Marchesi <jose.marchesi@oracle.com>
* sparc-opc.c (sparc_opcodes): Fix mnemonic of faligndatai.
gas/ChangeLog:
2016-05-09 Jose E. Marchesi <jose.marchesi@oracle.com>
* testsuite/gas/sparc/sparc5vis4.s: Fix mnemonic of faligndatai.
* testsuite/gas/sparc/sparc5vis4.d: Likewise.
|
|
|
|
* config/tc-arm.c (fpu_arch_vfp_v1): Mark with ATTRIBUTE_UNUSED.
(fpu_arch_vfp_v3): Likewise.
(fpu_arch_neon_v1): Likewise.
(arm_arch_full): Likewise.
(parse_neon_el_struct_list): Initialize fields of firsttype.
|
|
gas/
2016-05-03 Claudiu Zissulescu <claziss@synopsys.com>
* config/tc-arc.c (syntaxclass): Add SYNTAX_NOP and SYNTAX_1OP.
(arc_extinsn): Handle new introduced syntax.
* testsuite/gas/arc/textinsn1op.d: New file.
* testsuite/gas/arc/textinsn1op.s: Likewise.
* doc/c-arc.texi: Document SYNTAX_NOP and SYNTAX_1OP.
opcodes/
2016-05-03 Claudiu Zissulescu <claziss@synopsys.com>
* arc-ext.c (dump_ARC_extmap): Handle SYNATX_NOP and SYNTAX_1OP.
(arcExtMap_genOpcode): Likewise.
* arc-opc.c (arg_32bit_rc): Define new variable.
(arg_32bit_u6): Likewise.
(arg_32bit_limm): Likewise.
include/
2016-05-03 Claudiu Zissulescu <claziss@synopsys.com>
* opcode/arc.h (ARC_SYNTAX_1OP): Declare
(ARC_SYNTAX_NOP): Likewsie.
(ARC_OP1_MUST_BE_IMM): Update defined value.
(ARC_OP1_IMM_IMPLIED): Likewise.
(arg_32bit_rc, arg_32bit_u6, arg_32bit_limm): Declare.
|
|
specified.
* testsuite/gas/lns/lns.exp: Add avr to list of targets using
DW_LNS_fixed_advance_pc.
|
|
and some tidies in as.h
* as.h (inline, __PTR_TO_INT, __INT_TO_PTR): Don't define.
(xmemdup0): New inline function.
|
|
Correct a regression introduced with commit 919731affbef ("Add MIPS
.module directive") causing code like:
.set mips3
dli $2, 0x9000000080000000
to fail assembly with the following error message produced:
Error: number (0x9000000080000000) larger than 32 bits
if built with `mips3' selected as the global ISA (e.g. `-march=mips3').
This is because a `.set' directive doing an ISA override does not lift
the ABI restriction on register sizes if the ISA remains unchanged.
Previously the directive always set register sizes from the ISA chosen,
which is what some code expects. Restore the old semantics then.
gas/
* config/tc-mips.c (code_option_type): New enum.
(parse_code_option): Return status indicating option type.
(s_mipsset): Update `parse_code_option' call site accordingly.
Always set register sizes from the ISA with ISA overrides.
(s_module): Update `parse_code_option' call site.
* testsuite/gas/mips/isa-override-1.d: New test.
* testsuite/gas/mips/micromips@isa-override-1.d: New test.
* testsuite/gas/mips/mips1@isa-override-1.d: New test.
* testsuite/gas/mips/mips2@isa-override-1.d: New test.
* testsuite/gas/mips/mips32@isa-override-1.d: New test.
* testsuite/gas/mips/mips32r2@isa-override-1.d: New test.
* testsuite/gas/mips/mips32r3@isa-override-1.d: New test.
* testsuite/gas/mips/mips32r5@isa-override-1.d: New test.
* testsuite/gas/mips/mips32r6@isa-override-1.d: New test.
* testsuite/gas/mips/mips64r2@isa-override-1.d: New test.
* testsuite/gas/mips/mips64r3@isa-override-1.d: New test.
* testsuite/gas/mips/mips64r5@isa-override-1.d: New test.
* testsuite/gas/mips/mips64r6@isa-override-1.d: New test.
* testsuite/gas/mips/r3000@isa-override-1.d: New test.
* testsuite/gas/mips/r3900@isa-override-1.d: New test.
* testsuite/gas/mips/r5900@isa-override-1.d: New test.
* testsuite/gas/mips/octeon@isa-override-1.d: New test.
* testsuite/gas/mips/octeon3@isa-override-1.d: New test.
* testsuite/gas/mips/isa-override-2.l: New list test.
* testsuite/gas/mips/mips1@isa-override-2.l: New list test.
* testsuite/gas/mips/mips2@isa-override-2.l: New list test.
* testsuite/gas/mips/mips32@isa-override-2.l: New list test.
* testsuite/gas/mips/mips32r2@isa-override-2.l: New list test.
* testsuite/gas/mips/mips32r3@isa-override-2.l: New list test.
* testsuite/gas/mips/mips32r5@isa-override-2.l: New list test.
* testsuite/gas/mips/mips32r6@isa-override-2.l: New list test.
* testsuite/gas/mips/r3000@isa-override-2.l: New list test.
* testsuite/gas/mips/r3900@isa-override-2.l: New list test.
* testsuite/gas/mips/octeon3@isa-override-2.l: New list test.
* testsuite/gas/mips/octeon3@isa-override-1.l: New stderr
output.
* testsuite/gas/mips/isa-override-1.s: New test source.
* testsuite/gas/mips/r5900@isa-override-1.s: New test source.
* testsuite/gas/mips/isa-override-2.s: New test source.
* testsuite/gas/mips/mips1@isa-override-2.s: New test source.
* testsuite/gas/mips/mips2@isa-override-2.s: New test source.
* testsuite/gas/mips/mips32@isa-override-2.s: New test source.
* testsuite/gas/mips/mips32r2@isa-override-2.s: New test source.
* testsuite/gas/mips/mips32r3@isa-override-2.s: New test source.
* testsuite/gas/mips/mips32r5@isa-override-2.s: New test source.
* testsuite/gas/mips/mips32r6@isa-override-2.s: New test source.
* testsuite/gas/mips/r3000@isa-override-2.s: New test source.
* testsuite/gas/mips/r3900@isa-override-2.s: New test source.
* testsuite/gas/mips/octeon3@isa-override-2.s: New test source.
* testsuite/gas/mips/mips.exp: Run the new tests.
|
|
This includes regenerating a bunch of files in opcodes/ with trunk cgen.
gprof/ChangeLog:
2016-04-20 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
* basic_blocks.c: Update old style function definitions.
* cg_arcs.c: Likewise.
* cg_print.c: Likewise.
* gen-c-prog.awk: Likewise.
* gmon_io.c: Likewise.
* hertz.c: Likewise.
* hist.c: Likewise.
* sym_ids.c: Likewise.
bfd/ChangeLog:
2016-04-20 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
* cache.c: Update old style function definitions.
* elf32-m68k.c: Likewise.
* elf64-mmix.c: Likewise.
* stab-syms.c: Likewise.
opcodes/ChangeLog:
2016-04-20 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
* alpha-dis.c: Regenerate.
* crx-dis.c: Likewise.
* disassemble.c: Likewise.
* epiphany-opc.c: Likewise.
* fr30-opc.c: Likewise.
* frv-opc.c: Likewise.
* ip2k-opc.c: Likewise.
* iq2000-opc.c: Likewise.
* lm32-opc.c: Likewise.
* lm32-opinst.c: Likewise.
* m32c-opc.c: Likewise.
* m32r-opc.c: Likewise.
* m32r-opinst.c: Likewise.
* mep-opc.c: Likewise.
* mt-opc.c: Likewise.
* or1k-opc.c: Likewise.
* or1k-opinst.c: Likewise.
* tic80-opc.c: Likewise.
* xc16x-opc.c: Likewise.
* xstormy16-opc.c: Likewise.
ld/ChangeLog:
2016-04-20 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
* emultempl/scoreelf.em: Likewise.
binutils/ChangeLog:
2016-04-20 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
* resres.c: Likewise.
gas/ChangeLog:
2016-04-20 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
* cgen.c: Likewise.
* config/tc-bfin.c: Likewise.
* config/tc-ia64.c: Likewise.
* config/tc-mep.c: Likewise.
* config/tc-metag.c: Likewise.
* config/tc-nios2.c: Likewise.
* config/tc-rl78.c: Likewise.
|
|
Add nps400 to the list of acceptable values for the -mcpu command line
switch, and to the .cpu directive.
I've added an extra cross reference from -mcpu to .cpu to improve
navigation of the documentation.
gas/ChangeLog:
* doc/c-arc.texi (ARC Options): Add nps400 to list of valus for
-mcpu. Add cross reference to .cpu directive from -mcpu option.
(ARC Directives): Add NPS400 to .cpu directive list.
|
|
The RAS extension was introduced as part of the ARMv8.2 architecture
where it is a required feature. It is also available as an optional
feature for ARMv8 and ARMv8.1. In binutils, the RAS extension is
currently enabled by default for -march=armv8.2-a but is not available
for -march=armv8 or -march=armv8.1-a.
This patch adds the feature extension '+ras' to enable the RAS extension
for ARMv8 and ARMv8.1, it is disabled by default.
gas/
2016-04-20 Matthew Wahab <matthew.wahab@arm.com>
* config/tc-aarch64.c (aarch64_features): Add "ras".
* doc/c-aarch64.texi (AArch64 Extensions): Add "ras".
* testsuite/gas/aarch64/armv8-ras-1.d: New.
* testsuite/gas/aarch64/armv8-ras-1.s: New.
* testsuite/gas/aarch64/illegal-ras-1.d: New.
* testsuite/gas/aarch64/illegal-ras-1.s: New.
Change-Id: I824fb9bc8cf846bcc03aa17a726efb1350d78b9d
|
|
Add some more arc/nps400 instructions and the associated operands.
There's also a test added into the assembler.
gas/ChangeLog:
* testsuite/gas/arc/nps400-6.d: New file.
* testsuite/gas/arc/nps400-6.s: New file.
include/ChangeLog:
* opcode/arc.h (MAX_INSN_ARGS): Increase 6 to 8.
opcodes/ChangeLog:
* arc-nps400-tbl.h: Add addb, subb, adcb, sbcb, andb, xorb, orb,
fxorb, wxorb, shlb, shrb, notb, cntbb, div, mod, divm, and qcmp
instructions.
* arc-opc.c (insert_nps_bitop_size): Delete.
(extract_nps_bitop_size): Delete.
(MAKE_SRC_POS_INSERT_EXTRACT_FUNCS): Define, and use.
(extract_nps_qcmp_m3): Define.
(extract_nps_qcmp_m2): Define.
(extract_nps_qcmp_m1): Define.
(arc_flag_operands): Add F_NPS_SX, F_NPS_AR, F_NPS_AL.
(arc_flag_classes): Add C_NPS_SX, C_NPS_AR_AL
(arc_operands): Add NPS_SRC2_POS, NPS_SRC1_POS, NPS_ADDB_SIZE,
NPS_ANDB_SIZE, NPS_FXORB_SIZ, NPS_WXORB_SIZ, NPS_R_XLDST,
NPS_DIV_UIMM4, NPS_QCMP_SIZE, NPS_QCMP_M1, NPS_QCMP_M2, and
NPS_QCMP_M3.
|
|
Add dctcp, dcip, dcet, and dcacl instructions.
gas/ChangeLog:
* testsuite/gas/arc/nps400-4.d: New file.
* testsuite/gas/arc/nps400-4.s: New file.
* testsuite/gas/arc/nps400-5.d: New file.
* testsuite/gas/arc/nps400-5.s: New file.
include/ChangeLog:
* opcode/arc.h (insn_class_t): Add NET and ACL class.
opcodes/ChangeLog:
* arc-nps400-tbl.h: Add dctcp, dcip, dcet, and dcacl instructions.
|
|
* doc/as.texinfo (.cfi_remember_state, .cfi_restore_state): Improve
documentation.
|
|
This reverts commit 9a452709fe126ea6da23a53426362e4435d2dc06.
This change was committed as obvious, but it has been rightly been
pointed out to me that this change is not obvious, and as such I am
reverting it.
gas/ChangeLog:
Revert prevous change.
* config/tc-arc.c (arc_option): Make .cpu directive
case-sensitive again.
|
|
gas/ChangeLog:
* config/tc-arc.c (arc_option): Make .cpu directive
case-insensitive.
|
|
gas/ChangeLog:
* config/tc-arc.c (arc_option): Allow NPS400 in .cpu directive.
|
|
Presumably this was supposed to be regname[sizeof (regname) - 1] but was typoed
to regname[sizeof (rename) - 1]. However that should be unnecessary because
sprintf should null terminate. As is this assignment is invalid ISO C because
rename refers to the function rename (), and sizeof on functions is undefined.
In GNU C C the size of functions is 1 so the expression is the same as
regname[0]. The following call to sprintf () clearly will over right that, so
the statement either has no effect or is invalid. Given that it seems safe to
just remove it. While we are there correct the size of regname, and switch
from snprintf to sprintf since we know the exact length of the result.
gas/ChangeLog:
2016-04-15 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
* config/tc-mips.c (md_begin): Remove useless assignment.
|
|
bfd/
* Makefile.in: Regenerated with automake 1.11.6.
* aclocal.m4: Likewise.
* doc/Makefile.in: Likewise.
binutils/
* Makefile.in: Regenerated with automake 1.11.6.
* aclocal.m4: Likewise.
* doc/Makefile.in: Likewise.
gas/
* Makefile.in: Regenerated with automake 1.11.6.
* aclocal.m4: Likewise.
* doc/Makefile.in: Likewise.
gold/
* Makefile.in: Regenerated with automake 1.11.6.
* aclocal.m4: Likewise.
* testsuite/Makefile.in: Likewise.
gprof/
* Makefile.in: Regenerated with automake 1.11.6.
* aclocal.m4: Likewise.
ld/
* Makefile.in: Regenerated with automake 1.11.6.
* aclocal.m4: Likewise.
opcodes/
* Makefile.in: Regenerated with automake 1.11.6.
* aclocal.m4: Likewise.
|
|
* config/tc-ppc.c (toc_reloc_types): Wrap in #ifdef OBJ_ELF
|
|
|
