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GCC 11 passes --gdwarf-5 to assembler to enable DWARF5 debug info. Don't
disable relaxation when --gdwarf-N is specified. The assembler generated
debug information will treat the sequence of the relaxed instructions as
a single instruction.
PR gas/27243
* config/tc-nios2.c (md_begin): Don't disable relaxation with
--gdwarf-N.
* testsuite/gas/nios2/relax.d: New file.
* testsuite/gas/nios2/relax.s: Likewise.
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This replaces skip and notarget in a number of gas tests with xfail,
the idea being that running tests might expose segmentation faults or
other serious errors even when we don't expect a test to pass. Doing
so showed a number of cases where tests now pass, which is another
reason to avoid profligate use of notarget and skip.
* testsuite/gas/all/local-label-overflow.d: Use xfail rather than
notarget all except hppa. Comment.
* testsuite/gas/all/sleb128-2.d: Use xfail rather than notarget.
* testsuite/gas/all/sleb128-4.d: Likewise. Don't skip msp430.
* testsuite/gas/all/sleb128-5.d: Use xfail rather than notarget.
* testsuite/gas/all/sleb128-7.d: Likewise.
* testsuite/gas/all/sleb128-9.d: Likewise.
* testsuite/gas/elf/bignums.d: Likewise.
* testsuite/gas/elf/group0c.d: Likewise.
* testsuite/gas/elf/group1a.d: Likewise.
* testsuite/gas/elf/section-symbol-redef.d: Likewise.
* testsuite/gas/elf/section15.d: Likewise.
* testsuite/gas/elf/section4.d: Likewise.
* testsuite/gas/elf/section7.d: Likewise.
* testsuite/gas/macros/irp.d: Likewise.
* testsuite/gas/macros/repeat.d: Likewise.
* testsuite/gas/macros/rept.d: Likewise.
* testsuite/gas/macros/test2.d: Likewise.
* testsuite/gas/macros/vararg.d: Likewise.
* testsuite/gas/all/string.d: Use xfail rather than skip.
* testsuite/gas/elf/missing-build-notes.d: Likewise.
* testsuite/gas/elf/section0.d: Likewise.
* testsuite/gas/elf/section1.d: Likewise.
* testsuite/gas/elf/section10.d: Likewise.
* testsuite/gas/elf/section11.d: Likewise.
* testsuite/gas/elf/section6.d: Likewise.
* testsuite/gas/elf/symtab.d: Use xfail rather than skip, adjust hppa.
* testsuite/gas/elf/symtab.s: Don't start directives in first column.
* testsuite/gas/macros/test3.d: Don't notarget nds32.
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skip *-*-* is a little silly, delete the test.
* testsuite/gas/all/byte.d,
* testsuite/gas/all/byte.l,
* testsuite/gas/all/byte.s: Delete.
* testsuite/gas/all/gas.exp: Don't run byte test.
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This failed on ft32, hppa, and mips-irix targets. In the case of ft32
the problem was iterating over an array in reverse and not using the
proper condition, so BFD_RELOC_NONE was not recognised.
bfd/
* elf32-ft32.c (ft32_reloc_type_lookup): Don't miss ft32_reloc_map[0].
gas/
PR 27282
* testsuite/gas/all/none.d: Replace skip with xfail, don't xfail ft32.
* testsuite/gas/elf/pr27228.d: xfail hppa and allow OBJECT match.
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PR gas/27228
* testsuite/gas/elf/elf.exp: Run pr27228.
* testsuite/gas/elf/pr27228.d: New file.
* testsuite/gas/elf/pr27228.s: Likewise.
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Local symbols are of course supposed to be defined by their object
file, but in other cases a local symbol is promoted to global by gas
if undefined and referenced. This patch stops gas wrongly replacing a
local undefined symbol with the undefined section symbol, resulting in
a .reloc undefined local symbol being emitted as global.
PR 27228
* write.c (resolve_reloc_expr_symbols): Don't assume local symbol
is defined.
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PR 27221
* dwarf2dbg.c (dwarf2_gen_line_info_1): Don't warn about ignored
line number info when gas is generating it.
* testsuite/gas/elf/dwarf2-20.d: Adjust to not expect warnings.
* testsuite/gas/m68hc11/indexed12.d: Likewise.
* testsuite/gas/elf/elf.exp: Don't run warn-2.
* gas/testsuite/gas/elf/warn-2.s: Delete.
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PR 27218
* dwarf2dbg.c (dwarf2_gen_line_info): Correct setting of dwarf_level.
(dwarf2_directive_filename, dwarf2_directive_loc): Likewise, and
error for negative file numbers.
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PowerPC version of git commit d1bcae833b.
bfd/
* elf32-ppc.c: Delete outdated comment.
(TARGET_KEEP_UNUSED_SECTION_SYMBOLS): Define.
* elf64-ppc.c (TARGET_KEEP_UNUSED_SECTION_SYMBOLS): Define.
gas/
* testsuite/gas/ppc/power4.d: Adjust for removal of section sym.
* testsuite/gas/ppc/test1elf32.d: Likewise.
* testsuite/gas/ppc/test1elf64.d: Likewise.
ld/
* testsuite/ld-powerpc/relbrlt.s: Make symbols global.
* testsuite/ld-powerpc/relbrlt.d: Adjust to suit.
* testsuite/ld-powerpc/tlsget.d: Adjust for reordered stubs.
* testsuite/ld-powerpc/tlsget.wf: Likewise.
* testsuite/ld-powerpc/tlsget2.d: Likewise.
* testsuite/ld-powerpc/tlsget2.wf: Likewise.
* testsuite/ld-powerpc/tlsexe.r: Adjust for removed section syms.
* testsuite/ld-powerpc/tlsexe32.r: Likewise.
* testsuite/ld-powerpc/tlsexe32no.r: Likewise.
* testsuite/ld-powerpc/tlsexeno.r: Likewise.
* testsuite/ld-powerpc/tlsexenors.r: Likewise.
* testsuite/ld-powerpc/tlsexers.r: Likewise.
* testsuite/ld-powerpc/tlsexetoc.r: Likewise.
* testsuite/ld-powerpc/tlsexetocrs.r: Likewise.
* testsuite/ld-powerpc/tlsso.r: Likewise.
* testsuite/ld-powerpc/tlsso32.r: Likewise.
* testsuite/ld-powerpc/tlstocso.r: Likewise.
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Currently
$ as -o x.o x.s
fails when x.s contains DWARF5 ".file 0" or ".loc 0" directives. Update
assembler to automatically enable DWARF5 support so that
$ gcc -S -g -c x.c
$ gcc -c x.s
works.
PR gas/27195
* dwarf2dbg.c (dwarf2_gen_line_info): Set dwarf_level to 5 if
needed.
(dwarf2_directive_filename): Likewise.
(dwarf2_directive_loc): Likewise.
* testsuite/gas/elf/dwarf-5-file0.d: Pass --gdwarf-3.
* testsuite/gas/lns/lns-diag-1.l: Remove the
"Error: file number less than one" errors.
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Fix a NULL dereference seen when assembling invalid input.
PR 27198
* config/tc-i386.c (need_plt32_p): Return FALSE for NULL symbol.
* testsuite/gas/i386/pr27198.d,
* gas/testsuite/gas/i386/pr27198.err,
* gas/testsuite/gas/i386/pr27198.s: New test.
* gas/testsuite/gas/i386/i386.exp: Run it.
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bfd/
* elfnn-riscv.c: Indent, labels and GNU coding standards tidy,
also aligned the code.
gas/
* config/tc-riscv.c: Indent and GNU coding standards tidy,
also aligned the code.
* config/tc-riscv.h: Likewise.
include/
* opcode/riscv.h: Indent and GNU coding standards tidy,
also aligned the code.
opcodes/
* riscv-opc.c (riscv_gpr_names_abi): Aligned the code.
(riscv_fpr_names_abi): Likewise.
(riscv_opcodes): Likewise.
(riscv_insn_types): Likewise.
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Error and warning messages usually starting with lower case letter,
and without the period at the end. Besides, add the prefixed "internel:"
at the beginning of the messages when they are caused internally.
Also fix indents and typos.
bfd/
* elfnn-riscv.c (riscv_merge_attributes): Fix typos of messages.
gas/
* config/tc-riscv.c: Error and warning messages tidy.
* testsuite/gas/riscv/priv-reg-fail-fext.l: Updated.
* testsuite/gas/riscv/priv-reg-fail-read-only-01.l: Likewise.
* testsuite/gas/riscv/priv-reg-fail-read-only-02.l: Likewise.
* testsuite/gas/riscv/priv-reg-fail-rv32-only.l: Likewise.
* testsuite/gas/riscv/priv-reg-fail-version-1p10.l: Likewise.
* testsuite/gas/riscv/priv-reg-fail-version-1p11.l: Likewise.
* testsuite/gas/riscv/priv-reg-fail-version-1p9p1.l: Likewise.
ld/
* testsuite/ld-riscv-elf/attr-merge-priv-spec-failed-01.d: Updated.
* testsuite/ld-riscv-elf/attr-merge-priv-spec-failed-02.d: Likewise.
* testsuite/ld-riscv-elf/attr-merge-priv-spec-failed-03.d: Likewise.
* testsuite/ld-riscv-elf/attr-merge-priv-spec-failed-04.d: Likewise.
* testsuite/ld-riscv-elf/attr-merge-priv-spec-failed-05.d: Likewise.
* testsuite/ld-riscv-elf/attr-merge-priv-spec-failed-06.d: Likewise.
opcodes/
* riscv-dis.c (parse_riscv_dis_option): Fix typos of message.
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The GNU coding standards said the comments should be complete sentences
and end with a period and two spaces. But sometimes it should be more
cleaner when the comments only include a word or codes. Therefore, I made
the following changes after referring to other target/generic codes,
* Try to write sentences in comments, must end with a period and two spaces.
* End with two spaces without a period for codes/instructions only.
* End with one space without a period for a single word/variable only.
Besids, also rewrite/remove some comments which are obsolete or too long,
and fix indents for comments.
bfd/
* elfnn-riscv.c: Comments tidy and improvement.
* elfxx-riscv.c: Likewise.
* elfxx-riscv.h: Likewise.
gas/
* config/tc-riscv.c: Comments tidy and improvement. Also update
comment "fallthru" to "Fall through" that end with a period and
two spaces.
include/
* elf/riscv.h: Comments tidy and improvement.
* opcode/riscv-opc.h: Likewise.
* opcode/riscv.h: Likewise.
opcodes/
* riscv-dis.c: Comments tidy and improvement.
* riscv-opc.c: Likewise.
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These aren't specific to ELF at all, and seem generally useful.
So pull them out of the ELF backend and into the common core.
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The makefile has comments about old versions of bison/yacc generating
warnings, but that doesn't apply to the lexer which comes from flex.
As far as I can tell, the warnings in the Blackfin lexer can be fixed
with defines that have been supported back through flex in 2002. So
lets turn on -Werror for it and see if anyone notices. If they do,
they can report their exact tool versions so we can record that here.
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Don't generate the _GLOBAL_OFFSET_TABLE_ symbol for PLT relocations
since it isn't needed.
PR gas/27178
* config/tc-i386.c (lex_got::gotrel): Add need_GOT_symbol.
Don't generate GOT_symbol for PLT relocations.
* testsuite/gas/i386/i386.exp: Run PR gas/27178 tests.
* testsuite/gas/i386/no-got.d: New file.
* testsuite/gas/i386/no-got.s: Likewise.
* testsuite/gas/i386/x86-64-no-got.d: Likewise.
* testsuite/gas/i386/x86-64-no-got.s: Likewise.
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bfd/
* Makefile.in: Regenerate.
* doc/Makefile.in: Regenerate.
binutils/
* Makefile.in: Regenerate.
* doc/Makefile.in: Regenerate.
gas/
* Makefile.in: Regenerate.
* Makefile.in: Regenerate.
gprof/
* Makefile.in: Regenerate.
ld/
* Makefile.in: Regenerate.
libctf/
* Makefile.in: Regenerate.
opcodes/
* Makefile.in: Regenerate.
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Compiling binutils using -flto=jobserver with GCC 11 leads to
libtool: link: gcc -W -Wall -Wstrict-prototypes -Wmissing-prototypes -Wshadow -Wstack-usage=262144 -Wwrite-strings -I../../gas/../zlib -g -O2 -fprofile-generate -flto=jobserver -o as-new app.o as.o atof-generic.o compress-debug.o cond.o depend.o dwarf2dbg.o dw2gencfi.o ecoff.o ehopt.o expr.o flonum-copy.o flonum-konst.o flonum-mult.o frags.o hash.o input-file.o input-scrub.o listing.o literal.o macro.o messages.o output-file.o read.o remap.o sb.o stabs.o subsegs.o symbols.o write.o config/tc-i386.o config/obj-elf.o config/atof-ieee.o ../opcodes/.libs/libopcodes.a ../bfd/.libs/libbfd.a -L/tmp/binutils-gdb/objdir/zlib -lz ../libiberty/libiberty.a -ldl
lto-wrapper: warning: jobserver is not available: '--jobserver-auth=' is not present in 'MAKEFLAGS'
since the '+' is missing on the recipe line in Makefiles generated by
automake. Add the '+' to the recipe line by hand.
bfd/
PR binutils/26792
* configure.ac: Use GNU_MAKE_JOBSERVER.
* aclocal.m4: Regenerated.
* configure: Likewise.
binutils/
PR binutils/26792
* configure.ac: Use GNU_MAKE_JOBSERVER.
* aclocal.m4: Regenerated.
* configure: Likewise.
config/
PR binutils/26792
* jobserver.m4: New file.
gas/
PR binutils/26792
* configure.ac: Use GNU_MAKE_JOBSERVER.
* aclocal.m4: Regenerated.
* configure: Likewise.
gprof/
PR binutils/26792
* configure.ac: Use GNU_MAKE_JOBSERVER.
* aclocal.m4: Regenerated.
* configure: Likewise.
ld/
PR binutils/26792
* configure.ac: Use GNU_MAKE_JOBSERVER.
* aclocal.m4: Regenerated.
* configure: Likewise.
libctf/
PR binutils/26792
* configure.ac: Use GNU_MAKE_JOBSERVER.
* aclocal.m4: Regenerated.
* configure: Likewise.
opcodes/
PR binutils/26792
* configure.ac: Use GNU_MAKE_JOBSERVER.
* aclocal.m4: Regenerated.
* configure: Likewise.
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Check if AR works with --plugin and rc before passing --plugin to AR and
RANLIB.
bfd/
PR ld/27173
binutils/
PR ld/27173
* configure: Regenerated.
gas/
PR ld/27173
* configure: Regenerated.
gprof/
PR ld/27173
* configure: Regenerated.
ld/
PR ld/27173
* configure: Regenerated.
libctf/
PR ld/27173
* configure: Regenerated.
opcodes/
PR ld/27173
* configure: Regenerated.
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This patch removes support for the CSRE extension from aarch64
gas/objdump.
CSRE (FEAT_CSRE) is part of the Future Architecture Technologies program
and at this time Arm is withdrawing this particular feature.
The patch removes the system registers and the CSR PDEC instruction.
gas/ChangeLog
* NEWS: Remove CSRE.
* config/tc-aarch64.c (parse_csr_operand): Delete.
(parse_operands): Delete handling of AARCH64_OPND_CSRE_CSR.
(aarch64_features): Remove csre.
* doc/c-aarch64.texi: Remove CSRE.
* testsuite/gas/aarch64/csre.d: Delete.
* testsuite/gas/aarch64/csre-invalid.s: Likewise.
* testsuite/gas/aarch64/csre-invalid.d: Likewise.
* testsuite/gas/aarch64/csre_csr.s: Likewise.
* testsuite/gas/aarch64/csre_csr.d: Likewise.
* testsuite/gas/aarch64/csre_csr-invalid.s: Likewise.
* testsuite/gas/aarch64/csre_csr-invalid.l: Likewise.
* testsuite/gas/aarch64/csre_csr-invalid.d: Likewise.
include/ChangeLog
* opcode/aarch64.h (AARCH64_FEATURE_CSRE): Delete.
(aarch64_opnd): Delete AARCH64_OPND_CSRE_CSR.
opcodes/ChangeLog
* aarch64-asm-2.c: Regenerate.
* aarch64-dis-2.c: Likewise.
* aarch64-opc-2.c: Likewise.
* aarch64-opc.c (aarch64_print_operand): Delete handling of
AARCH64_OPND_CSRE_CSR.
* aarch64-tbl.h (aarch64_feature_csre): Delete.
(CSRE): Likewise.
(_CSRE_INSN): Likewise.
(aarch64_opcode_table): Delete csr.
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Detect GCC LTO plugin. Pass --plugin to AR and RANLIB to support LTO
build.
bfd/
* configure: Regenerated.
binutils/
* configure: Regenerated.
gas/
* configure: Regenerated.
gprof/
* configure: Regenerated.
ld/
* configure: Regenerated.
libctf/
* configure: Regenerated.
opcodes/
* configure: Regenerated.
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POWER10 adds some return-oriented programming (ROP) instructions and
this patch adds support for them. You will notice that they are enabled
for POWER8 and later, not just POWER10 and later. This is on purpose.
This allows the instructions to be added to POWER8 binaries that can be
run on POWER8, POWER9 and POWER10 cpus. On POWER8 and POWER9, these
instructions just act as nop's.
opcodes/
* ppc-opc.c (insert_dw, (extract_dw): New functions.
(DW, (XRC_MASK): Define.
(powerpc_opcodes) <hashchk, hashchkp, hashst, haststp>: New mnemonics.
gas/
* testsuite/gas/ppc/rop-checks.d,
* testsuite/gas/ppc/rop-checks.l,
* testsuite/gas/ppc/rop-checks.s,
* testsuite/gas/ppc/rop.d,
* testsuite/gas/ppc/rop.s: New tests.
* testsuite/gas/ppc/ppc.exp: Run them.
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commit f478212851 did the regen by hand, missed a change in
ld/configure and didn't update line numbers. Fix that, and an old
regen of ld/Makefile.in with the wrong automake.
bfd/
* configure: Regenerate.
binutils/
* configure: Regenerate.
gas/
* configure: Regenerate.
gprof/
* configure: Regenerate.
ld/
* Makefile.in: Regenerate.
* configure: Regenerate.
libctf/
* configure: Regenerate.
opcodes/
* configure: Regenerate.
zlib/
* configure: Regenerate.
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47a889a4ca20 ("Improve GNU/Hurd support.") fixed detection of shlibpath_overrides_runpath, thus avoiding unnecessary relink. This backports it.
. * libtool.m4: Match gnu* along other GNU systems.
*/ChangeLog:
* configure: Re-generate.
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For ELF targets, section symbols are required only for relocations.
With -ffunction-sections -fdata-sections, there can be many unused
section symbols. Sizes of libstdc++.a on Linux/x86-64 in GCC 11 are
With unused section symbols : 39411698 bytes
Without unused section symbols: 39227002 bytes
The unused section symbols in libstdc++.a occupy more than 180 KB.
Add BSF_SECTION_SYM_USED to indicate if a section symbol should be
included in the symbol table. The BSF_SECTION_SYM_USED should be set
if the section symbol is used for relocation or the section symbol is
always included in the symbol table.
Add keep_unused_section_symbols to bfd_target to indicate if unused
section symbols should be kept. If TARGET_KEEP_UNUSED_SECTION_SYMBOLS
is defined as FALSE, unused ection symbols will be removed.
Tested on Linux/x86. Other ELF backends need to:
1. Define TARGET_KEEP_UNUSED_SECTION_SYMBOLS to FALSE.
2. Mark used section symbols in assembler backend.
3. Remove unused section symbols from expected assembler and linker
outputs.
bfd/
PR 27109
* aix386-core.c (core_aix386_vec): Initialize
keep_unused_section_symbol to TARGET_KEEP_UNUSED_SECTION_SYMBOLS.
* aout-target.h (MY (vec)): Likewise.
* binary.c (binary_vec): Likewise.
* cisco-core.c (core_cisco_be_vec): Likewise.
(core_cisco_le_vec): Likewise.
* coff-alpha.c (alpha_ecoff_le_vec): Likewise.
* coff-i386.c (TARGET_SYM): Likewise.
(TARGET_SYM_BIG): Likewise.
* coff-ia64.c (TARGET_SYM): Likewise.
* coff-mips.c (mips_ecoff_le_vec): Likewise.
(mips_ecoff_be_vec): Likewise.
(mips_ecoff_bele_vec): Likewise.
* coff-rs6000.c (rs6000_xcoff_vec): Likewise.
(powerpc_xcoff_vec): Likewise.
* coff-sh.c (sh_coff_small_vec): Likewise.
(sh_coff_small_le_vec): Likewise.
* coff-tic30.c (tic30_coff_vec): Likewise.
* coff-tic54x.c (tic54x_coff0_vec): Likewise.
(tic54x_coff0_beh_vec): Likewise.
(tic54x_coff1_vec): Likewise.
(tic54x_coff1_beh_vec): Likewise.
(tic54x_coff2_vec): Likewise.
(tic54x_coff2_beh_vec): Likewise.
* coff-x86_64.c (TARGET_SYM): Likewise.
(TARGET_SYM_BIG): Likewise.
* coff64-rs6000.c (rs6000_xcoff64_vec): Likewise.
(rs6000_xcoff64_aix_vec): Likewise.
* coffcode.h (CREATE_BIG_COFF_TARGET_VEC): Likewise.
(CREATE_BIGHDR_COFF_TARGET_VEC): Likewise.
(CREATE_LITTLE_COFF_TARGET_VEC): Likewise.
* elfxx-target.h (TARGET_BIG_SYM): Likewise.
(TARGET_LITTLE_SYM): Likewise.
* hppabsd-core.c (core_hppabsd_vec): Likewise.
* hpux-core.c (core_hpux_vec): Likewise.
* i386msdos.c (i386_msdos_vec): Likewise.
* ihex.c (ihex_vec): Likewise.
* irix-core.c (core_irix_vec): Likewise.
* mach-o-target.c (TARGET_NAME): Likewise.
* mmo.c (mmix_mmo_vec): Likewise.
* netbsd-core.c (core_netbsd_vec): Likewise.
* osf-core.c (core_osf_vec): Likewise.
* pdp11.c (MY (vec)): Likewise.
* pef.c (pef_vec): Likewise.
(pef_xlib_vec): Likewise.
* plugin.c (plugin_vec): Likewise.
* ppcboot.c (powerpc_boot_vec): Likewise.
* ptrace-core.c (core_ptrace_vec): Likewise.
* sco5-core.c (core_sco5_vec): Likewise.
* som.c (hppa_som_vec): Likewise.
* srec.c (srec_vec): Likewise.
(symbolsrec_vec): Likewise.
* tekhex.c (tekhex_vec): Likewise.
* trad-core.c (core_trad_vec): Likewise.
* verilog.c (verilog_vec): Likewise.
* vms-alpha.c (alpha_vms_vec): Likewise.
* vms-lib.c (alpha_vms_lib_txt_vec): Likewise.
* wasm-module.c (wasm_vec): Likewise.
* xsym.c (sym_vec): Likewise.
* elf.c (ignore_section_sym): Return TRUE if BSF_SECTION_SYM_USED
isn't set.
(elf_map_symbols): Don't include ignored section symbols.
* elfcode.h (elf_slurp_symbol_table): Also set
BSF_SECTION_SYM_USED on STT_SECTION symbols.
* elflink.c (bfd_elf_final_link): Generated section symbols only
when emitting relocations or reqired.
* elfxx-x86.h (TARGET_KEEP_UNUSED_SECTION_SYMBOLS): New.
* syms.c (BSF_SECTION_SYM_USED): New.
* targets.c (TARGET_KEEP_UNUSED_SECTION_SYMBOLS): New.
(bfd_target): Add keep_unused_section_symbols.
(bfd_keep_unused_section_symbols): New.
* bfd-in2.h: Regenerated.
binutils/
PR 27109
* objcopy.c (copy_object): Handle section symbols for
non-relocatable inputs.
* testsuite/binutils-all/readelf.exp (readelf_test): Check
is_elf_unused_section_symbols.
* testsuite/binutils-all/readelf.s-64: Updated.
* testsuite/binutils-all/readelf.ss: Likewise.
* testsuite/binutils-all/readelf.ss-64: Likewise.
* testsuite/binutils-all/readelf.s-64-unused: New file.
* testsuite/binutils-all/readelf.ss-64-unused: Likewise.
* testsuite/binutils-all/readelf.ss-unused: Likewise.
* testsuite/lib/binutils-common.exp
(is_elf_unused_section_symbols): New proc.
gas/ChangeLog:
PR 27109
* read.c (s_reloc): Call symbol_mark_used_in_reloc on the
section symbol.
* subsegs.c (subseg_set_rest): Set BSF_SECTION_SYM_USED if needed.
* write.c (adjust_reloc_syms): Call symbol_mark_used_in_reloc
on the section symbol.
(set_symtab): Don't generate unused section symbols.
(maybe_generate_build_notes): Call symbol_mark_used_in_reloc
on the section symbol.
* config/obj-elf.c (elf_adjust_symtab): Call
symbol_mark_used_in_reloc on the group signature symbol.
* testsuite/gas/cfi/cfi-label.d: Remove unused section symbols
from expected output.
* testsuite/gas/elf/elf.exp (run_elf_list_test): Check
is_elf_unused_section_symbols.
* testsuite/gas/elf/section2.e: Updated.
* testsuite/gas/elf/section2.e-unused: New file.
* testsuite/gas/elf/symver.d: Remove unused section symbols.
* testsuite/gas/i386/ilp32/elf/symver.d: Likewise.
* testsuite/gas/i386/ilp32/x86-64-size-1.d: Likewise.
* testsuite/gas/i386/ilp32/x86-64-size-3.d: Likewise.
* testsuite/gas/i386/ilp32/x86-64-size-5.d: Likewise.
* testsuite/gas/i386/ilp32/x86-64-unwind.d: Likewise.
* testsuite/gas/i386/size-1.d: Likewise.
* testsuite/gas/i386/size-3.d: Likewise.
* testsuite/gas/i386/svr4.d: Likewise.
* testsuite/gas/i386/x86-64-size-1.d: Likewise.
* testsuite/gas/i386/x86-64-size-3.d: Likewise.
* testsuite/gas/i386/x86-64-size-5.d: Likewise.
* testsuite/gas/i386/x86-64-unwind.d: Likewise.
ld/
PR 27109
* testsuite/ld-elf/export-class.sd: Adjust the expected output.
* testsuite/ld-elf/loadaddr3b.d: Likewise.
* testsuite/ld-i386/ibt-plt-1.d: Likewise.
* testsuite/ld-i386/ibt-plt-2a.d: Likewise.
* testsuite/ld-i386/ibt-plt-2c.d: Likewise.
* testsuite/ld-i386/ibt-plt-3a.d: Likewise.
* testsuite/ld-i386/ibt-plt-3c.d: Likewise.
* testsuite/ld-i386/pr19636-1d.d: Likewise.
* testsuite/ld-i386/pr19636-1l.d: Likewise.
* testsuite/ld-i386/pr19636-2c.d: Likewise.
* testsuite/ld-ifunc/ifunc-2-i386-now.d: Likewise.
* testsuite/ld-ifunc/ifunc-2-local-i386-now.d: Likewise.
* testsuite/ld-ifunc/ifunc-2-local-x86-64-now.d: Likewise.
* testsuite/ld-ifunc/ifunc-2-x86-64-now.d: Likewise.
* testsuite/ld-ifunc/ifunc-21-x86-64.d: Likewise.
* testsuite/ld-ifunc/ifunc-22-x86-64.d: Likewise.
* testsuite/ld-ifunc/pr17154-i386-now.d: Likewise.
* testsuite/ld-ifunc/pr17154-i386.d: Likewise.
* testsuite/ld-ifunc/pr17154-x86-64-now.d: Likewise.
* testsuite/ld-ifunc/pr17154-x86-64.d: Likewise.
* testsuite/ld-x86-64/bnd-branch-1-now.d: Likewise.
* testsuite/ld-x86-64/bnd-ifunc-1-now.d: Likewise.
* testsuite/ld-x86-64/bnd-ifunc-2-now.d: Likewise.
* testsuite/ld-x86-64/bnd-ifunc-2.d: Likewise.
* testsuite/ld-x86-64/bnd-plt-1-now.d: Likewise.
* testsuite/ld-x86-64/bnd-plt-1.d: Likewise.
* testsuite/ld-x86-64/ibt-plt-1-x32.d: Likewise.
* testsuite/ld-x86-64/ibt-plt-1.d: Likewise.
* testsuite/ld-x86-64/ibt-plt-2a-x32.d: Likewise.
* testsuite/ld-x86-64/ibt-plt-2a.d: Likewise.
* testsuite/ld-x86-64/ibt-plt-2c-x32.d: Likewise.
* testsuite/ld-x86-64/ibt-plt-2c.d: Likewise.
* testsuite/ld-x86-64/ibt-plt-3a-x32.d: Likewise.
* testsuite/ld-x86-64/ibt-plt-3a.d: Likewise.
* testsuite/ld-x86-64/ibt-plt-3c-x32.d: Likewise.
* testsuite/ld-x86-64/ibt-plt-3c.d: Likewise.
* testsuite/ld-x86-64/pr19609-4e.d: Likewise.
* testsuite/ld-x86-64/pr19609-6a.d: Likewise.
* testsuite/ld-x86-64/pr19609-6b.d: Likewise.
* testsuite/ld-x86-64/pr19609-7b.d: Likewise.
* testsuite/ld-x86-64/pr19609-7d.d: Likewise.
* testsuite/ld-x86-64/pr19636-2l.d: Likewise.
* testsuite/ld-x86-64/pr20253-1d.d: Likewise.
* testsuite/ld-x86-64/pr20253-1h.d: Likewise.
* testsuite/ld-x86-64/pr21038b-now.d: Likewise.
* testsuite/ld-x86-64/pr21038b.d: Likewise.
* testsuite/ld-x86-64/pr21038c-now.d: Likewise.
* testsuite/ld-x86-64/pr21038c.d: Likewise.
* testsuite/ld-x86-64/pr23854.d: Likewise.
* testsuite/ld-x86-64/pr25416-3.d: Likewise.
* testsuite/ld-x86-64/pr25416-4.d: Likewise.
* testsuite/ld-i386/plt-pic.pd: Likewise.
* testsuite/ld-i386/plt-pic2.dd: Likewise.
* testsuite/ld-i386/plt.pd: Likewise.
* testsuite/ld-i386/plt2.dd: Likewise.
* testsuite/ld-i386/tlsbin.rd: Likewise.
* testsuite/ld-i386/tlsbin2.rd: Likewise.
* testsuite/ld-i386/tlsbindesc.rd: Likewise.
* testsuite/ld-i386/tlsdesc.rd: Likewise.
* testsuite/ld-i386/tlsgdesc.rd: Likewise.
* testsuite/ld-i386/tlsnopic.rd: Likewise.
* testsuite/ld-i386/tlspic.rd: Likewise.
* testsuite/ld-i386/tlspic2.rd: Likewise.
* testsuite/ld-x86-64/mpx3.dd: Likewise.
* testsuite/ld-x86-64/mpx3n.dd: Likewise.
* testsuite/ld-x86-64/mpx4.dd: Likewise.
* testsuite/ld-x86-64/mpx4n.dd: Likewise.
* testsuite/ld-x86-64/pe-x86-64-1.od: Likewise.
* testsuite/ld-x86-64/pe-x86-64-2.od: Likewise.
* testsuite/ld-x86-64/pe-x86-64-3.od: Likewise.
* testsuite/ld-x86-64/pe-x86-64-4.od: Likewise.
* testsuite/ld-x86-64/plt.pd: Likewise.
* testsuite/ld-x86-64/plt2.dd: Likewise.
* testsuite/ld-x86-64/tlsbin.rd: Likewise.
* testsuite/ld-x86-64/tlsbin2.rd: Likewise.
* testsuite/ld-x86-64/tlsbindesc.rd: Likewise.
* testsuite/ld-x86-64/tlsdesc.rd: Likewise.
* testsuite/ld-x86-64/tlsgdesc.rd: Likewise.
* testsuite/ld-x86-64/tlspic.rd: Likewise.
* testsuite/ld-x86-64/tlspic2.rd: Likewise.
* testsuite/ld-elf/sec64k.exp: Check
is_elf_unused_section_symbols.
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Add support for the pause hint instruction, as specified in the
Zihintpause extension. The pause instruction is encoded as a
special form of a memory fence (which is available as part of the
base instruction set). The chosen encoding does not mandate any
particular memory ordering and therefore is a true hint.
bfd/
* elfxx-riscv.c (riscv_std_z_ext_strtab): Added zihintpause.
gas/
* config/tc-riscv.c (riscv_multi_subset_supports): Added
INSN_CLASS_ZIHINTPAUSE.
* testsuite/gas/riscv/pause.d: New testcase. Adding coverage for
the pause hint instruction.
* testsuite/gas/riscv/pause.s: Likewise.
include/
* opcode/riscv-opc.h: Added MATCH_PAUSE, MASK_PAUSE and DECLARE_INSN
for pause hint instruction.
* opcode/riscv.h (enum riscv_insn_class): Added INSN_CLASS_ZIHINTPAUSE.
opcodes/
* riscv-opc.c (riscv_opcodes): Add pause hint instruction.
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In fact rev8/orc.b/zext.h are the aliases of grevi/gorci/pack[w], so we
should update them to INSN_ALIAS when we have supported their true instruction
in the future. Though we still use the [MATCH|MAKS]_[GREVI|GORCI|PACK|PACKW]
to encode them. Besides, the orc.b has the same encoding both in rv32 and
rv64, so we just keep one of them in the opcode table.
This patch is implemented according to the following link,
https://github.com/riscv/riscv-bitmanip/pull/101
2021-01-07 Claire Xenia Wolf <claire@symbioticeda.com>
Jim Wilson <jimw@sifive.com>
Andrew Waterman <andrew@sifive.com>
Maxim Blinov <maxim.blinov@embecosm.com>
Kito Cheng <kito.cheng@sifive.com>
Nelson Chu <nelson.chu@sifive.com>
bfd/
* elfxx-riscv.c (riscv_std_z_ext_strtab): Added zba, zbb and zbc.
gas/
* config/tc-riscv.c (riscv_multi_subset_supports): Handle INSN_CLASS_ZB*.
(riscv_get_default_ext_version): Do not check the default_isa_spec when
the version defined in the riscv_opcodes table is ISA_SPEC_CLASS_DRAFT.
* testsuite/gas/riscv/bitmanip-insns-32.d: New testcase.
* testsuite/gas/riscv/bitmanip-insns-64.d: Likewise.
* testsuite/gas/riscv/bitmanip-insns.s: Likewise.
include/
* opcode/riscv-opc.h: Added MASK/MATCH/DECLARE_INSN for ZBA/ZBB/ZBC.
* opcode/riscv.h (riscv_insn_class): Added INSN_CLASS_ZB*.
(enum riscv_isa_spec_class): Added ISA_SPEC_CLASS_DRAFT for the
frozen extensions.
opcodes/
* riscv-opc.c (riscv_opcodes): Add ZBA/ZBB/ZBC instructions.
(MASK_RVB_IMM): Used for rev8 and orc.b encoding.
|
|
* testsuite/gas/sparc/sparc.exp: Move 64-bit tests inside gas_64_check.
|
|
These fail on tic30 due to that target using a different comment char.
* testsuite/gas/macros/app1.d: xfail tic30.
* testsuite/gas/macros/app2.d: Likewise.
* testsuite/gas/macros/app3.d: Likewise.
* testsuite/gas/macros/app4.d: Likewise.
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gas/
* doc/as.texi: Add -mlittle-endian and -mbig-endian to docs.
* doc/c-riscv.texi: Likewise.
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|
Add riscv_choose_[ilp32|lp64]_emul, and use them to choose the correct
linker script rather than set elf[32|64]lriscv directly.
gas/
* testsuite/gas/riscv/li32.d: Accept bigriscv in addition
to littleriscv.
* testsuite/gas/riscv/li64.d: Likewise.
* testsuite/gas/riscv/lla32.d: Likewise.
* testsuite/gas/riscv/lla64.d: Likewise.
* testsuite/gas/riscv/march-ok-g2.d: Likewise.
* testsuite/gas/riscv/march-ok-g2_p1.d: Likewise.
* testsuite/gas/riscv/march-ok-g2p0.d: Likewise.
* testsuite/gas/riscv/march-ok-i2p0.d: Likewise.
* testsuite/gas/riscv/march-ok-i2p0m2_a2f2.d: Likewise.
* testsuite/gas/riscv/march-ok-nse-with-version.d: Likewise.
* testsuite/gas/riscv/march-ok-two-nse.d: Likewise.
ld/
* testsuite/ld-riscv-elf/ld-riscv-elf.exp: Added
riscv_choose_[ilp32|lp64]_emul to choose the correct linker script.
* testsuite/ld-riscv-elf/attr-merge-arch-01.d: Call
riscv_choose_[ilp32|lp64]_emul instead of hardcoding elf[32|64]lriscv.
* testsuite/ld-riscv-elf/attr-merge-arch-02.d: Likewise.
* testsuite/ld-riscv-elf/attr-merge-arch-03.d: Likewise.
* testsuite/ld-riscv-elf/attr-merge-arch-failed-01.d: Likewise.
* testsuite/ld-riscv-elf/attr-merge-arch-failed-02.d: Likewise.
* testsuite/ld-riscv-elf/c-lui-2.d: Likewise.
* testsuite/ld-riscv-elf/c-lui.d: Likewise.
* testsuite/ld-riscv-elf/call-relax.d: Likewise.
* testsuite/ld-riscv-elf/pcrel-lo-addend-2.d: Likewise.
* testsuite/ld-riscv-elf/pcrel-lo-addend.d: Likewise.
* testsuite/ld-riscv-elf/weakref32.d: Accept bigriscv in addition
to littleriscv.
* testsuite/ld-riscv-elf/weakref64.d: Likewise.
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|
RISC-V instruction/code is always little endian, but data might be
big-endian. Therefore, we can not use the original bfd_get/bfd_put
to get/put the code for big endian targets. Add new riscv_get_insn
and riscv_put_insn to always get/put code as little endian can resolve
the problem. Just remember to update them once we have supported
the 48-bit/128-bit instructions in the future patches.
bfd/
* config.bfd: Added targets riscv64be*-*-*, riscv32be*-*-* and
riscvbe*-*-*. Also added riscv_elf[32|64]_be_vec.
* configure.ac: Handle riscv_elf[32|64]_be_vec.
* configure: Regenerate.
* elfnn-riscv.c: Include <limits.h> and define CHAR_BIT for
riscv_is_insn_reloc.
(riscv_get_insn): RISC-V instructions are always little endian, but
bfd_get may be used for big-endian, so add new riscv_get_insn to handle
the insturctions.
(riscv_put_insn): Likewsie.
(riscv_is_insn_reloc): Check if we are relocaing an instruction.
(perform_relocation): Call riscv_is_insn_reloc to decide if we should
use riscv_[get|put]_insn or bfd_[get|put].
(riscv_zero_pcrel_hi_reloc): Use riscv_[get|put]_insn, bfd_[get|put]l32
or bfd_[get|put]l16 for code.
(riscv_elf_relocate_section): Likewise.
(riscv_elf_finish_dynamic_symbol): Likewise.
(riscv_elf_finish_dynamic_sections): Likewise.
(_bfd_riscv_relax_call): Likewise.
(_bfd_riscv_relax_lui): Likewise.
(_bfd_riscv_relax_align): Likewise.
(_bfd_riscv_relax_pc): Likewise.
(riscv_elf_object_p): Handled for big endian.
(TARGET_BIG_SYM, TARGET_BIG_NAME): Defined.
* targets.c: Add riscv_elf[32|64]_be_vec.
(_bfd_target_vector): Likewise.
gas/
* config/tc-riscv.c (riscv_target_format): Add elf64-bigriscv and
elf32-bigriscv.
(install_insn): Always write instructions as little endian.
(riscv_make_nops): Likewise.
(md_convert_frag_branch): Likewise.
(md_number_to_chars): Write data in target endianness.
(options, md_longopts): Add -mbig-endian and -mlittle-endian options.
(md_parse_option): Handle the endian options.
* config/tc-riscv.h: Only define TARGET_BYTES_BIG_ENDIAN if not
already defined.
* configure.tgt: Added riscv64be*, riscv32be*, riscvbe*.
ld/
* configure.tgt: Added riscvbe-*-*, riscv32be*-*-*, riscv64be*-*-*,
riscv32be*-*-linux*, and riscv64be*-*-linux*.
* Makefile.am: Added eelf32briscv.c, eelf32briscv_ilp32f.c and
eelf32briscv_ilp32.c.
* Makefile.in: Regenerate.
* emulparams/elf32briscv.sh: Added.
* emulparams/elf32briscv_ilp32.sh: Likewise.
* emulparams/elf32briscv_ilp32f.sh: Likewise.
* emulparams/elf64briscv.sh: Likewise.
* emulparams/elf64briscv_lp64.sh: Likewise.
* emulparams/elf64briscv_lp64f.sh: Likewise.
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For non-relocatable link with SHF_LINK_ORDER inputs, allow mixed indirect
and data inputs with ordered and unordered inputs:
1. Add pattern to bfd_section for the matching section name pattern in
linker script and update BFD_FAKE_SECTION.
2. Sort the consecutive bfd_indirect_link_order sections with the same
pattern to allow linker script to overdide input section order.
3. Place unordered sections before ordered sections.
4. Change the offsets of the indirect input sections only.
bfd/
PR ld/26256
* elflink.c (compare_link_order): Place unordered sections before
ordered sections.
(elf_fixup_link_order): Add a link info argument. Allow mixed
ordered and unordered input sections for non-relocatable link.
Sort the consecutive bfd_indirect_link_order sections with the
same pattern. Change the offsets of the bfd_indirect_link_order
sections only.
(bfd_elf_final_link): Pass info to elf_fixup_link_order.
* section.c (bfd_section): Add pattern.
(BFD_FAKE_SECTION): Initialize pattern to NULL.
* bfd-in2.h: Regenerated.
gas/
PR ld/26256
* config/obj-elf.c (obj_elf_change_section): Also filter out
SHF_LINK_ORDER.
ld/
PR ld/26256
* ldlang.c (gc_section_callback): Set pattern.
* testsuite/ld-elf/pr26256-1.s: New file.
* testsuite/ld-elf/pr26256-1.t: Likewise.
* testsuite/ld-elf/pr26256-1a.d: Likewise.
* testsuite/ld-elf/pr26256-1b.d: Likewise.
* testsuite/ld-elf/pr26256-2.s: Likewise.
* testsuite/ld-elf/pr26256-2.t: Likewise.
* testsuite/ld-elf/pr26256-2a.d: Likewise.
* testsuite/ld-elf/pr26256-2b-alt.d: Likewise.
* testsuite/ld-elf/pr26256-2b.d: Likewise.
* testsuite/ld-elf/pr26256-3.s: Likewise.
* testsuite/ld-elf/pr26256-3a.d: Likewise.
* testsuite/ld-elf/pr26256-3a.t: Likewise.
* testsuite/ld-elf/pr26256-3b.d: Likewise.
* testsuite/ld-elf/pr26256-3b.t: Likewise.
|
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PR 27102
* symbols.c (S_SET_EXTERNAL): Revise section symbol warning
message and register symbol error message.
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|
This allows alignments up to 2**TC_ALIGN_LIMIT, which might be larger
than an unsigned int can hold.
PR 27101
* read.c (s_align): Use a large enough type for "align" to hold
the result of get_absolute_expression.
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|
PR 27116
bfd/
* xcofflink.c: Correct spelling in comments.
binutils/
* coffgrok.c (do_type): Correct spelling of auxiliary in errors.
* doc/binutils.texi: Correct grammar.
* readelf.c (process_version_sections): Correct spelling of auxiliary
in warning.
* testsuite/binutils-all/vax/objdump.exp: Comment grammar fix.
config/
* override.m4: Correct comment grammar.
gas/
* config/tc-i386.c: Correct comment spelling.
* config/tc-riscv.c: Likewise.
* config/tc-s390.c: Correct comment grammar.
* doc/c-i386.texi: Correct spelling.
* doc/c-s390.texi: Correct grammar.
gold/
* tilegx.cc: Correct comment spelling.
gprof/
* README: Correct grammar.
* gprof.texi: Likewise.
include/
* coff/internal.h: Correct comment spelling.
* coff/sym.h: Likewise.
* opcode/aarch64.h: Likewise.
ld/
* configure.tgt: Correct comment grammar.
* emultempl/m68hc1xelf.em: Likewise.
* ld.texi: Correct grammar.
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While "set $0, $0" works, that's not the documented instruction to do
nothing for MMIX. However, I'm not changing it for "nop_type 5" as
seen in gas.exp and org-1.s, because "set $0, $0" seems like it could
be re-used there, for some future ISA.
gas/
* config/tc-mmix.h (md_single_noop_insn): Change to "swym 0".
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Update 80387 floating point 's' suffix to read:
* Integer constructors are '.word', '.long' or '.int', and '.quad'
for the 16-, 32-, and 64-bit integer formats. The corresponding
instruction mnemonic suffixes are 's' (short), 'l' (long), and 'q'
(quad).
instead of 's' (single).
PR gas/27106
* doc/c-i386.texi: Update 80387 floating point 's' suffix
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This tidies initialisation of target common sections, doing so using a
static initialiser rather than via code and deleting unnecessary
symbol_ptr_ptr variables (the one in asection is used instead).
The patch also initialises ecoff.c:bfd_debug_section using
BFD_FAKE_SECTION. That does change bfd_debug_section slightly,
output_section was NULL now bfd_debug_section, and symbol_ptr_ptr
was NULL now &bfd_debug_section.symbol, but I believe those changes
are safe.
bfd/
* ecoff.c (bfd_debug_section): Init using BFD_FAKE_SECTION.
(ecoff_scom_section, ecoff_scom_symbol): Statically init using
BFD_FAKE_SECTION and GLOBAL_SYM_INIT. Delete initialisation code.
(ecoff_scom_symbol_ptr): Delete.
* elf32-m32r.c (m32r_elf_scom_section, m32r_elf_scom_symbol),
(m32r_elf_scom_symbol_ptr),
* elf32-score.c (score_elf_scom_section, score_elf_scom_symbol),
(score_elf_scom_symbol_ptr),
* elf32-score7.c (score_elf_scom_section, score_elf_scom_symbol),
(score_elf_scom_symbol_ptr),
* elf32-tic6x.c (tic6x_elf_scom_section, tic6x_elf_scom_symbol),
(tic6x_elf_scom_symbol_ptr),
* elf32-v850.c (v850_elf_scom_section, v850_elf_scom_symbol),
(v850_elf_scom_symbol_ptr),
(v850_elf_tcom_section, v850_elf_tcom_symbol),
(v850_elf_tcom_symbol_ptr),
(v850_elf_zcom_section, v850_elf_zcom_symbol),
(v850_elf_zcom_symbol_ptr),
* elf64-mmix.c (mmix_elf_reg_section, mmix_elf_reg_section_symbol),
(mmix_elf_reg_section_symbol_ptr),
* elfxx-mips.c (mips_elf_scom_section, mips_elf_scom_symbol),
(mips_elf_scom_symbol_ptr): Likewise.
gas/
* ecoff.c (ecoff_frob_symbol): Rename scom_section to
ecoff_scom_section and statically initialise.
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elfNN_bed was made writable as an expedient means of communicating
ld -z max-page-size and ld -z common-page-size values to BFD linker
code, and even for objcopy to communicate segment alignment between
copy_private_bfd_data, rewrite_elf_program_header and
assign_file_positions_for_load_sections. Some time later elfNN_bed
elf_osabi was written by gas. It turns out none of these
modifications to elfNN_bed was necessary, so make it const again.
include/
* bfdlink.h (struct bfd_link_info): Add maxpagesize and
commonpagesize.
bfd/
* elfxx-target.h (elfNN_bed): Constify.
* bfd.c (bfd_elf_set_pagesize): Delete.
(bfd_emul_set_maxpagesize, bfd_emul_set_commonpagesize): Delete.
* elf.c (get_program_header_size): Get commonpagesize from
link info.
(_bfd_elf_map_sections_to_segments): Get maxpagesize from link info.
(assign_file_positions_for_load_sections): Likewise.
(assign_file_positions_for_non_load_sections): Likewise.
(rewrite_elf_program_header): Add maxpagesize param. Set map_p_align.
(copy_private_bfd_data): Don't call bfd_elf_set_maxpagesize.
Instead pass maxpagesize to rewrite_elf_program_header.
* elf32-nds32.c (relax_range_measurement): Add link_info param.
Get maxpagesize from link_info. Adjust caller.
* bfd-in2.h: Regenerate.
gas/
* config/obj-elf.c (obj_elf_section): Don't set elf_osabi here.
(obj_elf_type): Likewise.
ld/
* ld.h (ld_config_type): Delete maxpagesize and commonpagesize.
* emultempl/elf.em: Use link_info rather than config
for maxpagesize and commonpagesize.
* emultempl/ppc32elf.em: Likewise.
* ldexp.c (fold_binary, fold_name): Likewise.
* ldemul.c (after_parse_default): Likewise.
(set_output_arch_default): Don't call bfd_emul_set_maxpagesize
or bfd_emul_set_commonpagesize.
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PR 27071
* config/obj-elf.c (elf_obj_symbol_clone_hook): New function.
(elf_format_ops): Set symbol_clone_hook.
* config/obj-elf.h (elf_obj_symbol_clone_hook): Declare.
(obj_symbol_clone_hook): Define.
* listing.c (buffer_line): Avoid integer overflow on paper_width
set to zero.
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rx-elf is an odd target with non-standard names for default text, data
and bss sections. This patch tweaks a new test to make it pass.
* testsuite/gas/elf/section27.s: Reorder .text, .data and .bss
so that output section order does not depend on those sections
being already created. Use ".section .text" rather than ".text".
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