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2021-03-16RISC-V : Support bitmanip-0.93 ZBA/ZBB/ZBC instructionsKuan-Lin Chen6-0/+170
bfd/ * elfxx-riscv.c (riscv_std_z_ext_strtab): Add zba, zbb and zbc. gas/ * config/tc-riscv.c (ext_version_table): Add b, zba, zbb and zbc. (riscv_multi_subset_supports): Add INSN_CLASS_ZB*. * testsuite/gas/riscv/b-ext-64.s: Bitmanip test case. * testsuite/gas/riscv/b-ext-64.d: Likewise. * testsuite/gas/riscv/b-ext.s: Likewise. * testsuite/gas/riscv/b-ext.d: Likewise. include/ * opcode/riscv-opc.h: Support zba, zbb and zbc extensions. * opcode/riscv.h (riscv_insn_class): Add INSN_CLASS_ZB*. opcodes/ * riscv-opc.c (riscv_opcodes): Add zba, zbb and zbc instructions.
2021-03-12aarch64: Add few missing system registersPrzemyslaw Wirkus6-0/+59
This patch adds few missing system registers to GAS: LORC_EL1, LOREA_EL1, LORN_EL1, LORSA_EL1, ICC_CTLR_EL3, ICC_SRE_ELX, ICH_VTR_EL2. gas/ChangeLog: 2021-03-02 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com> * testsuite/gas/aarch64/illegal-sysreg-7.d: New test. * testsuite/gas/aarch64/illegal-sysreg-7.l: New test. * testsuite/gas/aarch64/illegal-sysreg-7.s: New test. * testsuite/gas/aarch64/sysreg-7.d: New test. * testsuite/gas/aarch64/sysreg-7.s: New test. opcodes/ChangeLog: 2021-03-02 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com> * aarch64-opc.c: Add lorc_el1, lorea_el1, lorn_el1, lorsa_el1, icc_ctlr_el3, icc_sre_elx, ich_vtr_el2 system registers.
2021-03-12aix: implement TLS relocation for gas and ldClément Chigot3-45/+226
Add support for TLS in XCOFF. Amongst the things done by this commit: - Update XCOFF auxialiary header to match new version and allow TLS sections. - Add TLS sections (.tdata and .tbss) support in gas and ld. - Add support for the TLS relocations in gas and ld. Two different types BFD_RELOC are created for PPC and PPC64 as the size is a pointer, thus distinct in 32 or 64bit. The addresses given by ld to .tdata and .tbss is a bit special. In XCOFF, these addresses are actually offsets from the TLS pointer computed at runtime. AIX assembly and linker does the same. In top of that, the .tdata must be before .data (this is mandatory for AIX loader). Thus, the aix ld script is recomputing "." before .data to restore its original value. There might be a simpler way, but this one is working. Optimisation linked to TLS relocations aren't yet implemented. bfd/ * reloc.c (BFD_RELOC_PPC_TLS_LE, BFD_RELOC_PPC_TLS_IE, BFD_RELOC_PPC_TLS_M, BFD_RELOC_PPC_TLS_ML, BFD_RELOC_PPC64_TLS_GD, BFD_RELOC_PPC64_TLS_LD, BFD_RELOC_PPC64_TLS_LE, BFD_RELOC_PPC64_TLS_IE, BFD_RELOC_PPC64_TLS_M, BFD_RELOC_PPC64_TLS_ML): New relocations. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * coff-rs6000.c (xcoff_calculate_relocation): Call xcoff_reloc_type_tls for TLS relocations. (xcoff_howto_table): Implement TLS relocations. (_bfd_xcoff_reloc_type_lookup): Add cases TLS relocations. (xcoff_reloc_type_tls): New function. * coff64-rs6000.c (xcoff_calculate_relocation): Likewise. (xcoff_howto_table): Likewise. (_bfd_xcoff_reloc_type_lookup): Likewise. * coffcode.h (sec_to_styp_flags): Handle TLS sections. (styp_to_sec_flags): Likewise. (coff_compute_section_file_positions): Avoid file offset optimisation for .data when the previous section is .tdata. (coff_write_object_contents): Handle TLS sections. * coffswap.h (coff_swap_aouthdr_out): Add support for new fields in aouthdr. * libxcoff.h (xcoff_reloc_type_tls): Add prototype. * xcofflink.c (xcoff_link_add_symbols): Handle XMC_UL. (xcoff_need_ldrel_p): Add cases for TLS relocations. (xcoff_create_ldrel): Add l_symndx for TLS sections. gas/ * config/tc-ppc.c (ppc_xcoff_text_section, ppc_xcoff_data_section, (ppc_xcoff_bss_section, ppc_xcoff_tdata_section, (ppc_xcoff_tbss_section): New variables. (ppc_text_subsegment, ppc_text_csects, ppc_data_subgments, (ppc_data_csects): Removed. (ppc_xcoff_section_is_initialized, ppc_init_xcoff_section, ppc_xcoff_parse_cons): New functions. (md_being): Initialize XCOFF sections. (ppc_xcoff_suffix): Add support for TLS relocations (fixup_size, md_apply_fix): Add support for new BFD_RELOC. (ppc_change_csect): Handle XMC_TL, XMC_UL. Correctly, add XMC_BS to .bss section. Handle new XCOFF section variables. (ppc_comm): Likewise. (ppc_toc): Likewise. (ppc_symbol_new_hook): Likewise. (ppc_frob_symbol): Likewise. (ppc_fix_adjustable): Add tbss support. * config/tc-ppc.h (TC_PARSE_CONS_EXPRESSION): New define. (ppc_xcoff_parse_cons): Add prototype. (struct ppc_xcoff_section): New structure. ld/ * emultempl/aix.em: Ensure .tdata section is removed if empty, even with -r flag. * scripttempl/aix.sc: Handle TLS sections. * testsuite/ld-powerpc/aix52.exp: Add new tests. * testsuite/ld-powerpc/aix-tls-reloc-32.d: New test. * testsuite/ld-powerpc/aix-tls-reloc-64.d: New test. * testsuite/ld-powerpc/aix-tls-reloc.ex: New test. * testsuite/ld-powerpc/aix-tls-reloc.s: New test. * testsuite/ld-powerpc/aix-tls-section-32.d: New test. * testsuite/ld-powerpc/aix-tls-section-64.d: New test. * testsuite/ld-powerpc/aix-tls-section.ex: New test. * testsuite/ld-powerpc/aix-tls-section.s: New test. include/ * coff/internal.h (struct internal_aouthdr): Add new fields. * coff/rs6000.h (AOUTHDRÃ): Add new fields. * coff/rs6k64.h (struct external_filehdr): Likewise. * coff/xcoff.h (_TDATA), _TBSS): New defines (RS6K_AOUTHDR_TLS_LE, RS6K_AOUTHDR_RAS, RS6K_AOUTHDR_ALGNTDATA, RS6K_AOUTHDR_SHR_SYMTAB, RS6K_AOUTHDR_FORK_POLICY, RS6K_AOUTHDR_FORK_COR): New defines. (XMC_TU): Removed. (XMC_UL): New define.
2021-03-12aix: implement R_TOCU and R_TOCL relocationsClément Chigot2-8/+163
Implement support for largetoc on XCOFF. R_TOCU and R_TOCL are referenced by the new BFD defines: BFD_RELOC_PPC_TOC16_HI and BFD_RELOC_PPC_TOC16_LO. A new toc storage class is added XMC_TE. In order to correctly handle R_TOCU, the logic behind xcoff_reloc_type_toc is changed to compute the whole TOC offset instead of just the difference between the "link" offset and the "assembly" offset. In gas, add a function to transform addis format used by AIX "addis RT, D(RA)" into the ELF format "addis RT, RA, SI". bfd/ * reloc.c (BFD_RELOC_PPC_TOC16_HI, BFD_RELOC_PPC_TOC16_LO): New relocations. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * coff-rs6000.c (xcoff_calculate_relocation): Call xcoff_reloc_type_toc for R_TOCU and R_TOCL. (xcoff_howto_table): Remove src_mask for TOC relocations. Add R_TOCU and R_TOCL howtos. (_bfd_xcoff_reloc_type_lookup): Add cases for BFD_RELOC_PPC_TOC16_HI and BFD_RELOC_PPC_TOC16_LO. (xcoff_reloc_type_toc): Compute the whole offset. Implement R_TOCU and R_TOCL. * coff64-rs6000.c (xcoff64_calculate_relocation): Likewise. (xcoff64_howto_table): Likewise. (xcoff64_reloc_type_lookup): Likewise. gas/ * config/tc-ppc.c (ppc_xcoff_suffix): New function. (MAP, MAP32, MAP64): New macros for XCOFF. (ppc_xcoff_fixup_addis): New function. (ppc_is_toc_sym): Handle XMC_TE. (fixup_size): Add cases for BFD_RELOC_PPC_TOC16_HI and BFD_RELOC_PPC_TOC16_LO. (md_assemble): Call ppc_xcoff_fixup_addis for XCOFF. (ppc_change_csect): Handle XMC_TE. (ppc_tc): Enable .tc symbols to have only a XMC_TC or XMC_TE storage class. (ppc_symbol_new_hook): Handle XMC_TE. (ppc_frob_symbol): Likewise. (ppc_fix_adjustable): Likewise. (md_apply_fix): Handle BFD_RELOC_PPC_TOC16_HI and BFD_RELOC_PPC_TOC16_LO. ld/ * scripttempl/aix.sc: Add .te to .data section. * testsuite/ld-powerpc/aix52.exp: Add test structure for AIX7+. Add aix-largetoc-1 test. * testsuite/ld-powerpc/aix-largetoc-1-32.d: New test. * testsuite/ld-powerpc/aix-largetoc-1-64.d: New test. * testsuite/ld-powerpc/aix-largetoc-1.ex: New test. * testsuite/ld-powerpc/aix-largetoc-1.s: New test.
2021-03-10x86/Intel: correct AVX512 S/G disassemblyJan Beulich7-930/+939
Commit 6ff00b5e12e7 ("x86/Intel: correct permitted operand sizes for AVX512 scatter/gather") brought the assembler side of AVX512 S/G insn handling in line with AVX2's, but the disassembler side was forgotten. This has the benefit of - allowing to fold a number of table entries, - rendering a few #define-s and enumerators unused.
2021-03-10x86: correct decoding of nop/reserved space (0f18 ... 0x1f)Jan Beulich8-16/+2372
All encodings not used in this range are (reserved) NOPs. Hence their decoding should be fully consistent. For this to work the PREFIX_IGNORED logic needs slightly extending, such that the attribute will also - have an effect when used inside prefix_table[], yet without always falling back to using slot 0, - cause prefixes marked as ignored while decoding through prefix_table[] to no longer be considered decoded, when encountered in a subsequent decoding step. In adjacent code also drop meaningless PREFIX_OPCODE.
2021-03-09x86: fold some prefix related attributes into a single oneJan Beulich2-9/+19
RepPrefixOk, HLEPrefixOk, and NoTrackPrefixOk can't be specified together, so can share an enum-like field. IsLockable can be inferred from HLE setting and hence only needs specifying when neither of them is present.
2021-03-09x86-64: make SYSEXIT handling similar to SYSRET'sJan Beulich12-7/+36
Despite SYSEXIT being an Intel-only insn in long mode, its behavior there is similar to SYSRET's: Depending on REX.W execution continues in either 64-bit or compatibility mode. Hence distinguishing by suffix is as necessary here as it is there.
2021-02-26Correct an error message in the ARM assembler.Nick Clifton5-1/+31
PR 27411 * config/tc-arm.c (do_t_add_sub): Correct error message. * testsuite/gas/arm/pr27411.s: New test. * testsuite/gas/arm/pr27411.d: New test driver. * testsuite/gas/arm/pr27411.l: Expected error output for new test.
2021-02-24PR23691, gas .y files vs. automatic make dependenciesAlan Modra8-216/+125
A number of targets, bfin, rl78, rx, can show odd failures when bfd/reloc.c changes BFD_RELOC_* enum values, if recompiling over a build dir with existing objects. The problem is caused by bfin-parse.o and similar not being recompiled and so using stale BFD_RELOC_* values. This isn't fixed by making bfin-parse.c depend on bfd/reloc.c, which isn't necessary anyway. bfin-parse.o should have been recompiled due to bfd/bfd.h changing when extracted bfd/reloc.c BFD_RELOC_* values change, but that wasn't happening. The problem is that automake generates a makefile that loads gas/config/.deps/ dependency file for objects with corresponding sources mentioned in EXTRA_as_new_SOURCES. Unless we want to mess around generating explicit dependencies, I think that mean moving some object files to the build gas/config/. This patch does that, removing some hacks for m68k-parse.c that should no longer be necessary, and removes some rules that catered to old bison producing code that triggers compiler warnings. PR 23691 * Makefile.am (TARGET_CPU_CFILES): Split off config/xtensa-relax.c.. (TARGET_CPU_HFILES): ..and config/xtensa-relax.h.. (TARGET_EXTRA_FILES): ..to here. Add config/bfin-lex-wrapper.c, and use alongside TARGET_CPU_CFILES. (EXTRA_DIST): Update location of generated .c files. (config/m68k-parse.c): New rule replacing m68k-parse.c rule. (config/bfin-parse.c, config/rl78-parse.cm config/rx-parse.c), (config/bfin-lex.c, config/bfin-lex-wrapper.@OBJEXT@): Similarly. (itbl-lex-wrapper.@OBJEXT@): Simplify to just the needed dependencies. (itbl-parse.@OBJEXT@): Delete rule using NO_WERROR. (itbl-parse.c, itbl-parse.h): Tidy. * config/bfin-lex-wrapper.c: Include config/bfin-lex.c. * config/bfin-lex.l: Include config/bfin-parse.h. * configure.ac (extra_objects): Move object files corresponding to .y and .l files now in config/ to config/. * Makefile.in: Regenerate. * configure: Regenerate. * po/POTFILES.in: Regenerate.
2021-02-19Fix compile time warnings when building riscv assembler.Nick Clifton2-3/+8
* config/tc-riscv.c (riscv_ip): Fix compile time warnings about misleading indentation.
2021-02-19RISC-V: PR27158, fixed UJ/SB types and added CSS/CL/CS types for .insn.Nelson Chu5-175/+228
* Renamed obsolete UJ/SB types and RVC types, also added CSS/CL(CS) types, [VALID/EXTRACT/ENCODE macros] BTYPE_IMM: Renamed from SBTYPE_IMM. JTYPE_IMM: Renamed from UJTYPE_IMM. CITYPE_IMM: Renamed from RVC_IMM. CITYPE_LUI_IMM: Renamed from RVC_LUI_IMM. CITYPE_ADDI16SP_IMM: Renamed from RVC_ADDI16SP_IMM. CITYPE_LWSP_IMM: Renamed from RVC_LWSP_IMM. CITYPE_LDSP_IMM: Renamed from RVC_LDSP_IMM. CIWTYPE_IMM: Renamed from RVC_UIMM8. CIWTYPE_ADDI4SPN_IMM: Renamed from RVC_ADDI4SPN_IMM. CSSTYPE_IMM: Added for .insn without special encoding. CSSTYPE_SWSP_IMM: Renamed from RVC_SWSP_IMM. CSSTYPE_SDSP_IMM: Renamed from RVC_SDSP_IMM. CLTYPE_IMM: Added for .insn without special encoding. CLTYPE_LW_IMM: Renamed from RVC_LW_IMM. CLTYPE_LD_IMM: Renamed from RVC_LD_IMM. RVC_SIMM3: Unused and removed. CBTYPE_IMM: Renamed from RVC_B_IMM. CJTYPE_IMM: Renamed from RVC_J_IMM. * Added new operands and removed the unused ones, C5: Unsigned CL(CS) immediate, added for .insn directive. C6: Unsigned CSS immediate, added for .insn directive. Ci: Unused and removed. C<: Unused and removed. bfd/ PR 27158 * elfnn-riscv.c (perform_relocation): Updated encoding macros. (_bfd_riscv_relax_call): Likewise. (_bfd_riscv_relax_lui): Likewise. * elfxx-riscv.c (howto_table): Likewise. gas/ PR 27158 * config/tc-riscv.c (riscv_ip): Updated encoding macros. (md_apply_fix): Likewise. (md_convert_frag_branch): Likewise. (validate_riscv_insn): Likewise. Also arranged operands, including added C5 and C6 operands, and removed unused Ci and C< operands. * doc/c-riscv.texi: Updated and added CSS/CL/CS types. * testsuite/gas/riscv/insn.d: Added CSS/CL/CS instructions. * testsuite/gas/riscv/insn.s: Likewise. gdb/ PR 27158 * riscv-tdep.c (decode_ci_type_insn): Updated encoding macros. (decode_j_type_insn): Likewise. (decode_cj_type_insn): Likewise. (decode_b_type_insn): Likewise. (decode): Likewise. include/ PR 27158 * opcode/riscv.h: Updated encoding macros. opcodes/ PR 27158 * riscv-dis.c (print_insn_args): Updated encoding macros. * riscv-opc.c (MASK_RVC_IMM): defined to ENCODE_CITYPE_IMM. (match_c_addi16sp): Updated encoding macros. (match_c_lui): Likewise. (match_c_lui_with_hint): Likewise. (match_c_addi4spn): Likewise. (match_c_slli): Likewise. (match_slli_as_c_slli): Likewise. (match_c_slli64): Likewise. (match_srxi_as_c_srxi): Likewise. (riscv_insn_types): Added .insn css/cl/cs. sim/ PR 27158 * riscv/sim-main.c (execute_i): Updated encoding macros.
2021-02-18RISC-V: Add bfd/cpu-riscv.h to support all spec versions controlling.Nelson Chu2-24/+126
Make the opcode/riscv-opc.c and include/opcode/riscv.h tidy, move the spec versions stuff to bfd/cpu-riscv.h. Also move the csr stuff and ext_version_table to gas/config/tc-riscv.c for internal use. To avoid too many repeated code, define general RISCV_GET_SPEC_NAME/SPEC_CLASS macros. Therefore, assembler/dis-assembler/linker/gdb can get all spec versions related stuff from cpu-riscv.h and cpu-riscv.c, since the stuff are defined there uniformly. bfd/ * Makefile.am: Added cpu-riscv.h. * Makefile.in: Regenerated. * po/SRC-POTFILES.in: Regenerated. * cpu-riscv.h: Added to support spec versions controlling. Also added extern arrays and functions for cpu-riscv.c. (enum riscv_spec_class): Define all spec classes here uniformly. (struct riscv_spec): Added for all specs. (RISCV_GET_SPEC_CLASS): Added to reduce repeated code. (RISCV_GET_SPEC_NAME): Likewise. (RISCV_GET_ISA_SPEC_CLASS): Added to get ISA spec class. (RISCV_GET_PRIV_SPEC_CLASS): Added to get privileged spec class. (RISCV_GET_PRIV_SPEC_NAME): Added to get privileged spec name. * cpu-riscv.c (struct priv_spec_t): Replaced with struct riscv_spec. (riscv_get_priv_spec_class): Replaced with RISCV_GET_PRIV_SPEC_CLASS. (riscv_get_priv_spec_name): Replaced with RISCV_GET_PRIV_SPEC_NAME. (riscv_priv_specs): Moved below. (riscv_get_priv_spec_class_from_numbers): Likewise, updated. (riscv_isa_specs): Moved from include/opcode/riscv.h. * elfnn-riscv.c: Included cpu-riscv.h. (riscv_merge_attributes): Initialize in_priv_spec and out_priv_spec. * elfxx-riscv.c: Included cpu-riscv.h and opcode/riscv.h. (RISCV_UNKNOWN_VERSION): Moved from include/opcode/riscv.h. * elfxx-riscv.h: Removed extern functions to cpu-riscv.h. gas/ * config/tc-riscv.c: Included cpu-riscv.h. (enum riscv_csr_clas): Moved from include/opcode/riscv.h. (struct riscv_csr_extra): Likewise. (struct riscv_ext_version): Likewise. (ext_version_table): Moved from opcodes/riscv-opc.c. (default_isa_spec): Updated type to riscv_spec_class. (default_priv_spec): Likewise. (riscv_set_default_isa_spec): Updated. (init_ext_version_hash): Likewise. (riscv_init_csr_hash): Likewise, also fixed indent. include/ * opcode/riscv.h: Moved stuff and make the file tidy. opcodes/ * riscv-dis.c: Included cpu-riscv.h, and removed elfxx-riscv.h. (default_priv_spec): Updated type to riscv_spec_class. (parse_riscv_dis_option): Updated. * riscv-opc.c: Moved stuff and make the file tidy.
2021-02-17h8300 complains about new section defined without attributesAlan Modra2-0/+5
* testsuite/gas/elf/section28.d: xfail h8300.
2021-02-16gas: Allow SHF_GNU_RETAIN on all sectionsH.J. Lu7-6/+66
Since SHF_GNU_RETAIN is allowed on all sections, strip SHF_GNU_RETAIN when checking incorrect section attributes. PR gas/27412 * config/obj-elf.c (obj_elf_change_section): Strip SHF_GNU_RETAIN when checking incorrect section attributes. * testsuite/gas/elf/elf.exp: Run section28 and section29. * testsuite/gas/elf/section28.d: New file. * testsuite/gas/elf/section28.s: Likewise. * testsuite/gas/elf/section29.d: Likewise. * testsuite/gas/elf/section29.s: Likewise.
2021-02-16x86: CVTPI2PD has special behaviorJan Beulich15-93/+164
CVTPI2PD with a memory operand, unlike CVTPI2PS, doesn't engage MMX logic. Therefore it - has a proper AVX equivalent (CVTDQ2PD) and hence can be subject to SSE2AVX translation and SSE checking, - should not record MMX use in the respective ELF note.
2021-02-16x86: honor template rather than actual operands when updating i.xstateJan Beulich5-8/+16
This undoes a change to md_assemble() that 32930e4edbc0 ("x86: Support GNU_PROPERTY_X86_ISA_1_V[234] marker") did without any explanation. This broke a CVTPI2PS property test that a subsequent test will add, and the updates to existing tests also demonstrate what was wrong: For example, AVX insns update the full YMM, even if a Vex128 variant is in use.
2021-02-16x86: record register use for SIMD insns without respective explicit operandsJan Beulich9-0/+60
VZERO{ALL,UPPER} modify YMM registers despite having no operands. While {,V}{LD,ST}MXCSR don't modify XMM registers, MXCSR and XMMn collectively form underlying machine state.
2021-02-16x86: make common property tests commonJan Beulich11-108/+24
There's no need to run the exact same test twice. Move the tests which don't differ between 32- and 64-bit to the "Common tests" section.
2021-02-16x86: make 16-bit ENQCMD test actually test ENQCMDJan Beulich3-12/+23
2021-02-16PR27426, More bugs in dwarf2dbg.cAlan Modra2-3/+17
PR 27426 * dwarf2dbg.c (allocate_filename_to_slot): Allocate the dirs array in another place.
2021-02-16demand_copy_C_string NUL checkAlan Modra2-2/+6
* read.c (demand_copy_C_string): Really check for embedded zeros.
2021-02-15IBM Z: Implement instruction set extensionsAndreas Krebbel6-3/+70
opcodes/ * s390-mkopc.c (main): Accept arch14 as cpu string. * s390-opc.txt: Add new arch14 instructions. include/ * opcode/s390.h (enum s390_opcode_cpu_val): Add S390_OPCODE_ARCH14. gas/ * config/tc-s390.c (s390_parse_cpu): New entry for arch14. * doc/c-s390.texi: Document arch14 march option. * testsuite/gas/s390/s390.exp: Run the arch14 related tests. * testsuite/gas/s390/zarch-arch14.d: New test. * testsuite/gas/s390/zarch-arch14.s: New test.
2021-02-12Change the readelf and objdump programs so that they will automatically ↵Nick Clifton3-2/+8
follow links to separate debug info files. * configure.ac (follow-debug-links): Add option to enable or disable the following of debug links by default. Set the default for the option to be 'follow'. * dwarf.c (do_follow_links): Initialise with DEFAULT_FOR_FOLLOW_LINKS. (dwarf_select_sections_by_names): Add no-follow-links option. (dwarf_select_sections_by_letter): Add 'N' option. * objdump.c (usage): Add conditional text describing the follow links option. (slurp_symtab): Ensure that there is a NULL entry at the end of the symbol table. (slurp_dynamic_symtab): Likewise. (dump_bfd): When extending the symbol table, ensure that there is still a NULL entry at the end. * readelf.c (usage): Add conditional text describing the follow links option. * doc/binutils.texi: Update documentation for objcopy and readelf. * doc/debug.options.texi: Update documentation of the follow-links option. * config.in: Regenerate. * configure: Regenerate. * testsuite/binutils-all/compress.exp: Add the -WN option to objdump command lines that are not expecting to follow links. * testsuite/binutils-all/readelf.exp: Add the --debug-dump=no-follow-links option to tests that are not expecting to follow debug links. gas * testsuite/gas/mach-o/sections-1.d: Stop automatic debug link following. * testsuite/gas/xgate/insns-dwarf2.d: Likewise. ld * testsuite/ld-elf/sec64k.exp: Stop readelf from automatically following debug links.
2021-02-12gas testsuite: adjust recently added tests for hppaAlan Modra6-12/+21
Some hppa gas targets treat anything starting in the first column as a label, so directives can't start there. Also, binutils_assemble and run_dump_test cleverly edit test source to suit the hppa .comm directive which has a different syntax to most targets. The editing means we can't match source file names in dumps. Finally, hppa gas complains if instructions are emitted without a ".text" or similar directive. * testsuite/gas/all/pr27381.err: Don't match source file name. * testsuite/gas/all/pr27381.s: Don't start directive in first column. * testsuite/gas/all/pr27384.err: Don't match source file name. Adjust line number. * testsuite/gas/all/pr27384.s: Add ".text" directive. * testsuite/gas/elf/pr27355.err: Don't match source file name.
2021-02-11Re: Remove arm-symbianelfAlan Modra2-0/+6
gas/ * NEWS: Mention arm-symbianelf removal. ld/ * NEWS: Mention arm-symbianelf removal.
2021-02-10Remove debugging code accidentally included with the fix for PR 27384Nick Clifton2-2/+5
* listing.c (buffer_line): Remove debugging code accidentally included with the fix for PR 27384.
2021-02-09Add a sanity check of files include by .incbin.Nick Clifton6-0/+27
PR 27381 * read.c (s_incbin): Check that the file to be included is a regular, non-directory file. * testsuite/gas/all/pr27381.s: New test source file. * testsuite/gas/all/pr27381.d: New test control file. * testsuite/gas/all/pr27381.err: Expected error output for the new test. * testsuite/gas/all/gas.exp: Run the new test.
2021-02-09Remove arm-symbianelfAlan Modra17-41/+32
* configure.ac: Delete arm*-*-symbianelf* entry. * configure: Regenerate. bfd/ * config.bfd (arm*-*-symbianelf*): Move from obsolete to removed. * configure.ac: Delete symbian entries. * elf-bfd.h (enum elf_target_os): Delete is_symbian. * elf32-arm.c: Remove symbian support. Formatting. * targets.c: Delete symbian entries. * configure: Regenerate. binutils/ * testsuite/lib/binutils-common.exp (supports_gnu_osabi): Remove symbianelf. gas/ * Makefile.am (TARG_ENV_HFILES): Remove config/te-symbian.h. * config/tc-arm.c (elf32_arm_target_format): Remove TE_SYMBIAN support. * config/te-symbian.h: Delete. * configure.tgt: Remove arm-*-symbianelf*. * testsuite/gas/arm/arch4t-eabi.d: Don't mention symbianelf in target selection. * testsuite/gas/arm/arch4t.d: Likewise. * testsuite/gas/arm/got_prel.d: Likewise. * testsuite/gas/arm/mapdir.d: Likewise. * testsuite/gas/arm/mapmisc.d: Likewise. * testsuite/gas/arm/mapsecs.d: Likewise. * testsuite/gas/arm/mapshort-eabi.d: Likewise. * testsuite/gas/arm/thumb-eabi.d: Likewise. * testsuite/gas/arm/thumb.d: Likewise. * testsuite/gas/arm/thumbrel.d: Likewise. * Makefile.in: Regenerate. * po/POTFILES.in: Regenerate. ld/ * Makefile.am (ALL_EMULATION_SOURCES): Remove earmsymbian.c. Don't include symbian dep file. * configure.tgt: Remove arm*-*-symbianelf* entry. * emulparams/armsymbian.sh: Delete. * ld.texi: Don't mention symbian. * scripttempl/armbpabi.sc: Delete. * testsuite/ld-arm/symbian-seg1.d: Delete. * testsuite/ld-arm/symbian-seg1.s: Delete. * testsuite/ld-arm/arm-elf.exp: Don't run symbian-seg1. * Makefile.in: Regenerate. * po/BLD-POTFILES.in: Regenerate.
2021-02-09Prevent a bad .Psize expression from triggering a memory access violation.Nick Clifton6-1/+44
PR 27384 * listing.c (listing_psize): Check the result of the width expression before assigning it to paper_width. * testsuite/gas/all/pr27384.s: New test source file. * testsuite/gas/all/pr27384.d: New test control file. * testsuite/gas/all/pr27384.err: Expected errors from new test. * testsuite/gas/all/gas.exp: Run the new test.
2021-02-09Add a test for PR 27355 - where corrupt assembler .file directives could ↵Nick Clifton5-0/+21
trigger a segmentation fault. PR 27355 * testsuite/gas/elf/pr27355.s: New test source file. * testsuite/gas/elf/pr27355.d: New test control file. * testsuite/gas/elf/pr27355.err: Expected errors from new test. * testsuite/gas/elf/elf.exp: Run the new test.
2021-02-08opcodes: tic54x: namespace exported variablesMike Frysinger2-14/+22
The tic54x exports some fairly generic variable names that can conflict with programs that use them, so put proper tic54x_ prefixes on all of them.
2021-02-08Fix an illegal memory access when parsing a corrupt assembler file.Nick Clifton2-2/+16
PR 27355 * dwarf2dbg.c (allocate_filename_to_slot): Allocate the dirs array if it has not already been created.
2021-02-04RISC-V: Removed the v0.93 bitmanip ZBA/ZBB/ZBC instructions.Nelson Chu5-160/+8
bfd/ * elfxx-riscv.c (riscv_parse_prefixed_ext): Removed zb*. gas/ * config/tc-riscv.c (riscv_multi_subset_supports): Removed INSN_CLASS_ZB*. * testsuite/gas/riscv/bitmanip-insns-32.d: Removed. * testsuite/gas/riscv/bitmanip-insns-64.d: Removed. * testsuite/gas/riscv/bitmanip-insns.s: Removed. include/ * opcode/riscv-opc.h: Removed macros for zb* extensions. * opcode/riscv.h (riscv_insn_class): Removed INSN_CLASS_ZB*. opcodes/ * riscv-opc.c (MASK_RVB_IMM): Removed. (riscv_opcodes): Removed zb* instructions. (riscv_ext_version_table): Removed versions for zb*.
2021-02-03IBM Z: Add missing vector formats to .insn docsAndreas Krebbel2-1/+53
gas/ * doc/c-s390.texi: Document vector instruction formats.
2021-02-01Add Genode target supportEmery Hemingway2-1/+7
* configure.tgt: Add *-*-genode* as a target for AArch64 and x86.
2021-02-01PR27283 gas for alpha fails to build with gcc 11Alan Modra2-1/+6
PR 27283 * config/tc-alpha.c (insert_operand): Delete dead code.
2021-01-26nios2: Don't disable relaxation with --gdwarf-NH.J. Lu4-4/+38
GCC 11 passes --gdwarf-5 to assembler to enable DWARF5 debug info. Don't disable relaxation when --gdwarf-N is specified. The assembler generated debug information will treat the sequence of the relaxed instructions as a single instruction. PR gas/27243 * config/tc-nios2.c (md_begin): Don't disable relaxation with --gdwarf-N. * testsuite/gas/nios2/relax.d: New file. * testsuite/gas/nios2/relax.s: Likewise.
2021-01-26gas testsuite tidyAlan Modra29-31/+64
This replaces skip and notarget in a number of gas tests with xfail, the idea being that running tests might expose segmentation faults or other serious errors even when we don't expect a test to pass. Doing so showed a number of cases where tests now pass, which is another reason to avoid profligate use of notarget and skip. * testsuite/gas/all/local-label-overflow.d: Use xfail rather than notarget all except hppa. Comment. * testsuite/gas/all/sleb128-2.d: Use xfail rather than notarget. * testsuite/gas/all/sleb128-4.d: Likewise. Don't skip msp430. * testsuite/gas/all/sleb128-5.d: Use xfail rather than notarget. * testsuite/gas/all/sleb128-7.d: Likewise. * testsuite/gas/all/sleb128-9.d: Likewise. * testsuite/gas/elf/bignums.d: Likewise. * testsuite/gas/elf/group0c.d: Likewise. * testsuite/gas/elf/group1a.d: Likewise. * testsuite/gas/elf/section-symbol-redef.d: Likewise. * testsuite/gas/elf/section15.d: Likewise. * testsuite/gas/elf/section4.d: Likewise. * testsuite/gas/elf/section7.d: Likewise. * testsuite/gas/macros/irp.d: Likewise. * testsuite/gas/macros/repeat.d: Likewise. * testsuite/gas/macros/rept.d: Likewise. * testsuite/gas/macros/test2.d: Likewise. * testsuite/gas/macros/vararg.d: Likewise. * testsuite/gas/all/string.d: Use xfail rather than skip. * testsuite/gas/elf/missing-build-notes.d: Likewise. * testsuite/gas/elf/section0.d: Likewise. * testsuite/gas/elf/section1.d: Likewise. * testsuite/gas/elf/section10.d: Likewise. * testsuite/gas/elf/section11.d: Likewise. * testsuite/gas/elf/section6.d: Likewise. * testsuite/gas/elf/symtab.d: Use xfail rather than skip, adjust hppa. * testsuite/gas/elf/symtab.s: Don't start directives in first column. * testsuite/gas/macros/test3.d: Don't notarget nds32.
2021-01-26gas byte testAlan Modra5-14/+7
skip *-*-* is a little silly, delete the test. * testsuite/gas/all/byte.d, * testsuite/gas/all/byte.l, * testsuite/gas/all/byte.s: Delete. * testsuite/gas/all/gas.exp: Don't run byte test.
2021-01-26pr27228 testcaseAlan Modra3-2/+10
This failed on ft32, hppa, and mips-irix targets. In the case of ft32 the problem was iterating over an array in reverse and not using the proper condition, so BFD_RELOC_NONE was not recognised. bfd/ * elf32-ft32.c (ft32_reloc_type_lookup): Don't miss ft32_reloc_map[0]. gas/ PR 27282 * testsuite/gas/all/none.d: Replace skip with xfail, don't xfail ft32. * testsuite/gas/elf/pr27228.d: xfail hppa and allow OBJECT match.
2021-01-24gas: Add a testcase for PR gas/27228H.J. Lu4-0/+21
PR gas/27228 * testsuite/gas/elf/elf.exp: Run pr27228. * testsuite/gas/elf/pr27228.d: New file. * testsuite/gas/elf/pr27228.s: Likewise.
2021-01-24PR27228, .reloc wrong symbol emitted for undefined local symbolAlan Modra2-1/+9
Local symbols are of course supposed to be defined by their object file, but in other cases a local symbol is promoted to global by gas if undefined and referenced. This patch stops gas wrongly replacing a local undefined symbol with the undefined section symbol, resulting in a .reloc undefined local symbol being emitted as global. PR 27228 * write.c (resolve_reloc_expr_symbols): Don't assume local symbol is defined.
2021-01-21PR27221, 058430b4a1 warnings while assembling the Linux kernelAlan Modra6-22/+13
PR 27221 * dwarf2dbg.c (dwarf2_gen_line_info_1): Don't warn about ignored line number info when gas is generating it. * testsuite/gas/elf/dwarf2-20.d: Adjust to not expect warnings. * testsuite/gas/m68hc11/indexed12.d: Likewise. * testsuite/gas/elf/elf.exp: Don't run warn-2. * gas/testsuite/gas/elf/warn-2.s: Delete.
2021-01-21PR27218, memory access violation in dwarf2dbg.cAlan Modra2-13/+20
PR 27218 * dwarf2dbg.c (dwarf2_gen_line_info): Correct setting of dwarf_level. (dwarf2_directive_filename, dwarf2_directive_loc): Likewise, and error for negative file numbers.
2021-01-20PowerPC: Don't generate unused section symbolsAlan Modra4-3/+6
PowerPC version of git commit d1bcae833b. bfd/ * elf32-ppc.c: Delete outdated comment. (TARGET_KEEP_UNUSED_SECTION_SYMBOLS): Define. * elf64-ppc.c (TARGET_KEEP_UNUSED_SECTION_SYMBOLS): Define. gas/ * testsuite/gas/ppc/power4.d: Adjust for removal of section sym. * testsuite/gas/ppc/test1elf32.d: Likewise. * testsuite/gas/ppc/test1elf64.d: Likewise. ld/ * testsuite/ld-powerpc/relbrlt.s: Make symbols global. * testsuite/ld-powerpc/relbrlt.d: Adjust to suit. * testsuite/ld-powerpc/tlsget.d: Adjust for reordered stubs. * testsuite/ld-powerpc/tlsget.wf: Likewise. * testsuite/ld-powerpc/tlsget2.d: Likewise. * testsuite/ld-powerpc/tlsget2.wf: Likewise. * testsuite/ld-powerpc/tlsexe.r: Adjust for removed section syms. * testsuite/ld-powerpc/tlsexe32.r: Likewise. * testsuite/ld-powerpc/tlsexe32no.r: Likewise. * testsuite/ld-powerpc/tlsexeno.r: Likewise. * testsuite/ld-powerpc/tlsexenors.r: Likewise. * testsuite/ld-powerpc/tlsexers.r: Likewise. * testsuite/ld-powerpc/tlsexetoc.r: Likewise. * testsuite/ld-powerpc/tlsexetocrs.r: Likewise. * testsuite/ld-powerpc/tlsso.r: Likewise. * testsuite/ld-powerpc/tlsso32.r: Likewise. * testsuite/ld-powerpc/tlstocso.r: Likewise.
2021-01-18as: Automatically enable DWARF5 supportH.J. Lu4-9/+30
Currently $ as -o x.o x.s fails when x.s contains DWARF5 ".file 0" or ".loc 0" directives. Update assembler to automatically enable DWARF5 support so that $ gcc -S -g -c x.c $ gcc -c x.s works. PR gas/27195 * dwarf2dbg.c (dwarf2_gen_line_info): Set dwarf_level to 5 if needed. (dwarf2_directive_filename): Likewise. (dwarf2_directive_loc): Likewise. * testsuite/gas/elf/dwarf-5-file0.d: Pass --gdwarf-3. * testsuite/gas/lns/lns-diag-1.l: Remove the "Error: file number less than one" errors.
2021-01-18PR27198, segv in S_IS_WEAKAlan Modra6-0/+21
Fix a NULL dereference seen when assembling invalid input. PR 27198 * config/tc-i386.c (need_plt32_p): Return FALSE for NULL symbol. * testsuite/gas/i386/pr27198.d, * gas/testsuite/gas/i386/pr27198.err, * gas/testsuite/gas/i386/pr27198.s: New test. * gas/testsuite/gas/i386/i386.exp: Run it.
2021-01-15RISC-V: Indent and GNU coding standards tidy, also aligned the code.Nelson Chu3-59/+61
bfd/ * elfnn-riscv.c: Indent, labels and GNU coding standards tidy, also aligned the code. gas/ * config/tc-riscv.c: Indent and GNU coding standards tidy, also aligned the code. * config/tc-riscv.h: Likewise. include/ * opcode/riscv.h: Indent and GNU coding standards tidy, also aligned the code. opcodes/ * riscv-opc.c (riscv_gpr_names_abi): Aligned the code. (riscv_fpr_names_abi): Likewise. (riscv_opcodes): Likewise. (riscv_insn_types): Likewise.
2021-01-15RISC-V: Error and warning messages tidy.Nelson Chu9-292/+311
Error and warning messages usually starting with lower case letter, and without the period at the end. Besides, add the prefixed "internel:" at the beginning of the messages when they are caused internally. Also fix indents and typos. bfd/ * elfnn-riscv.c (riscv_merge_attributes): Fix typos of messages. gas/ * config/tc-riscv.c: Error and warning messages tidy. * testsuite/gas/riscv/priv-reg-fail-fext.l: Updated. * testsuite/gas/riscv/priv-reg-fail-read-only-01.l: Likewise. * testsuite/gas/riscv/priv-reg-fail-read-only-02.l: Likewise. * testsuite/gas/riscv/priv-reg-fail-rv32-only.l: Likewise. * testsuite/gas/riscv/priv-reg-fail-version-1p10.l: Likewise. * testsuite/gas/riscv/priv-reg-fail-version-1p11.l: Likewise. * testsuite/gas/riscv/priv-reg-fail-version-1p9p1.l: Likewise. ld/ * testsuite/ld-riscv-elf/attr-merge-priv-spec-failed-01.d: Updated. * testsuite/ld-riscv-elf/attr-merge-priv-spec-failed-02.d: Likewise. * testsuite/ld-riscv-elf/attr-merge-priv-spec-failed-03.d: Likewise. * testsuite/ld-riscv-elf/attr-merge-priv-spec-failed-04.d: Likewise. * testsuite/ld-riscv-elf/attr-merge-priv-spec-failed-05.d: Likewise. * testsuite/ld-riscv-elf/attr-merge-priv-spec-failed-06.d: Likewise. opcodes/ * riscv-dis.c (parse_riscv_dis_option): Fix typos of message.
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