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2014-11-12Fix z80-coff build breakageAlan Modra2-0/+8
* config/tc-z80.c (parse_exp_not_indexed, parse_exp): Warning fixes.
2014-11-12Fix x86 non-ELF build breakageAlan Modra2-0/+8
PR ld/17482 * config/tc-i386.c (output_insn): Don't test x86_elf_abi when not ELF.
2014-11-11Updated French and Ukranian translations supplied by the Translation Project.Nick Clifton2-109/+144
* po/uk.po: Updated Ukranian translation. * po/fr.po: Updated French translation.
2014-11-07Fix a typo in gas/ChangeLogH.J. Lu1-1/+2
2014-11-07X32: Add REX prefix to encode R_X86_64_GOTTPOFFH.J. Lu5-0/+47
Structions with R_X86_64_GOTTPOFF relocation must be encoded with REX prefix even if it isn't required by destination register. Otherwise linker can't safely perform IE -> LE optimization. bfd/ PR ld/17482 * elf64-x86-64.c (elf_x86_64_relocate_section): Update comments for IE->LE transition. gas/ PR ld/17482 * config/tc-i386.c (output_insn): Add a dummy REX_OPCODE prefix for structions with R_X86_64_GOTTPOFF relocation for x32 if needed. gas/testsuite/ PR ld/17482 * gas/i386/ilp32/x32-tls.d: New file. * gas/i386/ilp32/x32-tls.s: Likewise. ld/testsuite/ PR ld/17482 * ld-x86-64/tlsie4.dd: Updated.
2014-11-06Add mach parameter to nios2_find_opcode_hash.Sandra Loosemore2-1/+6
2014-11-06 Sandra Loosemore <sandra@codesourcery.com> include/opcode/ * nios2.h (nios2_find_opcode_hash): Add mach parameter to declaration. Fix obsolete comment. opcodes/ * nios2-dis.c (nios2_find_opcode_hash): Add mach parameter. (nios2_disassemble): Adjust call to nios2_find_opcode_hash. gas/ * config/tc-nios2.c (nios2_diagnose_overflow): Adjust call to nios2_find_opcode_hash.
2014-11-05Update .MIPS.abiflags to support MIPS R6Matthew Fortune6-0/+63
bfd/ * elfxx-mips.c (update_mips_abiflags_isa): Add E_MIPS_ARCH_32R6 and E_MIPS_ARCH_64R6 support. ld/testsuite/ * ld-mips-elf/abiflags-strip10-ph.d: New file. * ld-mips-elf/mips-eld.exp: Run the new test. gas/ * config/tc-mips.c (mips_elf_final_processing): Add INSN_ISA32R6 and INSN_ISA64R6 support. gas/testsuite/ * gas/mips/elf_arch_mips32r6.d: New file. * gas/mips/elf_arch_mips64r6.d: New file. * gas/mips/mips.exp: Run the new tests.
2014-11-04Don't use register keywordAlan Modra24-4044/+4308
* expr.c (expr_symbol_where): Don't use register keyword. * app.c (app_push, app_pop, do_scrub_chars): Likewise. * ecoff.c (add_string, add_ecoff_symbol, add_aux_sym_symint, add_aux_sym_rndx, add_aux_sym_tir, add_procedure, add_file, ecoff_build_lineno, ecoff_setup_ext, allocate_cluster. allocate_scope, allocate_vlinks, allocate_shash, allocate_thash, allocate_tag, allocate_forward, allocate_thead, allocate_lineno_list): Likewise. * frags.c (frag_more, frag_var, frag_variant, frag_wane): Likewise. * input-file.c (input_file_push, input_file_pop): Likewise. * input-scrub.c (input_scrub_push, input_scrub_next_buffer): Likewise. * subsegs.c (subseg_change): Likewise. * symbols.c (colon, symbol_table_insert, symbol_find_or_make) (dollar_label_name, fb_label_name): Likewise. * write.c (relax_align): Likewise. * config/tc-alpha.c (s_alpha_pdesc): Likewise. * config/tc-bfin.c (bfin_s_bss): Likewise. * config/tc-i860.c (md_estimate_size_before_relax): Likewise. * config/tc-m68hc11.c (md_convert_frag): Likewise. * config/tc-m68k.c (m68k_ip, crack_operand): Likewise. (md_convert_frag_1, s_even): Likewise. * config/tc-mips.c (mips_clear_insn_labels): Likewise. * config/tc-mn10200.c (md_begin): Likewise. * config/tc-s390.c (s390_setup_opcodes, md_begin): Likewise. * config/tc-sh.c (sh_elf_cons): Likewise. * config/tc-tic4x.c (tic4x_cons, tic4x_stringer): Likewise. * config/m68k-parse.y (m68k_reg_parse): Likewise. Convert from K&R. (yylex, m68k_ip_op, yyerror): Convert from K&R.
2014-11-04Use frag_now_fix_octets in gas d10v, d30vAlan Modra3-7/+9
obstack_next_free is supposed to return a void* rather than the char* it does currently, so expressions involving pointer arithmetic need a cast. Avoid the issue. * config/tc-d10v.c (find_opcode): Call frag_now_fix_octets rather than equivalent obstack_next_free expression. * config/tc-d30v.c (find_format): Likewise.
2014-11-03Fixes a snafu checking the size of 20-bit immedaite values.Nick Clifton2-1/+6
* config/tc-msp430.c (msp430_srcoperand): Fix range test for 20-bit values.
2014-10-31MIPS: Add Octeon 3 supportNaveen H.S7-1/+66
binutils: 2014-10-31 Andrew Pinski <apinski@cavium.com> Naveen H.S <Naveen.Hurugalawadi@caviumnetworks.com> * readelf.c (print_mips_isa_ext): Print the value of Octeon3. gas: 2014-10-31 Andrew Pinski <apinski@cavium.com> Naveen H.S <Naveen.Hurugalawadi@caviumnetworks.com> * config/tc-mips.c (CPU_IS_OCTEON): Handle CPU_OCTEON3. (mips_cpu_info_table): Octeon3 enables virt ase. * doc/c-mips.texi: Document octeon3 as an acceptable value for -march=. gas/testsuite: 2014-10-31 Andrew Pinski <apinski@cavium.com> Naveen H.S <Naveen.Hurugalawadi@caviumnetworks.com> * gas/mips/mips.exp: Add support for Octeon3 architecture. Also add in support for running Octeon3 tests. * gas/mips/octeon3.d: New test. * gas/mips/octeon3.s: New test source. opcodes: 2014-10-31 Andrew Pinski <apinski@cavium.com> Naveen H.S <Naveen.Hurugalawadi@caviumnetworks.com> * mips-dis.c (mips_arch_choices): Add octeon3. * mips-opc.c (IOCT): Include INSN_OCTEON3. (IOCT2): Likewise. (IOCT3): New define. (IVIRT): New define. (mips_builtin_opcodes): Add dmfgc0, dmtgc0, hypcall, mfgc0, mtgc0, tlbinv, tlbinvf, tlbgr, tlbgwi, tlbginv, tlbginvf, tlbgwr, tlbgp, tlti IVIRT instructions. Extend mtm0, mtm1, mtm2, mtp0, mtp1, mtp2 instructions to take another operand for IOCT3. bfd: 2014-10-31 Andrew Pinski <apinski@cavium.com> Naveen H.S <Naveen.Hurugalawadi@caviumnetworks.com> * archures.c: Add octeon3 for mips target. * bfd-in2.h: Regenerate. * bfd/cpu-mips.c: Define I_mipsocteon3. nfo_struct): Add octeon3 support. * bfd/elfxx-mips.c: (_bfd_elf_mips_mach): Add support for octeon3. (mips_set_isa_flags): Add support for octeon3. (bfd_mips_isa_ext): Add bfd_mach_mips_octeon3. (mips_mach_extensions): Make bfd_mach_mips_octeon3 an extension of bfd_mach_mips_octeon2. (print_mips_isa_ext): Print the value of Octeon3.
2014-10-31Add forgotten changelog entry.Andrew Pinski1-0/+7
2014-10-21 Andrew Pinski <apinski@cavium.com> * config/tc-aarch64.c (aarch64_cpus): Add thunderx. * doc/c-aarch64.texi: Document that thunderx is a valid processor name.
2014-10-30Remove the artificial limit on code alignment through the use of theDr Philipp Tomsich3-46/+35
fixed part of a fragment for output generation only, which required MAX_MEM_FOR_RS_ALIGN_CODE to be large enough to hold the maximum pad. * config/tc-aarch64.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define to 7. * config/tc-aarch64.c (aarch64_handle_align): Rewrite to handle large alignments with a constant fragment size of MAX_MEM_FOR_RS_ALIGN_CODE.
2014-10-29Updated/new translations provided by the Translations Project.Nick Clifton2-1/+19699
2014-10-23Refactoring/cleanup of nios2 opcodes and assembler code.Sandra Loosemore2-666/+508
2014-10-23 Sandra Loosemore <sandra@codesourcery.com> include/opcode/ * nios2.h (enum iw_format_type): New. (struct nios2_opcode): Update comments. Add size and format fields. (NIOS2_INSN_OPTARG): New. (REG_NORMAL, REG_CONTROL, REG_COPROCESSOR): New. (struct nios2_reg): Add regtype field. (GET_INSN_FIELD, SET_INSN_FIELD): Delete. (IW_A_LSB, IW_A_MSB, IW_A_SZ, IW_A_MASK): Delete. (IW_B_LSB, IW_B_MSB, IW_B_SZ, IW_B_MASK): Delete. (IW_C_LSB, IW_C_MSB, IW_C_SZ, IW_C_MASK): Delete. (IW_IMM16_LSB, IW_IMM16_MSB, IW_IMM16_SZ, IW_IMM16_MASK): Delete. (IW_IMM26_LSB, IW_IMM26_MSB, IW_IMM26_SZ, IW_IMM26_MASK): Delete. (IW_OP_LSB, IW_OP_MSB, IW_OP_SZ, IW_OP_MASK): Delete. (IW_OPX_LSB, IW_OPX_MSB, IW_OPX_SZ, IW_OPX_MASK): Delete. (IW_SHIFT_IMM5_LSB, IW_SHIFT_IMM5_MSB): Delete. (IW_SHIFT_IMM5_SZ, IW_SHIFT_IMM5_MASK): Delete. (IW_CONTROL_REGNUM_LSB, IW_CONTROL_REGNUM_MSB): Delete. (IW_CONTROL_REGNUM_SZ, IW_CONTROL_REGNUM_MASK): Delete. (OP_MASK_OP, OP_SH_OP): Delete. (OP_MASK_IOP, OP_SH_IOP): Delete. (OP_MASK_IRD, OP_SH_IRD): Delete. (OP_MASK_IRT, OP_SH_IRT): Delete. (OP_MASK_IRS, OP_SH_IRS): Delete. (OP_MASK_ROP, OP_SH_ROP): Delete. (OP_MASK_RRD, OP_SH_RRD): Delete. (OP_MASK_RRT, OP_SH_RRT): Delete. (OP_MASK_RRS, OP_SH_RRS): Delete. (OP_MASK_JOP, OP_SH_JOP): Delete. (OP_MASK_IMM26, OP_SH_IMM26): Delete. (OP_MASK_RCTL, OP_SH_RCTL): Delete. (OP_MASK_IMM5, OP_SH_IMM5): Delete. (OP_MASK_CACHE_OPX, OP_SH_CACHE_OPX): Delete. (OP_MASK_CACHE_RRS, OP_SH_CACHE_RRS): Delete. (OP_MASK_CUSTOM_A, OP_SH_CUSTOM_A): Delete. (OP_MASK_CUSTOM_B, OP_SH_CUSTOM_B): Delete. (OP_MASK_CUSTOM_C, OP_SH_CUSTOM_C): Delete. (OP_MASK_CUSTOM_N, OP_SH_CUSTOM_N): Delete. (OP_<insn>, OPX_<insn>, OP_MATCH_<insn>, OPX_MATCH_<insn>): Delete. (OP_MASK_<insn>, OP_MASK): Delete. (GET_IW_A, GET_IW_B, GET_IW_C, GET_IW_CONTROL_REGNUM): Delete. (GET_IW_IMM16, GET_IW_IMM26, GET_IW_OP, GET_IW_OPX): Delete. Include nios2r1.h to define new instruction opcode constants and accessors. (nios2_builtin_opcodes): Rename to nios2_r1_opcodes. (bfd_nios2_num_builtin_opcodes): Rename to nios2_num_r1_opcodes. (bfd_nios2_num_opcodes): Rename to nios2_num_opcodes. (NUMOPCODES, NUMREGISTERS): Delete. * nios2r1.h: New file. opcodes/ * nios2-opc.c (nios2_builtin_regs): Add regtype field initializers. (nios2_builtin_opcodes): Rename to nios2_r1_opcodes. Use new MATCH_R1_<insn> and MASK_R1_<insn> macros in initializers. Add size and format initializers. Merge 'b' arguments into 'j'. (NIOS2_NUM_OPCODES): Adjust definition. (bfd_nios2_num_builtin_opcodes): Rename to nios2_num_r1_opcodes. (nios2_opcodes): Adjust. (bfd_nios2_num_opcodes): Rename to nios2_num_opcodes. * nios2-dis.c (INSNLEN): Update comment. (nios2_hash_init, nios2_hash): Delete. (OPCODE_HASH_SIZE): New. (nios2_r1_extract_opcode): New. (nios2_disassembler_state): New. (nios2_r1_disassembler_state): New. (nios2_init_opcode_hash): Add state parameter. Adjust to use it. (nios2_find_opcode_hash): Use state object. (bad_opcode): New. (nios2_print_insn_arg): Add op parameter. Use it to access format. Remove 'b' case. (nios2_disassemble): Remove special case for nop. Remove hard-coded instruction size. gas/ * config/tc-nios2.c (nios2_insn_infoS): Add constant_bits field. (nios2_arg_infoS, nios2_arg_hash, nios2_arg_lookup): Delete. (nios2_control_register_arg_p): Delete. (nios2_coproc_reg): Delete. (nios2_relax_frag): Remove hard-coded instruction size. (md_convert_frag): Use new insn accessor macros. (nios2_diagnose_overflow): Remove hard-coded instruction size. (md_apply_fix): Likewise. (bad_opcode): New. (nios2_parse_reg): New. (nios2_assemble_expression): Remove prev_reloc parameter. Adjust uses and callers. (nios2_assemble_arg_c): New. (nios2_assemble_arg_d): New. (nios2_assemble_arg_s): New. (nios2_assemble_arg_t): New. (nios2_assemble_arg_i): New. (nios2_assemble_arg_u): New. (nios2_assemble_arg_o): New. (nios2_assemble_arg_j): New. (nios2_assemble_arg_l): New. (nios2_assemble_arg_m): New. (nios2_assemble_args): New. (nios2_assemble_args_dst): Delete. (nios2_assemble_args_tsi): Delete. (nios2_assemble_args_tsu): Delete. (nios2_assemble_args_sto): Delete. (nios2_assemble_args_o): Delete. (nios2_assemble_args_is): Delete. (nios2_assemble_args_m): Delete. (nios2_assemble_args_s): Delete. (nios2_assemble_args_tis): Delete. (nios2_assemble_args_dc): Delete. (nios2_assemble_args_cs): Delete. (nios2_assemble_args_ds): Delete. (nios2_assemble_args_ldst): Delete. (nios2_assemble_args_none): Delete. (nios2_assemble_args_dsj): Delete. (nios2_assemble_args_d): Delete. (nios2_assemble_args_b): Delete. (nios2_arg_info_structs): Delete. (NIOS2_NUM_ARGS): Delete. (nios2_consume_arg): Remove insn parameter. Use new macros. Don't check register arguments here. Remove 'b' case. (nios2_consume_separator): Move check for missing separators to... (nios2_parse_args): ...here. Remove special case for optional arguments. (output_insn): Avoid using hard-coded insn size. (output_ubranch): Likewise. (output_cbranch): Likewise. (output_call): Use new macros. (output_addi): Likewise. (output_ori): Likewise. (output_xori): Likewise. (output_movia): Likewise. (md_begin): Remove nios2_arg_info_structs initialization. (md_assemble): Initialize constant_bits field. Use nios2_parse_args instead of looking up parse function in hash table. gdb/ * nios2-tdep.c (nios2_analyze_prologue): Use new instruction field accessors and constants from nios2 opcodes update. (nios2_get_next_pc): Likewise.
2014-10-22MIPS Documentation fixesMatthew Fortune3-10/+26
gas/ * doc/as.texinfo: Update the MIPS FP ABI descriptions. * doc/c-mips.texi: Spell check and correct throughout.
2014-10-21MIPS/GAS: Correct file option settings with `.insn'Maciej W. Rozycki6-0/+56
This makes sure `HAVE_CODE_COMPRESSION' evaluates correctly when the `.insn' directive is used at the beginning of a source file before any instructions have been produced and that ELF file header's MIPS16 and microMIPS ASE flags are set correctly in the case where no instructions have been produced other than with the said directive. gas/ * config/tc-mips.c (s_insn): Set file options. gas/testsuite/ * gas/mips/insn-opts.d: New test. * gas/mips/insn-opts.s: New test source. * gas/mips/mips.exp: Run the new test.
2014-10-21[AARCH64] Add thunderx support to gasAndrew Pinski2-0/+2
This patch adds -mcpu=thunderx support to gas. OK? Tested with no regressions. ChangeLog: * config/tc-aarch64.c (aarch64_cpus): Add thunderx. * doc/c-aarch64.texi: Document that thunderx is a valid processor name.
2014-10-21gas: avoid bogus warnings in false branches of conditionalJan Beulich5-7/+36
The construct being added to the cond.s test case otherwise triggered both the "missing closing ..." and the "stray ..." (twice) warnings in _find_end_of_line(). As that code fragments suggests, this is needed to support (include) files that can be used for both assembler .include and compiler #include directives.
2014-10-21ppc: enable msgclr and msgsnd on Power8Jan Beulich3-0/+9
According to my reading of the spec it was an oversight for them to not having got enabled when Power8 support got added.
2014-10-21aarch64: move bogus assertionJan Beulich2-12/+20
Asserting "idx" to be non-negative when subsequent code handles this case is bogus. In fact the assertion triggers e.g. when mistakenly using the arm32 comment character @ following an instruction. While doing this I also noticed that despite there being local variables "detail" and "idx", not all places where they could be used did actually make use of them, so this is being adjusted at once. Finally, for the code to be slightly more robust, also change comparisons against -1 to such checking for a (non-)negative value.
2014-10-18Fix PR17493, attempted output of *GAS `reg' section* symbolAlan Modra5-8/+21
The write.c change is to make gas report an error if reg_section symbols should leak in future. The tc-i386.c change is the real fix. Note that the error isn't the most helpful, "redefined symbol cannot be used on reloc", but I'm not inclined to improve what is really an internal gas error. reg_section symbols shouldn't leak.. gas/ PR 17493 * write.c (adjust_reloc_syms): Don't allow symbols in reg_section to be reduced to reg_section section symbol. * gas/config/tc-i386.c (i386_finalize_immediate): Reject all reg_section immediates. gas/testsuite/ * gas/i386/inval-equ-2.l: Adjust.
2014-10-17Fix bad @value references in MIPS documentationMatthew Fortune2-1/+5
gas/ * doc/c-mips.texi: Fix bad @value references.
2014-10-15Bump bfd version.Tristan Gingold2-10/+14
bfd/ 2014-10-15 Tristan Gingold <gingold@adacore.com> * version.m4: Bump version to 2.25.51 * configure: Regenerate. binutils/ 2014-10-15 Tristan Gingold <gingold@adacore.com> * configure: Regenerate. gas/ 2014-10-15 Tristan Gingold <gingold@adacore.com> * configure: Regenerate. gprof/ 2014-10-15 Tristan Gingold <gingold@adacore.com> * configure: Regenerate. ld/ 2014-10-15 Tristan Gingold <gingold@adacore.com> * configure: Regenerate. opcodes/ 2014-10-15 Tristan Gingold <gingold@adacore.com> * configure: Regenerate.
2014-10-15ChangeLog typo fixAlan Modra1-1/+1
2014-10-15Fix memory overflow issue about strncatChen Gang2-1/+5
If src contains n or more bytes, strncat() writes n+1 bytes to dest (n from src plus the terminating null byte). Therefore, the size of dest must be at least strlen(dest)+n+1. * config/tc-tic4x.c (md_assemble): Correct strncat size.
2014-10-14Add NEWS markers for 2.25.Tristan Gingold2-0/+6
binutils/ 2014-10-14 Tristan Gingold <gingold@adacore.com> * NEWS: Add marker for 2.25. gas/ 2014-10-14 Tristan Gingold <gingold@adacore.com> * NEWS: Add marker for 2.25. ld/ 2014-10-14 Tristan Gingold <gingold@adacore.com> * NEWS: Add marker for 2.25.
2014-10-14Avoid undefined behaviour with signed expressionsAlan Modra5-16/+26
PR 17453 bfd/ * libbfd.c (COERCE16, COERCE32, COERCE64): Use unsigned types. (EIGHT_GAZILLION): Delete. binutils/ * dwarf.c (read_leb128): Avoid signed overflow. (read_debug_line_header): Likewise. gas/ * config/tc-i386.c (fits_in_signed_long): Use unsigned param and expression to avoid signed overflow. (fits_in_signed_byte, fits_in_unsigned_byte, fits_in_unsigned_word, fits_in_signed_word, fits_in_unsigned_long): Similarly. * expr.c (operand <'-'>): Avoid signed overflow. * read.c (s_comm_internal): Likewise.
2014-10-14sparc-aout and sparc-coff breakageAlan Modra2-1/+7
* config/tc-sparc.c (sparc_md_end): Fix unused variable warnings.
2014-10-09This is a series of patches that add support for the SPARC M7 cpu toJose E. Marchesi15-66/+522
binutils. They were discussed and approved here: https://sourceware.org/ml/binutils/2014-10/msg00038.html
2014-09-292014-09-29 Terry Guo <terry.guo@arm.com>Terry Guo3-73/+88
* as.c (create_obj_attrs_section): Move it and call it from ... * write.c (create_obj_attrs_section): ... here. (subsegs_finish_section): Refactored.
2014-09-27Do away with hash table line lookup in dwarf2dbg.cAlan Modra7-18/+39
Hash lookup is silly when we can attach the line table info directly to sections instead. Worse, hash lookup fails when we have multiple sections with the same name. gas/ * dwarf2dbg.c (all_segs_hash): Delete. (get_line_subseg): Delete last_seg, last_subseg, last_line_subseg. Retrieve line_seg for section via seg_info. * subsegs.h (segment_info_typet): Add dwarf2_line_seg. gas/testsuite/ * gas/elf/group2.d, * gas/elf/group2.s: New test. * gas/elf/elf.exp: Run it.
2014-09-23Disallow VEX/EVEX encoded instructions in 16-bit modeH.J. Lu6-4/+57
gas/ PR gas/17421 * config/tc-i386.c (md_assemble): Disallow VEX/EVEX encoded instructions in 16-bit mode. gas/testsuite/ PR gas/17421 * gas/i386/i386.exp: Run inval-16. * gas/i386/inval-16.l: New file. * gas/i386/inval-16.s: Likewise.
2014-09-22Ignore MOD field for control/debug register moveH.J. Lu5-0/+51
This patch ignores the MOD field in control/debug register move instructions. gas/testsuite/ * gas/i386/cdr.d: New file. * gas/i386/cdr.s: Likewise. * gas/i386/x86-64-cdr.d: Likewise. * gas/i386/i386.exp: Run cdr and x86-64-cdr. opcodes/ * i386-dis.c (MOD_0F20): Removed. (MOD_0F21): Likewise. (MOD_0F22): Likewise. (MOD_0F23): Likewise. (dis386_twobyte): Replace MOD_0F20, MOD_0F21, MOD_0F22 and MOD_0F23 with "movZ". (mod_table): Remove MOD_0F20, MOD_0F21, MOD_0F22 and MOD_0F23. (OP_R): Check mod/rm byte and call OP_E_register.
2014-09-22Fix various warnings seen when using gcc-5.0Alan Modra4-3/+11
* config/tc-m68k.c (md_assemble): Add assert to work around bogus trunk gcc warning. * config/tc-pj.h (md_convert_frag): Warning fix. * config/tc-xtensa.c (xg_assemble_vliw_tokens): Warning fix.
2014-09-17Fix arm-elf build failure on non-C99 systems (was using int64_t)Tristan Gingold2-2/+7
gas/ * config/tc-arm.c (move_or_literal_pool, add_to_lit_pool): Use bfd_int64_t instead of int64_t.
2014-09-16Add -mevexrcig={rne|rd|ru|rz} option to x86 assembler.Ilya Tocar59-1/+7718
It is used to control which value is encoded in rounding control bits for SAE-only EVEX instructions. gas/ * config/tc-i386.c (evexrcig): New. (build_evex_prefix): Force rounding bits. (OPTION_MEVEXRCIG): New. (md_longopts): Add mevexrcig. (md_parse_option): Handle OPTION_MEVEXRCIG. (md_show_usage): Document mevexrcig. * doc/c-i386.texi (mevexrcig): Document new option. gas/testsuite/ * gas/i386/avx512dq-rcig.s: New. * gas/i386/avx512dq-rcigrd-intel.d: Likewise. * gas/i386/avx512dq-rcigrd.d: Likewise. * gas/i386/avx512dq-rcigrne-intel.d: Likewise. * gas/i386/avx512dq-rcigrne.d: Likewise. * gas/i386/avx512dq-rcigru-intel.d: Likewise. * gas/i386/avx512dq-rcigru.d: Likewise. * gas/i386/avx512dq-rcigrz-intel.d: Likewise. * gas/i386/avx512dq-rcigrz.d: Likewise. * gas/i386/avx512er-rcig.s: Likewise. * gas/i386/avx512er-rcigrd-intel.d: Likewise. * gas/i386/avx512er-rcigrd.d: Likewise. * gas/i386/avx512er-rcigrne-intel.d: Likewise. * gas/i386/avx512er-rcigrne.d: Likewise. * gas/i386/avx512er-rcigru-intel.d: Likewise. * gas/i386/avx512er-rcigru.d: Likewise. * gas/i386/avx512er-rcigrz-intel.d: Likewise. * gas/i386/avx512er-rcigrz.d: Likewise. * gas/i386/avx512f-rcig.s: Likewise. * gas/i386/avx512f-rcigrd-intel.d: Likewise. * gas/i386/avx512f-rcigrd.d: Likewise. * gas/i386/avx512f-rcigrne-intel.d: Likewise. * gas/i386/avx512f-rcigrne.d: Likewise. * gas/i386/avx512f-rcigru-intel.d: Likewise. * gas/i386/avx512f-rcigru.d: Likewise. * gas/i386/avx512f-rcigrz-intel.d: Likewise. * gas/i386/avx512f-rcigrz.d: Likewise. * gas/i386/x86-64-avx512dq-rcig.s: Likewise. * gas/i386/x86-64-avx512dq-rcigrd-intel.d: Likewise. * gas/i386/x86-64-avx512dq-rcigrd.d: Likewise. * gas/i386/x86-64-avx512dq-rcigrne-intel.d: Likewise. * gas/i386/x86-64-avx512dq-rcigrne.d: Likewise. * gas/i386/x86-64-avx512dq-rcigru-intel.d: Likewise. * gas/i386/x86-64-avx512dq-rcigru.d: Likewise. * gas/i386/x86-64-avx512dq-rcigrz-intel.d: Likewise. * gas/i386/x86-64-avx512dq-rcigrz.d: Likewise. * gas/i386/x86-64-avx512er-rcig.s: Likewise. * gas/i386/x86-64-avx512er-rcigrd-intel.d: Likewise. * gas/i386/x86-64-avx512er-rcigrd.d: Likewise. * gas/i386/x86-64-avx512er-rcigrne-intel.d: Likewise. * gas/i386/x86-64-avx512er-rcigrne.d: Likewise. * gas/i386/x86-64-avx512er-rcigru-intel.d: Likewise. * gas/i386/x86-64-avx512er-rcigru.d: Likewise. * gas/i386/x86-64-avx512er-rcigrz-intel.d: Likewise. * gas/i386/x86-64-avx512er-rcigrz.d: Likewise. * gas/i386/x86-64-avx512f-rcig.s: Likewise. * gas/i386/x86-64-avx512f-rcigrd-intel.d: Likewise. * gas/i386/x86-64-avx512f-rcigrd.d: Likewise. * gas/i386/x86-64-avx512f-rcigrne-intel.d: Likewise. * gas/i386/x86-64-avx512f-rcigrne.d: Likewise. * gas/i386/x86-64-avx512f-rcigru-intel.d: Likewise. * gas/i386/x86-64-avx512f-rcigru.d: Likewise. * gas/i386/x86-64-avx512f-rcigrz-intel.d: Likewise. * gas/i386/x86-64-avx512f-rcigrz.d: Likewise. * gas/i386/i386.exp: Run new tests.
2014-09-16NDS32: Code refactoring of relaxation.Kuan-Lin Chen3-1289/+2003
Refactor each relaxation pattern to raise the maintainability. In origin, all patterns is analysed in nds32_elf_relax_section, so it is hard to debug and maintain. Therefore, we classify all patterns into different functions in this patch. Moreover, we adjust all optimizations into nds32_elf_relax_section to take these optimizations in turn. This can promise all relaxation being done after calling gld${EMULATION_NAME}_after_allocation.
2014-09-15Rename OPTION_omit_lock_prefix to OPTION_OMIT_LOCK_PREFIXH.J. Lu2-3/+10
* config/tc-i386.c (OPTION_omit_lock_prefix): Renamed to ... (OPTION_OMIT_LOCK_PREFIX): This. (md_longopts): Updated. (md_parse_option): Likewise.
2014-09-15Add support for MIPS R6.Andrew Bennett82-100/+6826
bfd/ * aoutx.h (NAME (aout, machine_type)): Add mips32r6 and mips64r6. * archures.c (bfd_architecture): Likewise. * bfd-in2.h (bfd_architecture): Likewise. (bfd_reloc_code_real): Add relocs BFD_RELOC_MIPS_21_PCREL_S2, BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3 and BFD_RELOC_MIPS_19_PCREL_S2. * cpu-mips.c (arch_info_struct): Add mips32r6 and mips64r6. * elf32-mips.c: Define relocs R_MIPS_PC21_S2, R_MIPS_PC26_S2 R_MIPS_PC18_S3, R_MIPS_PC19_S2, R_MIPS_PCHI16 and R_MIPS_PCLO16. (mips_reloc_map): Add entries for BFD_RELOC_MIPS_21_PCREL_S2, BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3, BFD_RELOC_MIPS_19_PCREL_S2, BFD_RELOC_HI16_S_PCREL and BFD_RELOC_LO16_PCREL. * elf64-mips.c: Define REL, and RELA relocations R_MIPS_PC21_S2, R_MIPS_PC26_S2, R_MIPS_PC18_S3, R_MIPS_PC19_S2, R_MIPS_PCHI16 and R_MIPS_PCLO16. (mips_reloc_map): Add entries for BFD_RELOC_MIPS_21_PCREL_S2, BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3, BFD_RELOC_MIPS_19_PCREL_S2, BFD_RELOC_HI16_S_PCREL and BFD_RELOC_LO16_PCREL. * elfn32-mips.c: Likewise. * elfxx-mips.c (MIPSR6_P): New define. (mipsr6_exec_plt_entry): New array. (hi16_reloc_p): Add support for R_MIPS_PCHI16. (lo16_reloc_p): Add support for R_MIPS_PCLO16. (aligned_pcrel_reloc_p): New function. (mips_elf_relocation_needs_la25_stub): Add support for relocs: R_MIPS_PC21_S2 and R_MIPS_PC26_S2. (mips_elf_calculate_relocation): Add support for relocs: R_MIPS_PC21_S2, R_MIPS_PC26_S2, R_MIPS_PC18_S3, R_MIPS_PC19_S2, R_MIPS_PCHI16 and R_MIPS_PCLO16. (_bfd_elf_mips_mach): Add support for mips32r6 and mips64r6. (mips_elf_add_lo16_rel_addend): Add support for R_MIPS_PCHI16. (_bfd_mips_elf_check_relocs): Add support for relocs: R_MIPS_PC21_S2 and R_MIPS_PC26_S2. (_bfd_mips_elf_relocate_section): Add a check for unaligned pc relative relocs. (_bfd_mips_elf_finish_dynamic_symbol): Add support for MIPS r6 plt entry. (mips_set_isa_flags): Add support for mips32r6 and mips64r6. (_bfd_mips_elf_print_private_bfd_data): Likewise. (mips_32bit_flags_p): Add support for mips32r6. * libbfd.h (bfd_reloc_code_real_names): Add entries for BFD_RELOC_MIPS_21_PCREL_S2, BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3 and BFD_RELOC_MIPS_19_PCREL_S2. * reloc.c: Document relocs BFD_RELOC_MIPS_21_PCREL_S2, BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3 and BFD_RELOC_MIPS_19_PCREL_S2. binutils/ * readelf.c (get_machine_flags): Add support for mips32r6 and mips64r6. elfcpp/ * mips.h (E_MIPS_ARCH_32R6, E_MIPS_ARCH_64R6): New enum constants. gas/ * config/tc-mips.c (mips_nan2008): New static global. (mips_flag_nan2008): Removed. (LL_SC_FMT): New define. (COP12_FMT): Updated. (ISA_IS_R6): New define. (ISA_HAS_64BIT_REGS): Add mips64r6. (ISA_HAS_DROR): Likewise. (ISA_HAS_64BIT_FPRS): Add mips32r6 and mips64r6. (ISA_HAS_ROR): Likewise. (ISA_HAS_ODD_SINGLE_FPR): Likewise. (ISA_HAS_MXHC1): Likewise. (hilo_interlocks): Likewise. (md_longopts): Likewise. (ISA_HAS_LEGACY_NAN): New define. (options): Add OPTION_MIPS32R6 and OPTION_MIPS64R6. (mips_ase): Add field rem_rev. (mips_ases): Updated to add which ISA an ASE was removed in. (mips_isa_rev): Add support for mips32r6 and mips64r6. (mips_check_isa_supports_ase): Add support to check if an ASE has been removed in the specified MIPS ISA revision. (validate_mips_insn): Skip '-' character. (macro_build): Likewise. (mips_check_options): Prevent R6 working with fp32, mips16, micromips, or branch relaxation. (file_mips_check_options): Set R6 floating point registers to 64 bit. Also deal with the nan2008 option. (limited_pcrel_reloc_p): Add relocs: BFD_RELOC_MIPS_21_PCREL_S2, BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3, BFD_RELOC_MIPS_19_PCREL_S2, BFD_RELOC_HI16_S_PCREL and BFD_RELOC_LO16_PCREL. (operand_reg_mask): Add support for OP_SAME_RS_RT, OP_CHECK_PREV and OP_NON_ZERO_REG. (match_check_prev_operand): New static function. (match_same_rs_rt_operand): New static function. (match_non_zero_reg_operand): New static function. (match_operand): Added entries for: OP_SAME_RS_RT, OP_CHECK_PREV and OP_NON_ZERO_REG. (insns_between): Added case to deal with forbidden slots. (append_insn): Added support for relocs: BFD_RELOC_MIPS_21_PCREL_S2 and BFD_RELOC_MIPS_26_PCREL_S2. (match_insn): Add support for operands -A, -B, +' and +". Also skip '-' character. (mips_percent_op): Add entries for %pcrel_hi and %pcrel_lo. (md_parse_option): Add support for mips32r6 and mips64r6. Also update the nan option handling. (md_pcrel_from): Add cases for relocs: BFD_RELOC_MIPS_21_PCREL_S2, BFD_RELOC_MIPS_26_PCREL_S2. (mips_force_relocation): Prevent forced relaxation for MIPS r6. (md_apply_fix): Add support for relocs: BFD_RELOC_MIPS_21_PCREL_S2, BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3, BFD_RELOC_MIPS_19_PCREL_S2, BFD_RELOC_HI16_S_PCREL and BFD_RELOC_LO16_PCREL. (s_mipsset): Add support for mips32r6 and mips64r6. (s_nan): Update to support the new nan2008 framework. (tc_gen_reloc): Add relocs: BFD_RELOC_MIPS_21_PCREL_S2, BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3, BFD_RELOC_MIPS_19_PCREL_S2, BFD_RELOC_HI16_S_PCREL and BFD_RELOC_LO16_PCREL. (mips_elf_final_processing): Updated to use the mips_nan2008. (mips_cpu_info_table): Add entries for mips32r6 and mips64r6. (macro): Enable ldc2, sdc2, ll, lld, swc2, sc, scd, cache, pref macros for R6. (mips_fix_adjustable): Make PC relative R6 relocations relative to the symbol and not the section. * configure.ac: Add support for mips32r6 and mips64r6. * configure: Regenerate. * doc/c-mips.texi: Document the -mips32r6 and -mips64r6 command line options. * doc/as.texinfo: Likewise. gas/testsuite/ * gas/mips/24k-triple-stores-1.s: If testing for r6 prevent non-supported instructions from being tested. * gas/mips/24k-triple-stores-2.s: Likewise. * gas/mips/24k-triple-stores-3.s: Likewise. * gas/mips/24k-triple-stores-6.s: Likewise. * gas/mips/beq.s: Likewise. * gas/mips/eva.s: Likewise. * gas/mips/ld-zero-3.s: Likewise. * gas/mips/mips32-cp2.s: Likewise. * gas/mips/mips32.s: Likewise. * gas/mips/mips4.s: Likewise. * gas/mips/add.s: Don't test the add instructions if r6, and add padding. * gas/mips/add.d: Check for a triple dot not a nop at the end of the disassembly output. * gas/mips/micromips@add.d: Likewise. * gas/mips/mipsr6@24k-branch-delay-1.d: New file. * gas/mips/mipsr6@24k-triple-stores-1.d: New file. * gas/mips/mipsr6@24k-triple-stores-2-llsc.d: New file. * gas/mips/mipsr6@24k-triple-stores-2.d: New file. * gas/mips/mipsr6@24k-triple-stores-3.d: New file. * gas/mips/mipsr6@24k-triple-stores-6.d: New file. * gas/mips/mipsr6@add.d: New file. * gas/mips/mipsr6@attr-gnu-4-1-msingle-float.l: New file. * gas/mips/mipsr6@attr-gnu-4-1-msingle-float.s: New file. * gas/mips/mipsr6@attr-gnu-4-1-msoft-float.l: New file. * gas/mips/mipsr6@attr-gnu-4-1-msoft-float.s: New file. * gas/mips/mipsr6@attr-gnu-4-2-mdouble-float.l: New file. * gas/mips/mipsr6@attr-gnu-4-2-mdouble-float.s: New file. * gas/mips/mipsr6@beq.d: New file. * gas/mips/mipsr6@bge.d: New file. * gas/mips/mipsr6@bgeu.d: New file. * gas/mips/mipsr6@blt.d: New file. * gas/mips/mipsr6@bltu.d: New file. * gas/mips/mipsr6@branch-misc-1.d: New file. * gas/mips/mipsr6@branch-misc-2-64.d: New file. * gas/mips/mipsr6@branch-misc-2pic-64.d: New file. * gas/mips/mipsr6@branch-misc-4-64.d: New file. * gas/mips/mipsr6@cache.d: New file. * gas/mips/mipsr6@eva.d: New file. * gas/mips/mipsr6@jal-svr4pic-noreorder.d: New file. * gas/mips/mipsr6@jal-svr4pic.d: New file. * gas/mips/mipsr6@ld-zero-2.d: New file. * gas/mips/mipsr6@ld-zero-3.d: New file. * gas/mips/mipsr6@loc-swap-dis.d: New file. * gas/mips/mipsr6@mips32-cp2.d: New file. * gas/mips/mipsr6@mips32-imm.d: New file. * gas/mips/mipsr6@mips32.d: New file. * gas/mips/mipsr6@mips32r2.d: New file. * gas/mips/mipsr6@mips4-fp.d: New file. * gas/mips/mipsr6@mips4-fp.l: New file. * gas/mips/mipsr6@mips4-fp.s: New file. * gas/mips/mipsr6@mips4.d: New file. * gas/mips/mipsr6@mips5-fp.d: New file. * gas/mips/mipsr6@mips5-fp.l: New file. * gas/mips/mipsr6@mips5-fp.s: New file. * gas/mips/mipsr6@mips64.d: New file. * gas/mips/mipsr6@msa-branch.d: New file. * gas/mips/mipsr6@msa.d: New file. * gas/mips/mipsr6@pref.d: New file. * gas/mips/mipsr6@relax-swap3.d: New file. * gas/mips/r6-64-n32.d: New file. * gas/mips/r6-64-n64.d: New file. * gas/mips/r6-64-removed.l: New file. * gas/mips/r6-64-removed.s: New file. * gas/mips/r6-64.s: New file. * gas/mips/r6-attr-none-double.d: New file. * gas/mips/r6-n32.d: New file. * gas/mips/r6-n64.d: New file. * gas/mips/r6-removed.l: New file. * gas/mips/r6-removed.s: New file. * gas/mips/r6.d: New file. * gas/mips/r6.s: New file. * gas/mips/mipsr6@mips32-dsp.d: New file. * gas/mips/mipsr6@mips32-dspr2.d: New file. * gas/mips/mipsr6@mips32r2-ill.l: New file. * gas/mips/mipsr6@mips32r2-ill.s: New file. * gas/mips/cache.s: Add r6 instruction varients. * gas/mips/mips.exp: Add support for the mips32r6 and mips64r6 architectures. Also prevent non r6 supported tests from running. Finally, add in support for running the new r6 tests. (run_dump_test_arch): Add support for mipsr6 tests. (run_list_test_arch): Add support for using files of the form arch@testname.l . include/elf/ * mips.h: Add relocs: R_MIPS_PC21_S2, R_MIPS_PC26_S2, R_MIPS_PC18_S3, R_MIPS_PC19_S2, R_MIPS_PCHI16 and R_MIPS_PCLO16. (E_MIPS_ARCH_32R6): New define. (E_MIPS_ARCH_64R6): New define. include/opcode/ * mips.h (mips_operand_type): Add new entries: OP_SAME_RS_RT, OP_CHECK_PREV and OP_NON_ZERO_REG. Add descriptions for the MIPS R6 instruction arguments: -a, -b, -d, -s, -t, -u, -v, -w, -x, -y, -A, -B, +I, +O, +R, +:, +\, +", +; (mips_check_prev_operand): New struct. (INSN2_FORBIDDEN_SLOT): New define. (INSN_ISA32R6): New define. (INSN_ISA64R6): New define. (INSN_UPTO32R6): New define. (INSN_UPTO64R6): New define. (mips_isa_table): Add INSN_UPTO32R6 and INSN_UPTO64R6. (ISA_MIPS32R6): New define. (ISA_MIPS64R6): New define. (CPU_MIPS32R6): New define. (CPU_MIPS64R6): New define. (cpu_is_member): Add cases for CPU_MIPS32R6, and CPU_MIPS64R6. ld/ * ldmain.c (get_emulation): Add support for -mips32r6 and -mips64r6. opcodes/ * mips-dis.c (mips_arch_choices): Add entries for mips32r6 and mips64r6. (parse_mips_dis_option): Allow MSA and virtualization support for mips64r6. (mips_print_arg_state): Add fields dest_regno and seen_dest. (mips_seen_register): New function. (print_insn_arg): Refactored code to use mips_seen_register function. Add support for OP_SAME_RS_RT, OP_CHECK_PREV and OP_NON_ZERO_REG. Changed OP_REPEAT_DEST_REG case to print out the register rather than aborting. (print_insn_args): Add length argument. Add code to correctly calculate the instruction address for pc relative instructions. (validate_insn_args): New static function. (print_insn_mips): Prevent jalx disassembling for r6. Use validate_insn_args. (print_insn_micromips): Use validate_insn_args. all the arguments are valid. * mips-formats.h (PREV_CHECK): New define. * mips-opc.c (decode_mips_operand): Add support for -a, -b, -d, -s, -t, -u, -v, -w, -x, -y, -A, -B, +I, +O, +R, +:, +\, +", +; (RD_pc): New define. (FS): New define. (I37): New define. (I69): New define. (mips_builtin_opcodes): Add MIPS R6 instructions. Exclude recoded MIPS R6 instructions from MIPS R2 instructions.
2014-09-15Ensure softfloat and singlefloat take precedence in consistency checksMatthew Fortune12-22/+45
gas/ * tc-mips.c (check_fpabi): Move softfloat and singlefloat checks higher. gas/testsuite/ * gas/mips/attr-gnu-4-5-msingle-float.l: New file. * gas/mips/attr-gnu-4-5-msingle-float.s: Likewise. * gas/mips/attr-gnu-4-5-msoft-float.l: Likewise. * gas/mips/attr-gnu-4-5-msoft-float.s: Likewise. * gas/mips/attr-gnu-4-6-msingle-float.l: Update expected output. * gas/mips/attr-gnu-4-6-msoft-float.l: Likewise. * gas/mips/attr-gnu-4-7-msingle-float.l: Likewise. * gas/mips/attr-gnu-4-7-msoft-float.l: Likewise. * gas/mips/mips.exp: Update expected output for FP ABI 5,6,7.
2014-09-12gas: fix bumping to architectures >v9 in sparc64-* targets.Jose E. Marchesi2-9/+25
This patch fixes two related problems: - By default gas is supposed to bump the current architecture (starting with v6) as it finds "higher" instructions as the assembling progresses. There are four possible cases depending on the usage of the -A and -bump options: (a) No -A and -bump are specified. In this case max_architecture must be the highest architecture not conflicting with the default architecture. The default opcode architecture is indirectly set in configure.tgt and is "v9" in sparc64 systems (from "v9-64"). Thus the maximum architecture in sparc64 systems must be "v9b". No warnings are echoed when the assembly of an instruction bumps the current architecture. (b) Only -bump is specified. This is like (a) but warnings are always issued when the assembly of an instruction bumps the current architecture. (c) Only -A is specified. In this case bumping to a new architecture is an error. (d) Both -A and -bump are specified. In this case max_architecture must be the highest architecture not conflicting with the default architecture, but warnings are only to be issued when bumping to an architecture higher than the architecture selected in the -A option. `max_architecture' is a global variable defined in tc-sparc.c which is initialized to the opcode architecture corresponding to the default architecture ("sparclite" for sparc-* targets and "v9" for sparc64-* targets). Then in `md_begin' it is set to the highest non-conflicting architecture, but only when both -A and -bump are specified. Thus (a) does not work: $ echo "fzero %f0" | as {standard input}: Assembler messages: {standard input}:1: Error: Architecture mismatch on "fzero". {standard input}:1: (Requires v9a|v9b; requested architecture is v9.) Neither (b): $ echo "fzero %f0" | as -bump {standard input}: Assembler messages: {standard input}:1: Error: Architecture mismatch on "fzero". {standard input}:1: (Requires v9a|v9b; requested architecture is v9.) Only (d) does: $ echo "fzero %f0" | as -Av9 -bump {standard input}: Assembler messages: {standard input}:1: Warning: architecture bumped from "v6" to "v9a" on "fzero" This patch fixes that function to "upgrade" `max_architecture' also in the (a) and (b) cases. Note that this problem becomes apparent only in sparc64-* targets because in sparc-* targets the default architecture is the "higher" among the 32bit architectures ("sparclite"). - Gas maintains a set of hardware capabilities associated with each gas architecture, in `sparc_arch_table'. On the other hand libopcodes maintains a set of hardware capabilities needed by each individual sparc instruction. When an instruction is assembled in `sparc_ip' gas checks for the presence of the hardware capabilities required by the instruction, emitting an error if some capability is missing. However, this mechanism does not work properly if the current architecture is bumped due to an instruction requiring new hw capabilities not present on either the default architecture or an architecture specified with -A: $ echo "fzero %f0" | as -bump {standard input}: Assembler messages: {standard input}:1: Warning: architecture bumped from "v6" to "v9a" on "fzero" {standard input}:1: Error: Hardware capability "vis" not enabled for "fzero". This patch fixes this by adding the set of required hw caps of an instruction if it triggers an architecture bump. The patch has been tested in sparc64-unknown-linux-gnu. gas/ChangeLog: 2014-09-12 Jose E. Marchesi <jose.marchesi@oracle.com> * config/tc-sparc.c (sparc_ip): Update the set of allowed hwcaps when bumping the current architecture. (md_begin): Adjust the highetst architecture level also when a specific architecture is not requested.
2014-09-12Add mips*-img-elf* target triple.Andrew Bennett4-2/+13
/ * configure.ac: Add mips*-img-elf* target triple. * configure: Regenerate. bfd/ * config.bfd: Add mips*-img-elf* target triple. gas/ * configure.tgt: Add mips*-img-elf* target triple. gas/testsuite/ * gas/mips/mips.exp: Add mips*-img-elf* target triple. binutils/testsuite/ * binutils-all/objcopy.exp: Add mips*-img-elf* target triple. * binutils-all/readelf.exp: Likewise. ld/ * configure.tgt: Add mips*-img-elf* target triple. ld/testsuite/ * ld-mips-elf/mips-elf.exp: Add support for mips*-img-elf* target triple.
2014-09-12Fix tc-i386.c -Werror=logical-not-parentheses errorAlan Modra2-6/+12
* config/tc-i386.c (match_template): Remove redundant "!!" testing single-bit bitfields. (build_modrm_byte): Don't compare single-bit bitfields to "1".
2014-09-10Properly handle suffix for iret and sysretH.J. Lu8-9/+159
gas/testsuite/ * gas/i386/i386.exp: Run suffix-intel, x86-64-suffix and x86-64-suffix-intel. * gas/i386/suffix.s: Add tests for iret and sysret. * gas/i386/suffix.d: Updated. * gas/i386/suffix-intel.d: New file. * gas/i386/x86-64-suffix-intel.d: Likewise. * gas/i386/x86-64-suffix.d: Likewise. * gas/i386/x86-64-suffix.s: Likewise. opcodes/ * i386-dis.c (dis386): Replace "P" with "%LP" for iret and sysret. (putop): Handle "%LP".
2014-09-11Move ELF section headers to end of object fileAlan Modra29-76/+107
Currently, section ordering differs a little for non-loaded reloc sections output by ld -emit-relocs or ld -r and that after passing such objects through objcopy. Not that it really matters, but it would be better for a simple objcopy to produce an unchanged output object file. Also, section headers are put somewhere in the middle of the non-loaded sections, again slightly differently for ld and objcopy. This patch fixes these discrepancies and puts section headers last, which is where gold puts them, and is where bfd_from_remote_memory wrongly assumed they will be found. bfd/ * elf.c (assign_file_positions_except_relocs): Move section header placement to.. (_bfd_elf_assign_file_positions_for_relocs): ..here. Make static. * elf-bfd.h (_bfd_elf_assign_file_positions_for_relocs): Delete. * elflink.c (bfd_elf_final_link): Don't call above function. gas/testsuite/ * gas/arm/got_prel.d: Adjust for changed section header placement. * gas/i386/ilp32/x86-64-size-1.d: Likewise. * gas/i386/ilp32/x86-64-size-3.d: Likewise. * gas/i386/ilp32/x86-64-size-5.d: Likewise. * gas/i386/ilp32/x86-64-unwind.d: Likewise. * gas/i386/size-1.d: Likewise. * gas/i386/size-3.d: Likewise. * gas/i386/x86-64-size-1.d: Likewise. * gas/i386/x86-64-size-3.d: Likewise. * gas/i386/x86-64-size-5.d: Likewise. * gas/i386/x86-64-unwind.d: Likewise. * gas/ia64/alias-ilp32.d: Likewise. * gas/ia64/alias.d: Likewise. * gas/ia64/group-1.d: Likewise. * gas/ia64/group-2.d: Likewise. * gas/ia64/secname-ilp32.d: Likewise. * gas/ia64/secname.d: Likewise. * gas/ia64/unwind-ilp32.d: Likewise. * gas/ia64/unwind.d: Likewise. * gas/mmix/bspec-1.d: Likewise. * gas/mmix/bspec-2.d: Likewise. * gas/mmix/byte-1.d: Likewise. * gas/mmix/loc-1.d: Likewise. * gas/mmix/loc-2.d: Likewise. * gas/mmix/loc-3.d: Likewise. * gas/mmix/loc-4.d: Likewise. * gas/mmix/loc-5.d: Likewise. * gas/tic6x/scomm-directive-4.d: Likewise. ld/testsuite/ * ld-aarch64/emit-relocs-local-addend.d: Adjust for changed section header placement. * ld-aarch64/local-addend-r.d: Likewise. * ld-mmix/bspec1.d: Likewise. * ld-mmix/bspec2.d: Likewise. * ld-mmix/local1.d: Likewise. * ld-mmix/local3.d: Likewise. * ld-mmix/local5.d: Likewise. * ld-mmix/local7.d: Likewise. * ld-mmix/undef-3.d: Likewise. * ld-sh/sh64/crange3-cmpct.rd: Likewise. * ld-sh/sh64/crange3-media.rd: Likewise. * ld-sh/sh64/crangerel1.rd: Likewise. * ld-sh/sh64/crangerel2.rd: Likewise. * ld-tic6x/common.d: Likewise. * ld-tic6x/shlib-1.rd: Likewise. * ld-tic6x/shlib-1b.rd: Likewise. * ld-tic6x/shlib-1r.rd: Likewise. * ld-tic6x/shlib-1rb.rd: Likewise. * ld-tic6x/shlib-app-1.rd: Likewise. * ld-tic6x/shlib-app-1b.rd: Likewise. * ld-tic6x/shlib-app-1r.rd: Likewise. * ld-tic6x/shlib-app-1rb.rd: Likewise. * ld-tic6x/shlib-noindex.rd: Likewise. * ld-tic6x/static-app-1.rd: Likewise. * ld-tic6x/static-app-1b.rd: Likewise. * ld-tic6x/static-app-1r.rd: Likewise. * ld-tic6x/static-app-1rb.rd: Likewise. * ld-x86-64/ilp32-4.d: Likewise. * ld-x86-64/split-by-file-nacl.rd: Likewise. * ld-x86-64/split-by-file.rd: Likewise.
2014-09-09[PATCH][ARM] Add Cortex-A17 support to gasKyrylo Tkachov2-0/+6
* config/tc-arm.c (arm_cpus): Add cortex-a17.
2014-09-06MIPS testsuite cleanup - part 3Matthew Fortune9-20/+31
gas/testsuite/ * gas/mips/attr-gnu-abi-fp-1.d: Relax expected output. * gas/mips/elf_ase_micromips-2.d: Likewise. * gas/mips/elf_ase_micromips.d: Likewise. * gas/mips/elf_ase_mips16-2.d: Likewise. * gas/mips/elf_ase_mips16.d: Likewise. * gas/mips/module-mfp32.d: Likewise. * gas/mips/module-msingle-float.d: Likewise. * gas/mips/module-msoft-float.d: Likewise.
2014-09-06MIPS testsuite cleanup - part 2Matthew Fortune2-2/+7
gas/testsuite/ * gas/mips/module-defer-warn2.l: Ignore differences in output from 64-bit vs 32-bit targets using O32.
2014-09-06MIPS testsuite cleanup - part 1Matthew Fortune10-15/+55
binutils/testsuite/ * binutils-all/readelf.ss-mips: Account for new sections. gas/testsuite/ * gas/elf/type.e: Account for new sections. * gas/mips/mips16-e.d: Likewise. * gas/mips/mips16-f.d: Likewise. * gas/mips/mipsel16-e.d: Likewise. * gas/mips/mipsel16-f.d: Likewise. * gas/mips/tmips16-e.d: Appropriately escape dots. * gas/mips/tmips16-f.d: Likewise. * gas/mips/tmipsel16-e.d: Likewise. * gas/mips/tmipsel16-f.d: Likewise.
generated by cgit v1.1 at 2024-11-20 09:10:46 +0000