Age | Commit message (Expand) | Author | Files | Lines |
2016-10-06 | -Wimplicit-fallthrough error fixes | Alan Modra | 9 | -10/+28 |
2016-10-06 | bison warning fixes | Alan Modra | 3 | -2/+7 |
2016-09-30 | [AArch64] PR target/20553, fix opcode mask for SIMD multiply by element | Jiong Wang | 3 | -0/+22 |
2016-09-29 | Add .cfi_val_offset GAS command. | Andreas Krebbel | 6 | -0/+76 |
2016-09-29 | Disallow 3-operand cmp[l][i] for ppc64 | Alan Modra | 4 | -4/+12 |
2016-09-26 | tc-xtensa.c: fixup xg_reverse_shift_count typo | Trevor Saunders | 2 | -1/+6 |
2016-09-26 | When building target binaries, ensure that the warning flags selected for the... | Vlad Zakharov | 4 | -6/+58 |
2016-09-26 | PowerPC .gnu.attributes | Alan Modra | 2 | -0/+29 |
2016-09-22 | Remove legacy basepri_mask MRS/MSR special reg | Thomas Preud'homme | 2 | -1/+5 |
2016-09-21 | [AArch64] Print spaces after commas in addresses | Richard Sandiford | 16 | -9612/+9633 |
2016-09-21 | [AArch64] Use "must" rather than "should" in error messages | Richard Sandiford | 6 | -80/+90 |
2016-09-21 | [AArch64] Add SVE condition codes | Richard Sandiford | 11 | -69/+228 |
2016-09-21 | Fix misplaced ChangeLog | Richard Sandiford | 2 | -11/+15 |
2016-09-21 | [AArch64][SVE 32/32] Add SVE tests | Richard Sandiford | 15 | -0/+79428 |
2016-09-21 | [AArch64][SVE 31/32] Add SVE instructions | Richard Sandiford | 3 | -1/+27 |
2016-09-21 | [AArch64][SVE 29/32] Add new SVE core & FP register operands | Richard Sandiford | 2 | -0/+11 |
2016-09-21 | [AArch64][SVE 28/32] Add SVE FP immediate operands | Richard Sandiford | 2 | -3/+44 |
2016-09-21 | [AArch64][SVE 27/32] Add SVE integer immediate operands | Richard Sandiford | 2 | -0/+32 |
2016-09-21 | [AArch64][SVE 26/32] Add SVE MUL VL addressing modes | Richard Sandiford | 2 | -15/+68 |
2016-09-21 | [AArch64][SVE 25/32] Add support for SVE addressing modes | Richard Sandiford | 2 | -23/+237 |
2016-09-21 | [AArch64][SVE 24/32] Add AARCH64_OPND_SVE_PATTERN_SCALED | Richard Sandiford | 2 | -1/+49 |
2016-09-21 | [AArch64][SVE 23/32] Add SVE pattern and prfop operands | Richard Sandiford | 2 | -0/+71 |
2016-09-21 | [AArch64][SVE 22/32] Add qualifiers for merging and zeroing predication | Richard Sandiford | 2 | -4/+61 |
2016-09-21 | [AArch64][SVE 21/32] Add Zn and Pn registers | Richard Sandiford | 2 | -31/+148 |
2016-09-21 | [AArch64][SVE 20/32] Add support for tied operands | Richard Sandiford | 2 | -0/+10 |
2016-09-21 | [AArch64][SVE 13/32] Add an F_STRICT flag | Richard Sandiford | 2 | -4/+6 |
2016-09-21 | [AArch64][SVE 12/32] Remove boolean parameters from parse_address_main | Richard Sandiford | 4 | -24/+57 |
2016-09-21 | [AArch64][SVE 11/32] Tweak aarch64_reg_parse_32_64 interface | Richard Sandiford | 5 | -339/+371 |
2016-09-21 | [AArch64][SVE 10/32] Move range check out of parse_aarch64_imm_float | Richard Sandiford | 2 | -8/+11 |
2016-09-21 | [AArch64][SVE 09/32] Improve error messages for invalid floats | Richard Sandiford | 4 | -6/+34 |
2016-09-21 | [AArch64][SVE 08/32] Generalise aarch64_double_precision_fmovable | Richard Sandiford | 2 | -33/+37 |
2016-09-21 | [AArch64][SVE 07/32] Replace hard-coded uses of REG_TYPE_R_Z_BHSDQ_V | Richard Sandiford | 2 | -22/+43 |
2016-09-21 | [AArch64][SVE 06/32] Generalise parse_neon_reg_list | Richard Sandiford | 2 | -5/+15 |
2016-09-21 | [AArch64][SVE 05/32] Rename parse_neon_type_for_operand | Richard Sandiford | 2 | -2/+8 |
2016-09-21 | [AArch64][SVE 04/32] Rename neon_type_el to vector_type_el | Richard Sandiford | 2 | -16/+29 |
2016-09-21 | [AArch64][SVE 03/32] Rename neon_el_type to vector_el_type | Richard Sandiford | 2 | -4/+12 |
2016-09-21 | [AArch64][SVE 01/32] Remove parse_neon_operand_type | Richard Sandiford | 2 | -27/+9 |
2016-09-16 | [ARC] Disassemble correctly extension instructions. | Claudiu Zissulescu | 3 | -0/+27 |
2016-09-15 | gas: run the sparc test dcti-couples-v9 only in ELF targets. | Jose E. Marchesi | 2 | -1/+7 |
2016-09-14 | Modify POWER9 support to match final ISA 3.0 documentation. | Peter Bergner | 3 | -65/+19 |
2016-09-14 | gas: improve architecture mismatch diagnostics in sparc | Jose E. Marchesi | 2 | -1/+6 |
2016-09-14 | gas: detect DCTI couples in sparc | Jose E. Marchesi | 11 | -18/+133 |
2016-09-14 | [ARC] Fix parsing dtpoff relocation expression. | Claudiu Zissulescu | 4 | -1/+30 |
2016-09-12 | S/390: Add alternate processor names. | Andreas Krebbel | 4 | -29/+70 |
2016-09-12 | S/390: Fix facility bit default. | Andreas Krebbel | 2 | -1/+8 |
2016-09-12 | S/390: Fix kmctr instruction type. | Patrick Steuer | 2 | -1/+5 |
2016-09-08 | Allow PROCESSOR_IAMCU for Intel MCU | H.J. Lu | 2 | -1/+6 |
2016-09-07 | X86: Allow additional ISAs for IAMCU in assembler | H.J. Lu | 11 | -30/+50 |
2016-09-07 | [arm] Automatically enable CRC instructions on supported ARMv8-A CPUs. | Richard Earnshaw | 2 | -9/+14 |
2016-08-31 | PowerPC VLE sh_flags and p_flags | Alan Modra | 2 | -5/+15 |