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2023-08-27MIPS: Use 64-bit a ABI by default for `mipsisa64*-*-linux*' targetsYunQiang Su2-6/+6
Following the arrangement in GCC select a 64-bit ABI by default, either n32 or n64, rather than o32 for `mipsisa64*-*-linux*' targets, just as with the corresponding `mips64*-*-linux*' targets.
2023-08-25bfd: correct relocation handling for objcopy COFF -> ELFJan Beulich1-3/+3
While documented to not be reliable, it is still odd for objcopy to silently produce bad output when converting COFF/PE object files to ELF ones. The issue there is that relocation addends all are screwed up by subtracting the symbol's section offset. In the COFF/PE world, to my knowledge, section contents stores the addends alone, not the result of symbol value plus addend. Hence the compensation talked about in a comment ahead of the sole use site of CALC_ADDEND() may need to account for the VMA (which is always zero for object files anyway), but not for the symbol value. The coff-sh.c adjustment is based upon guessing that behavior there is the same. Note also how coff-aarch64.c short-circuits CALC_ADDEND() altogether, which may suggest that a much simpler macro might do for the COFF_WITH_PE case in the three arch-specific files touched here. For (at least) Arm/WinCE this actually results in more appropriate objdump output as well, as can be seen in the one testcase which has its expectations adjusted (the generated binary doesn't change).
2023-08-25gas/ELF: widen use of $dump_opts in testsuiteJan Beulich8-29/+11
Rather than special-casing rx-*-* for section30, force use of conventional section names uniformly. By further passing $dump_opts to a few more tests, a number of xfail-s (and one notarget) can be eliminated (some of which had wrong justifications in associated comments anyway). Note that section7 and section15 need to be left alone: The harness fiddling with section names there didn't help before and is getting in the way now. For section12b, section16b, and most of the Dwarf tests nothing changes. Interestingly by passing $dump_opts the need to xfail section11 for LoongArch and RISC-V also goes away.
2023-08-25gas/ELF: allow "inheriting" section attributes and typeJan Beulich5-3/+162
While --sectname-subst is nice, it isn't enough to e.g. mimic -f{function,data}-sections in assembly code, when such use is to be optional (e.g. dependent upon some configuration setting). Assign meaning to '+' and '-' as section attribute letters, allowing to inherit the prior section's attributes (and possibly type) along with adding or removing some. Note that documenting the interaction with '?' as undefined is a precautionary measure. While touching the function invocation, stop using |= on the result of obj_elf_parse_section_letters(): "attr" is firmly zero ahead of the call.
2023-08-24kvx: use {u,}int32_t and {u,}int64_tPaul Iannetta3-19/+19
gas/ * config/kvx-parse.c (promote_token): Use {u,}int32_t and {u,}int64_t. (get_token_class): Likewise. * config/tc-kvx.c (insert_operand): Likewise. * config/tc-kvx.h (struct token_s): Likewise. (struct token_list): Likewise. opcodes/ * kvx-dis.c (struct decoded_insn): Use {u,}int32_t and {u,}int64_t. (decode_insn): Likewise. (print_insn_kvx): Likewise. (decode_prologue_epilogue_bundle): Likewise. * kvx-dis.h (struct kvx_prologue_epilogue_insn): Likewise.
2023-08-24kvx: fix handling of STB_GNU_UNIQUE symbolsPaul Iannetta1-6/+4
When processing a STB_GNU_UNIQUE symbol we did not update has_gnu_osabi correctly. * config/tc-kvx.c (kvx_end): Do not write to e_ident. (kvx_type): Properly handle STB_GNU_UNIQUE symbols.
2023-08-23kvx: O_pseudo_fixupAlan Modra3-23/+36
O_pseudo_fixup was defined as O_max+1, missing the fact that O_md1 through O_md32 enums are for use by target code. Worse, kvx-parse.c used 64 rather than O_pseudo_fixup. Fix this, and wrap some overlong lines. * config/tc-kvx.h (O_pseudo_fixup): Define. * config/tc-kvx.c (O_pseudo_fixup): Don't define here. (insert_operand): Delete bogus comment and cast. * config/kvx-parse.c (promote_token): Use O_pseudo_fixup rather than hardcoded value. Wrap overlong lines. (get_token_class): Likewise. (parse_with_restarts): Wrap overlong line.
2023-08-23kvx: ubsan: integer overflowAlan Modra2-4/+4
This fixes a few places where ubsan complains about signed integer overflow when running the testsuite, and that clz(0) is undefined. When fixing the clz problem, I also noticed that we'd get complaints if pval is ever LLONG_MIN. Fix that by using unsigned arithmetic. * config/kvx-parse.c (get_token_class): Avoid signed overflow. Don't clz(0). * config/tc-kvx.c (PARALLEL_BIT): Avoid signed overflow.
2023-08-23kvx: asan: out-of-bounds readAlan Modra1-1/+2
kvx-parse.c:parse_with_restarts does if (!tok.insn[tok.begin]) tok.class_id = -3; then a little later printf_debug (1, "\nEntering rule: %d (Trying to match: (%s)[%d])\n", jump_target, TOKEN_NAME (CLASS_ID (tok)), CLASS_ID (tok)); This results in a buffer overrun in TOKEN_NAME. Fix that. * config/tc-kvx.h (TOKEN_NAME): Check for tok <= 0, not just -1.
2023-08-22aarch64: Improve naming conventions for A and R-profile architectureVictor Do Nascimento1-53/+53
Historically, flags and variables relating to architectural revisions for the A-profile architecture omitted the trailing `A' such that, for example, assembling for `-march=armv8.4-a' set the `AARCH64_ARCH_V8_4' flag in the assembler. This leads to some ambiguity, since Binutils also targets the R-profile Arm architecture. Therefore, it seems prudent to have everything associated with the A-profile cores end in `A' and likewise `R' for the R-profile. Referring back to the example above, the flag set for `-march=armv8.4-a' is better characterized if labeled `AARCH64_ARCH_V8_4A'. The only exception to the rule of appending `A' to variables is found in the handling of the `AARCH64_FEATURE_V8' macro, as it is the baseline from which ALL processors derive and should therefore be left unchanged. In reflecting the `ARM' architectural nomenclature choices, where we have `ARM_ARCH_V8A' and `ARM_ARCH_V8R', the choice is made to not have an underscore separating the numerical revision number and the A/R-profile indicator suffix. This has meant that renaming of R-profile related flags and variables was warranted, thus going from `.*_[vV]8_[rR]' to `.*_[vV]8[rR]'. Finally, this is more in line with conventions within GCC and adds consistency across the toolchain. gas/ChangeLog: * gas/config/tc-aarch64.c: (aarch64_cpus): Reference to arch feature macros updated. (aarch64_archs): Likewise. include/ChangeLog: * include/opcode/aarch64.h: (AARCH64_FEATURE_V8A): Updated name: V8_A -> V8A. (AARCH64_FEATURE_V8_1A): A-suffix added. (AARCH64_FEATURE_V8_2A): Likewise. (AARCH64_FEATURE_V8_3A): Likewise. (AARCH64_FEATURE_V8_4A): Likewise. (AARCH64_FEATURE_V8_5A): Likewise. (AARCH64_FEATURE_V8_6A): Likewise. (AARCH64_FEATURE_V8_7A): Likewise. (AARCH64_FEATURE_V8_8A):Likewise. (AARCH64_FEATURE_V9A): Likewise. (AARCH64_FEATURE_V8R): Updated name: V8_R -> V8R. (AARCH64_ARCH_V8A_FEATURES): Updated name: V8_A -> V8A. (AARCH64_ARCH_V8_1A_FEATURES): A-suffix added. (AARCH64_ARCH_V8_2A_FEATURES): Likewise. (AARCH64_ARCH_V8_3A_FEATURES): Likewise. (AARCH64_ARCH_V8_4A_FEATURES): Likewise. (AARCH64_ARCH_V8_5A_FEATURES): Likewise. (AARCH64_ARCH_V8_6A_FEATURES): Likewise. (AARCH64_ARCH_V8_7A_FEATURES): Likewise. (AARCH64_ARCH_V8_8A_FEATURES): Likewise. (AARCH64_ARCH_V9A_FEATURES): Likewise. (AARCH64_ARCH_V9_1A_FEATURES): Likewise. (AARCH64_ARCH_V9_2A_FEATURES): Likewise. (AARCH64_ARCH_V9_3A_FEATURES): Likewise. (AARCH64_ARCH_V8A): Updated name: V8_A -> V8A. (AARCH64_ARCH_V8_1A): A-suffix added. (AARCH64_ARCH_V8_2A): Likewise. (AARCH64_ARCH_V8_3A): Likewise. (AARCH64_ARCH_V8_4A): Likewise. (AARCH64_ARCH_V8_5A): Likewise. (AARCH64_ARCH_V8_6A): Likewise. (AARCH64_ARCH_V8_7A): Likewise. (AARCH64_ARCH_V8_8A): Likewise. (AARCH64_ARCH_V9A): Likewise. (AARCH64_ARCH_V9_1A): Likewise. (AARCH64_ARCH_V9_2A): Likewise. (AARCH64_ARCH_V9_3A): Likewise. (AARCH64_ARCH_V8_R): Updated name: V8_R -> V8R. opcodes/ChangeLog: * opcodes/aarch64-opc.c (SR_V8A): Updated name: V8_A -> V8A. (SR_V8_1A): A-suffix added. (SR_V8_2A): Likewise. (SR_V8_3A): Likewise. (SR_V8_4A): Likewise. (SR_V8_6A): Likewise. (SR_V8_7A): Likewise. (SR_V8_8A): Likewise. (aarch64_sys_regs): Reference to arch feature macros updated. (aarch64_pstatefields): Reference to arch feature macros updated. (aarch64_sys_ins_reg_supported_p): Reference to arch feature macros updated. * opcodes/aarch64-tbl.h: (aarch64_feature_v8_2a): a-suffix added. (aarch64_feature_v8_3a): Likewise. (aarch64_feature_fp_v8_3a): Likewise. (aarch64_feature_v8_4a): Likewise. (aarch64_feature_fp_16_v8_2a): Likewise. (aarch64_feature_v8_5a): Likewise. (aarch64_feature_v8_6a): Likewise. (aarch64_feature_v8_7a): Likewise. (aarch64_feature_v8r): Updated name: v8_r-> v8r. (ARMV8R): Updated name: V8_R-> V8R. (ARMV8_2A): A-suffix added. (ARMV8_3A): Likewise. (FP_V8_3A): Likewise. (ARMV8_4A): Likewise. (FP_F16_V8_2A): Likewise. (ARMV8_5): Likewise. (ARMV8_6A): Likewise. (ARMV8_6A_SVE): Likewise. (ARMV8_7A): Likewise. (V8_2A_INSN): `A' added to macro symbol. (V8_3A_INSN): Likewise. (V8_4A_INSN): Likewise. (FP16_V8_2A_INSN): Likewise. (V8_5A_INSN): Likewise. (V8_6A_INSN): Likewise. (V8_7A_INSN): Likewise. (V8R_INSN): Updated name: V8_R-> V8R.
2023-08-21bpf: correct neg and neg32 instruction encodingDavid Faust13-42/+8
The neg/neg32 BPF instructions always use BPF_SRC_K (=0) in their header source bit, despite operating on registers. If BPF_SRC_X (=1) is set, the instructions are rejected by the kernel. Because of this there are also no neg/neg32 instructions which operate on immediates, so remove them. bd434cc4d94ec3d2f9fc1e7c00c27b074f962bc1 was a similar fix in the old CGEN-based port, but was not carried forward in the new port. include/ * opcode/bpf.h (enum bpf_insn_id): Remove spurious entries BPF_INSN_NEGI and BPF_INSN_NEG32I. opcodes/ * bpf-opc.c (bpf_opcodes): Remove erroneous NEGI and NEG32I instructions. gas/ * doc/c-bpf.texi (BPF Instructions): Remove erroneous neg and neg32 instructions operating on immediates. * testsuite/gas/bpf/alu.s: Adapt accordingly. * testsuite/gas/bpf/alu.d: Likewise. * testsuite/gas/bpf/alu-be.d: Likewise * testsuite/gas/bpf/alu32.s: Likewise. * testsuite/gas/bpf/alu32.d: Likewise. * testsuite/gas/bpf/alu32-be.d: Likewise. * testsuite/gas/bpf/alu-pseudoc.s: Likewise. * testsuite/gas/bpf/alu-pseudoc.d: Likewise. * testsuite/gas/bpf/alu-be-pseudoc.d: Likewise. * testsuite/gas/bpf/alu32-pseudoc.s: Likewise. * testsuite/gas/bpf/alu32-pseudoc.d: Likewise. * testsuite/gas/bpf/alu32-be-pseudoc.d: Likewise.
2023-08-21LoongArch: gas: Fix make check-gas crashmengqinggang1-4/+0
2023-08-18x86: remove indirection from bx[] and di_si[]Jan Beulich1-2/+2
The longest register name is 3 characters (plus a nul one), so using a 4- or 8-byte pointer to get at it is neither space nor time efficient. Embed the names right into the array. For PIE this also slightly reduces the number of base relocations in the final image.
2023-08-18gas: make S_IS_LOCAL() and S_IS_EXTERNAL() exclusive of one anotherJan Beulich1-5/+4
While they aren't opposites of each other, there also shouldn't be any symbol for which both return true; both may return false. Therefore use S_IS_EXTERNAL() in S_IS_LOCAL(), thus subsuming the sanity check which so far both did alike.
2023-08-17generated bfd files, and kvx regenAlan Modra3-6/+8
The elf32-kvx.c and elf64-kvx.c rules in the bfd makefile are different to the other similar generated files, and that reminded me that we need to have $srcdir in the generated #line reference back to the source for debugging, but don't want it for comments in bfd.pot (because then bfd.pot will likely reference Nick's source tree). This patch fixes that by making all the #line use $srcdir by virtue of using $<, and edits bfd.pot. I also uniq list of files to remove duplicated elfxx-x86.c, sort lists of files and regen with our standard automake/autoconf. * configure: Regenerate. bfd/ * Makefile.am: Sort various lists of files. Use $< in #line directive of generated C files. (po/SRC-POTFILES.in): uniq SRC_POTFILES. (po/BLD-POTFILES.in): uniq BFD_POTFILES. * Makefile.in: Regenerate. * po/Make-in (bfd.pot): Edit out source dir from comments. * po/SRC-POTFILES.in: Regenerate. gas/ * Makefile.in: Regenerate. * configure: Regenerate. * po/POTFILES.in: Regenerate. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Sort. * Makefile.in: Regenerate.
2023-08-17gas: tc-sparc.c: undo spurious change in ↵Jose E. Marchesi1-1/+1
5be1b787276d2adbe85ae7febc709ca517b62f08
2023-08-17bpf: gas: consolidate handling of immediate overflowsJose E. Marchesi20-67/+96
This commit changes the BPF GAS port in order to handle immediate overflows the same way than the clang BPF assembler: - For an immediate field of N bits, any written number (positive or negative) whose two's complement encoding fit in N its is accepted. This means that -2 is the same than 0xffffffe. It is up to the instructions to decide how to interpret the encoded value. - Immediate fields in jump instructions are no longer relaxed. Relaxing to jump instructions with wider range is only performed when expressions are involved. - The manual is updated to document this, and testsuite adapted accordingly. Tested in x86_64-linux-gnu host, bpf-unknown-none target. gas/ChangeLog: 2023-08-17 Jose E. Marchesi <jose.marchesi@oracle.com> * config/tc-bpf.c (check_immediate_overflow): New function. (encode_insn): Use check_immediate_overflow. (md_assemble): Do not relax instructions with constant disp16 fields. * doc/c-bpf.texi (BPF Instructions): Add note about how numerical literal values are interpreted for instruction immediate operands. * testsuite/gas/bpf/disp16-overflow.s: Adapt accordingly. * testsuite/gas/bpf/jump-relax-jump.s: Likewise. * testsuite/gas/bpf/jump-relax-jump.d: Likewise. * testsuite/gas/bpf/jump-relax-jump-be.d: Likewise. * testsuite/gas/bpf/jump-relax-ja.s: Likewise. * testsuite/gas/bpf/jump-relax-ja.d: Likewise. * testsuite/gas/bpf/jump-relax-ja-be.d: Likewise. * testsuite/gas/bpf/disp16-overflow-relax.l: Likewise. * testsuite/gas/bpf/imm32-overflow.s: Likewise. * testsuite/gas/bpf/disp32-overflow.s: Likewise. * testsuite/gas/bpf/disp16-overflow.l: Likewise. * testsuite/gas/bpf/disp32-overflow.l: Likewise. * testsuite/gas/bpf/imm32-overflow.l: Likewise. * testsuite/gas/bpf/offset16-overflow.l: Likewise.
2023-08-16kvx: New port.Paul Iannetta35-8/+66687
2023-08-16aarch64: Enable Cortex-A720 CPURichard Ball4-0/+14
This patch adds support for the Cortex-A720 CPU to binutils. bfd/ChangeLog: * cpu-aarch64.c: Add Cortex-A720. gas/ChangeLog: * NEWS: Update docs. * config/tc-aarch64.c: Add Cortex-A720. * doc/c-aarch64.texi: Update docs. * testsuite/gas/aarch64/cpu-cortex-a720.d: New test.
2023-08-15RISC-V: Make T-Head testing pattern more genericTsukasa OI6-20/+20
On some T-Head vendor extensions, we test against the constant 18446744073709551615 (2**64-1) to detect invalid immediate errors on -1. However, it heavily depends on the fact that the value used to print immediate value is a 64-bit unsigned type and this constant is not (and should not be) important (we just want to know that -1 is not valid). This commit replaces all such occurrences of 18446744073709551615 with a more generic regular expression. gas/ChangeLog: * testsuite/gas/riscv/x-thead-ba-fail.l: Replace 18446744073709551615 with generic regular expression. * testsuite/gas/riscv/x-thead-bb-fail.l: Likewise. * testsuite/gas/riscv/x-thead-bs-fail.l: Likewise. * testsuite/gas/riscv/x-thead-fmemidx-fail.l: Likewise. * testsuite/gas/riscv/x-thead-memidx-fail.l: Likewise. * testsuite/gas/riscv/x-thead-mempair-fail.l: Likewise.
2023-08-15RISC-V: Make "fli.h" available to 'Zvfh' + 'Zfa'Tsukasa OI2-0/+26
The documentation of the 'Zfa' extension states that "fli.h" is available "if the Zfh or Zvfh extension is implemented" (both the latest and the oldest editions are checked). This fact was not reflected in Binutils ('Zvfh' implies 'Zfhmin', not full 'Zfh' extension and "fli.h" required 'Zfh' and 'Zfa' extensions). This commit makes "fli.h" also available when both 'Zfa' and 'Zvfh' extensions are implemented. bfd/ChangeLog: * elfxx-riscv.c (riscv_multi_subset_supports): Add new instruction class handling. (riscv_multi_subset_supports_ext): Likewise. gas/ChangeLog: * testsuite/gas/riscv/zfa-zvfh.s: New test. * testsuite/gas/riscv/zfa-zvfh.d: Ditto. include/ChangeLog: * opcode/riscv.h (enum riscv_insn_class): Add new instruction class. opcodes/ChangeLog: * riscv-opc.c (riscv_opcodes): Change instruction class of "fli.h" from INSN_CLASS_ZFH_AND_ZFA to new INSN_CLASS_ZFH_OR_ZVFH_AND_ZFA.
2023-08-15RISC-V: Add support for the 'Zihintntl' extensionTsukasa OI5-0/+150
This commit adds 'Zihintntl' extension and its hint instructions. This is based on: <https://github.com/riscv/riscv-isa-manual/commit/0dc91f505e6da7791d5a733c553e6e2506ddcab5>, the first ISA Manual noting that the 'Zihintntl' extension is ratified. Note that compressed 'Zihintntl' hints require either 'C' or 'Zca' extension. Co-authored-by: Nelson Chu <nelson@rivosinc.com> bfd/ChangeLog: * elfxx-riscv.c (riscv_supported_std_z_ext): Add 'Zihintntl' standard hint 'Z' extension. (riscv_multi_subset_supports): Support new instruction classes. (riscv_multi_subset_supports_ext): Likewise. gas/ChangeLog: * testsuite/gas/riscv/zihintntl.s: New test for 'Zihintntl' including auto-compression without C prefix and explicit C prefix. * testsuite/gas/riscv/zihintntl.d: Likewise. * testsuite/gas/riscv/zihintntl-na.d: Likewise. * testsuite/gas/riscv/zihintntl-base.s: New test for correspondence between 'Zihintntl' and base 'I' or 'C' instructions. * testsuite/gas/riscv/zihintntl-base.d: Likewise. include/ChangeLog: * opcode/riscv.h (enum riscv_insn_class): Add new instruction classes: INSN_CLASS_ZIHINTNTL and INSN_CLASS_ZIHINTNTL_AND_C. (MASK_NTL_P1, MATCH_NTL_P1, MASK_NTL_PALL, MATCH_NTL_PALL, MASK_NTL_S1, MATCH_NTL_S1, MASK_NTL_ALL, MATCH_NTL_ALL, MASK_C_NTL_P1, MATCH_C_NTL_P1, MASK_C_NTL_PALL, MATCH_C_NTL_PALL, MASK_C_NTL_S1, MATCH_C_NTL_S1, MASK_C_NTL_ALL, MATCH_C_NTL_ALL): New. opcodes/ChangeLog: * riscv-opc.c (riscv_opcodes): Add instructions from the 'Zihintntl' extension.
2023-08-15RISC-V: remove indirection from register tablesJan Beulich1-1/+1
The longest register name is 4 characters (plus a nul one), so using a 4- or 8-byte pointer to get at it is neither space nor time efficient. Embed the names right into the array. For PIE this also reduces the number of base relocations in the final image. To avoid old gcc, when generating 32-bit code, bogusly warning about bounds being exceeded in the code processing Cs/Cw, Ct/Cx, and CD, an adjustment to EXTRACT_BITS() is needed: This macro shouldn't supply a 64-bit value, and it also doesn't need to - all operand fields to date are far more narrow than 32 bits. This in turn allows dropping a number of casts elsewhere.
2023-08-15PPC: remove indirection from struct pd_regJan Beulich1-1/+1
The longest register name is 5 characters (plus a nul one), so using a 4- or 8-byte pointer to get at it is neither space nor time efficient. Embed the names right into the array. For PIE this also reduces the number of base relocations in the final image.
2023-08-14Remove fall-back prune_warningsAlan Modra1-23/+0
No one should be using versions of dejagnu without prune_warnings, which was available in 1996 (dejagnu-1.3). binutils/ * testsuite/lib/binutils-common.exp: Remove fallback prune_warnings. gas/ * testsuite/lib/gas-defs.exp: Remove fallback prune_warnings.
2023-08-14Re: PR30715, VAX: md_create_long_jumpAlan Modra1-3/+3
Tidy comment formatting.
2023-08-12PR30715, VAX: md_create_long_jumpKalvis Duckmanton4-13/+136
PR 30715 * config/tc-vax.c (md_create_long_jump): Use pc-relative addressing. * testsuite/gas/vax/broken_word.d, * testsuite/gas/vax/broken_word.s: New test. * testsuite/gas/vax/vax.exp: Run it.
2023-08-12regen configAlan Modra1-21/+52
This regenerates config files changed by the previous 44 commits. Note that subject lines in these commits mostly match the gcc git originating commit.
2023-08-11gas: purge md_elf_section_word()Jan Beulich3-19/+0
It's not documented anyway, and having it makes no sense anymore with obj_elf_section_word() now being TC_SPARC-only. In any event the x86 backing function was dead code.
2023-08-11x86: pack CPU flags in opcode tableJan Beulich1-73/+116
The table constantly growing in two dimensions (number of table entries times number of ISA extension flags) doesn't scale very well. Use a more compact representation: Only identifiers which need to combine with other identifiers retain individual flag bits. All others are combined into an enum, with a new helper added to transform the table entries into the original i386_cpu_flags layout. This way the table in the final binary shrinks by almost a third (the generated source code shrinks by about half), and isn't likely to grow again in that dimension any time soon. While moving the 3DNow! fields, drop the stray inner 'a' from their names.
2023-08-10aarch64: Enable Cortex-A520 CPURichard Ball3-0/+7
This patch adds support for the Cortex-A520 CPU to gas. No regressions on aarch64-none-elf. gas/ChangeLog: * NEWS: Update docs. * config/tc-aarch64.c: Add Cortex-A520. * doc/c-aarch64.texi: Update docs.
2023-08-09bpf: use w regs in 32-bit non-fetch atomic pseudo-cDavid Faust3-15/+15
The 32-bit non-fetching atomic instructions treat the source register as 32-bits, which means in the pseudo-c syntax the "w" registers should be used rather than the "r" registers. opcodes/ * bpf-opc-c (bpf_opcodes): Use %sw for AAD32, AOR32, AAND32 and AXOR32 pseudo-c dialect asm templates. gas/ * testsuite/gas/bpf/atomic-be-pseudoc.d: Use "w" for source reg in non-fetching 32-bit atomic instructions. * testsuite/gas/bpf/atomic-pseudoc.d: Likewise. * testsuite/gas/bpf/atomic-pseudoc.s: Likewise.
2023-08-09Rename bfd_bread and bfd_bwriteAlan Modra2-2/+2
These were renamed from bfd_read and bfd_write back in 2001 when they lost an unnecessary parameter. Rename them back, and get rid of a few casts that are only needed without prototyped functions (K&R C).
2023-08-05as: Fix typo in manualDavid Carew1-1/+1
The -D flag should enable "debugging"
2023-08-03arm: sanitizer stringop-overflowAlan Modra1-2/+8
In function 'memset', inlined from 'create_unwind_entry' at /home/alan/src/binutils-gdb/gas/config/tc-arm.c:27881:3: /usr/include/bits/string_fortified.h:59:10: error: '__builtin_memset' specified size between 2147483652 and 4294967295 exceeds maximum object size 2147483647 [-Werror=stringop-overflow=] 59 | return __builtin___memset_chk (__dest, __ch, __len, | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 60 | __glibc_objsize0 (__dest)); | ~~~~~~~~~~~~~~~~~~~~~~~~~~ * config/tc-arm.c (create_unwind_entry): Return after bad size, and bad opcode count.
2023-08-03xtensa: sprintf sanitizer null destination pointerAlan Modra1-7/+4
* config/tc-xtensa.c (xtensa_add_config_info): Use auto buffer rather than malloc. Use sprintf return value.
2023-08-02Revert "2.41 Release sources"Sam James108-2654/+4269
This reverts commit 675b9d612cc59446e84e2c6d89b45500cb603a8d. See https://sourceware.org/pipermail/binutils/2023-August/128761.html.
2023-08-022.41 Release sourcesbinutils-2_41-releaseNick Clifton108-4269/+2654
2023-08-01gas: rework timestamp preservation on doc/asconfig.texiJan Beulich2-2/+2
PR 28909 Sadly "cp -p", doing more than just preserving the time stamp, can fail e.g. upon trying to preserve ownership (which we don't care about), as can be observed on e.g. Cygwin. Replace the use of -p by a use of touch, this way also only preserving modification time.
2023-07-31RISC-V: Fix typo in the test case nameTsukasa OI4-3/+3
gas/ChangeLog: * testsuite/gas/riscv/rouding-fail.s: Moved to... * testsuite/gas/riscv/rounding-fail.s: ...here. * testsuite/gas/riscv/rouding-fail.d: Moved to... * testsuite/gas/riscv/rounding-fail.d: ...here. * testsuite/gas/riscv/rouding-fail.l: Moved to... * testsuite/gas/riscv/rounding-fail.l: ...here.
2023-07-30bpf: include, bfd, opcodes: add EF_BPF_CPUVER ELF header flagsJose E. Marchesi4-0/+18
This patch adds support for EF_BPF_CPUVER bits in the ELF machine-dependent header flags. These bits encode the BPF CPU version for which the object file has been compiled for. The BPF assembler is updated so it annotates the object files it generates with these bits. The BPF disassembler is updated so it honors EF_BPF_CPUVER to use the appropriate ISA version if the user didn't specify an explicit ISA version in the command line. Note that a value of zero in EF_BPF_CPUVER is interpreted by the disassembler as "use the later supported version" (the BPF CPU versions start with v1.) The readelf utility is updated to pretty print EF_BPF_CPUVER when it prints out the ELF header: $ readelf -h a.out ELF Header: ... Flags: 0x4, CPU Version: 4 Tested in bpf-unknown-none. include/ChangeLog: 2023-07-30 Jose E. Marchesi <jose.marchesi@oracle.com> * elf/bpf.h (EF_BPF_CPUVER): Define. * opcode/bpf.h (BPF_XBPF): Change from 0xf to 0xff so it fits in EF_BPF_CPUVER. binutils/ChangeLog: 2023-07-30 Jose E. Marchesi <jose.marchesi@oracle.com> * readelf.c (get_machine_flags): Recognize and pretty print BPF machine flags. opcodes/ChangeLog: 2023-07-30 Jose E. Marchesi <jose.marchesi@oracle.com> * bpf-dis.c: Initialize asm_bpf_version to -1. (print_insn_bpf): Set BPF ISA version from the cpu version ELF header flags if no explicit version set in the command line. * disassemble.c (disassemble_init_for_target): Remove unused code. gas/ChangeLog: 2023-07-30 Jose E. Marchesi <jose.marchesi@oracle.com> * config/tc-bpf.h (elf_tc_final_processing): Define. * config/tc-bpf.c (bpf_elf_final_processing): New function.
2023-07-30bpf: gas: add field overflow checking to the BPF assemblerJose E. Marchesi19-8/+162
This patch makes the BPF assembler to throughfully check for overflow in immediates. This includes relaxed instructions. Tested in bpf-unknown-none. gas/ChangeLog: 2023-07-30 Jose E. Marchesi <jose.marchesi@oracle.com> * config/tc-bpf.c (signed_overflow): Copy function from tc-aarch64.c. (encode_insn): Check for overflow in constant immediates. (add_relaxed_insn): Pass relax argument to encode_insn. (add_fixed_insn): Likewise. * testsuite/gas/bpf/disp16-overflow.d: New file. * testsuite/gas/bpf/disp16-overflow.s: Likewise. * testsuite/gas/bpf/disp16-overflow.l: Likewise. * testsuite/gas/bpf/disp32-overflow.d: Likewise. * testsuite/gas/bpf/disp32-overflow.s: Likewise. * testsuite/gas/bpf/disp32-overflow.l: Likewise. * testsuite/gas/bpf/imm32-overflow.d: Likewise. * testsuite/gas/bpf/imm32-overflow.s: Likewise. * testsuite/gas/bpf/imm32-overflow.l: Likewise. * testsuite/gas/bpf/offset16-overflow.d: Likewise. * testsuite/gas/bpf/offset16-overflow.s: Likewise. * testsuite/gas/bpf/offset16-overflow.l: Likewise. * testsuite/gas/bpf/disp16-overflow-relax.d: Likewise. * testsuite/gas/bpf/disp16-overflow-relax.l: Likewise. * testsuite/gas/bpf/disp16-overflow-relax.s: Likewise. * testsuite/gas/bpf/jump-relax-jump-be.d: New file. * testsuite/gas/bpf/bpf.exp: Run new tests.
2023-07-28bpf: remove spurious comment from tc-bpf.cJose E. Marchesi1-2/+0
2023-07-28bpf: gas: support relaxation of V4 jump instructionsJose E. Marchesi9-308/+858
The BPF jump-always instruction (JA), like all other jump instructions in the ISA, get a signed 16-bit displacement target argument denoted in number of 64-bit words minus one. This can sometimes be overflown. The BPF V4 ISA thus introduced support for a jump-always instruction (JAL) that gets a signed 32-bit displacement instead. This patch makes the BPF assembler to perform the following relaxations when the disp16 field gets overflown, unless the option -mno-relax is specified: JA disp16 -> JAL disp32 Jxx disp16 -> Jxx +1; JA +1; JAL disp32 Documentation and tests added. Tested in bpf-unknown-none. gas/ChangeLog: 2023-07-28 Jose E. Marchesi <jose.marchesi@oracle.com> PR gas/30690 * config/tc-bpf.c (struct bpf_insn): Add fields is_relaxable and relaxed_exp. (enum options): Add OPTION_NO_RELAX. (md_longopts): Likewise for -mno-relax. (do_relax): New global. (md_parse_option): Handle OPTION_NO_RELAX. (RELAX_BRANCH_ENCODE): Define. (RELAX_BRANCH_P): Likewise. (RELAX_BRANCH_LENGTH): Likewise. (RELAX_BRANCH_CONST): Likewise. (RELAX_BRANCH_UNCOND): Likewise. (relaxed_branch_length): New function. (md_estimate_size_before_relax): Likewise. (read_insn_word): Likewise. (encode_int16): Likewise. (encode_int32): Likewise. (write_insn_bytes): Likewise. (md_convert_frag): Likewise. (encode_insn): Likewise. (install_insn_fixups): Likewise. (add_fixed_insn): Likewise. (add_relaxed_insn): Likewise. (md_assemble): Move instruction encoding logic to the above new functions. * testsuite/gas/bpf/jump-relax-ja.d: New test. * testsuite/gas/bpf/jump-relax-ja-be.d: Likewise. * testsuite/gas/bpf/jump-relax-ja.s: And corresponding source. * testsuite/gas/bpf/jump-relax-jump.d: New test. * testsuite/gas/bpf/jump-relax-jump-be.d: Likewise. * testsuite/gas/bpf/jump-relax-jump.s: And corresponding source. * testsuite/gas/bpf/bpf.exp: Run new tests. * doc/c-bpf.texi (BPF Options): Document -mno-relax.
2023-07-28gas: amend X_unsigned usesJan Beulich5-4/+37
PR gas/30688 X_unsigned being clear does not indicate a negative number; it merely indicates a signed one (whose sign may still be clear). Amend two uses by an actual value check.
2023-07-28MIPS: Support `-gnuabi64' target triplet suffix for 64-bit Linux targetsYunQiang Su4-8/+8
Make the n64 ABI the default for 64-bit Linux targets specified with `-gnuabi64' suffix included in the target triplet, for configurations such as the Debian mips64el and mips64r6el ports. Adjust testsuite configuration accordingly. There are the following regressions with the new target triplet: mips64-linux-gnuabi64 +FAIL: readelf -S bintest mips64-linux-gnuabi64 +FAIL: MIPS reloc estimation 1 mips64el-linux-gnuabi64 +FAIL: readelf -S bintest mips64el-linux-gnuabi64 +FAIL: MIPS reloc estimation 1 The `readelf' issue comes from a difference in section headers produced that the `binutils/testsuite/binutils-all/readelf.s-64' pattern template does not match. While there has been a precedent it does not appear to me that there is a clear advantage from adding more and more variations to the template rather than forking the existing template into multiple ones for a more exact match. So this is best deferred to a separate discussion. The MIPS reloc estimation issue is an actual bug in `objdump', which discards a number of trailing entries from output here for n64 composed relocations: DYNAMIC RELOCATION RECORDS OFFSET TYPE VALUE 0000000000000000 R_MIPS_NONE *ABS* 0000000000000000 R_MIPS_NONE *ABS* and consequently `ld/testsuite/ld-mips-elf/reloc-estimate-1.d' does not match even though ELF output produced is correct according to `readelf': Relocation section '.rel.dyn' at offset 0x10400 contains 2 entries: Offset Info Type Sym. Value Sym. Name 000000000000 000000000000 R_MIPS_NONE Type2: R_MIPS_NONE Type3: R_MIPS_NONE 000000010000 000300001203 R_MIPS_REL32 0000000000010010 foo@@V2 Type2: R_MIPS_64 Type3: R_MIPS_NONE As a genuine bug this has to be handled separately. Co-Authored by: Maciej W. Rozycki <macro@orcam.me.uk> bfd/ * config.bfd: Add `mips64*el-*-linux*-gnuabi64' and `mips64*-*-linux*-gnuabi64' targets. binutils/ * testsuite/binutils-all/mips/mips.exp: Handle `*-*-*-gnuabi64' targets. * testsuite/binutils-all/objcopy.exp: Handle `mips64*-*-*-gnuabi64' targets. * testsuite/binutils-all/remove-relocs-01.d: Likewise. * testsuite/binutils-all/remove-relocs-04.d: Likewise. * testsuite/binutils-all/remove-relocs-05.d: Likewise. * testsuite/binutils-all/remove-relocs-06.d: Likewise. gas/ * configure.ac: Handle `mips64*-linux-gnuabi64' targets. * configure: Regenerate. * testsuite/gas/mips/compact-eh-eb-7.d: Handle `mips64*-*-*-gnuabi64' targets. * testsuite/gas/mips/compact-eh-el-7.d: Likewise. ld/ * configure.tgt: Add `mips64*el-*-linux-gnuabi64' and `mips64*-*-linux-gnuabi64' targets. * testsuite/ld-undefined/undefined.exp: Handle `mips64*-*-*-gnuabi64' targets. * testsuite/ld-mips-elf/attr-gnu-4-10.d: Likewise. * testsuite/ld-mips-elf/compact-eh6.d: Likewise. * testsuite/ld-mips-elf/mips-elf.exp: Handle `*-*-*-gnuabi64' targets.
2023-07-28MIPS/GAS/testsuite: Fix n64 compact EH failuresYunQiang Su12-36/+24
Expect a `.MIPS.options' section alternatively to `.reginfo' and ignore contents of either as irrelevant for all the affected compact EH tests, removing these regressions: mips64-openbsd -FAIL: Compact EH EB #1 with personality ID and FDE data mips64-openbsd -FAIL: Compact EH EB #2 with personality routine and FDE data mips64-openbsd -FAIL: Compact EH EB #3 with personality id and large FDE data mips64-openbsd -FAIL: Compact EH EB #4 with personality id, FDE data and LSDA mips64-openbsd -FAIL: Compact EH EB #5 with personality routine, FDE data and LSDA mips64-openbsd -FAIL: Compact EH EB #6 with personality id, LSDA and large FDE data mips64-openbsd -FAIL: Compact EH EL #1 with personality ID and FDE data mips64-openbsd -FAIL: Compact EH EL #2 with personality routine and FDE data mips64-openbsd -FAIL: Compact EH EL #3 with personality id and large FDE data mips64-openbsd -FAIL: Compact EH EL #4 with personality id, FDE data and LSDA mips64-openbsd -FAIL: Compact EH EL #5 with personality routine, FDE data and LSDA mips64-openbsd -FAIL: Compact EH EL #6 with personality id, LSDA and large FDE data mips64el-openbsd -FAIL: Compact EH EB #1 with personality ID and FDE data mips64el-openbsd -FAIL: Compact EH EB #2 with personality routine and FDE data mips64el-openbsd -FAIL: Compact EH EB #3 with personality id and large FDE data mips64el-openbsd -FAIL: Compact EH EB #4 with personality id, FDE data and LSDA mips64el-openbsd -FAIL: Compact EH EB #5 with personality routine, FDE data and LSDA mips64el-openbsd -FAIL: Compact EH EB #6 with personality id, LSDA and large FDE data mips64el-openbsd -FAIL: Compact EH EL #1 with personality ID and FDE data mips64el-openbsd -FAIL: Compact EH EL #2 with personality routine and FDE data mips64el-openbsd -FAIL: Compact EH EL #3 with personality id and large FDE data mips64el-openbsd -FAIL: Compact EH EL #4 with personality id, FDE data and LSDA mips64el-openbsd -FAIL: Compact EH EL #5 with personality routine, FDE data and LSDA mips64el-openbsd -FAIL: Compact EH EL #6 with personality id, LSDA and large FDE data Co-Authored-By: Maciej W. Rozycki <macro@orcam.me.uk> gas/ * testsuite/gas/mips/compact-eh-eb-1.d: Accept `.MIPS.options' section as an alternative to `.reginfo' and ignore contents of either. * testsuite/gas/mips/compact-eh-eb-2.d: Likewise. * testsuite/gas/mips/compact-eh-eb-3.d: Likewise. * testsuite/gas/mips/compact-eh-eb-4.d: Likewise. * testsuite/gas/mips/compact-eh-eb-5.d: Likewise. * testsuite/gas/mips/compact-eh-eb-6.d: Likewise. * testsuite/gas/mips/compact-eh-el-1.d: Likewise. * testsuite/gas/mips/compact-eh-el-2.d: Likewise. * testsuite/gas/mips/compact-eh-el-3.d: Likewise. * testsuite/gas/mips/compact-eh-el-4.d: Likewise. * testsuite/gas/mips/compact-eh-el-5.d: Likewise. * testsuite/gas/mips/compact-eh-el-6.d: Likewise.
2023-07-28testsuite: Handle composed R_MIPS_NONE relocationsYunQiang Su23-1/+188
MIPS n64 ABI has a peculiarity where all relocations are composed of three, with subsequent relocation types set to R_MIPS_NONE if further calculation is not required. Example output produced by `readelf' and `objdump' for such relocations is: Offset Info Type Sym. Value Sym. Name + Addend 000000000000 000800000002 R_MIPS_32 0000000000000000 foo + 0 Type2: R_MIPS_NONE Type3: R_MIPS_NONE and: OFFSET TYPE VALUE 0000000000000000 R_MIPS_32 foo 0000000000000000 R_MIPS_NONE *ABS* 0000000000000000 R_MIPS_NONE *ABS* respectively. The presence of these extra R_MIPS_NONE entries is not relevant for generic or even some MIPS tests, so optionally match them with the respective dump patterns, also discarding `xfail' annotation for MIPS/OpenBSD targets from gas/elf/missing-build-notes.d, removing these regressions: mips64-openbsd -FAIL: readelf -r bintest mips64-openbsd -FAIL: forward expression mips64-openbsd -FAIL: assignment tests mips64-openbsd -FAIL: gas/all/none mips64-openbsd -XFAIL: gas/elf/missing-build-notes mips64-openbsd -FAIL: macro test 2 mips64-openbsd -FAIL: macro irp mips64-openbsd -FAIL: macro rept mips64-openbsd -FAIL: nested irp/irpc/rept mips64-openbsd -FAIL: macro vararg mips64-openbsd -FAIL: mips jalx mips64-openbsd -FAIL: ST Microelectronics Loongson-2F workarounds of Jump Instruction issue mips64el-openbsd -FAIL: readelf -r bintest mips64el-openbsd -FAIL: forward expression mips64el-openbsd -FAIL: assignment tests mips64el-openbsd -FAIL: gas/all/none mips64el-openbsd -XFAIL: gas/elf/missing-build-notes mips64el-openbsd -FAIL: macro test 2 mips64el-openbsd -FAIL: macro irp mips64el-openbsd -FAIL: macro rept mips64el-openbsd -FAIL: nested irp/irpc/rept mips64el-openbsd -FAIL: macro vararg mips64el-openbsd -FAIL: mips jalx mips64el-openbsd -FAIL: ST Microelectronics Loongson-2F workarounds of Jump Instruction issue Co-Authored-By: Maciej W. Rozycki <macro@orcam.me.uk> binutils/ * testsuite/binutils-all/readelf.r-64: Optionally match extra R_MIPS_NONE pairs. gas/ * testsuite/gas/all/assign.d: Optionally match extra R_MIPS_NONE pairs. * testsuite/gas/all/fwdexp.d: Likewise. * testsuite/gas/all/none.d: Likewise. * testsuite/gas/macros/irp.d: Likewise. * testsuite/gas/macros/repeat.d: Likewise. * testsuite/gas/macros/rept.d: Likewise. * testsuite/gas/macros/test2.d: Likewise. * testsuite/gas/macros/vararg.d: Likewise. * testsuite/gas/mips/compact-eh-eb-1.d: Likewise. * testsuite/gas/mips/compact-eh-eb-2.d: Likewise. * testsuite/gas/mips/compact-eh-eb-3.d: Likewise. * testsuite/gas/mips/compact-eh-eb-4.d: Likewise. * testsuite/gas/mips/compact-eh-eb-5.d: Likewise. * testsuite/gas/mips/compact-eh-eb-6.d: Likewise. * testsuite/gas/mips/compact-eh-el-1.d: Likewise. * testsuite/gas/mips/compact-eh-el-2.d: Likewise. * testsuite/gas/mips/compact-eh-el-3.d: Likewise. * testsuite/gas/mips/compact-eh-el-4.d: Likewise. * testsuite/gas/mips/compact-eh-el-5.d: Likewise. * testsuite/gas/mips/compact-eh-el-6.d: Likewise. * testsuite/gas/mips/loongson-2f-3.d: Likewise. * testsuite/gas/mips/mips-jalx.d: Likewise. * testsuite/gas/elf/missing-build-notes.d: Likewise. Remove the `xfail' tag. ld/ * testsuite/ld-mips-elf/reloc-estimate-1.d: Optionally match extra R_MIPS_NONE pairs.
2023-07-28MIPS/testsuite: Handle 64-bit addressesYunQiang Su20-403/+403
Several MIPS test cases are suitable for the n64 ABI if not for the extra leading zeros or spaces in addresses not handled by dump patterns. Match the characters then, removing these regressions: mips64-openbsd -FAIL: .set arch=FOO mips64-openbsd -FAIL: ST Microelectronics Loongson-2F workarounds of nop issue mips64-openbsd -FAIL: MIPS DSP ASE for MIPS64 mips64-openbsd -FAIL: gas/mips/align2 mips64-openbsd -FAIL: gas/mips/align2-el mips64-openbsd -FAIL: Locally-resolvable PC-relative code references mips64-openbsd -FAIL: MIPS jalx-1 mips64-openbsd -FAIL: JAL overflow 2 mips64el-openbsd -FAIL: .set arch=FOO mips64el-openbsd -FAIL: ST Microelectronics Loongson-2F workarounds of nop issue mips64el-openbsd -FAIL: MIPS DSP ASE for MIPS64 mips64el-openbsd -FAIL: gas/mips/align2 mips64el-openbsd -FAIL: gas/mips/align2-el mips64el-openbsd -FAIL: Locally-resolvable PC-relative code references mips64el-openbsd -FAIL: MIPS jalx-1 mips64el-openbsd -FAIL: JAL overflow 2 Co-Authored-By: Maciej W. Rozycki <macro@orcam.me.uk> gas/ * testsuite/gas/mips/align2-el.d: Match extra leading zeros with addresses. * testsuite/gas/mips/align2.d: Likewise. * testsuite/gas/mips/compact-eh-eb-1.d: Likewise. * testsuite/gas/mips/compact-eh-eb-2.d: Likewise. * testsuite/gas/mips/compact-eh-eb-3.d: Likewise. * testsuite/gas/mips/compact-eh-eb-4.d: Likewise. * testsuite/gas/mips/compact-eh-eb-5.d: Likewise. * testsuite/gas/mips/compact-eh-eb-6.d: Likewise. * testsuite/gas/mips/compact-eh-el-1.d: Likewise. * testsuite/gas/mips/compact-eh-el-2.d: Likewise. * testsuite/gas/mips/compact-eh-el-3.d: Likewise. * testsuite/gas/mips/compact-eh-el-4.d: Likewise. * testsuite/gas/mips/compact-eh-el-5.d: Likewise. * testsuite/gas/mips/compact-eh-el-6.d: Likewise. * testsuite/gas/mips/loongson-2f-2.d: Likewise. * testsuite/gas/mips/loongson-2f-3.d: Likewise. * testsuite/gas/mips/mips-jalx.d: Likewise. * testsuite/gas/mips/mips64-dsp.d: Likewise. * testsuite/gas/mips/pcrel-1.d: Likewise. * testsuite/gas/mips/set-arch.d: Likewise. ld/ * testsuite/ld-mips-elf/jaloverflow-2.d: Match extra leading zeros and spaces with addresses as appropriate. * testsuite/ld-mips-elf/jalx-1.d: Likewise. * testsuite/ld-mips-elf/reloc-estimate-1.d: Likewise.
2023-07-28MIPS/GAS/testsuite: Force o32 for tests expecting 32-bit addressingYunQiang Su6-4/+6
A few GAS tests expect to be assembled with 32-bit addressing, otherwise causing an assembly warning: .../gas/testsuite/gas/mips/fix-rm7000-2.s:11: Warning: la used to load 64-bit address; recommend using dla instead or pattern dump mismatches against 32-bit address calculations, however these tests do not enforce their expectation in any. For none of them the specific ABI used is of any relevance however, so select the o32 ABI unconditionally, removing these failures with OpenBSD targets: mips64-openbsd -FAIL: MIPS RM7000 workarounds test 2 (micromips) mips64-openbsd -FAIL: MIPS RM7000 workarounds test 2 (mips3) mips64-openbsd -FAIL: MIPS RM7000 workarounds test 2 (mips4) mips64-openbsd -FAIL: MIPS RM7000 workarounds test 2 (mips5) mips64-openbsd -FAIL: MIPS RM7000 workarounds test 2 (mips64) mips64-openbsd -FAIL: MIPS RM7000 workarounds test 2 (mips64r2) mips64-openbsd -FAIL: MIPS RM7000 workarounds test 2 (mips64r3) mips64-openbsd -FAIL: MIPS RM7000 workarounds test 2 (mips64r5) mips64-openbsd -FAIL: MIPS RM7000 workarounds test 2 (octeon) mips64-openbsd -FAIL: MIPS RM7000 workarounds test 2 (octeon2) mips64-openbsd -FAIL: MIPS RM7000 workarounds test 2 (octeon3) mips64-openbsd -FAIL: MIPS RM7000 workarounds test 2 (octeonp) mips64-openbsd -FAIL: MIPS RM7000 workarounds test 2 (r4000) mips64-openbsd -FAIL: MIPS RM7000 workarounds test 2 (sb1) mips64-openbsd -FAIL: MIPS RM7000 workarounds test 2 (vr5400) mips64-openbsd -FAIL: MIPS RM7000 workarounds test 2 (xlr) mips64-openbsd -FAIL: MIPS-OCTEON octeon_saa_saad (octeon2) mips64-openbsd -FAIL: MIPS-OCTEON octeon_saa_saad (octeon3) mips64-openbsd -FAIL: MIPS-OCTEON octeon_saa_saad (octeonp) mips64-openbsd -FAIL: Full MIPS R5900 mips64-openbsd -FAIL: MIPS R5900 VU0 mips64-openbsd -FAIL: Paired LL/SC for mips64r6 (mips64r6) mips64el-openbsd -FAIL: MIPS RM7000 workarounds test 2 (micromips) mips64el-openbsd -FAIL: MIPS RM7000 workarounds test 2 (mips3) mips64el-openbsd -FAIL: MIPS RM7000 workarounds test 2 (mips4) mips64el-openbsd -FAIL: MIPS RM7000 workarounds test 2 (mips5) mips64el-openbsd -FAIL: MIPS RM7000 workarounds test 2 (mips64) mips64el-openbsd -FAIL: MIPS RM7000 workarounds test 2 (mips64r2) mips64el-openbsd -FAIL: MIPS RM7000 workarounds test 2 (mips64r3) mips64el-openbsd -FAIL: MIPS RM7000 workarounds test 2 (mips64r5) mips64el-openbsd -FAIL: MIPS RM7000 workarounds test 2 (octeon) mips64el-openbsd -FAIL: MIPS RM7000 workarounds test 2 (octeon2) mips64el-openbsd -FAIL: MIPS RM7000 workarounds test 2 (octeon3) mips64el-openbsd -FAIL: MIPS RM7000 workarounds test 2 (octeonp) mips64el-openbsd -FAIL: MIPS RM7000 workarounds test 2 (r4000) mips64el-openbsd -FAIL: MIPS RM7000 workarounds test 2 (sb1) mips64el-openbsd -FAIL: MIPS RM7000 workarounds test 2 (vr5400) mips64el-openbsd -FAIL: MIPS RM7000 workarounds test 2 (xlr) mips64el-openbsd -FAIL: MIPS-OCTEON octeon_saa_saad (octeon2) mips64el-openbsd -FAIL: MIPS-OCTEON octeon_saa_saad (octeon3) mips64el-openbsd -FAIL: MIPS-OCTEON octeon_saa_saad (octeonp) mips64el-openbsd -FAIL: Full MIPS R5900 mips64el-openbsd -FAIL: MIPS R5900 VU0 mips64el-openbsd -FAIL: Paired LL/SC for mips64r6 (mips64r6) Co-Authored-By: Maciej W. Rozycki <macro@orcam.me.uk> gas/ * testsuite/gas/mips/fix-rm7000-2.d: Add `-32' to the `as' tag. * testsuite/gas/mips/micromips@fix-rm7000-2.d: Likewise. * testsuite/gas/mips/r5900-full.d: Likewise. * testsuite/gas/mips/r5900-vu0.d: Likewise. * testsuite/gas/mips/llpscp-64.d: Add `as' tag with `-32'. * testsuite/gas/mips/octeon-saa-saad.d: Likewise.
generated by cgit v1.1 at 2025-01-31 07:19:32 +0000