Age | Commit message (Collapse) | Author | Files | Lines |
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signed/unsigned comparison warning.
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* configure.in: Use it for arm*-*-linux-gnueabi*.
* config/tc-arm.c: Allow emulation file to set FPU_DEFAULT.
* config/te-armlinuxeabi.h: New file.
* Makefile.in: Regenerated.
* aclocal.m4: Likewise.
* configure: Likewise.
* doc/Makefile.in: Regenerated.
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(xtensa_restore_emit_state): Likewise.
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(s_align): Use it.
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* gas/crx/br_insn.d: Fix error in expected disassembly.
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* gas/crx/br_insn.d: Fix error in expected disassembly.
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config/tc-crx.c: Major code cleanup. Remove unused variables and functions,
give functions a meaningful name, add comments.
(check_range): New function - Replace operand size calculation
with range checking.
(assemble_insn): Update Algorithm, improve error issuing.
(enum op_err): New - Operand error (for issuing operand error messages).
(process_label_constant): Bug fix regarding COP_BRANCH_INS relocation handling.
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* config/tc-crx.c: Major code cleanup. Remove unused variables and functions,
give functions a meaningful name, add comments.
(check_range): New function - Replace operand size calculation
with range checking.
(assemble_insn): Update Algorithm, improve error issuing.
(enum op_err): New - Operand error (for issuing operand error messages).
(process_label_constant): Bug fix regarding COP_BRANCH_INS relocation
handling.
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of dump pattern.
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* gas/ia64/group-1.d: Adjust expected secion ordering.
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2004-11-25 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (optimize_imm): Adjust immediates to only those
permissible for the selected instruction suffix.
(process_suffix): For DefaultSize instructions, suppressing the
guessing of a 'q' suffix if the instruction doesn't support it is
pointless, because only an 'l' suffix can be guessed in this place.
gas/testsuite/
2004-11-25 Jan Beulich <jbeulich@novell.com>
* gas/i386/x86-64-inval.[sl]: Remove sahf/lahf.
include/opcode/
2004-11-25 Jan Beulich <jbeulich@novell.com>
* i386.h: CpuNo64 mov can't reasonably have a 'q' suffix. Moves
to/from test registers are illegal in 64-bit mode. Add missing
NoRex64 to sidt. fxsave/fxrstor now allow for a 'q' suffix
(previously one had to explicitly encode a rex64 prefix). Re-enable
lahf/sahf in 64-bit mode as at least some Athlon64/Opteron steppings
support it there. Add cmpxchg16b as per Intel's 64-bit documentation.
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bfd/
* elf.c (assign_section_numbers): Number SHT_GROUP sections first.
gas/testsuite/
* gas/elf/group0a.d: Adjust expected secion ordering.
* gas/elf/group1a.d: Ditto.
* gas/elf/section4.d: Ditto.
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They should be correct now.
* gas/mn10300/relax.s: Add further tests of the relaxing of branch instructions.
* gas/mn10300/relax.d: Add expected relocations.
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2004-11-23 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.h (CpuMMX2): Declare. Artificial classifier to
indicate the MMX extensions added by both SSE and 3DNow!A.
(Cpu3dnowA): Declare.
(CpuUnknownFlags): Update.
* config/tc-i386.c (cpu_sub_arch_name): Declare.
(cpu_arch): i586 and pentium do not imply MMX. i686 and pentiumpro do
neither imply SSE nor MMX. k6 implies MMX. k6_2 additionally implies
3DNow!. Athlon additionally implies 3DNow!A. Several new
entries (those starting with a dot are for sub-arch specification).
(set_cpu_arch): Handle sub-arch specifications.
(parse_insn): Distinguish between instructions not supported because
of insufficient CPU features and because of 64-bit mode.
* doc/c-i386.texi: Describe enhanced .arch directive.
include/opcode/
2004-11-23 Jan Beulich <jbeulich@novell.com>
* i386.h (i386_optab): paddq and psubq, even in their MMX form, are
available only with SSE2. Change the MMX additions introduced by SSE
and 3DNow!A to CpuMMX2 (rather than CpuMMX). Indicate the 3DNow!A
instructions by their now designated identifier (since combining i686
and 3DNow! does not really imply 3DNow!A).
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change to the short immediate syntax.
* gas/arc/ld.s: Add check of load of a long immediate.
* gas/arc/ld.d: Add expected disassembly.
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without a corresponding .debug_info section.
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(s_errwarn): New function.
* read.h (s_errwarn): Declare.
* doc/as.texinfo (Error, Warning): Document .error and .warning.
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* gas/all/err-1.s, gas/all/warn-1.s: New tests.
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* msp430.h (struct rcodes_s, MSP430_RLC, msp430_rcodes,
struct hcodes_s, msp430_hcodes): Move to gas/config/tc-msp430.c.
gas/
* config/tc-msp430.c (struct rcodes_s, MSP430_RLC, msp430_rcodes,
struct hcodes_s, msp430_hcodes): From include/opcode/msp430.h.
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(coff_adjust_symtab): Adjust call.
(crawl_symbols): Likewise.
* config/obj-coff.h (c_dot_file_symbol): Add "app" param.
(obj_app_file): Adjust.
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Adjust the testsuite expected disassemblies to take this into account.
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* elf32-arm.c (PLT_THUMB_STUB_SIZE): Define.
(elf32_arm_plt_thumb_stub): New.
(struct elf32_arm_link_hash_entry): Add plt_thumb_refcount
and plt_got_offset.
(elf32_arm_link_hash_traverse): Fix typo.
(elf32_arm_link_hash_table): Add obfd.
(elf32_arm_link_hash_newfunc): Initialize new fields.
(elf32_arm_copy_indirect_symbol): Copy plt_thumb_refcount.
(elf32_arm_link_hash_table_create): Initialize obfd.
(record_arm_to_thumb_glue): Mark the glue as a local ARM function.
(record_thumb_to_arm_glue): Mark the glue as a local Thumb function.
(bfd_elf32_arm_get_bfd_for_interworking): Verify that the
interworking BFD is not dynamic.
(bfd_elf32_arm_process_before_allocation): Handle R_ARM_PLT32. Do
not emit glue for PLT references.
(elf32_arm_final_link_relocate): Handle Thumb functions. Do not
emit glue for PLT references. Support the Thumb PLT prefix.
(elf32_arm_gc_sweep_hook): Handle R_ARM_THM_PC22 and
plt_thumb_refcount.
(elf32_arm_check_relocs): Likewise.
(elf32_arm_adjust_dynamic_symbol): Handle Thumb functions and
plt_thumb_refcount.
(allocate_dynrelocs): Handle Thumb PLT references.
(elf32_arm_finish_dynamic_symbol): Likewise.
(elf32_arm_symbol_processing): New function.
(elf_backend_symbol_processing): Define.
opcodes/
* arm-dis.c (WORD_ADDRESS): Define.
(print_insn): Use it. Correct big-endian end-of-section handling.
gas/testsuite/
* gas/arm/mapping.d: Expect F markers for Thumb code.
* gas/arm/unwind.d: Update big-endian pattern.
ld/
* emultempl/armelf.em (arm_elf_set_bfd_for_interworking): Don't use
a dynamic object for stubs.
ld/testsuite/
* ld-arm/mixed-app.d, ld-arm/mixed-app.r, ld-arm/mixed-app.s,
ld-arm/mixed-app.sym, ld-arm/mixed-lib.d, ld-arm/mixed-lib.r,
ld-arm/mixed-lib.s, ld-arm/mixed-lib.sym, ld-arm/arm-dyn.ld,
ld-arm/arm-lib.ld: New files.
* ld-arm/arm-app-abs32.d, ld-arm/arm-app-abs32.r, ld-arm/arm-app.d,
ld-arm/arm-app.r, ld-arm/arm-lib-plt32.d, ld-arm/arm-lib-plt32.r,
ld-arm/arm-lib.d, ld-arm/arm-lib.r, ld-arm/arm-static-app.d,
ld-arm/arm-static-app.r: Update for big-endian.
* ld-arm/arm-elf.exp: Run the new tests.
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include/ChangeLog
* xtensa-isa-internal.h (xtensa_interface_internal): Add class_id.
* xtensa-isa.h (xtensa_interface_class_id): New prototype.
bfd/ChangeLog
* xtensa-isa.c (xtensa_interface_class_id): New.
gas/ChangeLog
* config/tc-xtensa.c (finish_vinsn): Clear pending instruction if
there is a conflict.
(check_t1_t2_reads_and_writes): Check for both reads and writes to
interfaces that are related as determined by xtensa_interface_class_id.
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Add a test of this fix.
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* config/tc-xtensa.c (MAX_IMMED6): Change value to 65.
gas/testsuite/
* gas/xtensa/short_branch_offset.s: New.
* gas/xtensa/short_branch_offset.d: New.
* gas/xtensa/all.exp: Run new test.
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relaxing at the end of a loop. Don't mark frags as UNREACHABLE or
MAYBE_UNREACHABLE.
(relax_frag_immed): Update call to update_next_frag_state.
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* gas/i386/intelok.s: Likewise.
* gas/i386/opcode.d: Update.
* gas/i386/intelok.d: Update.
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* read.h (s_app_file_string): Likewise.
* read.c (s_app_file_string): Likewise.
(s_app_file): Adjust s_app_file_string call.
* config/tc-mips.c (s_mips_file): Likewise.
* config/obj-coff.h (obj_app_file): Add app param.
* config/obj-ecoff.h (obj_app_file): Likewise.
* config/obj-multi.h (obj_app_file): Likewise.
* config/obj-elf.h (elf_file_symbol): Likewise.
* config/obj-elf.c (elf_file_symbol): Only emit one file symbol
if called for # preprocessor lines.
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PR 528
* symbols.c (resolve_symbol_value): Convert weak symbols only
for Windows PECOFF.
(symbol_equated_reloc_p): Don't equate weaks when relocating
only for Windows PECOFF.
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* config/tc-crx.c (print_insn): Check and set insn_addr.
* config/tc-crx.h (md_frag_check): Define.
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* gas/i386/general.s: Add movzb.
* gas/i386/general.l: Updated.
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(md_estimate_size_before_relax): Use it.
(find_address_of_next_align_frag): Likewise.
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* config/tc-crx.c: Rename argument types.
(processing_arg_number): Rename to 'cur_arg_num'.
(get_number_of_bits): Rename to 'set_operand_size'.
(get_operandtype): Rename to 'parse_operand', totally rewrite.
(set_cons_rparams): Rename to 'set_operand', totally rewrite.
(set_indexmode_parameters): Remove function, integrate its code into
'set_operand'.
(set_operand_size): Get rid of 'Operand Number' function parameter -
use global variable 'cur_arg_num' instead.
Use a local 'argument' pointer to reference the current argument.
(parse_operand): Likewise.
(set_operand): Likewise.
(process_label_constant): Likewise.
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* config/tc-crx.c: Rename argument types.
(processing_arg_number): Rename to 'cur_arg_num'.
(get_number_of_bits): Rename to 'set_operand_size'.
(get_operandtype): Rename to 'parse_operand', totally rewrite.
(set_cons_rparams): Rename to 'set_operand', totally rewrite.
(set_indexmode_parameters): Remove function, integrate its code into 'set_operand'.
(set_operand_size): Get rid of 'Operand Number' function parameter - use global variable 'cur_arg_num' instead.
Use a local 'argument' pointer to reference the current argument.
(parse_operand): Likewise.
(set_operand): Likewise.
(process_label_constant): Likewise.
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(add_section_rename): Delete. Inlined into...
(build_section_rename): ...here. Use xstrdup instead of strdup.
(xtensa_section_rename): Drop "const" from argument and return types.
(md_show_usage): Indent to match show_usage().
* config/tc-xtensa.h: Remove XTENSA_SECTION_RENAME ifdefs.
(tc_canonicalize_section_name): Define.
(md_elf_section_rename): Remove unused macro.
* doc/as.texinfo (Overview): Document Xtensa --rename-section option.
* doc/c-xtensa.texi (Xtensa Options): Likewise.
(Frame Directive): Delete.
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* configure.in (arm-*-oabi*, thumb-*-oabi*): Remove.
* configure: Regenerated.
bfd/
* Makefile.am (BFD32_BACKENDS, BFD32_BACKENDS_CFILES): Replace
elfarm-nabi with elf32-arm. Remove elfarm-oabi.
(elf32-arm.lo): Replace elfarm-nabi.lo rule. Remove elf32-arm.h
dependency.
* config.bfd: Move arm-*-oabi* and thumb-*-oabi* from obsolete list
to a new removed list. Remove normal configuration stanzas.
* configure.in: (bfd_elf32_bigarm_vec, bfd_elf32_bigarm_symbian_vec)
(bfd_elf32_littlearm_symbian_vec, bfd_elf32_littlearm_vec): Replace
elfarm-nabi.lo with elf32-arm.lo.
(bfd_elf32_bigarm_oabi_vec, bfd_elf32_littlearm_oabi_vec): Remove.
* elf32-arm.c: Renamed from elfarm-nabi.c. Inline elf32-arm.h.
* elf32-arm.h: Remove.
* elfarm-oabi.c: Remove.
* targets.c (_bfd_target_vector): Remove bfd_elf32_bigarm_oabi_vec
and bfd_elf32_littlearm_oabi_vec.
* aclocal.m4, Makefile.in, configure, doc/Makefile.in: Regenerated.
gas/
* configure.in: Remove arm-*-oabi and thumb-*-oabi.
* config/tc-arm.c (target_oabi): Delete.
(md_apply_fix3, elf32_arm_target_format): Remove target_oabi checks.
(arm_opts): Remove moabi.
* doc/as.texinfo (Overview): Remove documentation of -moabi.
* doc/c-arm.texi (ARM Options): Likewise.
* configure: Regenerated.
ld/
* Makefile.am (ALL_EMULATIONS): Remove earmelf_oabi.o.
(earmelf_oabi.c): Remove rule.
* configure.tgt: Remove arm-*-oabi and thumb-*-oabi.
* emulparams/armelf_oabi.sh, emultempl/armelf_oabi.em: Delete files.
* Makefile.in: Regenerated.
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