| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2019-08-05 | Removes support in the ARM assembler for the unsigned variants of the VQ(R)DM... | Barnaby Wilks | 10 | -2710/+38 |
| 2019-07-30 | RISC-V: Fix minor issues with FP csr instructions. | Jim Wilson | 4 | -1/+61 |
| 2019-07-24 | [ARC] Update disassembler opcode selection | Claudiu Zissulescu | 1 | -1/+1 |
| 2019-07-24 | Complain about mbind, ifunc, and unique in final_write | Alan Modra | 2 | -2/+2 |
| 2019-07-24 | Define ELF_OSABI for visium | Alan Modra | 3 | -5/+10 |
| 2019-07-23 | [AArch64] Add support for GMID_EL1 register for +memtag | Kyrylo Tkachov | 3 | -0/+3 |
| 2019-07-23 | SHF_GNU_MBIND requires ELFOSABI_GNU | Alan Modra | 4 | -3/+7 |
| 2019-07-23 | gas "mbind sections" test | Alan Modra | 1 | -2/+0 |
| 2019-07-22 | This patch addresses the change in the June Armv8.1-M Mainline specification,... | Barnaby Wilks | 8 | -132/+124 |
| 2019-07-19 | x86: Pass -O0 to assembler in noextreg.d | H.J. Lu | 1 | -0/+1 |
| 2019-07-19 | cpu,opcodes,gas: use %r0 and %r6 instead of %a and %ctf in eBPF disassembler | Jose E. Marchesi | 6 | -52/+52 |
| 2019-07-19 | [AArch64] Rename +bitperm to +sve2-bitperm | Richard Sandiford | 5 | -5/+5 |
| 2019-07-17 | gas: support .half, .word and .dword directives in eBPF | Jose E. Marchesi | 4 | -0/+23 |
| 2019-07-16 | x86: fold SReg{2,3} | Jan Beulich | 3 | -305/+9 |
| 2019-07-15 | cpu,opcodes,gas: fix explicit arguments to eBPF ldabs instructions | Jose E. Marchesi | 3 | -12/+12 |
| 2019-07-14 | cpu,opcodes,gas: fix arguments to ldabs and ldind eBPF instructions | Jose E. Marchesi | 3 | -24/+24 |
| 2019-07-09 | Re: gas/ELF: don't accumulate .type settings | Alan Modra | 1 | -0/+10 |
| 2019-07-05 | Kito's 5-part patch set to improve .insn support. | Jim Wilson | 2 | -48/+70 |
| 2019-07-04 | gas/ELF: don't accumulate .type settings | Jan Beulich | 4 | -0/+63 |
| 2019-07-03 | Fix assembler tests to work with toolchains that have been configured with --... | Nick Clifton | 92 | -64/+98 |
| 2019-07-02 | This patch fixes a bug in the AArch64 assembler where an incorrect structural... | Barnaby Wilks | 4 | -1/+12 |
| 2019-07-02 | [AArch64] Allow MOVPRFX to be used with FMOV | Richard Sandiford | 2 | -0/+25 |
| 2019-07-02 | [AArch64] Add missing C_MAX_ELEM flags for SVE conversions | Richard Sandiford | 3 | -7/+73 |
| 2019-07-02 | [AArch64] Fix bogus MOVPRFX warning for GPR form of CPY | Richard Sandiford | 3 | -3/+2 |
| 2019-07-01 | [gas][aarch64][SVE2] Fix pmull{t,b} requirement on SVE2-AES | Matthew Malcomson | 5 | -10/+28 |
| 2019-07-01 | x86: optimize AND/OR with twice the same register | Jan Beulich | 7 | -0/+396 |
| 2019-07-01 | x86-64: optimize certain commutative VEX-encoded insns | Jan Beulich | 11 | -1245/+981 |
| 2019-07-01 | x86: optimize EVEX packed integer logical instructions | Jan Beulich | 21 | -0/+897 |
| 2019-07-01 | x86: add missing pseudo ops for VPCLMULQDQ ISA extension | Jan Beulich | 18 | -18/+122 |
| 2019-07-01 | x86: warn about insns exceeding the 15-byte limit | Jan Beulich | 5 | -0/+104 |
| 2019-06-27 | This fixes a bug in the ARm assembler where an immediate operand larger than ... | Barnaby Wilk s | 7 | -6/+31 |
| 2019-06-27 | x86: add missing test | Jan Beulich | 2 | -0/+174 |
| 2019-06-27 | x86: allow VEX et al encodings in 16-bit (protected) mode | Jan Beulich | 13 | -2/+16773 |
| 2019-06-26 | Fix a few non-dash safe xstormy16 shell scripts. | Jim Wilson | 2 | -2/+2 |
| 2019-06-25 | MIPS/gas: Fix order of instructions in LI macro expansion | Faraz Shahbazker | 5 | -26/+100 |
| 2019-06-25 | x86: fix (dis)assembly of certain SSE2 insns in 16-bit mode | Jan Beulich | 3 | -0/+175 |
| 2019-06-25 | x86-64: also optimize ANDQ with immediate fitting in 7 bits | Jan Beulich | 2 | -0/+12 |
| 2019-06-25 | x86: add CVT{,T}PS2PI cases to xmmwords test | Jan Beulich | 2 | -0/+6 |
| 2019-06-25 | PowerPC nops | Alan Modra | 3 | -0/+40 |
| 2019-06-19 | i386: Check vector length for EVEX broadcast instructions | H.J. Lu | 4 | -4/+11 |
| 2019-06-17 | i386: Check vector length for vshufXXX/vinsertXXX/vextractXXX | H.J. Lu | 4 | -2/+10 |
| 2019-06-12 | Remove the ldmx mnemonic that never made it into POWER9. | Peter Bergner | 2 | -4/+0 |
| 2019-06-05 | i386: Check vector length for EVEX vextractfXX and vinsertfXX | H.J. Lu | 4 | -2/+12 |
| 2019-06-04 | i386: Check for reserved VEX.vvvv and EVEX.vvvv | H.J. Lu | 4 | -0/+13 |
| 2019-06-04 | Enable Intel AVX512_VP2INTERSECT insn | H.J. Lu | 15 | -0/+402 |
| 2019-06-04 | Add support for Intel ENQCMD[S] instructions | H.J. Lu | 11 | -0/+165 |
| 2019-05-30 | RISC-V: Fix lui argument parsing. | Jim Wilson | 2 | -0/+5 |
| 2019-05-28 | x86: Add CheckRegSize to AVX512_BF16 instructions with Disp8ShiftVL | H.J. Lu | 4 | -0/+18 |
| 2019-05-27 | Fix failure on powerpc 32-bit only targets | Alan Modra | 1 | -1/+12 |
| 2019-05-24 | aarch64: override default elf .set handling in gas | Szabolcs Nagy | 2 | -0/+32 |
