| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2019-10-30 | x86: add tests to cover defaulting of operand sizes for ambiguous insns | Jan Beulich | 7 | -0/+385 |
| 2019-10-09 | Fix the disassembly of the LDS and STS instructions of the AVR architecture. | Nick Clifton | 2 | -0/+13 |
| 2019-10-07 | Add support for new functionality in the msp430 backend of GCC. | Jozef Lawrynowicz | 13 | -0/+57 |
| 2019-10-07 | x86/Intel: correct MOVSD and CMPSD handling | Jan Beulich | 8 | -10/+231 |
| 2019-09-24 | Arm: Fix out of range conditional branch (PR/24991) | Tamar Christina | 3 | -0/+11 |
| 2019-09-24 | [ARM]: Modify assembler to accept floating and signless datatypes for MVE ins... | Srinath Parvathaneni | 4 | -1/+76 |
| 2019-09-20 | x86-64: fix handling of PUSH/POP of segment register | Jan Beulich | 2 | -2/+14 |
| 2019-09-10 | Enhance the disassembler so that it will reliably determine whether a reloc a... | Nick Clifton | 2 | -0/+35 |
| 2019-09-10 | [PATCH][ARM][GAS]: Support to MVE VCTP instruction. | Srinath Parvathaneni | 5 | -0/+136 |
| 2019-08-30 | [PATCH][ARM][GAS]: Assembler support to interpret MVE VMOV instruction correc... | Srinath Parvathaneni | 2 | -0/+79 |
| 2019-08-27 | Add support for the MVE VMOV instruction to the ARM assembler. This instruct... | Srinath Parvathaneni | 3 | -200/+231 |
| 2019-08-25 | RISC-V: Improve li expansion for better code density. | Kito Cheng | 4 | -0/+75 |
| 2019-08-22 | Arm: Add support for missing CPUs | Dennis Zhang | 3 | -0/+18 |
| 2019-08-22 | Fix the assembler's floating point number parser so that it can correctly han... | Bosco Garc?a | 3 | -0/+7 |
| 2019-08-22 | Implement a float16 directive for assembling 16 bit IEEE 754 floating point n... | Barnaby Wilks | 3 | -0/+41 |
| 2019-08-22 | [AArch64][gas] Update MTE system register encodings | Kyrylo Tkachov | 1 | -10/+10 |
| 2019-08-20 | Remove test files for a different patch accidentally committed with patch for... | Nick Clifton | 2 | -35/+0 |
| 2019-08-20 | Adds support for following CPUs to the ARM and Aarch64 assemblers: Cortex-A77... | Dennis Zhang | 8 | -0/+66 |
| 2019-08-19 | MIPS/gas: Retain ISA mode bit for labels with .insn annotation | Faraz Shahbazker | 3 | -0/+31 |
| 2019-08-12 | Modify the ARM encoding and decoding of SQRSHRL and UQRSHLL MVE instructions. | Srinath Parvathaneni | 4 | -6/+22 |
| 2019-08-12 | Add generic and ARM specific support for half-precision IEEE 754 floating poi... | Barnaby Wilks | 15 | -0/+124 |
| 2019-08-09 | x86-64: generalize SIMD test expectations | Jan Beulich | 6 | -927/+201 |
| 2019-08-08 | Change the output of readelf's note display so that the "Data size" column he... | Nick Clifton | 4 | -4/+4 |
| 2019-08-08 | Move the h8300 assembler's MOVFPE and MOVTPE tests to the correct location. | Yoshinori Sato | 4 | -50/+49 |
| 2019-08-05 | Removes support in the ARM assembler for the unsigned variants of the VQ(R)DM... | Barnaby Wilks | 10 | -2710/+38 |
| 2019-07-30 | RISC-V: Fix minor issues with FP csr instructions. | Jim Wilson | 4 | -1/+61 |
| 2019-07-24 | [ARC] Update disassembler opcode selection | Claudiu Zissulescu | 1 | -1/+1 |
| 2019-07-24 | Complain about mbind, ifunc, and unique in final_write | Alan Modra | 2 | -2/+2 |
| 2019-07-24 | Define ELF_OSABI for visium | Alan Modra | 3 | -5/+10 |
| 2019-07-23 | [AArch64] Add support for GMID_EL1 register for +memtag | Kyrylo Tkachov | 3 | -0/+3 |
| 2019-07-23 | SHF_GNU_MBIND requires ELFOSABI_GNU | Alan Modra | 4 | -3/+7 |
| 2019-07-23 | gas "mbind sections" test | Alan Modra | 1 | -2/+0 |
| 2019-07-22 | This patch addresses the change in the June Armv8.1-M Mainline specification,... | Barnaby Wilks | 8 | -132/+124 |
| 2019-07-19 | x86: Pass -O0 to assembler in noextreg.d | H.J. Lu | 1 | -0/+1 |
| 2019-07-19 | cpu,opcodes,gas: use %r0 and %r6 instead of %a and %ctf in eBPF disassembler | Jose E. Marchesi | 6 | -52/+52 |
| 2019-07-19 | [AArch64] Rename +bitperm to +sve2-bitperm | Richard Sandiford | 5 | -5/+5 |
| 2019-07-17 | gas: support .half, .word and .dword directives in eBPF | Jose E. Marchesi | 4 | -0/+23 |
| 2019-07-16 | x86: fold SReg{2,3} | Jan Beulich | 3 | -305/+9 |
| 2019-07-15 | cpu,opcodes,gas: fix explicit arguments to eBPF ldabs instructions | Jose E. Marchesi | 3 | -12/+12 |
| 2019-07-14 | cpu,opcodes,gas: fix arguments to ldabs and ldind eBPF instructions | Jose E. Marchesi | 3 | -24/+24 |
| 2019-07-09 | Re: gas/ELF: don't accumulate .type settings | Alan Modra | 1 | -0/+10 |
| 2019-07-05 | Kito's 5-part patch set to improve .insn support. | Jim Wilson | 2 | -48/+70 |
| 2019-07-04 | gas/ELF: don't accumulate .type settings | Jan Beulich | 4 | -0/+63 |
| 2019-07-03 | Fix assembler tests to work with toolchains that have been configured with --... | Nick Clifton | 92 | -64/+98 |
| 2019-07-02 | This patch fixes a bug in the AArch64 assembler where an incorrect structural... | Barnaby Wilks | 4 | -1/+12 |
| 2019-07-02 | [AArch64] Allow MOVPRFX to be used with FMOV | Richard Sandiford | 2 | -0/+25 |
| 2019-07-02 | [AArch64] Add missing C_MAX_ELEM flags for SVE conversions | Richard Sandiford | 3 | -7/+73 |
| 2019-07-02 | [AArch64] Fix bogus MOVPRFX warning for GPR form of CPY | Richard Sandiford | 3 | -3/+2 |
| 2019-07-01 | [gas][aarch64][SVE2] Fix pmull{t,b} requirement on SVE2-AES | Matthew Malcomson | 5 | -10/+28 |
| 2019-07-01 | x86: optimize AND/OR with twice the same register | Jan Beulich | 7 | -0/+396 |
