aboutsummaryrefslogtreecommitdiff
path: root/gas/testsuite
AgeCommit message (Expand)AuthorFilesLines
2022-06-03x86: exclude certain ISA extensions from v3/v4 ISAJan Beulich7-0/+36
2022-05-31Trailing spaces in objdump -r headerAlan Modra106-142/+142
2022-05-30Fix failing test for armeb-gnu-eabiLuis Machado1-18/+2
2022-05-30RISC-V: Add zhinx extension supports.jiawei2-0/+125
2022-05-27opcodes/i386: remove trailing whitespace from insns with zero operandsAndrew Burgess203-1666/+1666
2022-05-27x86/Intel: allow MASM representation of embedded rounding / SAEJan Beulich10-1938/+1977
2022-05-27x86: re-work AVX512 embedded rounding / SAEJan Beulich2-0/+46
2022-05-27x86/Intel: adjust representation of embedded rounding / SAEJan Beulich36-9924/+9924
2022-05-27x86/Intel: allow MASM representation of embedded broadcastJan Beulich22-4128/+4158
2022-05-27x86/Intel: adjust representation of embedded broadcastJan Beulich50-16765/+16765
2022-05-25RISC-V: Fix RV32Q conflictTsukasa OI7-3/+19
2022-05-25opcodes: introduce BC field; fix iselDmitry Selyutin4-4/+4
2022-05-20RISC-V: Update zfinx implement with zicsr.Jia-Wei Chen1-0/+36
2022-05-20RISC-V: Remove RV128-only fmv instructionsTsukasa OI3-0/+8
2022-05-19arm: Fix system register fpcxt_ns and fpcxt_s naming convention.Srinath Parvathaneni2-0/+77
2022-05-18arm: Add unwind support for mixed register listsVictor Do Nascimento3-9/+23
2022-05-18gas: avoid octal numbers being accepted when processing .linefileJan Beulich2-0/+4
2022-05-18gas: avoid bignum related errors when processing .linefileJan Beulich3-0/+12
2022-05-18gas: don't ignore .linefile inside false conditionalsJan Beulich3-0/+22
2022-05-17RISC-V: Added half-precision floating-point v1.0 instructions.Nelson Chu5-0/+180
2022-05-12Re: IBM zSystems: Accept (. - 0x100000000) PCRel32 operandsAlan Modra1-2/+2
2022-05-09IBM zSystems: Accept (. - 0x100000000) PCRel32 operandsIlya Leoshkevich5-1/+17
2022-04-27x86: Disable 2 tests with large memory requirementH.J. Lu1-1/+2
2022-04-27x86: VFPCLASSSH is Evex.LLIGJan Beulich5-0/+52
2022-04-20x86: reject all invalid SAE variantsJan Beulich2-0/+10
2022-04-20Revert "as: Reject unknown -gXXX option" testsuiteAlan Modra4-6/+0
2022-04-19as: Reject unknown -gXXX optionH.J. Lu4-0/+6
2022-04-19x86: don't mistake ordinary immediates for SAE / rounding controlJan Beulich2-3/+10
2022-04-19x86: VCMPSH is Evex.LLIGJan Beulich5-0/+61
2022-04-19x86/Intel: test non-legacy VCVT{,U}SI2SH insn formsJan Beulich2-6/+6
2022-04-19x86: correct and simplify NOP disassemblyJan Beulich3-43/+12
2022-04-12gas: further adjust file/line handling for .macroJan Beulich1-6/+6
2022-04-12gas: further adjust file/line handling for .irp and alikeJan Beulich14-1203/+1316
2022-04-12x86: make {disp16} work similarly to {disp32}Jan Beulich4-1/+19
2022-04-09Don't run pr27228 test for hppaAlan Modra1-1/+1
2022-04-08gas: Port "copy st_size only if unset" to aarch64 and riscvFangrui Song1-0/+2
2022-04-07Add support for COFF secidx relocationsMark Harmstone3-1/+121
2022-04-07gas/Dwarf: record functionsJan Beulich6-0/+219
2022-04-07Arm64: arrange for line number emission for .instJan Beulich3-0/+19
2022-04-07Arm32: arrange for line number emission for .instJan Beulich1-0/+21
2022-04-07RISC-V: add testcase to check line number emission for .insnJan Beulich1-0/+71
2022-04-06Add code to display the contents of .debug_loclists sections which contain of...Nick Clifton1-1/+1
2022-04-04gas: copy st_size only if unsetFangrui Song3-0/+38
2022-03-31aarch64: Relax check for RNG system registersRichard Sandiford2-0/+13
2022-03-29gas/Dwarf: special-case .linefile only for macrosJan Beulich2-0/+27
2022-03-29RISC-V: correct FCVT.Q.L[U]Jan Beulich1-2/+2
2022-03-25Re: gas/Dwarf: improve debug info generation from .irp and alike blocksAlan Modra1-2/+2
2022-03-23x86: reject relocations involving registersJan Beulich1-0/+6
2022-03-23x86: improve resolution of register equatesJan Beulich2-2/+18
2022-03-23x86: don't attempt to resolve equates and alike from i386_parse_name()Jan Beulich3-0/+29
generated by cgit v1.1 at 2024-11-22 12:23:01 +0000