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2014-12-16Fix octeon3 testsuite falloutMatthew Fortune7-6/+15
gas/testsuite/ * gas/mips/attr-gnu-4-5.d: Ignore ASEs. * gas/mips/attr-gnu-4-6.d: Likewise. * gas/mips/attr-gnu-4-7.d: Likewise. * gas/mips/attr-none-o32-fp64-nooddspreg.d: Likewise. * gas/mips/attr-none-o32-fp64.d: Likewise. * gas/mips/attr-none-o32-fpxx.d: Likewise.
2014-12-16Add in a JALRC alias and fix the NAL instruction.Matthew Fortune5-0/+19
opcodes/ * mips-opc.c (mips_builtin_opcodes): Add JALRC alias for JIALC. Remove the operand from NAL. gas/testsuite/ * gas/mips/r6.s: Test JALRC and NAL * gas/mips/r6-n32.d: Add expected output for JALRC and NAL. * gas/mips/r6-n64.d: Likewise. * gas/mips/r6.d: Likewise.
2014-12-06Add Visium support to gasEric Botcazou24-1/+1250
gas/ * configure.tgt: Add Visium support. * Makefile.am (TARGET_CPU_CFILES): Move config/tc-vax.c around and add config/tc-visium.c. (TARGET_CPU_HFILES): Move config/tc-vax.h around and add config/tc-visium.h. * Makefile.in: Regenerate. * config/tc-visium.c: New file. * config/tc-visium.h: Likewise. * po/POTFILES.in: Regenerate. gas/testsuite/ * gas/elf/elf.exp: Skip ifunc-1 for Visium. * gas/visium/: New directory.
2014-11-30Power4 should treat mftb as extended mfspr mnemonicAlan Modra3-3/+8
On further reading of ISA manual it appears gas should have been treating mftb and mftbu as extended mnemonics for mfspr, for ISA 2.03 and later. opcodes/ * ppc-opc.c (powerpc_opcodes): Make mftb* generate mfspr for power4 and later. gas/testsuite/ * gas/ppc/a2.d: Update for mftb change. * gas/ppc/476.d: Likewise.
2014-11-28Remove broken nios2 assembler dwim support.Sandra Loosemore5-22/+23
2014-11-28 Sandra Loosemore <sandra@codesourcery.com> include/opcode/ * nios2.h (NIOS2_INSN_ADDI, NIOS2_INSN_ANDI): Delete. (NIOS2_INSN_ORI, NIOS2_INSN_XORI): Delete. (NIOS2_INSN_OPTARG): Renumber. opcodes/ * nios2-opc.c (nios2_r1_opcodes): Remove deleted attributes from descriptors. gas/ * config/tc-nios2.c (can_evaluate_expr, get_expr_value): Delete. (output_addi, output_andi, output_ori, output_xori): Delete. (md_assemble): Remove calls to deleted functions. gas/testsuite/ * gas/nios2/nios2.exp: Make "movi" a list test. * gas/nios2/movi.s: Adjust comments, add another case. * gas/nios2/movi.l: New. * gas/nios2/movi.d: Delete.
2014-11-26Fix trampolines search code for conditional branchesMax Filippov3-0/+20
For conditional branches that need more than one trampoline to reach its target assembler couldn't always find suitable trampoline because post-loop condition check was placed inside the loop, resulting in premature loop termination. Move check outside the loop. This fixes the following build errors seen when assembling huge files produced by gcc: Error: jump target out of range; no usable trampoline found Error: operand 1 of 'j' has out of range value '307307' 2014-11-25 Max Filippov <jcmvbkbc@gmail.com> gas/ * config/tc-xtensa.c (search_trampolines): Move post-loop condition check outside the search loop. gas/testsuite/ * gas/xtensa/trampoline.d: Add expected output for branches. * gas/xtensa/trampoline.s: Add test case for branches.
2014-11-21Calculate ARM arch attribute after relaxationTerry Guo3-0/+21
gas/ 2014-11-21 Terry Guo <terry.guo@arm.com> * config/tc-arm.c (md_assemble): Do not consider relaxation. (md_convert_frag): Test and set target arch attribute accordingly. (aeabi_set_attribute_string): Turn it into a global function. * config/tc-arm.h (md_post_relax_hook): Enable it for ARM target. (aeabi_set_public_attributes): Declare it. gas/testsuite/ 2014-11-21 Terry Guo <terry.guo@arm.com> * gas/arm/attr-arch-assumption.d: New file. * gas/arm/attr-arch-assumption.s: Likewise. ld/testsuite/ 2014-11-21 Terry Guo <terry.guo@arm.com> * ld-arm/tls-longplt-lib.s: Require ARMv6T2. * ld-arm/tls-longplt.s: Likewise. * ld-arm/tls-longplt-lib.d: Updated. * ld-arm/tls-longplt.d: Likewise.
2014-11-21Support ARM Cortex-M7Terry Guo5-0/+184
include/ChangeLog: 2014-11-21 Terry Guo <terry.guo@arm.com> * opcode/arm.h (FPU_VFP_EXT_ARMV8xD): New macro. (FPU_VFP_V5D16): Likewise. (FPU_VFP_V5_SP_D16): Likewise. (FPU_ARCH_VFP_V5D16): Likewise. (FPU_ARCH_VFP_V5_SP_D16): Likewise. bfd/ChangeLog: 2014-11-21 Terry Guo <terry.guo@arm.com> * elf32-arm.c (elf32_arm_merge_eabi_attributes): Support FPv5. binutils/ChangeLog: 2014-11-21 Terry Guo <terry.guo@arm.com> * readelf.c (arm_attr_tag_FP_arch): Extended to support FPv5. gas/ChangeLog: 2014-11-21 Terry Guo <terry.guo@arm.com> * config/tc-arm.c (fpu_vfp_ext_armv8xd): New. (arm_cpus): Support cortex-m7. (arm_fpus): Support fpv5-sp-d16 and fpv5-d16. (do_vfp_nsyn_cvt_fpv8): Generate error when use D register for S register only target like FPv5-SP-D16. (do_neon_cvttb_1): Likewise. (do_vfp_nsyn_fpv8): Likewise. (do_vrint_1): Likewise. (aeabi_set_public_attributes): Set proper FP arch for FPv5. * doc/c-arm.texi: Document new cpu and fpu names for cortex-m7. gas/testsuite/ChangeLog: 2014-11-21 Terry Guo <terry.guo@arm.com> * gas/arm/armv7e-m+fpv5-d16.s: New. * gas/arm/armv7e-m+fpv5-d16.d: Likewise. * gas/arm/armv7e-m+fpv5-sp-d16.s: Likewise. * gas/arm/armv7e-m+fpv5-sp-d16.d: Likewise. ld/testsuite/ChangeLog: 2014-11-21 Terry Guo <terry.guo@arm.com> * ld-arm/attr-merge-vfp-4-sp.s: New test source file. * ld-arm/attr-merge-vfp-5-sp.s: Likewise. * ld-arm/attr-merge-vfp-5.s: Likewise. * ld-arm/attr-merge-vfp-8.d: New test. * ld-arm/attr-merge-vfp-8r.d: Likewise. * ld-arm/attr-merge-vfp-9.d: Likewise. * ld-arm/attr-merge-vfp-9r.d: Likewise. * ld-arm/attr-merge-vfp-10.d: Likewise. * ld-arm/attr-merge-vfp-10r.d: Likewise. * ld-arm/attr-merge-vfp-11.d: Likewise. * ld-arm/attr-merge-vfp-11r.d: Likewise. * ld-arm/attr-merge-vfp-12.d: Likewise. * ld-arm/attr-merge-vfp-12r.d: Likewise. * ld-arm/attr-merge-vfp-13.d: Likewise. * ld-arm/attr-merge-vfp-13r.d: Likewise. * ld-arm/attr-merge-vfp-14.d: Likewise. * ld-arm/attr-merge-vfp-14r.d: Likewise. * ld-arm/arm-elf.exp: Run the new tests.
2014-11-20[AArch64] Fix mis-detection of unpredictable load/store operations with FP regs.Richard Earnshaw1-5/+5
* config/tc-aarch64.c (warn_unpredictable_ldst): Check that transfer registers are in the GP register set. Adjust warnings. Use correct field member for address register. * testsuite/gas/aarch64/diagnostic.l: Update.
2014-11-19[AArch64] Warn on load pair to same registerJiong Wang3-0/+27
2014-11-19 Ryan Mansfield <rmansfield@qnx.com> * config/tc-aarch64.c (md_assemble): Call warn_unpredictable_ldst. (warn_unpredictable_ldst): New. 2014-11-19 Ryan Mansfield <rmansfield@qnx.com> * gas/aarch64/diagnostic.s: Add new warnings test patterns. * gas/aarch64/diagnostic.l: Update expected diagnostic output.
2014-11-18Add -z bndplt to generate BND prefix in PLT entriesIgor Zamyatin3-16/+21
This patch adds "-z bndplt" option Linux/x86-64 linker to generate BND prefix in PLT entries. It also updated Linux/x86-64 assembler not to generate R_X86_64_PLT32_BND nor R_X86_64_PC32_BND relocations. bfd/ 2014-11-18 Igor Zamyatin <igor.zamyatin@intel.com> * elf64-x86-64.c (elf_x86_64_check_relocs): Enable MPX PLT only for -z bndplt. gas/ 2014-11-18 Igor Zamyatin <igor.zamyatin@intel.com> * config/tc-i386-intel.c (i386_operator): Remove last argument from lex_got call. * config/tc-i386.c (reloc): Remove bnd_prefix from parameters' list. Return always BFD_RELOC_32_PCREL. * (output_branch): Remove condition for BFD_RELOC_X86_64_PC32_BND. * (output_jump): Update call to reloc accordingly. * (output_interseg_jump): Likewise. * (output_disp): Likewise. * (output_imm): Likewise. * (x86_cons_fix_new): Likewise. * (lex_got): Remove bnd_prefix from parameters' list in macro and declarations. Don't use BFD_RELOC_X86_64_PLT32_BND. * (x86_cons): Update call to lex_got accordingly. * (i386_immediate): Likewise. * (i386_displacement): Likewise. * (md_apply_fix): Don't use BFD_RELOC_X86_64_PLT32_BND nor BFD_RELOC_X86_64_PC32_BND. * (tc_gen_reloc): Likewise. include/ 2014-11-18 Igor Zamyatin <igor.zamyatin@intel.com> * bfdlink.h (struct bfd_link_info): Add bndplt. ld/ 2014-11-18 Igor Zamyatin <igor.zamyatin@intel.com> * emulparams/elf_x86_64.sh (BNDPLT): Set to yes for x86_64. * emultempl/elf32.em (gld${EMULATION_NAME}_handle_option): Handle "-z bndplt" if BNDPLT is yes. (gld${EMULATION_NAME}_list_options): Add "-z bndplt" entry. * ld.texinfo: Add description for bndplt. ld/testsuite/ 2014-11-18 Igor Zamyatin <igor.zamyatin@intel.com> * testsuite/ld-x86-64/bnd-ifunc-1.d: Add bndplt option. * testsuite/ld-x86-64/bnd-ifunc-2.d: Likewise. * testsuite/ld-x86-64/bnd-plt-1.d: Likewise. Update dissassembly sections. * testsuite/ld-x86-64/mpx.exp: Handle mpx3 and mpx4 tests. * testsuite/ld-x86-64/mpx1a.rd: Remove _BND from relocation name. * testsuite/ld-x86-64/mpx1c.rd: Likewise. * testsuite/ld-x86-64/mpx2a.rd: Likewise. * testsuite/ld-x86-64/mpx2c.rd: Likewise. * testsuite/ld-x86-64/mpx3.dd: New file. * testsuite/ld-x86-64/mpx3a.s: Likewise. * testsuite/ld-x86-64/mpx3b.s: Likewise. * testsuite/ld-x86-64/mpx4.dd: Likewise. * testsuite/ld-x86-64/mpx4a.s: Likewise. * testsuite/ld-x86-64/mpx4b.s: Likewise.
2014-11-18aarch64: allow adding/removing just feature flags via .arch_extensionJan Beulich5-0/+63
Rather than requiring to always also set/change the base architecture, allow just en-/disabling of architecture extensions, matching what ARM has.
2014-11-17Add AVX512VBMI instructionsIlya Tocar14-0/+1576
gas/ * config/tc-i386.c (cpu_arch): Add .avx512vbmi. * doc/c-i386.texi: Document it. opcodes/ * i386-dis-evex.c (evex_table): Add vpermi2b, vpermt2b, vpermb, vpmultishiftqb. * i386-dis.c (PREFIX enum): Add PREFIX_EVEX_0F3883, EVEX_W_0F3883_P_2. * i386-gen.c (cpu_flag_init): Add CPU_AVX512VBMI_FLAGS. (cpu_flags): Add CpuAVX512VBMI. * i386-opc.h (enum): Add CpuAVX512VBMI. (i386_cpu_flags): Add cpuavx512vbmi. * i386-opc.tbl: Add vpmadd52luq, vpmultishiftqb, vpermb, vpermi2b, vpermt2b. * i386-init.h: Regenerated. * i386-tbl.h: Likewise. /gas/testsuite/ * gas/i386/i386.exp: Run new tests. * gas/i386/avx512vbmi-intel.d: New file. * gas/i386/avx512vbmi.d: Likewise. * gas/i386/avx512vbmi.s: Likewise. * gas/i386/avx512vbmi_vl-intel.d: Likewise. * gas/i386/avx512vbmi_vl.d: Likewise. * gas/i386/avx512vbmi_vl.s: Likewise. * gas/i386/x86-64-avx512vbmi-intel.d: Likewise. * gas/i386/x86-64-avx512vbmi.d: Likewise. * gas/i386/x86-64-avx512vbmi.s: Likewise. * gas/i386/x86-64-avx512vbmi_vl-intel.d: Likewise. * gas/i386/x86-64-avx512vbmi_vl.d: Likewise. * gas/i386/x86-64-avx512vbmi_vl.s: Likewise.
2014-11-17Add AVX512IFMA instructionsIlya Tocar14-0/+1132
gas/ * config/tc-i386.c (cpu_arch): Add .avx512ifma. * doc/c-i386.texi: Document it. opcodes/ * i386-dis-evex.c (evex_table): Add vpmadd52luq, vpmadd52huq. * i386-dis.c (PREFIX enum): Add PREFIX_EVEX_0F38B4, PREFIX_EVEX_0F38B5. * i386-gen.c (cpu_flag_init): Add CPU_AVX512IFMA_FLAGS. (cpu_flags): Add CpuAVX512IFMA. * i386-opc.h (enum): Add CpuAVX512IFMA. (i386_cpu_flags): Add cpuavx512ifma. * i386-opc.tbl: Add vpmadd52huq, vpmadd52luq. * i386-init.h: Regenerated. * i386-tbl.h: Likewise. /gas/testsuite/ * gas/i386/i386.exp: Run new tests. * gas/i386/avx512ifma-intel.d: New file. * gas/i386/avx512ifma.d: Likewise. * gas/i386/avx512ifma.s: Likewise. * gas/i386/avx512ifma_vl-intel.d: Likewise. * gas/i386/avx512ifma_vl.d: Likewise. * gas/i386/avx512ifma_vl.s: Likewise. * gas/i386/x86-64-avx512ifma-intel.d: Likewise. * gas/i386/x86-64-avx512ifma.d: Likewise. * gas/i386/x86-64-avx512ifma.s: Likewise. * gas/i386/x86-64-avx512ifma_vl-intel.d: Likewise. * gas/i386/x86-64-avx512ifma_vl.d: Likewise. * gas/i386/x86-64-avx512ifma_vl.s: Likewise.
2014-11-17Add pcommit instructionIlya Tocar8-1/+90
gas/ * config/tc-i386.c (cpu_arch): Add .pcommit. * doc/c-i386.texi: Document it. /opcodes * i386-dis.c (PREFIX enum): Add PREFIX_RM_0_0FAE_REG_7. (prefix_table): Add pcommit. * i386-gen.c (cpu_flag_init): Add CPU_PCOMMIT_FLAGS. (cpu_flags): Add CpuPCOMMIT. * i386-opc.h (enum): Add CpuPCOMMIT. (i386_cpu_flags): Add cpupcommit. * i386-opc.tbl: Add pcommit. * i386-init.h: Regenerated. * i386-tbl.h: Likewise. /gas/testsuite/ * gas/i386/i386.exp: Run new tests. * gas/i386/pcommit-intel.d: New file. * gas/i386/pcommit.d: Likewise. * gas/i386/pcommit.s: Likewise. * gas/i386/x86-64-pcommit-intel.d: Likewise. * gas/i386/x86-64-pcommit.d: Likewise. * gas/i386/x86-64-pcommit.s: Likewise.
2014-11-17Add clwb instructionIlya Tocar8-0/+102
gas/ * config/tc-i386.c (cpu_arch): Add .clwb. * doc/c-i386.texi: Document it. opcodes/ * i386-dis.c (PREFIX enum): Add PREFIX_0FAE_REG_6. (prefix_table): Add clwb. * i386-gen.c (cpu_flag_init): Add CPU_CLWB_FLAGS. (cpu_flags): Add CpuCLWB. * i386-opc.h (enum): Add CpuCLWB. (i386_cpu_flags): Add cpuclwb. * i386-opc.tbl: Add clwb. * i386-init.h: Regenerated. * i386-tbl.h: Likewise. gas/testsuite/ * gas/i386/i386.exp: Run new tests. * gas/i386/clwb-intel.d: New file. * gas/i386/clwb.d: Likewise. * gas/i386/clwb.s: Likewise. * gas/i386/x86-64-clwb-intel.d: Likewise. * gas/i386/x86-64-clwb.d: Likewise. * gas/i386/x86-64-clwb.s: Likewise.
2014-11-13Add assembler support for @gotpltH.J. Lu4-0/+36
Obsolete R_X86_64_GOTPLT64 and treat it the same as R_X86_64_GOT64. bfd/ PR gas/17598 * elf64-x86-64.c (elf_x86_64_check_relocs): Treat R_X86_64_GOTPLT64 the same as R_X86_64_GOT64. (elf_x86_64_relocate_section): Likewise. gas/ PR gas/17598 * config/tc-i386.c (reloc): Support BFD_RELOC_X86_64_GOTPLT64. gas/testsuite/ PR gas/17598 * gas/i386/reloc64.s: Add @gotplt check. * gas/i386/reloc64.d: Updated. * gas/i386/reloc64.l: Likewise. ld/testsuite/ PR gas/17598 * ld-x86-64/x86-64.exp: Run gotplt1. * ld-x86-64/gotplt1.d: New file. * ld-x86-64/gotplt1.s: Likewise.
2014-11-07X32: Add REX prefix to encode R_X86_64_GOTTPOFFH.J. Lu3-0/+32
Structions with R_X86_64_GOTTPOFF relocation must be encoded with REX prefix even if it isn't required by destination register. Otherwise linker can't safely perform IE -> LE optimization. bfd/ PR ld/17482 * elf64-x86-64.c (elf_x86_64_relocate_section): Update comments for IE->LE transition. gas/ PR ld/17482 * config/tc-i386.c (output_insn): Add a dummy REX_OPCODE prefix for structions with R_X86_64_GOTTPOFF relocation for x32 if needed. gas/testsuite/ PR ld/17482 * gas/i386/ilp32/x32-tls.d: New file. * gas/i386/ilp32/x32-tls.s: Likewise. ld/testsuite/ PR ld/17482 * ld-x86-64/tlsie4.dd: Updated.
2014-11-05Update .MIPS.abiflags to support MIPS R6Matthew Fortune4-0/+50
bfd/ * elfxx-mips.c (update_mips_abiflags_isa): Add E_MIPS_ARCH_32R6 and E_MIPS_ARCH_64R6 support. ld/testsuite/ * ld-mips-elf/abiflags-strip10-ph.d: New file. * ld-mips-elf/mips-eld.exp: Run the new test. gas/ * config/tc-mips.c (mips_elf_final_processing): Add INSN_ISA32R6 and INSN_ISA64R6 support. gas/testsuite/ * gas/mips/elf_arch_mips32r6.d: New file. * gas/mips/elf_arch_mips64r6.d: New file. * gas/mips/mips.exp: Run the new tests.
2014-10-31MIPS: Add Octeon 3 supportNaveen H.S4-0/+54
binutils: 2014-10-31 Andrew Pinski <apinski@cavium.com> Naveen H.S <Naveen.Hurugalawadi@caviumnetworks.com> * readelf.c (print_mips_isa_ext): Print the value of Octeon3. gas: 2014-10-31 Andrew Pinski <apinski@cavium.com> Naveen H.S <Naveen.Hurugalawadi@caviumnetworks.com> * config/tc-mips.c (CPU_IS_OCTEON): Handle CPU_OCTEON3. (mips_cpu_info_table): Octeon3 enables virt ase. * doc/c-mips.texi: Document octeon3 as an acceptable value for -march=. gas/testsuite: 2014-10-31 Andrew Pinski <apinski@cavium.com> Naveen H.S <Naveen.Hurugalawadi@caviumnetworks.com> * gas/mips/mips.exp: Add support for Octeon3 architecture. Also add in support for running Octeon3 tests. * gas/mips/octeon3.d: New test. * gas/mips/octeon3.s: New test source. opcodes: 2014-10-31 Andrew Pinski <apinski@cavium.com> Naveen H.S <Naveen.Hurugalawadi@caviumnetworks.com> * mips-dis.c (mips_arch_choices): Add octeon3. * mips-opc.c (IOCT): Include INSN_OCTEON3. (IOCT2): Likewise. (IOCT3): New define. (IVIRT): New define. (mips_builtin_opcodes): Add dmfgc0, dmtgc0, hypcall, mfgc0, mtgc0, tlbinv, tlbinvf, tlbgr, tlbgwi, tlbginv, tlbginvf, tlbgwr, tlbgp, tlti IVIRT instructions. Extend mtm0, mtm1, mtm2, mtp0, mtp1, mtp2 instructions to take another operand for IOCT3. bfd: 2014-10-31 Andrew Pinski <apinski@cavium.com> Naveen H.S <Naveen.Hurugalawadi@caviumnetworks.com> * archures.c: Add octeon3 for mips target. * bfd-in2.h: Regenerate. * bfd/cpu-mips.c: Define I_mipsocteon3. nfo_struct): Add octeon3 support. * bfd/elfxx-mips.c: (_bfd_elf_mips_mach): Add support for octeon3. (mips_set_isa_flags): Add support for octeon3. (bfd_mips_isa_ext): Add bfd_mach_mips_octeon3. (mips_mach_extensions): Make bfd_mach_mips_octeon3 an extension of bfd_mach_mips_octeon2. (print_mips_isa_ext): Print the value of Octeon3.
2014-10-21MIPS/GAS: Correct file option settings with `.insn'Maciej W. Rozycki4-0/+48
This makes sure `HAVE_CODE_COMPRESSION' evaluates correctly when the `.insn' directive is used at the beginning of a source file before any instructions have been produced and that ELF file header's MIPS16 and microMIPS ASE flags are set correctly in the case where no instructions have been produced other than with the said directive. gas/ * config/tc-mips.c (s_insn): Set file options. gas/testsuite/ * gas/mips/insn-opts.d: New test. * gas/mips/insn-opts.s: New test source. * gas/mips/mips.exp: Run the new test.
2014-10-21gas: avoid bogus warnings in false branches of conditionalJan Beulich3-0/+20
The construct being added to the cond.s test case otherwise triggered both the "missing closing ..." and the "stray ..." (twice) warnings in _find_end_of_line(). As that code fragments suggests, this is needed to support (include) files that can be used for both assembler .include and compiler #include directives.
2014-10-21ppc: enable msgclr and msgsnd on Power8Jan Beulich3-0/+9
According to my reading of the spec it was an oversight for them to not having got enabled when Power8 support got added.
2014-10-18Fix PR17493, attempted output of *GAS `reg' section* symbolAlan Modra2-6/+10
The write.c change is to make gas report an error if reg_section symbols should leak in future. The tc-i386.c change is the real fix. Note that the error isn't the most helpful, "redefined symbol cannot be used on reloc", but I'm not inclined to improve what is really an internal gas error. reg_section symbols shouldn't leak.. gas/ PR 17493 * write.c (adjust_reloc_syms): Don't allow symbols in reg_section to be reduced to reg_section section symbol. * gas/config/tc-i386.c (i386_finalize_immediate): Reject all reg_section immediates. gas/testsuite/ * gas/i386/inval-equ-2.l: Adjust.
2014-10-15ChangeLog typo fixAlan Modra1-1/+1
2014-10-09This is a series of patches that add support for the SPARC M7 cpu toJose E. Marchesi12-10/+344
binutils. They were discussed and approved here: https://sourceware.org/ml/binutils/2014-10/msg00038.html
2014-09-27Do away with hash table line lookup in dwarf2dbg.cAlan Modra4-0/+27
Hash lookup is silly when we can attach the line table info directly to sections instead. Worse, hash lookup fails when we have multiple sections with the same name. gas/ * dwarf2dbg.c (all_segs_hash): Delete. (get_line_subseg): Delete last_seg, last_subseg, last_line_subseg. Retrieve line_seg for section via seg_info. * subsegs.h (segment_info_typet): Add dwarf2_line_seg. gas/testsuite/ * gas/elf/group2.d, * gas/elf/group2.s: New test. * gas/elf/elf.exp: Run it.
2014-09-23Disallow VEX/EVEX encoded instructions in 16-bit modeH.J. Lu4-0/+38
gas/ PR gas/17421 * config/tc-i386.c (md_assemble): Disallow VEX/EVEX encoded instructions in 16-bit mode. gas/testsuite/ PR gas/17421 * gas/i386/i386.exp: Run inval-16. * gas/i386/inval-16.l: New file. * gas/i386/inval-16.s: Likewise.
2014-09-22Ignore MOD field for control/debug register moveH.J. Lu5-0/+51
This patch ignores the MOD field in control/debug register move instructions. gas/testsuite/ * gas/i386/cdr.d: New file. * gas/i386/cdr.s: Likewise. * gas/i386/x86-64-cdr.d: Likewise. * gas/i386/i386.exp: Run cdr and x86-64-cdr. opcodes/ * i386-dis.c (MOD_0F20): Removed. (MOD_0F21): Likewise. (MOD_0F22): Likewise. (MOD_0F23): Likewise. (dis386_twobyte): Replace MOD_0F20, MOD_0F21, MOD_0F22 and MOD_0F23 with "movZ". (mod_table): Remove MOD_0F20, MOD_0F21, MOD_0F22 and MOD_0F23. (OP_R): Check mod/rm byte and call OP_E_register.
2014-09-16Add -mevexrcig={rne|rd|ru|rz} option to x86 assembler.Ilya Tocar56-0/+7672
It is used to control which value is encoded in rounding control bits for SAE-only EVEX instructions. gas/ * config/tc-i386.c (evexrcig): New. (build_evex_prefix): Force rounding bits. (OPTION_MEVEXRCIG): New. (md_longopts): Add mevexrcig. (md_parse_option): Handle OPTION_MEVEXRCIG. (md_show_usage): Document mevexrcig. * doc/c-i386.texi (mevexrcig): Document new option. gas/testsuite/ * gas/i386/avx512dq-rcig.s: New. * gas/i386/avx512dq-rcigrd-intel.d: Likewise. * gas/i386/avx512dq-rcigrd.d: Likewise. * gas/i386/avx512dq-rcigrne-intel.d: Likewise. * gas/i386/avx512dq-rcigrne.d: Likewise. * gas/i386/avx512dq-rcigru-intel.d: Likewise. * gas/i386/avx512dq-rcigru.d: Likewise. * gas/i386/avx512dq-rcigrz-intel.d: Likewise. * gas/i386/avx512dq-rcigrz.d: Likewise. * gas/i386/avx512er-rcig.s: Likewise. * gas/i386/avx512er-rcigrd-intel.d: Likewise. * gas/i386/avx512er-rcigrd.d: Likewise. * gas/i386/avx512er-rcigrne-intel.d: Likewise. * gas/i386/avx512er-rcigrne.d: Likewise. * gas/i386/avx512er-rcigru-intel.d: Likewise. * gas/i386/avx512er-rcigru.d: Likewise. * gas/i386/avx512er-rcigrz-intel.d: Likewise. * gas/i386/avx512er-rcigrz.d: Likewise. * gas/i386/avx512f-rcig.s: Likewise. * gas/i386/avx512f-rcigrd-intel.d: Likewise. * gas/i386/avx512f-rcigrd.d: Likewise. * gas/i386/avx512f-rcigrne-intel.d: Likewise. * gas/i386/avx512f-rcigrne.d: Likewise. * gas/i386/avx512f-rcigru-intel.d: Likewise. * gas/i386/avx512f-rcigru.d: Likewise. * gas/i386/avx512f-rcigrz-intel.d: Likewise. * gas/i386/avx512f-rcigrz.d: Likewise. * gas/i386/x86-64-avx512dq-rcig.s: Likewise. * gas/i386/x86-64-avx512dq-rcigrd-intel.d: Likewise. * gas/i386/x86-64-avx512dq-rcigrd.d: Likewise. * gas/i386/x86-64-avx512dq-rcigrne-intel.d: Likewise. * gas/i386/x86-64-avx512dq-rcigrne.d: Likewise. * gas/i386/x86-64-avx512dq-rcigru-intel.d: Likewise. * gas/i386/x86-64-avx512dq-rcigru.d: Likewise. * gas/i386/x86-64-avx512dq-rcigrz-intel.d: Likewise. * gas/i386/x86-64-avx512dq-rcigrz.d: Likewise. * gas/i386/x86-64-avx512er-rcig.s: Likewise. * gas/i386/x86-64-avx512er-rcigrd-intel.d: Likewise. * gas/i386/x86-64-avx512er-rcigrd.d: Likewise. * gas/i386/x86-64-avx512er-rcigrne-intel.d: Likewise. * gas/i386/x86-64-avx512er-rcigrne.d: Likewise. * gas/i386/x86-64-avx512er-rcigru-intel.d: Likewise. * gas/i386/x86-64-avx512er-rcigru.d: Likewise. * gas/i386/x86-64-avx512er-rcigrz-intel.d: Likewise. * gas/i386/x86-64-avx512er-rcigrz.d: Likewise. * gas/i386/x86-64-avx512f-rcig.s: Likewise. * gas/i386/x86-64-avx512f-rcigrd-intel.d: Likewise. * gas/i386/x86-64-avx512f-rcigrd.d: Likewise. * gas/i386/x86-64-avx512f-rcigrne-intel.d: Likewise. * gas/i386/x86-64-avx512f-rcigrne.d: Likewise. * gas/i386/x86-64-avx512f-rcigru-intel.d: Likewise. * gas/i386/x86-64-avx512f-rcigru.d: Likewise. * gas/i386/x86-64-avx512f-rcigrz-intel.d: Likewise. * gas/i386/x86-64-avx512f-rcigrz.d: Likewise. * gas/i386/i386.exp: Run new tests.
2014-09-15Add support for MIPS R6.Andrew Bennett76-42/+6306
bfd/ * aoutx.h (NAME (aout, machine_type)): Add mips32r6 and mips64r6. * archures.c (bfd_architecture): Likewise. * bfd-in2.h (bfd_architecture): Likewise. (bfd_reloc_code_real): Add relocs BFD_RELOC_MIPS_21_PCREL_S2, BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3 and BFD_RELOC_MIPS_19_PCREL_S2. * cpu-mips.c (arch_info_struct): Add mips32r6 and mips64r6. * elf32-mips.c: Define relocs R_MIPS_PC21_S2, R_MIPS_PC26_S2 R_MIPS_PC18_S3, R_MIPS_PC19_S2, R_MIPS_PCHI16 and R_MIPS_PCLO16. (mips_reloc_map): Add entries for BFD_RELOC_MIPS_21_PCREL_S2, BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3, BFD_RELOC_MIPS_19_PCREL_S2, BFD_RELOC_HI16_S_PCREL and BFD_RELOC_LO16_PCREL. * elf64-mips.c: Define REL, and RELA relocations R_MIPS_PC21_S2, R_MIPS_PC26_S2, R_MIPS_PC18_S3, R_MIPS_PC19_S2, R_MIPS_PCHI16 and R_MIPS_PCLO16. (mips_reloc_map): Add entries for BFD_RELOC_MIPS_21_PCREL_S2, BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3, BFD_RELOC_MIPS_19_PCREL_S2, BFD_RELOC_HI16_S_PCREL and BFD_RELOC_LO16_PCREL. * elfn32-mips.c: Likewise. * elfxx-mips.c (MIPSR6_P): New define. (mipsr6_exec_plt_entry): New array. (hi16_reloc_p): Add support for R_MIPS_PCHI16. (lo16_reloc_p): Add support for R_MIPS_PCLO16. (aligned_pcrel_reloc_p): New function. (mips_elf_relocation_needs_la25_stub): Add support for relocs: R_MIPS_PC21_S2 and R_MIPS_PC26_S2. (mips_elf_calculate_relocation): Add support for relocs: R_MIPS_PC21_S2, R_MIPS_PC26_S2, R_MIPS_PC18_S3, R_MIPS_PC19_S2, R_MIPS_PCHI16 and R_MIPS_PCLO16. (_bfd_elf_mips_mach): Add support for mips32r6 and mips64r6. (mips_elf_add_lo16_rel_addend): Add support for R_MIPS_PCHI16. (_bfd_mips_elf_check_relocs): Add support for relocs: R_MIPS_PC21_S2 and R_MIPS_PC26_S2. (_bfd_mips_elf_relocate_section): Add a check for unaligned pc relative relocs. (_bfd_mips_elf_finish_dynamic_symbol): Add support for MIPS r6 plt entry. (mips_set_isa_flags): Add support for mips32r6 and mips64r6. (_bfd_mips_elf_print_private_bfd_data): Likewise. (mips_32bit_flags_p): Add support for mips32r6. * libbfd.h (bfd_reloc_code_real_names): Add entries for BFD_RELOC_MIPS_21_PCREL_S2, BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3 and BFD_RELOC_MIPS_19_PCREL_S2. * reloc.c: Document relocs BFD_RELOC_MIPS_21_PCREL_S2, BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3 and BFD_RELOC_MIPS_19_PCREL_S2. binutils/ * readelf.c (get_machine_flags): Add support for mips32r6 and mips64r6. elfcpp/ * mips.h (E_MIPS_ARCH_32R6, E_MIPS_ARCH_64R6): New enum constants. gas/ * config/tc-mips.c (mips_nan2008): New static global. (mips_flag_nan2008): Removed. (LL_SC_FMT): New define. (COP12_FMT): Updated. (ISA_IS_R6): New define. (ISA_HAS_64BIT_REGS): Add mips64r6. (ISA_HAS_DROR): Likewise. (ISA_HAS_64BIT_FPRS): Add mips32r6 and mips64r6. (ISA_HAS_ROR): Likewise. (ISA_HAS_ODD_SINGLE_FPR): Likewise. (ISA_HAS_MXHC1): Likewise. (hilo_interlocks): Likewise. (md_longopts): Likewise. (ISA_HAS_LEGACY_NAN): New define. (options): Add OPTION_MIPS32R6 and OPTION_MIPS64R6. (mips_ase): Add field rem_rev. (mips_ases): Updated to add which ISA an ASE was removed in. (mips_isa_rev): Add support for mips32r6 and mips64r6. (mips_check_isa_supports_ase): Add support to check if an ASE has been removed in the specified MIPS ISA revision. (validate_mips_insn): Skip '-' character. (macro_build): Likewise. (mips_check_options): Prevent R6 working with fp32, mips16, micromips, or branch relaxation. (file_mips_check_options): Set R6 floating point registers to 64 bit. Also deal with the nan2008 option. (limited_pcrel_reloc_p): Add relocs: BFD_RELOC_MIPS_21_PCREL_S2, BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3, BFD_RELOC_MIPS_19_PCREL_S2, BFD_RELOC_HI16_S_PCREL and BFD_RELOC_LO16_PCREL. (operand_reg_mask): Add support for OP_SAME_RS_RT, OP_CHECK_PREV and OP_NON_ZERO_REG. (match_check_prev_operand): New static function. (match_same_rs_rt_operand): New static function. (match_non_zero_reg_operand): New static function. (match_operand): Added entries for: OP_SAME_RS_RT, OP_CHECK_PREV and OP_NON_ZERO_REG. (insns_between): Added case to deal with forbidden slots. (append_insn): Added support for relocs: BFD_RELOC_MIPS_21_PCREL_S2 and BFD_RELOC_MIPS_26_PCREL_S2. (match_insn): Add support for operands -A, -B, +' and +". Also skip '-' character. (mips_percent_op): Add entries for %pcrel_hi and %pcrel_lo. (md_parse_option): Add support for mips32r6 and mips64r6. Also update the nan option handling. (md_pcrel_from): Add cases for relocs: BFD_RELOC_MIPS_21_PCREL_S2, BFD_RELOC_MIPS_26_PCREL_S2. (mips_force_relocation): Prevent forced relaxation for MIPS r6. (md_apply_fix): Add support for relocs: BFD_RELOC_MIPS_21_PCREL_S2, BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3, BFD_RELOC_MIPS_19_PCREL_S2, BFD_RELOC_HI16_S_PCREL and BFD_RELOC_LO16_PCREL. (s_mipsset): Add support for mips32r6 and mips64r6. (s_nan): Update to support the new nan2008 framework. (tc_gen_reloc): Add relocs: BFD_RELOC_MIPS_21_PCREL_S2, BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3, BFD_RELOC_MIPS_19_PCREL_S2, BFD_RELOC_HI16_S_PCREL and BFD_RELOC_LO16_PCREL. (mips_elf_final_processing): Updated to use the mips_nan2008. (mips_cpu_info_table): Add entries for mips32r6 and mips64r6. (macro): Enable ldc2, sdc2, ll, lld, swc2, sc, scd, cache, pref macros for R6. (mips_fix_adjustable): Make PC relative R6 relocations relative to the symbol and not the section. * configure.ac: Add support for mips32r6 and mips64r6. * configure: Regenerate. * doc/c-mips.texi: Document the -mips32r6 and -mips64r6 command line options. * doc/as.texinfo: Likewise. gas/testsuite/ * gas/mips/24k-triple-stores-1.s: If testing for r6 prevent non-supported instructions from being tested. * gas/mips/24k-triple-stores-2.s: Likewise. * gas/mips/24k-triple-stores-3.s: Likewise. * gas/mips/24k-triple-stores-6.s: Likewise. * gas/mips/beq.s: Likewise. * gas/mips/eva.s: Likewise. * gas/mips/ld-zero-3.s: Likewise. * gas/mips/mips32-cp2.s: Likewise. * gas/mips/mips32.s: Likewise. * gas/mips/mips4.s: Likewise. * gas/mips/add.s: Don't test the add instructions if r6, and add padding. * gas/mips/add.d: Check for a triple dot not a nop at the end of the disassembly output. * gas/mips/micromips@add.d: Likewise. * gas/mips/mipsr6@24k-branch-delay-1.d: New file. * gas/mips/mipsr6@24k-triple-stores-1.d: New file. * gas/mips/mipsr6@24k-triple-stores-2-llsc.d: New file. * gas/mips/mipsr6@24k-triple-stores-2.d: New file. * gas/mips/mipsr6@24k-triple-stores-3.d: New file. * gas/mips/mipsr6@24k-triple-stores-6.d: New file. * gas/mips/mipsr6@add.d: New file. * gas/mips/mipsr6@attr-gnu-4-1-msingle-float.l: New file. * gas/mips/mipsr6@attr-gnu-4-1-msingle-float.s: New file. * gas/mips/mipsr6@attr-gnu-4-1-msoft-float.l: New file. * gas/mips/mipsr6@attr-gnu-4-1-msoft-float.s: New file. * gas/mips/mipsr6@attr-gnu-4-2-mdouble-float.l: New file. * gas/mips/mipsr6@attr-gnu-4-2-mdouble-float.s: New file. * gas/mips/mipsr6@beq.d: New file. * gas/mips/mipsr6@bge.d: New file. * gas/mips/mipsr6@bgeu.d: New file. * gas/mips/mipsr6@blt.d: New file. * gas/mips/mipsr6@bltu.d: New file. * gas/mips/mipsr6@branch-misc-1.d: New file. * gas/mips/mipsr6@branch-misc-2-64.d: New file. * gas/mips/mipsr6@branch-misc-2pic-64.d: New file. * gas/mips/mipsr6@branch-misc-4-64.d: New file. * gas/mips/mipsr6@cache.d: New file. * gas/mips/mipsr6@eva.d: New file. * gas/mips/mipsr6@jal-svr4pic-noreorder.d: New file. * gas/mips/mipsr6@jal-svr4pic.d: New file. * gas/mips/mipsr6@ld-zero-2.d: New file. * gas/mips/mipsr6@ld-zero-3.d: New file. * gas/mips/mipsr6@loc-swap-dis.d: New file. * gas/mips/mipsr6@mips32-cp2.d: New file. * gas/mips/mipsr6@mips32-imm.d: New file. * gas/mips/mipsr6@mips32.d: New file. * gas/mips/mipsr6@mips32r2.d: New file. * gas/mips/mipsr6@mips4-fp.d: New file. * gas/mips/mipsr6@mips4-fp.l: New file. * gas/mips/mipsr6@mips4-fp.s: New file. * gas/mips/mipsr6@mips4.d: New file. * gas/mips/mipsr6@mips5-fp.d: New file. * gas/mips/mipsr6@mips5-fp.l: New file. * gas/mips/mipsr6@mips5-fp.s: New file. * gas/mips/mipsr6@mips64.d: New file. * gas/mips/mipsr6@msa-branch.d: New file. * gas/mips/mipsr6@msa.d: New file. * gas/mips/mipsr6@pref.d: New file. * gas/mips/mipsr6@relax-swap3.d: New file. * gas/mips/r6-64-n32.d: New file. * gas/mips/r6-64-n64.d: New file. * gas/mips/r6-64-removed.l: New file. * gas/mips/r6-64-removed.s: New file. * gas/mips/r6-64.s: New file. * gas/mips/r6-attr-none-double.d: New file. * gas/mips/r6-n32.d: New file. * gas/mips/r6-n64.d: New file. * gas/mips/r6-removed.l: New file. * gas/mips/r6-removed.s: New file. * gas/mips/r6.d: New file. * gas/mips/r6.s: New file. * gas/mips/mipsr6@mips32-dsp.d: New file. * gas/mips/mipsr6@mips32-dspr2.d: New file. * gas/mips/mipsr6@mips32r2-ill.l: New file. * gas/mips/mipsr6@mips32r2-ill.s: New file. * gas/mips/cache.s: Add r6 instruction varients. * gas/mips/mips.exp: Add support for the mips32r6 and mips64r6 architectures. Also prevent non r6 supported tests from running. Finally, add in support for running the new r6 tests. (run_dump_test_arch): Add support for mipsr6 tests. (run_list_test_arch): Add support for using files of the form arch@testname.l . include/elf/ * mips.h: Add relocs: R_MIPS_PC21_S2, R_MIPS_PC26_S2, R_MIPS_PC18_S3, R_MIPS_PC19_S2, R_MIPS_PCHI16 and R_MIPS_PCLO16. (E_MIPS_ARCH_32R6): New define. (E_MIPS_ARCH_64R6): New define. include/opcode/ * mips.h (mips_operand_type): Add new entries: OP_SAME_RS_RT, OP_CHECK_PREV and OP_NON_ZERO_REG. Add descriptions for the MIPS R6 instruction arguments: -a, -b, -d, -s, -t, -u, -v, -w, -x, -y, -A, -B, +I, +O, +R, +:, +\, +", +; (mips_check_prev_operand): New struct. (INSN2_FORBIDDEN_SLOT): New define. (INSN_ISA32R6): New define. (INSN_ISA64R6): New define. (INSN_UPTO32R6): New define. (INSN_UPTO64R6): New define. (mips_isa_table): Add INSN_UPTO32R6 and INSN_UPTO64R6. (ISA_MIPS32R6): New define. (ISA_MIPS64R6): New define. (CPU_MIPS32R6): New define. (CPU_MIPS64R6): New define. (cpu_is_member): Add cases for CPU_MIPS32R6, and CPU_MIPS64R6. ld/ * ldmain.c (get_emulation): Add support for -mips32r6 and -mips64r6. opcodes/ * mips-dis.c (mips_arch_choices): Add entries for mips32r6 and mips64r6. (parse_mips_dis_option): Allow MSA and virtualization support for mips64r6. (mips_print_arg_state): Add fields dest_regno and seen_dest. (mips_seen_register): New function. (print_insn_arg): Refactored code to use mips_seen_register function. Add support for OP_SAME_RS_RT, OP_CHECK_PREV and OP_NON_ZERO_REG. Changed OP_REPEAT_DEST_REG case to print out the register rather than aborting. (print_insn_args): Add length argument. Add code to correctly calculate the instruction address for pc relative instructions. (validate_insn_args): New static function. (print_insn_mips): Prevent jalx disassembling for r6. Use validate_insn_args. (print_insn_micromips): Use validate_insn_args. all the arguments are valid. * mips-formats.h (PREV_CHECK): New define. * mips-opc.c (decode_mips_operand): Add support for -a, -b, -d, -s, -t, -u, -v, -w, -x, -y, -A, -B, +I, +O, +R, +:, +\, +", +; (RD_pc): New define. (FS): New define. (I37): New define. (I69): New define. (mips_builtin_opcodes): Add MIPS R6 instructions. Exclude recoded MIPS R6 instructions from MIPS R2 instructions.
2014-09-15Ensure softfloat and singlefloat take precedence in consistency checksMatthew Fortune10-10/+28
gas/ * tc-mips.c (check_fpabi): Move softfloat and singlefloat checks higher. gas/testsuite/ * gas/mips/attr-gnu-4-5-msingle-float.l: New file. * gas/mips/attr-gnu-4-5-msingle-float.s: Likewise. * gas/mips/attr-gnu-4-5-msoft-float.l: Likewise. * gas/mips/attr-gnu-4-5-msoft-float.s: Likewise. * gas/mips/attr-gnu-4-6-msingle-float.l: Update expected output. * gas/mips/attr-gnu-4-6-msoft-float.l: Likewise. * gas/mips/attr-gnu-4-7-msingle-float.l: Likewise. * gas/mips/attr-gnu-4-7-msoft-float.l: Likewise. * gas/mips/mips.exp: Update expected output for FP ABI 5,6,7.
2014-09-12Add mips*-img-elf* target triple.Andrew Bennett2-1/+7
/ * configure.ac: Add mips*-img-elf* target triple. * configure: Regenerate. bfd/ * config.bfd: Add mips*-img-elf* target triple. gas/ * configure.tgt: Add mips*-img-elf* target triple. gas/testsuite/ * gas/mips/mips.exp: Add mips*-img-elf* target triple. binutils/testsuite/ * binutils-all/objcopy.exp: Add mips*-img-elf* target triple. * binutils-all/readelf.exp: Likewise. ld/ * configure.tgt: Add mips*-img-elf* target triple. ld/testsuite/ * ld-mips-elf/mips-elf.exp: Add support for mips*-img-elf* target triple.
2014-09-10Properly handle suffix for iret and sysretH.J. Lu8-9/+159
gas/testsuite/ * gas/i386/i386.exp: Run suffix-intel, x86-64-suffix and x86-64-suffix-intel. * gas/i386/suffix.s: Add tests for iret and sysret. * gas/i386/suffix.d: Updated. * gas/i386/suffix-intel.d: New file. * gas/i386/x86-64-suffix-intel.d: Likewise. * gas/i386/x86-64-suffix.d: Likewise. * gas/i386/x86-64-suffix.s: Likewise. opcodes/ * i386-dis.c (dis386): Replace "P" with "%LP" for iret and sysret. (putop): Handle "%LP".
2014-09-11Move ELF section headers to end of object fileAlan Modra29-76/+107
Currently, section ordering differs a little for non-loaded reloc sections output by ld -emit-relocs or ld -r and that after passing such objects through objcopy. Not that it really matters, but it would be better for a simple objcopy to produce an unchanged output object file. Also, section headers are put somewhere in the middle of the non-loaded sections, again slightly differently for ld and objcopy. This patch fixes these discrepancies and puts section headers last, which is where gold puts them, and is where bfd_from_remote_memory wrongly assumed they will be found. bfd/ * elf.c (assign_file_positions_except_relocs): Move section header placement to.. (_bfd_elf_assign_file_positions_for_relocs): ..here. Make static. * elf-bfd.h (_bfd_elf_assign_file_positions_for_relocs): Delete. * elflink.c (bfd_elf_final_link): Don't call above function. gas/testsuite/ * gas/arm/got_prel.d: Adjust for changed section header placement. * gas/i386/ilp32/x86-64-size-1.d: Likewise. * gas/i386/ilp32/x86-64-size-3.d: Likewise. * gas/i386/ilp32/x86-64-size-5.d: Likewise. * gas/i386/ilp32/x86-64-unwind.d: Likewise. * gas/i386/size-1.d: Likewise. * gas/i386/size-3.d: Likewise. * gas/i386/x86-64-size-1.d: Likewise. * gas/i386/x86-64-size-3.d: Likewise. * gas/i386/x86-64-size-5.d: Likewise. * gas/i386/x86-64-unwind.d: Likewise. * gas/ia64/alias-ilp32.d: Likewise. * gas/ia64/alias.d: Likewise. * gas/ia64/group-1.d: Likewise. * gas/ia64/group-2.d: Likewise. * gas/ia64/secname-ilp32.d: Likewise. * gas/ia64/secname.d: Likewise. * gas/ia64/unwind-ilp32.d: Likewise. * gas/ia64/unwind.d: Likewise. * gas/mmix/bspec-1.d: Likewise. * gas/mmix/bspec-2.d: Likewise. * gas/mmix/byte-1.d: Likewise. * gas/mmix/loc-1.d: Likewise. * gas/mmix/loc-2.d: Likewise. * gas/mmix/loc-3.d: Likewise. * gas/mmix/loc-4.d: Likewise. * gas/mmix/loc-5.d: Likewise. * gas/tic6x/scomm-directive-4.d: Likewise. ld/testsuite/ * ld-aarch64/emit-relocs-local-addend.d: Adjust for changed section header placement. * ld-aarch64/local-addend-r.d: Likewise. * ld-mmix/bspec1.d: Likewise. * ld-mmix/bspec2.d: Likewise. * ld-mmix/local1.d: Likewise. * ld-mmix/local3.d: Likewise. * ld-mmix/local5.d: Likewise. * ld-mmix/local7.d: Likewise. * ld-mmix/undef-3.d: Likewise. * ld-sh/sh64/crange3-cmpct.rd: Likewise. * ld-sh/sh64/crange3-media.rd: Likewise. * ld-sh/sh64/crangerel1.rd: Likewise. * ld-sh/sh64/crangerel2.rd: Likewise. * ld-tic6x/common.d: Likewise. * ld-tic6x/shlib-1.rd: Likewise. * ld-tic6x/shlib-1b.rd: Likewise. * ld-tic6x/shlib-1r.rd: Likewise. * ld-tic6x/shlib-1rb.rd: Likewise. * ld-tic6x/shlib-app-1.rd: Likewise. * ld-tic6x/shlib-app-1b.rd: Likewise. * ld-tic6x/shlib-app-1r.rd: Likewise. * ld-tic6x/shlib-app-1rb.rd: Likewise. * ld-tic6x/shlib-noindex.rd: Likewise. * ld-tic6x/static-app-1.rd: Likewise. * ld-tic6x/static-app-1b.rd: Likewise. * ld-tic6x/static-app-1r.rd: Likewise. * ld-tic6x/static-app-1rb.rd: Likewise. * ld-x86-64/ilp32-4.d: Likewise. * ld-x86-64/split-by-file-nacl.rd: Likewise. * ld-x86-64/split-by-file.rd: Likewise.
2014-09-06MIPS testsuite cleanup - part 3Matthew Fortune9-20/+31
gas/testsuite/ * gas/mips/attr-gnu-abi-fp-1.d: Relax expected output. * gas/mips/elf_ase_micromips-2.d: Likewise. * gas/mips/elf_ase_micromips.d: Likewise. * gas/mips/elf_ase_mips16-2.d: Likewise. * gas/mips/elf_ase_mips16.d: Likewise. * gas/mips/module-mfp32.d: Likewise. * gas/mips/module-msingle-float.d: Likewise. * gas/mips/module-msoft-float.d: Likewise.
2014-09-06MIPS testsuite cleanup - part 2Matthew Fortune2-2/+7
gas/testsuite/ * gas/mips/module-defer-warn2.l: Ignore differences in output from 64-bit vs 32-bit targets using O32.
2014-09-06MIPS testsuite cleanup - part 1Matthew Fortune10-15/+55
binutils/testsuite/ * binutils-all/readelf.ss-mips: Account for new sections. gas/testsuite/ * gas/elf/type.e: Account for new sections. * gas/mips/mips16-e.d: Likewise. * gas/mips/mips16-f.d: Likewise. * gas/mips/mipsel16-e.d: Likewise. * gas/mips/mipsel16-f.d: Likewise. * gas/mips/tmips16-e.d: Appropriately escape dots. * gas/mips/tmips16-f.d: Likewise. * gas/mips/tmipsel16-e.d: Likewise. * gas/mips/tmipsel16-f.d: Likewise.
2014-09-04MIPS: Update the list of addr32 targetsMatthew Fortune2-1/+7
gas/testsuite/ * gas/mips/mips.exp: Add mipsisa32 and mipsisa32el to the list of addr32 targets.
2014-09-03[PATCH/AArch64] Generic support for all system registers using mrs and msrJiong Wang5-3/+37
2014-09-03 Jiong Wang <jiong.wang@arm.com> opcode/ * aarch64-tbl.h (aarch64_opcode_table): Update encoding for mrs/msr. * aarch64-dis-2.c: Update auto-generated file. gas/ * config/tc-aarch64.c (parse_sys_reg): Remove the restriction on op0 field. gas/testsuite/ * gas/aarch64/illegal.s: Update testcase. * gas/aarch64/illegal.d: Likewise. * gas/aarch64/sysreg-1.s: Likewise. * gas/aarch64/sysreg-1.d: Likewise.
2014-09-03[PATCH/AArch64] Implement LSE featureJiong Wang8-0/+1067
2014-09-03 Jiong Wang <jiong.wang@arm.com> gas/ * config/tc-aarch64.c (parse_operands): Recognize PAIRREG. (aarch64_features): Add entry for lse extension. include/opcode/ * aarch64.h (AARCH64_FEATURE_LSE): New feature added. (aarch64_opnd): Add AARCH64_OPND_PAIRREG. (aarch64_insn_class): Add lse_atomic. (F_LSE_SZ): New field added. (opcode_has_special_coder): Recognize F_LSE_SZ. opcode/ * aarch64-tbl.h (QL_R4NIL): New qualifiers. (aarch64_feature_lse): New feature added. (LSE): New Added. (aarch64_opcode_table): New LSE instructions added. Improve descriptions for ldarb/ldarh/ldar. (aarch64_opcode_table): Describe PAIRREG. * aarch64-opc.h (aarch64_field_kind): Add FLD_lse_sz. * aarch64-opc.c (fields): Add entry for F_LSE_SZ. (aarch64_print_operand): Recognize PAIRREG. (operand_general_constraint_met_p): Check reg pair constraints for CASP instructions. * aarch64-dis.c (aarch64_ext_regno_pair): New extractor for paired reg. (do_special_decoding): Recognize F_LSE_SZ. * aarch64-asm.c (do_special_encoding): Recognize F_LSE_SZ. gas/testsuite/ * gas/aarch64/lse-atomic.d: New. * gas/aarch64/lse-atomic.s: Likewise. * gas/aarch64/illegal-lse.d: Likewise. * gas/aarch64/illegal-lse.l: Likewise. * gas/aarch64/illegal-lse.s: Likewise. * gas/aarch64/diagnostic.s: Check processor feature detect for lse instruction. * gas/aarch64/diagnostic.l: Likewise.
2014-08-26[ARM] Update selected_cpu based on info got during parsingJiong Wang4-0/+51
gas/ * config/tc-arm.c (aeabi_set_public_attributes): Update intended_arch based on the info we got during parsing. (arm_handle_align): Make sure the p2align expanding logic under thumb unchanged. gas/testsuite/ * gas/arm/blx-bl-convert.d: New testcase. * gas/arm/blx-bl-convert.l: Warning expectation. * gas/arm/blx-bl-convert.s: Source file.
2014-08-26MIPS/gas/testsuite: Remove ECOFF offset alternativesMaciej W. Rozycki9-504/+515
This complements commit 16e5e222b6eae6f110ea72bf627585c095a453a8, removing offset values embedded in dump patterns that served ECOFF binaries. * gas/mips/l_d.d: Remove ECOFF offset alternatives. * gas/mips/mips1@l_d.d: Likewise. * gas/mips/ld.d: Likewise. * gas/mips/mips1@ld.d: Likewise. * gas/mips/mips1@ld-forward.d: Likewise. * gas/mips/s_d.d: Likewise. * gas/mips/mips1@s_d.d: Likewise. * gas/mips/sd.d: Likewise.
2014-08-25gas tests for the sparc instructions ldfsr, stfsr, ldx, ldxa, stx, stxa, ↵Jose E. Marchesi8-0/+68
ldxfsr, stxfsr, ldxefsr. - V8 instructions: ldfsr, stfsr - V9 instructions: ldx, ldxa, stx, stxa, ldxfsr, stxfsr - V9b instructions: ldxefsr Tested on sparc64-*-linux-gnu. [gas/testsuite/Changelog] 2014-08-25 Jose E. Marchesi <jose.marchesi@oracle.com> * gas/sparc/ldx_stx.s: New file. * gas/sparc/ldx_stx.d: Likewise. * gas/sparc/ldx_efsr.s: New file. * gas/sparc/ldx_efsr.d: Likewise. * gas/sparc/ld_st_fsr.s: New file. * gas/sparc/ld_st_fsr.d: Likewise. * gas/sparc/sparc.exp: Run the tests ldx_stx, ldx_efsr and ld_st_fsr.
2014-08-22ARM/opcodes: Fix negative hexadecimal offset disassemblyMaciej W. Rozycki3-2/+8
2014-08-21 Nathan Sidwell <nathan@codesourcery.com> Maciej W. Rozycki <macro@codesourcery.com> opcodes/ * arm-dis.c (print_arm_address): Negate the GPR-relative offset returned if the U bit is set. 2014-08-21 Paul Brook <paul@codesourcery.com> gas/testsuite/ * gas/arm/arch7a-mp.d: Adjust according to `print_arm_address' offset fix. * gas/arm/arch7r-mp.d: Likewise.
2014-08-21MIPS/gas/testsuite: mips.exp indentation fixesMaciej W. Rozycki2-5/+9
* gas/mips/mips.exp: Correct indentation.
2014-08-20[ARM] Fix vcmp with #0.0Kyrylo Tkachov6-0/+77
* config/tc-arm.c (parse_ifimm_zero): New function. (enum operand_parse_code): Add OP_RSVD_FI0 value. (parse_operands): Handle OP_RSVD_FI0. (asm_opcode_insns): Use RSVD_FI0 for second operand of vcmp, vcmpe. * gas/arm/ual-vcmp.s: New file. * gas/arm/ual-vcmp.d: Likewise. * gas/arm/vcmp-zero-bad.s: Likewise. * gas/arm/vcmp-zero-bad.d: Likewise. * gas/arm/vcmp-zero-bad.l: Likewise.
2014-08-13opcodes: blackfin: push down global stateMike Frysinger2-5/+9
The variables used to track insn state should be pushed down into the private_data structure to avoid pollution across calls. This also happens to fix the output when hitting comments/invalid insns which needs to tweak a gas test. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2014-08-13opcodes: blackfin: do not force align the PCMike Frysinger3-9/+8
If the user gives us an unaligned PC, then dump an error as such. Otherwise if you try to disassemble at an odd address, the output will look weird (it'll read one byte earlier). This can be seen in one of the gas tests where data is in the middle of .text, so move the data to .data like it should be in the first place. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2014-08-12Remove type directiveH.J. Lu2-2/+5
* gas/i386/omit-lock.s: Remove type directive.
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