Age | Commit message (Expand) | Author | Files | Lines |
2022-11-15 | Add AMD znver4 processor support | Tejas Joshi | 1 | -2/+3 |
2022-11-08 | Support Intel RAO-INT | Kong Lingling | 1 | -1/+2 |
2022-11-04 | Support Intel AVX-NE-CONVERT | konglin1 | 1 | -0/+2 |
2022-11-02 | Support Intel MSRLIST | Hu, Lin1 | 1 | -1/+2 |
2022-11-02 | Support Intel WRMSRNS | Hu, Lin1 | 1 | -1/+2 |
2022-11-02 | Support Intel CMPccXADD | Haochen Jiang | 1 | -0/+2 |
2022-11-02 | Support Intel AVX-VNNI-INT8 | Cui,Lili | 1 | -1/+2 |
2022-11-02 | Support Intel AVX-IFMA | Hongyu Wang | 1 | -3/+4 |
2022-10-31 | Support Intel PREFETCHI | Cui, Lili | 1 | -0/+2 |
2022-10-21 | Support Intel AMX-FP16 | Cui,Lili | 1 | -1/+2 |
2022-10-18 | x86: generalize gas documentation for disabling of ISA extensions | Jan Beulich | 1 | -49/+5 |
2022-07-06 | x86: introduce a state stack for .arch | Jan Beulich | 1 | -1/+1 |
2022-07-06 | x86: permit "default" with .arch | Jan Beulich | 1 | -1/+2 |
2022-03-17 | x86: drop L1OM/K1OM support from gas | Jan Beulich | 1 | -3/+1 |
2022-01-02 | Update year range in copyright notice of binutils files | Alan Modra | 1 | -1/+1 |
2021-10-22 | x86: Add -muse-unaligned-vector-move to assembler | H.J. Lu | 1 | -0/+6 |
2021-08-11 | x86: introduce .bfloat16 directive | Jan Beulich | 1 | -6/+8 |
2021-08-11 | x86: introduce .hfloat directive | Jan Beulich | 1 | -5/+8 |
2021-08-05 | [PATCH 1/2] Enable Intel AVX512_FP16 instructions | Cui,Lili | 1 | -1/+3 |
2021-05-26 | i386: Replace movsb with movsxb | Sebastien Villemot | 1 | -1/+1 |
2021-01-01 | PR27116, Spelling errors found by Debian style checker | Alan Modra | 1 | -1/+1 |
2021-01-01 | Update year range in copyright notice of binutils files | Alan Modra | 1 | -1/+1 |
2020-12-25 | gas: Update 80387 floating point 's' suffix | H.J. Lu | 1 | -1/+1 |
2020-10-20 | Add AMD znver3 processor support | Ganesh Gopalasubramanian | 1 | -3/+8 |
2020-10-14 | x86: Support Intel AVX VNNI | H.J. Lu | 1 | -1/+7 |
2020-10-14 | x86: Add support for Intel HRESET instruction | Lili Cui | 1 | -1/+3 |
2020-10-14 | x86: Support Intel UINTR | Lili Cui | 1 | -1/+3 |
2020-09-24 | Add support for Intel TDX instructions. | Cui,Lili | 1 | -0/+3 |
2020-09-23 | Enable support to Intel Keylocker instructions | Terry Guo | 1 | -0/+5 |
2020-07-30 | x86: Add {disp16} pseudo prefix | H.J. Lu | 1 | -1/+4 |
2020-07-28 | x86: Handle {disp32} for (%bp)/(%ebp)/(%rbp) | H.J. Lu | 1 | -1/+1 |
2020-07-10 | x86: Add support for Intel AMX instructions | Lili Cui | 1 | -0/+7 |
2020-07-07 | x86: Remove an incorrect AVX2 entry | H.J. Lu | 1 | -10/+0 |
2020-06-16 | x86: Correct noavx512_vp2intersect | Cui,Lili | 1 | -0/+1 |
2020-04-27 | x86: Add i386 PE big-object support | Tamar Christina | 1 | -1/+2 |
2020-04-26 | Improve -mlfence-after-load | liuhongt | 1 | -4/+8 |
2020-04-08 | x86: Correct -mlfence-before-indirect-branch= documentation | H.J. Lu | 1 | -3/+3 |
2020-04-07 | Add support for intel TSXLDTRK instructions$ | Cui,Lili | 1 | -1/+3 |
2020-04-02 | Add support for intel SERIALIZE instruction | LiliCui | 1 | -0/+2 |
2020-03-11 | i386: Generate lfence with load/indirect branch/ret [CVE-2020-0551] | H.J. Lu | 1 | -0/+43 |
2020-03-04 | x86: support VMGEXIT | Jan Beulich | 1 | -1/+2 |
2020-02-17 | x86: Remove CpuABM and add CpuPOPCNT | H.J. Lu | 1 | -5/+6 |
2020-02-16 | x86: Don't disable SSE4a when disabling SSE4 | H.J. Lu | 1 | -1/+3 |
2020-02-14 | Remove the old movsx and movzx documentation for AT&T syntax | H.J. Lu | 1 | -16/+0 |
2020-02-14 | x86: Document movsx/movsxd/movzx for AT&T syntax | H.J. Lu | 1 | -0/+53 |
2020-02-12 | x86-64: Intel64 adjustments for insns dealing with far pointers | Jan Beulich | 1 | -0/+12 |
2020-02-10 | x86: Accept Intel64 only instruction by default | H.J. Lu | 1 | -1/+2 |
2020-01-27 | x86-64: Properly encode and decode movsxd | H.J. Lu | 1 | -0/+18 |
2020-01-21 | x86: improve handling of insns with ambiguous operand sizes | Jan Beulich | 1 | -0/+25 |
2020-01-17 | x86: Add {vex} pseudo prefix | H.J. Lu | 1 | -2/+2 |