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AgeCommit message (Expand)AuthorFilesLines
2019-07-01Document the .value directive supported by the x86 and x86_64 assemblers.Nick Clifton1-0/+6
2019-07-01x86: optimize AND/OR with twice the same registerJan Beulich1-1/+2
2019-07-01x86-64: optimize certain commutative VEX-encoded insnsJan Beulich1-1/+4
2019-07-01x86: optimize EVEX packed integer logical instructionsJan Beulich1-6/+10
2019-06-26i386: Document memory size reference in assemblerLili Cui1-5/+10
2019-06-25x86: document certain command line options as "dangerous"Jan Beulich1-0/+6
2019-06-06gas: Add .enqcmd and noenqcmd directivesH.J. Lu1-0/+1
2019-06-04Enable Intel AVX512_VP2INTERSECT insnH.J. Lu1-1/+2
2019-06-04Add support for Intel ENQCMD[S] instructionsH.J. Lu1-1/+2
2019-04-05x86: Support Intel AVX512 BF16Xuepeng Guo1-1/+3
2019-03-18x86: Optimize EVEX vector load/store instructionsH.J. Lu1-1/+3
2019-03-18x86: Encode 256-bit/512-bit VEX/EVEX insns with 128-bit VEXH.J. Lu1-4/+6
2019-01-01Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2018-09-17x86: Add -mvexwig=[0|1] option to assemblerH.J. Lu1-0/+10
2018-08-31x86: Extend assembler to generate GNU property notesH.J. Lu1-0/+9
2018-08-11x86: Add CpuCMOV and CpuFXSRH.J. Lu1-3/+8
2018-07-02Fix use of "command line X" in binutils docThomas Preud'homme1-1/+1
2018-05-30Add znver2 support.Amit Pawar1-2/+3
2018-05-07Enable Intel MOVDIRI, MOVDIR64B instructionsH.J. Lu1-0/+3
2018-04-27Revert "Enable Intel MOVDIRI, MOVDIR64B instructions."Igor Tsimbalist1-3/+0
2018-04-26Enable Intel MOVDIRI, MOVDIR64B instructions.Igor Tsimbalist1-0/+3
2018-04-17Enable Intel CLDEMOTE instruction.Igor Tsimbalist1-1/+2
2018-04-11Enable Intel WAITPKG instructions.Igor Tsimbalist1-1/+2
2018-02-27x86: Add -O[2|s] assembler command-line optionsH.J. Lu1-0/+25
2018-02-22x86: Add {rex} pseudo prefixH.J. Lu1-0/+5
2018-01-23Enable Intel PCONFIG instruction.Igor Tsimbalist1-1/+2
2018-01-23Enable Intel WBNOINVD instruction.Igor Tsimbalist1-0/+2
2018-01-17Replace CET bit with IBT and SHSTK bits.Igor Tsimbalist1-3/+3
2018-01-08Add a description of the X86_64 assembler's .largcomm pseudo-op.Nick Clifton1-1/+10
2018-01-03Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2017-11-29In x86 -n docs, mention that you need an explicit nop fill byte.Jim Wilson1-1/+2
2017-10-23Enable Intel AVX512_BITALG instructions.Igor Tsimbalist1-0/+3
2017-10-23Enable Intel AVX512_VNNI instructions.Igor Tsimbalist1-1/+3
2017-10-23Enable Intel VPCLMULQDQ instruction.Igor Tsimbalist1-1/+2
2017-10-23Enable Intel VAES instructions.Igor Tsimbalist1-0/+2
2017-10-23Enable Intel GFNI instructions.Igor Tsimbalist1-1/+2
2017-10-23Enable Intel AVX512_VBMI2 instructions.Igor Tsimbalist1-2/+4
2017-03-09X86: Add pseudo prefixes to control encodingH.J. Lu1-4/+24
2017-03-06Add support for Intel CET instructionsH.J. Lu1-0/+2
2017-01-23Fix spelling mistakes and typos in the GAS sources.Nick Clifton1-1/+1
2017-01-12Enable Intel AVX512_VPOPCNTDQ instructionsIgor Tsimbalist1-1/+3
2017-01-02Update year range in copyright notice of all files.Alan Modra1-1/+1
2016-11-02Enable Intel AVX512_4VNNIW instructionsIgor Tsimbalist1-2/+4
2016-11-02Enable Intel AVX512_4FMAPS instructionsIgor Tsimbalist1-3/+5
2016-10-21X86: Remove pcommit instructionH.J. Lu1-2/+1
2016-08-24X86: Add ptwrite instructionH.J. Lu1-0/+2
2016-05-29Add .noavx512XX directives to x86 assemblerH.J. Lu1-0/+9
2016-05-27Update x86 CPU_XXX_FLAGS handlingH.J. Lu1-1/+12
2016-05-10Enable Intel RDPID instruction.Alexander Fomin1-1/+2
2016-03-15Update x86 register name documentation.Ulrich Drepper1-7/+43
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