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2024-09-27RISC-V: correct alignment directive handling for text sectionsJan Beulich2-17/+54
2024-09-27x86: optimize {,V}INSERTPS with certain immediatesJan Beulich1-0/+96
2024-09-27x86: optimize {,V}EXTRACT{F,I}{128,32x{4,8},64x{2,4}} with immediate 0Jan Beulich1-0/+74
2024-09-27x86: optimize {,V}EXTRACTPS with immediate 0Jan Beulich1-0/+36
2024-09-27x86: correct {,V}PEXTR{D,Q} optimizationJan Beulich1-0/+1
2024-09-26x86 TLS relocation checksAlan Modra1-7/+8
2024-09-25RISC-V: Add Smrnmi extension csrs.Jiawei1-0/+4
2024-09-24x86: Enable TLS relocation check only for ELFH.J. Lu1-11/+11
2024-09-23Fix compile time error introduced by d774bf9b3623239a1cfa729afcf048a15da657d3...Nick Clifton1-2/+8
2024-09-23x86: Turn PLT32 to PC32 only for PC-relative relocationsH.J. Lu1-1/+10
2024-09-21x86: Add tls check in gasCui, Lili1-22/+416
2024-09-20x86-64: Never make R_X86_64_GOT64 section relativeH.J. Lu1-0/+1
2024-09-15MIPS/GAS: Discard redundant instruction from DDIV/DREM macrosMaciej W. Rozycki1-4/+1
2024-09-12s390: Simplify (dis)assembly of insn operands with const bitsJens Remus1-7/+0
2024-09-11x86: error handling in set_cpu_arch()Jan Beulich1-30/+34
2024-09-09LoongArch: Fixed precedence of expression operators in instructionsLulu Cai1-12/+12
2024-09-07Add macros to get opcode of instructions approriatelyXin Wang1-18/+18
2024-09-06x86/APX: use D for 2-operand CFCMOVccJan Beulich1-1/+7
2024-09-06x86/APX: optimize certain reg-only CFCMOVcc formsJan Beulich1-0/+35
2024-09-03RISC-V: Add support for XCVsimd extension in CV32E40PMary Bennett1-0/+40
2024-09-02Support ymm rounding control for Intel AVX10.2Haochen Jiang1-56/+64
2024-08-30x86: replace conditional operators used to calculate booleansJan Beulich1-10/+11
2024-08-30x86: limit RegRex64 useJan Beulich1-9/+7
2024-08-30LoongArch: LoongArch64 allows relocations to use 64-bit addendsLulu Cai1-0/+3
2024-08-28x86: Report invalid TLS operatorH.J. Lu1-2/+2
2024-08-27x86: Report invalid TLS relocation nameH.J. Lu1-91/+98
2024-08-27x86: Allow R_386_TLS_LE_32 with KMOVDH.J. Lu1-2/+2
2024-08-27RISC-V: PR32036, Support Zcmp cm.mva01s and cm.mvsa01 instructions.Jiawei1-0/+15
2024-08-23x86: simplify SAE checkingJan Beulich1-12/+10
2024-08-23RISC-V: process rs_align_code also when relaxingJan Beulich1-32/+29
2024-08-19gas: ginsn: x86: pacify Wmaybe-uininitialized compiler warningIndu Bhagat1-0/+2
2024-08-16gas: don't open-code LEX_*NAMEJan Beulich5-6/+6
2024-08-15gas: pru: Fix trailing whitespace handlingDimitar Dimitrov1-0/+8
2024-08-14x86: correct .insn with opcode extension and VEX/XOP/EVEX encodingJan Beulich1-1/+2
2024-08-12Revert "gas: have scrubber retain more whitespace"H.J. Lu7-84/+28
2024-08-12Revert "gas: drop scrubber states 14 and 15"H.J. Lu2-0/+5
2024-08-09gas: drop scrubber states 14 and 15Jan Beulich2-5/+0
2024-08-09gas: have scrubber retain more whitespaceJan Beulich7-28/+84
2024-08-09m32r: move scrubber override to target headerJan Beulich1-0/+3
2024-08-09RISC-V: PR32014, .option directives shuoldn't affect elf attribute.Nelson Chu1-12/+16
2024-08-09gas: sparc: Fix faligndatai assembly and disassemblyRichard Henderson1-8/+9
2024-08-07score: drop TC_ALPHA codeJan Beulich2-24/+0
2024-08-07VAX: drop OBJ_VMS leftoversJan Beulich2-55/+7
2024-08-06RISC-V: Add support for XCvBitmanip extension in CV32E40PMary Bennett1-0/+26
2024-08-02gas: drop unnecessary use of tc_comment_charsJan Beulich8-22/+5
2024-08-01gas: x86: ginsn: handle previously missed indirect call and jmp opsIndu Bhagat1-44/+57
2024-07-31x86: move ginsn stuffJan Beulich2-1102/+1123
2024-07-26microMIPS: Add MT ASE instruction set supportYunQiang Su1-1/+1
2024-07-26x86: accept whitespace around prefix separatorJan Beulich1-19/+30
2024-07-26x86/APX: optimize certain {nf}-form insns to BMI2 onesJan Beulich1-0/+107