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2016-05-29Add .noavx512XX directives to x86 assemblerH.J. Lu1-0/+9
2016-05-27Update x86 CPU_XXX_FLAGS handlingH.J. Lu1-5/+20
2016-05-27Replace CpuAMD64/CpuIntel64 with AMD64/Intel64H.J. Lu1-7/+4
2016-05-27Correct CpuMax in i386-opc.hH.J. Lu1-8/+11
2016-05-27Don't clear cpu64 nor cpuno64H.J. Lu1-2/+0
2016-05-26metag: make an array's type unsigned char[]Trevor Saunders1-1/+1
2016-05-26rx: make the type of a variable bfd_reloc_code_real_typeTrevor Saunders1-1/+4
2016-05-25Require another match for AVX512VLH.J. Lu1-0/+15
2016-05-25Reimplement .no87/.nommx/.nosse/.noavx directivesH.J. Lu1-163/+253
2016-05-25Only generate VMOV.I64 instructions for loading constant floating point value...Chua Zheng Leong1-1/+1
2016-05-24MIPS/GAS: Treat local jump relocs the same no matter if REL or RELAMaciej W. Rozycki1-7/+6
2016-05-24MIPS/GAS: Cut TLS reloc dead code path in `md_apply_fix'Maciej W. Rozycki1-8/+6
2016-05-24xtensa: make map_suffix_reloc_to_operator return operatorTTrevor Saunders1-4/+4
2016-05-24d30v: make var type operatorTTrevor Saunders1-1/+1
2016-05-24mmix: constify handler_charpTrevor Saunders1-1/+1
2016-05-24ft32: fixup TARGET_FORMATTrevor Saunders1-3/+1
2016-05-24ia64: use XOBNEW and XOBNEWVECTrevor Saunders1-4/+4
2016-05-24change some variable's type to op_errTrevor Saunders2-2/+2
2016-05-23[ARC] Add XY registers, update neg instruction.Claudiu Zissulescu1-1/+27
2016-05-23[ARC] Rename "class" named attributes.Claudiu Zissulescu1-12/+12
2016-05-23tic54x: use concat moreTrevor Saunders1-6/+5
2016-05-23spu: make some constants unsignedTrevor Saunders1-1/+1
2016-05-23tic54x: rename typedef of struct symbol_Trevor Saunders1-23/+24
2016-05-20MIPS: Add support for P6600Matthew Fortune1-1/+2
2016-05-20Preserve addend for R_386_GOT32 and R_X86_64_GOT32H.J. Lu1-5/+0
2016-05-20MIPS: Fix the encoding of immediates with microMIPS JALXMaciej W. Rozycki1-1/+12
2016-05-20MIPS/GAS: Correct tab-after-space formatting mistakesMaciej W. Rozycki1-11/+11
2016-05-18gas/arc: Make member of arc_flags constAndrew Burgess2-2/+2
2016-05-18gas/arc: Use BFD_VMA_FMT for printf format specifierAndrew Burgess1-2/+4
2016-05-18gas/arc: Fix array overrun when checking opcode arrayAndrew Burgess1-2/+2
2016-05-18gas/arc: Add guard against operand array overflow.Andrew Burgess1-5/+7
2016-05-18rx: make field type enumTrevor Saunders1-1/+1
2016-05-18change the type of some fields to bfd_reloc_code_real_typeTrevor Saunders2-2/+3
2016-05-18Change type of v850_target_arch to enum bfd_architectureTrevor Saunders2-2/+2
2016-05-18PPC_OPERAND_SIGNOPT range.Alan Modra1-7/+5
2016-05-16m32r: make mach_table static and constTrevor Saunders1-1/+1
2016-05-16tc-vax.c: make prototype of flonum_gen2vax match its definitionTrevor Saunders1-1/+1
2016-05-16stop defining linkrelax in multiple placesTrevor Saunders2-6/+6
2016-05-16m68hc11: make some vars type bfd_reloc_code_real_typeTrevor Saunders1-4/+4
2016-05-15SH64/GAS: Fix a -Wwrite-strings build failureMaciej W. Rozycki1-1/+1
2016-05-13Fix build breakageAlan Modra1-1/+0
2016-05-13use XNEW and related macros moreTrevor Saunders40-198/+170
2016-05-13use xstrdup, xmemdup0 and concat moreTrevor Saunders16-170/+67
2016-05-11Add MIPS32 DSPr3 support.Matthew Fortune1-1/+15
2016-05-11Ensure that padding in the constant pool uses constant values.Nick Clifton1-0/+1
2016-05-10Enable Intel RDPID instruction.Alexander Fomin1-0/+2
2016-05-10Use getters/setters to access ARM branch typeThomas Preud'homme1-2/+2
2016-05-10Add support for ARMv8-M Mainline with DSP extensionThomas Preud'homme1-3/+32
2016-05-10Allow extension availability to depend on several architecture bitsThomas Preud'homme1-15/+45
2016-05-10Add support for ARMv8-M security extensions instructionsThomas Preud'homme1-8/+35
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