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2007-05-03PR gas/3041Nick Clifton1-2/+18
* gas/config/tc-m68k.c (relaxable_symbol): Do not relax weak symbols. (tc_gen_reloc): Adjust the addend of relocs against weak symbols. (md_apply_fix): Put zero values into the frags referencing weak symbols. * bfd/aoutx.h (swap_std_reloc_out): Treat relocs against weak symbols in the same way as relocs against external symbols.
2007-05-02gas/Alan Modra1-4/+1
PR 4448 * config/tc-ppc.c (ppc_insert_operand): Don't increase min for PPC_OPERAND_PLUS1. include/opcode/ * ppc.h (PPC_OPERAND_PLUS1): Update comment.
2007-05-01gas/config/H.J. Lu1-1/+9
2007-05-01 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (match_template): Check suffix for crc32 in Intel mdoe. (process_suffix): Default the suffix of 8bit crc32 to BYTE_MNEM_SUFFIX. (check_byte_reg): Skip check for 8bit crc32. gas/testsuite/ 2007-05-01 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/crc32-intel.d: New file. * gas/i386/crc32.d:Likewise. * gas/i386/crc32.s:Likewise. * gas/i386/x86-64-crc32-intel.d:Likewise. * gas/i386/x86-64-crc32.d:Likewise. * gas/i386/x86-64-crc32.s:Likewise. * gas/i386/i386.exp: Run crc32, crc32-intel, x86-64-crc32 and x86-64-crc32-intel. opcodes/ 2007-05-01 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (CRC32_Fixup): Properly handle Intel mode and check data size prefix in 16bit mode. * i386-opc.c (i386_optab): Default crc32 to non-8bit and support Intel mode.
2007-04-302007-04-30 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-16/+29
* config/tc-i386.c (md_assemble): Use register_prefix in error/warning message. (check_byte_reg): Likewise. (check_long_reg): Likewise. (check_qword_reg): Likewise. (check_word_reg): Likewise. (process_operands): Likewise.
2007-04-30opcodes/Alan Modra1-3/+2
PR 4436 * ppc-opc.c (powerpc_operands): Correct bitm for second entry of MBE. gas/ PR 4436 * config/tc-ppc.c (ppc_insert_operand): Disable range check if min > max.
2007-04-28 * config/tc-mips.c: Fix comment.Thiemo Seufer1-1/+1
2007-04-26 * config/tc-avr.c (mcu_types): Add support for atmega8hva andDenis Chertykov1-1/+3
atmega16hva devices. Move at90usb82 device to 'avr5' architecture. * doc/c-avr.texi: Document new devices.
2007-04-23 gas/testsuite/Nathan Sidwell1-16/+57
* gas/m68k/br-isaa.s: New. * gas/m68k/br-isaa.d: New. * gas/m68k/br-isab.s: New. * gas/m68k/br-isab.d: New. * gas/m68k/br-isac.s: New. * gas/m68k/br-isac.d: New. * gas/m68k/all.exp: Adjust. gas/ * config/tc-m68k.c (mcf54455_ctrl): New. (HAVE_LONG_DISP, HAVE_LONG_CALL, HAVE_LONG_COND): New. (m68k_archs): Add isac. (m68k_cpus): Add 54455 family. (m68k_ip): Split Bg into Bb, Bs, Bg. (m68k_elf_final_processing): Add ISA_C. * doc/c-m68k.texi (M680x0 Options): Add isac. include/opcode/ * m68k.h (mcfisa_c): New. (mcfusp, mcf_mask): Adjust. bfd/ * archures.c (bfd_mach_mcf_isa_c, bfd_mach_mcf_isa_c_mac, bfd_mach_mcf_isa_c_emac): New. * elf32-m68k.c (ISAC_PLT_ENTRY_SIZE, elf_isac_plt0_entry, elf_isac_plt_entry, elf_isac_plt_info): New. (elf32_m68k_object_p): Add ISA_C. (elf32_m68k_print_private_bfd_data): Print ISA_C. (elf32_m68k_get_plt_info): Detect ISA_C. * cpu-m68k.c (arch_info): Add ISAC. (m68k_arch_features): Likewise, (bfd_m68k_compatible): ISAs B & C are not compatible. opcodes/ * m68k-opc.c: Mark mcfisa_c instructions.
2007-04-21 * config/atof-vax.c (atof_vax_sizeof): Change return type to unsigned.Alan Modra6-18/+9
(md_atof): Make number_of_chars unsigned. Revert last change. * config/tc-or32.c (md_apply_fix): Delete bogus assertions. * config/tc-sh.c (sh_optimize_expr): Only define for OBJ_ELF. * config/tc-sh.h (md_optimize_expr): Likewise. * config/tc-sh64.c (shmedia_md_pcrel_from_section): Delete bogus assertion. * config/tc-xtensa.c (convert_frag_immed_finish_loop): Likewise.
2007-04-21* config/atof-vax.c (md_atof): Fix comparison inside know().Nick Clifton1-1/+1
2007-04-21Fix typo.Nick Clifton1-1/+1
2007-04-21gas/Alan Modra2-4/+6
* expr.c (expr): Assert on rankarg, not rank which can be unsigned. * read.c (read_a_source_file): Remove buffer_limit[-1] assertion. Don't skip over NUL char. (pseudo_set): Set X_op for registers to O_register. * symbols.c (symbol_clone): Remove assertion that sym is defined. (resolve_symbol_value): Resolve O_register symbols. * config/tc-i386.c (parse_real_register): Don't use i386_float_regtab. Instead find st(0) by hash lookup. * config/tc-ppc.c (ppc_macro): Warning fix. opcodes/ * i386-opc.c (i386_float_regtab, i386_float_regtab_size): Delete. Move contents to.. (i386_regtab): ..here. * i386-opc.h (i386_float_regtab, i386_float_regtab_size): Delete.
2007-04-21 * as.h (ENABLE_CHECKING): Default define to 0.Alan Modra1-40/+56
(know): Assert if ENABLE_CHECKING. (struct relax_type): Remove superfluous declaration. * configure.in (--enable-checking): New. * configure: Regenerate. * config.in: Regenerate. * config/tc-ppc.c (ppc_setup_opcodes): Do checks when ENABLE_CHECKING. Check for duplicate powerpc_operands entries.
2007-04-20 * config/tc-m68k.c (mcf5253_ctrl): New.Nathan Sidwell1-0/+12
(mcf52223_ctrl): New. (m68k_cpus): Add 5253, 52221, 52223.
2007-04-20 gas/Nathan Sidwell2-23/+44
* config/m68k-parse.h (RAMBAR_ALT): New. * config/tc-m68k.c (mcf5206_ctrl, mcf5307_ctrl): New. (mcf_ctrl, mcf5208_ctrl, mcf5210a_ctrl, mcf5213_ctrl, mcf52235_ctrl, mcf5225_ctrl, mcf5235_ctrl, mcf5271_ctrl, mcf5275_ctrl, mcf5282_ctrl, mcf5329_ctrl, mcf5373_ctrl, mcfv4e_ctrl, mcf5475_ctrl, mcf5485_ctrl): Add RAMBAR synonym for RAMBAR1. (mcf5272_ctrl): Add RAMBAR0, replace add RAMBAR with RAMBAR_ALT. (m68k_cpus): Adjust 5206, 5206e & 5307 entries. (m68k_ip) <Case J>: Detect when RAMBAR_ALT should be used. Add it to control register mapping. gas/testsuite/ * gas/m68k/ctrl-1.d, gas/m68k/ctrl-1.s: New. * gas/m68k/ctrl-2.d, gas/m68k/ctrl-2.s: New. * gas/m68k/all.exp: Add them. opcodes/ * m68k-dis.c (print_insn_arg): Show c04 as rambar0 and c05 as rambar1.
2007-04-20 * messages.c (as_internal_value_out_of_range): Fix typo inAlan Modra1-2/+2
error message. Return after printing domain error. * config/tc-ppc.c (ppc_insert_operand): Preserve low zero bits in max when shifting right.
2007-04-20include/opcode/Alan Modra1-50/+103
* ppc.h (struct powerpc_operand): Replace "bits" with "bitm". (num_powerpc_operands): Declare. (PPC_OPERAND_SIGNED et al): Redefine as hex. (PPC_OPERAND_PLUS1): Define. opcodes/ * ppc-dis.c (print_insn_powerpc): Adjust for struct powerpc_operand change. * ppc-opc.c (powerpc_operands): Replace bit count with bit mask in all entries. Add PPC_OPERAND_SIGNED to DE entry. Remove references to following deleted functions. (insert_bd, extract_bd, insert_dq, extract_dq): Delete. (insert_ds, extract_ds, insert_de, extract_de): Delete. (insert_des, extract_des, insert_li, extract_li): Delete. (insert_nb, insert_rsq, insert_rtq, insert_ev2, extract_ev2): Delete. (insert_ev4, extract_ev4, insert_ev8, extract_ev8): Delete. (num_powerpc_operands): New constant. (XSPRG_MASK): Remove entire SPRG field. (powerpc_opcodes <bcctre, bcctrel>): Use XLBB_MASK not XLYBB_MASK. gas/ * messages.c (as_internal_value_out_of_range): Extend to report errors for values with invalid low bits set. * config/tc-ppc.c (ppc_setup_opcodes): Check powerpc_operands bitm fields. Check that operands and opcode fields are disjoint. (ppc_insert_operand): Check operands using mask rather than bit count. Check low bits too. Handle PPC_OPERAND_PLUS1. Adjust insertion code. (md_apply_fix): Adjust for struct powerpc_operand change.
2007-04-192007-04-19 Paul Brook <paul@codesourcery.com>Paul Brook1-0/+13
gas/testsuite/ * gas/arm/thumb1_unified.d: New test. * gas/arm/thumb1_unified.s: New test. gas/ * config/tc-arm.c (md_assemble): Only allow 16-bit instructions on Thumb-1. Add sanity check for bogus relaxations.
2007-04-192007-04-19 Paul Brook <paul@codesourcery.com>Paul Brook1-2/+4
gas/ * config/tc-arm.c (insns): Allow rsb and rsbs on Thumb-1.
2007-04-18gas/H.J. Lu1-17/+36
2007-04-18 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (cpu_arch): Add .sse4.2 and .sse4. (match_template): Handle operand size for crc32 in SSE4.2. (process_suffix): Handle operand type for crc32 in SSE4.2. (output_insn): Support SSE4.2. gas/testsuite/ 2007-04-18 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/i386.exp: Add sse4.2 and x86-64-sse4.2. * gas/i386/sse4_2.d: New file. * gas/i386/sse4_2.s: Likewise. * gas/i386/x86-64-sse4_2.d: Likewise. * gas/i386/x86-64-sse4_2.s: Likewise. opcodes/ 2007-04-18 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (CRC32_Fixup): New. (PREGRP85, PREGRP86, PREGRP87, PREGRP88, PREGRP89, PREGRP90, PREGRP91): New. (threebyte_0x38_uses_DATA_prefix): Updated for SSE4.2. (threebyte_0x3a_uses_DATA_prefix): Likewise. (prefix_user_table): Add PREGRP85, PREGRP86, PREGRP87, PREGRP88, PREGRP89, PREGRP90 and PREGRP91. (three_byte_table): Likewise. * i386-opc.c (i386_optab): Add SSE4.2 opcodes. * gas/config/tc-i386.h (CpuSSE4_2): New. (CpuSSE4): Likewise. (CpuUnknownFlags): Add CpuSSE4_2.
2007-04-18gas/H.J. Lu1-14/+48
2007-04-18 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (cpu_arch): Add .sse4.1. (process_operands): Adjust implicit operand for blendvpd, blendvps and pblendvb in SSE4.1. (output_insn): Support SSE4.1. gas/testsuite/ 2007-04-18 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/i386.exp: Add sse4.1 and x86-64-sse4.1. * gas/i386/sse4_1.d: New file. * gas/i386/sse4_1.s: Likewise. * gas/i386/x86-64-sse4_1.d: Likewise. * gas/i386/x86-64-sse4_1.s: Likewise. opcodes/ 2007-04-18 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (XMM_Fixup): New. (Edqb): New. (Edqd): New. (XMM0): New. (dqb_mode): New. (dqd_mode): New. (PREGRP39 ... PREGRP85): New. (threebyte_0x38_uses_DATA_prefix): Updated for SSE4. (threebyte_0x3a_uses_DATA_prefix): Likewise. (prefix_user_table): Add PREGRP39 ... PREGRP85. (three_byte_table): Likewise. (putop): Handle 'K'. (intel_operand_size): Handle dqb_mode, dqd_mode): (OP_E): Likewise. (OP_G): Likewise. * i386-opc.c (i386_optab): Add SSE4.1 opcodes. * i386-opc.h (CpuSSE4_1): New. (CpuUnknownFlags): Add CpuSSE4_1. (regKludge): Update comment.
2007-04-182007-04-18 Paul Brook <paul@codesourcery.com>Paul Brook1-2/+31
gas/testsuite/ * gas/arm/thumb2_add.s: Add rsb #0 test. * gas/arm/thumb2_add.d: Update expected output. gas/ * config/tc-arm.c (do_t_rsb): Use 16-bit encoding when possible.
2007-04-16 * config/tc-sh.c (sh_handle_align): Call as_bad_where insteadKaz Kojima1-1/+1
of as_warn_where for misaligned data.
2007-04-15 * config/tc-sh.c (align_test_frag_offset_fixed_p): HandleKaz Kojima1-4/+12
rs_fill frags.
2007-04-14 * config/tc-sh.c (align_test_frag_offset_fixed_p): New.Kaz Kojima2-0/+89
(sh_optimize_expr): Likewise. * config/tc-sh.h (md_optimize_expr): Define. (sh_optimize_expr): Prototype.
2007-04-062007-04-06 Matt Thomas <matt@netbsd.org>Matt Thomas2-0/+147
* config/tc-vax.c (vax_cons): Added to support %pcrel{8,16,32}(exp) to emit pcrel relocations by DWARF2 in non-code sections. Borrowed heavily from tc-sparc.c. (vax_cons_fix_new): Likewise.
2007-04-04 * config/tc-m68k.c (HAVE_LONG_BRANCH): Add fido_a.Kazu Hirata1-1/+1
2007-04-042007-04-04 Paul Brook <paul@codesourcery.com>Paul Brook1-2/+3
gas/ * config/tc-arm.c (do_neon_ext): Enforce immediate range. (insns): Use I15 for vext. gas/testsute/ * gas/arm/neon-cov.s: Add new vext test. * gas/arm/neon-cov.d: Ditto.
2007-04-02 * config/tc-xtensa.c (xtensa_flush_pending_output): CheckBob Wilson1-0/+9
outputting_stabs_line_debug.
2007-04-02 * config/tc-avr.c (mcu_types): Add support for at90pwm1, at90usb82,Denis Chertykov1-0/+7
at90usb162, atmega325p, atmega329p, atmega3250p and atmega3290p devices. * doc/c-avr.texi: Document new devices.
2007-04-02gas/Richard Sandiford1-0/+1
* doc/as.texinfo: Add -mvxworks-pic to the list of MIPS options. * doc/c-mips.texi (-KPIC, -mvxworks-pic): Document. * config/tc-mips.c (md_show_usage): Mention -mvxworks-pic.
2007-03-31 * config/tc-xtensa.c (xtensa_move_labels): Remove loops_ok argument.Bob Wilson1-35/+6
Do not check is_loop_target flag. (xtensa_frob_label): Adjust calls to xtensa_move_labels. (xg_assemble_vliw_tokens): Likewise. Also avoid calling xtensa_move_labels for alignment of loop opcodes.
2007-03-302007-03-30 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-1/+1
* config/tc-i386.c (process_suffix): Reindent a bit.
2007-03-302007-03-30 Paul Brook <paul@codesourcery.com>Paul Brook1-64/+98
gas/ * config/tc-arm.c (encode_thumb2_ldmstm): New function. (do_t_ldmstm): Generate 16-bit push/pop. Use encode_thumb2_ldmstm. (do_t_push_pop): Use encode_thumb2_ldmstm. gas/testsuite/ * gas/arm/thumb2_ldmstm.d: New test. * gas/arm/thumb2_ldmstm.s: New test.
2007-03-29* m32c.cpu (Imm-8-s4n): Fix print hook.DJ Delorie1-16/+62
(Lab-24-8, Lab-32-8, Lab-40-8): Fix. (arith-jnz-imm4-dst-defn): Make relaxable. (arith-jnz16-imm4-dst-defn): Fix encodings. * m32c-desc.c: Regenerate. * m32c-dis.c: Regenerate. * m32c-opc.c: Regenerate. * config/tc-m32c.c (rl_for, relaxable): Protect argument. (md_relax_table): Add entries for ADJNZ macros. (M32C_Macros): Add ADJNZ macros. (subtype_mappings): Add entries for ADJNZ macros. (insn_to_subtype): Check for adjnz and sbjnz insns. (md_estimate_size_before_relax): Pass insn to insn_to_subtype. (md_convert_frag): Convert adjnz and sbjnz.
2007-03-29gas/H.J. Lu1-1/+1
2007-03-28 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (build_modrm_byte): For instructions with 2 register operands, encode destination in i.rm.regmem if its RegMem bit is set. opcodes/ 2007-03-28 H.J. Lu <hongjiu.lu@intel.com> * i386-opc.c (i386_optab): Change InvMem to RegMem for mov and movq. Remove InvMem from sldt, smsw and str. * i386-opc.h (InvMem): Renamed to ... (RegMem): Update comments. (AnyMem): Remove InvMem.
2007-03-26 * config/tc-xtensa.c (xg_translate_idioms): Allow assembly idiomsBob Wilson1-4/+5
in FLIX instructions.
2007-03-26 * config/tc-arm.c (arm_it): Add immisfloat field.Julian Brown1-11/+45
(parse_qfloat_immediate): Disallow integer syntax for floating-point immediates. Fix hex immediates, handle 0.0 and -0.0 specially. (parse_neon_mov): Set immisfloat bit for operand if it parsed as a float. (neon_cmode_for_move_imm): Reject non-float immediates for float operands. (neon_move_immediate): Pass immisfloat bit to neon_cmode_for_move_imm.
2007-03-242007-03-24 Paul Brook <paul@codesourcery.com>Paul Brook1-0/+3
* config/tc-arm.c (do_t_ldmstm): Error on Thumb-2 addressing modes.
2007-03-242007-03-24 Paul Brook <paul@codesourcery.com>Paul Brook1-8/+23
Mark Shinwell <shinwell@codesourcery.com> gas/ * config/tc-arm.c (operand_parse_code): Add OP_oRRw. (parse_operands): Don't expect comma if first operand missing. Handle OP_oRRw. (do_srs): Encode register number, checking it is r13. Update comment. (insns): Update SRS entries to take a register. gas/testsuite/ * gas/arm/archv6.s: Add new SRS tests. * gas/arm/archv6.d: Update expected output. * gas/arm/thumb32.s: Add new SRS tests. * gas/arm/thumb32.d: Update expected output. * gas/arm/srs-t2.d: New. * gas/arm/srs-t2.l: New. * gas/arm/srs-t2.s: New. * gas/arm/srs-arm.d: New. * gas/arm/srs-arm.l: New. * gas/arm/srs-arm.s: New. opcodes/ * arm-dis.c (arm_opcodes): Print SRS base register.
2007-03-23gas/H.J. Lu1-0/+1
2003-03-23 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (md_begin): Allow '.' in mnemonic. gas/testsuite/ 2003-03-23 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/rex.s: Add tests for rex.WRXB. * gas/i386/rex.d: Updated. * gas/i386/rex.d: Replace rex64XYZ with rex.WRXB. * gas/i386/x86-64-io-intel.d : Likewise. * gas/i386/x86-64-io-suffix.d: Likewise. * gas/i386/x86-64-io.d: Likewise. * gas/i386/x86-64-opcode.d: Likewise. opcodes/ 2003-03-23 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (prefix_name): Replace rex64XYZ with rex.WRXB. * i386-opc.c (i386_optab): Add rex.wrxb.
2007-03-23 gas/Mark Shinwell1-5/+21
* config/tc-arm.c (md_apply_fix): Turn CZB instructions that attempt to jump to the next instruction into NOPs.
2007-03-23 * config/tc-spu.c: Don't include opcode/spu.h.Alan Modra2-9/+33
(md_assemble): Set tc_fix_data.insn_tag and arg_format. (md_apply_fix): Adjust. * config/tc-spu.h: Include opcode/spu.h. (struct tc_fix_info): New. (TC_FIX_TYPE, TC_INIT_FIX_DATA): Adjust. (TC_FORCE_RELOCATION): Define.
2007-03-222003-03-21 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-1/+1
* config/tc-i386.c (process_suffix): Check 0x90 instead of xchg for xchg %rax,%rax.
2007-03-21gas/H.J. Lu1-22/+22
2003-03-21 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c: Replace REX_MODE64, REX_EXTX, REX_EXTY and REX_EXTZ with REX_W, REX_R, REX_X and REX_B respectively. include/opcode/ 2003-03-21 H.J. Lu <hongjiu.lu@intel.com> * i386.h (REX_MODE64): Renamed to ... (REX_W): This. (REX_EXTX): Renamed to ... (REX_R): This. (REX_EXTY): Renamed to ... (REX_X): This. (REX_EXTZ): Renamed to ... (REX_B): This. opcodes/ 2003-03-21 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (REX_MODE64): Remove definition. (REX_EXTX): Likewise. (REX_EXTY): Likewise. (REX_EXTZ): Likewise. (USED_REX): Use REX_OPCODE instead of 0x40. Replace REX_MODE64, REX_EXTX, REX_EXTY and REX_EXTZ with REX_W, REX_R, REX_X and REX_B respectively.
2007-03-21gas/H.J. Lu1-0/+9
2003-03-21 H.J. Lu <hongjiu.lu@intel.com> PR binutils/4218 * config/tc-i386.c (match_template): Properly handle 64bit mode "xchg %eax, %eax". gas/testsuite/ 2003-03-21 H.J. Lu <hongjiu.lu@intel.com> PR binutils/4218 * gas/i386/nops.s: Add testcases for nop r/m. * gas/i386/x86-64-nops.s: Likewise. * gas/i386/x86-64-opcode.s: Add testcases for xchg with %ax, %eax and %rax. * gas/i386/nops.d: Updated. * gas/i386/x86-64-nops.d: Likewise. * gas/i386/x86-64-opcode.d: Likewise. opcodes/ 2003-03-21 H.J. Lu <hongjiu.lu@intel.com> PR binutils/4218 * i386-dis.c (PREGRP38): New. (dis386): Use PREGRP38 for 0x90. (prefix_user_table): Add PREGRP38. (print_insn): Set uses_REPZ_prefix to 1 for pause. (NOP_Fixup1): Properly handle REX bits. (NOP_Fixup2): Likewise. * i386-opc.c (i386_optab): Allow %eax with xchg in 64bit. Allow register with nop.
2007-03-21PR gas/4124Nick Clifton1-7/+7
* config/tc-alpha.c (emit_ustX): Fix ustq code generation.
2007-03-212007-03-21 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2-8/+4
* Makefile.am: Run dep-am. * Makefile.in: Regenerated. * config/tc-i386.c: Don't include "opcodes/i386-opc.h". * config/tc-i386.h: Include "opcodes/i386-opc.h". (NOP_OPCODE): Removed. (template): Likewise.
2007-03-21 * config/tc-i386.h (NOP_OPCODE): Restore.Andreas Schwab1-0/+3
2007-03-18 gas/Mark Shinwell1-6/+6
* config/tc-arm.c (do_mul): Don't warn about overlapping Rd and Rm operands when assembling for v6 or above. Correctly capitalize register names in the messages. (do_mlas): Likewise. Delete spurious blank line. gas/testsuite/ * gas/arm/mul-overlap.s: New. * gas/arm/mul-overlap.d: New. * gas/arm/mul-overlap.l: New. * gas/arm/mul-overlap-v6.s: New. * gas/arm/mul-overlap-v6.d: New.
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