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authorH.J. Lu <hjl.tools@gmail.com>2007-05-01 12:59:24 +0000
committerH.J. Lu <hjl.tools@gmail.com>2007-05-01 12:59:24 +0000
commit9344ff29511f1014a188c089a82d4415cfcb30cb (patch)
treed38acd907b27f6abc979c48b35ca53d8ca16792e /gas/config
parent3764ce598cadc511785fb23230bf104ccbadc368 (diff)
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gas/config/
2007-05-01 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (match_template): Check suffix for crc32 in Intel mdoe. (process_suffix): Default the suffix of 8bit crc32 to BYTE_MNEM_SUFFIX. (check_byte_reg): Skip check for 8bit crc32. gas/testsuite/ 2007-05-01 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/crc32-intel.d: New file. * gas/i386/crc32.d:Likewise. * gas/i386/crc32.s:Likewise. * gas/i386/x86-64-crc32-intel.d:Likewise. * gas/i386/x86-64-crc32.d:Likewise. * gas/i386/x86-64-crc32.s:Likewise. * gas/i386/i386.exp: Run crc32, crc32-intel, x86-64-crc32 and x86-64-crc32-intel. opcodes/ 2007-05-01 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (CRC32_Fixup): Properly handle Intel mode and check data size prefix in 16bit mode. * i386-opc.c (i386_optab): Default crc32 to non-8bit and support Intel mode.
Diffstat (limited to 'gas/config')
-rw-r--r--gas/config/tc-i386.c10
1 files changed, 9 insertions, 1 deletions
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index a0dd0ce..e091322 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -2557,9 +2557,11 @@ match_template (void)
if (i.operands != t->operands)
continue;
- /* Check the suffix, except for some instructions in intel mode. */
+ /* Check the suffix, except for some instructions in intel mode.
+ We do want to check suffix for crc32 even in intel mode. */
if ((t->opcode_modifier & suffix_check)
&& !(intel_syntax
+ && t->base_opcode != 0xf20f38f1
&& (t->opcode_modifier & IgnoreSize)))
continue;
@@ -2845,6 +2847,8 @@ process_suffix (void)
i.suffix = ((i.types[0] & Reg16) ? WORD_MNEM_SUFFIX :
LONG_MNEM_SUFFIX);
}
+ else if (i.tm.base_opcode == 0xf20f38f0)
+ i.suffix = BYTE_MNEM_SUFFIX;
if (!i.suffix)
{
@@ -3040,6 +3044,10 @@ check_byte_reg (void)
|| i.tm.base_opcode == 0xfbf))
continue;
+ /* crc32 doesn't generate this warning. */
+ if (i.tm.base_opcode == 0xf20f38f0)
+ continue;
+
if ((i.types[op] & WordReg) && i.op[op].regs->reg_num < 4)
{
/* Prohibit these changes in the 64bit mode, since the