aboutsummaryrefslogtreecommitdiff
path: root/gas/config
AgeCommit message (Collapse)AuthorFilesLines
2014-05-13Re-work register size macros for MIPS.mfortune1-69/+71
gas/ * config/tc-mips.c (mips_set_options): Rename gp32 to gp throughout. (HAVE_32BIT_GPRS, HAVE_64BIT_GPRS): Remove. Re-implement via GPR_SIZE. (HAVE_32BIT_FPRS, HAVE_64BIT_FPRS): Remove. Re-implement via FPR_SIZE. (GPR_SIZE, FPR_SIZE): New macros. Use throughout.
2014-05-08Fix references to file_mips_isa missed in previous patch.mfortune1-4/+4
gas/ * config/tc-mips.c (md_parse_option): Update missed file_mips_isa references.
2014-05-08Consolidate file_mips_xxx variables.mfortune1-86/+84
gas/ * config/tc-mips.c (mips_set_options): Rename fp32 field to fp. Update fp32 == 0 to fp == 64 and fp32 == 1 to fp != 64 throughout. (file_mips_gp32, file_mips_fp32, file_mips_soft_float, file_mips_single_float, file_mips_isa, file_mips_arch): Merge into one struct... (file_mips_opts): Here. New static global. Update throughout. (mips_opts): Update defaults for gp32 and fp.
2014-05-08Implement CONVERT_SYMBOLIC_ATTRIBUTE for MIPS.mfortune2-0/+36
gas/ * config/tc-mips.c (streq): Define. (mips_convert_symbolic_attribute): New function. * config/tc-mips.h (CONVERT_SYMBOLIC_ATTRIBUTE): Define. (mips_convert_symbolic_attribute): New prototype gas/testsuite/ * gas/mips/attr-gnu-abi-fp-1.s: New. * gas/mips/attr-gnu-abi-fp-1.d: New. * gas/mips/attr-gnu-abi-msa-1.s: New. * gas/mips/attr-gnu-abi-msa-1.d: New. * gas/mips/mips.exp: Add new tests.
2014-05-08Use signed data type for R_XTENSA_DIFF* relocation offsets.Volodymyr Arbatov1-0/+3
R_XTENSA_DIFF relocation offsets are in fact signed. Treat them as such. Add testcase that examines ld behaviour on R_XTENSA_DIFF relocation changing sign during relaxation. 2014-05-02 Volodymyr Arbatov <arbatov@cadence.com> David Weatherford <weath@cadence.com> Max Filippov <jcmvbkbc@gmail.com> bfd/ * elf32-xtensa.c (relax_section): treat R_XTENSA_DIFF* relocations as signed. gas/ * config/tc-xtensa.c (md_apply_fix): mark BFD_RELOC_XTENSA_DIFF* fixups as signed. ld/testsuite/ * ld-xtensa/diff_overflow.exp, * ld-xtensa/diff_overflow1.s, * ld-xtensa/diff_overflow2.s: Add test for DIFF* relocation signedness and overflow checking.
2014-05-07Add MIPS r3 and r5 support.Andrew Bennett1-6/+76
This patch firstly adds support for mips32r3 mips32r5, mips64r3 and mips64r5. Secondly it adds support for the eretnc instruction. ChangeLog: bfd/ * aoutx.h (NAME (aout, machine_type)): Add mips32r3, mips64r3, mips32r5 and mips64r5. * archures.c (bfd_architecture): Likewise. * bfd-in2.h (bfd_architecture): Likewise. * cpu-mips.c (arch_info_struct): Likewise. * elfxx-mips.c (mips_set_isa_flags): Likewise. gas/ * tc-mips.c (ISA_SUPPORTS_MIPS16E): Add mips32r3, mips32r5, mips64r3 and mips64r5. (ISA_HAS_64BIT_FPRS): Likewise. (ISA_HAS_ROR): Likewise. (ISA_HAS_ODD_SINGLE_FPR): Likewise. (ISA_HAS_MXHC1): Likewise. (hilo_interlocks): Likewise. (md_longopts): Likewise. (ISA_HAS_64BIT_REGS): Add mips64r3 and mips64r5. (ISA_HAS_DROR): Likewise. (options): Add OPTION_MIPS32R3, OPTION_MIPS32R5, OPTION_MIPS64R3, and OPTION_MIPS64R5. (mips_isa_rev): Add support for mips32r3, mips32r5, mips64r3 and mips64r5. (md_parse_option): Likewise. (s_mipsset): Likewise. (mips_cpu_info_table): Add entries for mips32r3, mips32r5, mips64r3 and mips64r5. Also change p5600 entry to be mips32r5. * configure.in: Add support for mips32r3, mips32r5, mips64r3 and mips64r5. * configure: Regenerate. * doc/c-mips.texi: Document the -mips32r3, -mips32r5, -mips64r3 and -mips64r5 command line options. * doc/as.texinfo: Likewise. gas/testsuite/ * gas/mips/mips.exp: Add MIPS32r5 tests. Also add the mips32r3, mips32r5, mips64r3 and mips64r5 isas to the testsuite. * gas/mips/r5.s: New test. * gas/mips/r5.d: Likewise. include/opcode/ * mips.h (INSN_ISA_MASK): Updated. (INSN_ISA32R3): New define. (INSN_ISA32R5): New define. (INSN_ISA64R3): New define. (INSN_ISA64R5): New define. (INSN_ISA64, INSN_ISA64R2, INSN_ISA3_32, INSN_ISA3_32R2, INSN_ISA4_32 INSN_ISA4_32R2, INSN_ISA5_32R2): Renumbered. (mips_isa_table): Add entries for mips32r3, mips32r5, mips64r3 and mips64r5. (INSN_UPTO32R3): New define. (INSN_UPTO32R5): New define. (INSN_UPTO64R3): New define. (INSN_UPTO64R5): New define. (ISA_MIPS32R3): New define. (ISA_MIPS32R5): New define. (ISA_MIPS64R3): New define. (ISA_MIPS64R5): New define. (CPU_MIPS32R3): New define. (CPU_MIPS32R5): New define. (CPU_MIPS64R3): New define. (CPU_MIPS64R5): New define. opcodes/ * mips-opc.c (mips_builtin_opcodes): Add MIPS32r5 eretnc instruction. (I34): New define. (I36): New define. (I66): New define. (I68): New define. * mips-dis.c (mips_arch_choices): Add mips32r3, mips32r5, mips64r3 and mips64r5. (parse_mips_dis_option): Update MSA and virtualization support to allow mips64r3 and mips64r5.
2014-04-28This fixes a bootstrapping problem with gcc 4.9 in an x86 PE environment.Nick Clifton1-1/+4
The problem was that references to weak function symbols were being incorrectly biased by definition's offset. PR gas/16858 * config/tc-i386.c (md_apply_fix): Do not adjust value of pc-relative fixes against weak symbols.
2014-04-24Fix a problem building the ARM assembler for non-ELF based toolchains.Nick Clifton1-1/+2
* config/tc-arm.c (s_ltorg): Only create a mapping symbol for ELF based targets.
2014-04-23gas/arm: Force output of a data mapping symbol for literal poolsWill Newton1-2/+3
If there is a a trailing align statement in a code section we may output data padding with a data mapping followed by a code alignment with a code mapping. The literal pool may then be output with a code mapping symbol which will cause it to be endian swapped in a big-endian configuration. When outputting a literal pool make sure that a data mapping symbol is output in all cases. gas/ChangeLog: 2014-04-23 Will Newton <will.newton@linaro.org> * config/tc-arm.c (s_ltorg): Call make_mapping_symbol directly instead of mapping_state. gas/testsuite/ChangeLog: 2014-04-23 Will Newton <will.newton@linaro.org> * gas/arm/mapmisc.d: Check literal pool mapping with a trailing .align statement. * gas/arm/mapmisc.s: Likewise.
2014-04-23Add support for the MIPS eXtended Physical Address (XPA) ASE.Andrew Bennett1-2/+13
ChangeLog: binutils/ * doc/binutils.texi: Document the disassemble MIPS XPA instructions command line option. gas/ * config/tc-mips.c (options): Add OPTION_XPA and OPTION_NO_XPA. (md_longopts): Add xpa and no-xpa command line options. (mips_ases): Add MIPS XPA ASE. (mips_cpu_info_table): Update p5600 entry to allow the XPA ASE. * doc/as.texinfo: Document the MIPS XPA command line options. * doc/c-mips.texi: Document the MIPS XPA command line options, and assembler directives. gas/testsuite/ * gas/mips/mips.exp: Add xpa tests. * gas/mips/xpa.s: New test. * gas/mips/xpa.d: Likewise. include/ * opcode/mips.h (ASE_XPA): New define. opcodes/ * mips-dis.c (mips_arch_choices): Update mips32r2 and mips64r2 to allow the MIPS XPA ASE. (parse_mips_dis_option): Process the -Mxpa option. * mips-opc.c (XPA): New define. (mips_builtin_opcodes): Add MIPS XPA instructions and move the locations of the ctc0 and cfc0 instructions.
2014-04-22Fix alignment for the first section frag on xtensaMax Filippov1-1/+0
Linking object files produced by partial linking with link-time relaxation enabled sometimes fails with the following error message: dangerous relocation: call8: misaligned call target: (.text.unlikely+0x63) This happens because no basic block with an XTENSA_PROP_ALIGN flag in the property table is generated for the first basic block, even if the .align directive is present. It was believed that the first frag alignment could be derived from the section alignment, but this was not implemented for the partial linking case: after partial linking first frag of a section may become not first, but no additional alignment frag is inserted before it. Basic block for such frag may be merged with previous basic block into extended basic block during relaxation pass losing its alignment restrictions. Fix this by always recording alignment for the first section frag. 2014-04-22 Max Filippov <jcmvbkbc@gmail.com> gas/ * config/tc-xtensa.c (xtensa_handle_align): record alignment for the first section frag. gas/testsuite/ * gas/xtensa/all.exp: Add test for the first section frag alignment. * gas/xtensa/first_frag_align.d: First section frag alignment expected dump. * gas/xtensa/first_frag_align.s: First section frag alignment test source.
2014-04-22Fix Nios II assembler self-test mode.Sandra Loosemore1-0/+1
2014-04-22 Sandra Loosemore <sandra@codesourcery.com> gas/ * config/tc-nios2.c (nios2_consume_arg): Add case for 'E' to unbreak self-test mode. gas/testsuite/ * gas/nios2/selftest.s: New. * gas/nios2/selftest.d: New.
2014-04-22Remove support for the (deprecated) openrisc and or32 configurations and replaceChristian Svensson6-1222/+213
with support for the new or1k configuration.
2014-04-16Fix more fallout from TC_CONS_FIX_NEW changeAlan Modra2-2/+2
* config/tc-tilegx.h (TC_CONS_FIX_NEW): Add RELOC arg. * config/tc-tilepro.h (TC_CONS_FIX_NEW): Likewise.
2014-04-10bfd/ChangeLogDenis Chertykov2-3/+150
* elf32-avr.c: Add DIFF relocations for AVR. (avr_final_link_relocate): Handle the DIFF relocs. (bfd_elf_avr_diff_reloc): New. (elf32_avr_is_diff_reloc): New. (elf32_avr_adjust_diff_reloc_value): Reduce difference value. (elf32_avr_relax_delete_bytes): Recompute difference after deleting bytes. * reloc.c: Add BFD_RELOC_AVR_DIFF8/16/32 relocations gas/ChangeLog * config/tc-avr.c: Add new flag mlink-relax. (md_show_usage): Add flag and help text. (md_parse_option): Record whether link relax is turned on. (relaxable_section): New. (avr_validate_fix_sub): New. (avr_force_relocation): New. (md_apply_fix): Generate DIFF reloc. (avr_allow_local_subtract): New. * config/tc-avr.h (TC_LINKRELAX_FIXUP): Define to 0. (TC_FORCE_RELOCATION): Define. (TC_FORCE_RELOCATION_SUB_SAME): Define. (TC_VALIDATE_FIX_SUB): Define. (avr_force_relocation): Declare. (avr_validate_fix_sub): Declare. (md_allow_local_subtract): Define. (avr_allow_local_subtract): Declare. gas/testsuite/ChangeLog * gas/avr/diffreloc_withrelax.d: New testcase. * gas/avr/noreloc_withoutrelax.d: Likewise. * gas/avr/relax.s: Likewise. include/ChangeLog * elf/avr.h: Add new DIFF relocs. ld/testsuite/ChangeLog * ld-avr/norelax_diff.d: New testcase. * ld-avr/relax_diff.d: Likewise. * ld-avr/relax.s: Likewise.
2014-04-10Add support for the MIPS P5600 family of CPUs.Andrew Bennett1-0/+2
ChangeLog: 2014-04-10 Andrew Bennett <andrew.bennett@imgtec.com> * config/tc-mips.c (mips_cpu_info_table): Add P5600 configuation. * doc/c-mips.texi: Document p5600.
2014-04-09Fix a few more targets affected by the change to the TC_CONS_FIX_NEW macro.Nick Clifton3-3/+3
* config/tc-rl78.h (TC_CONS_FIX_NEW): Add RELOC parameter. * config/tc-z80.h (TC_CONS_FIX_NEW): Discard RELOC parameter. * config/tc-aarch64.h (TC_CONS_FIX_NEW): Discard RELOC parameter. * read.c (emit_expr_fix): Mark the r parameter as potentially unused.
2014-04-09ppc476 gas warn on data in code sectionsAlan Modra2-1/+66
* config/tc-ppc.c (warn_476, last_insn, last_seg, last_subseg): New static vars. (md_longopts, md_parse_option, md_show_usage): Add --ppc476-workaround. (ppc_elf_cons_fix_check): New function. (md_assemble): Set last_insn, last_seg, last_subseg. (ppc_byte, md_apply_fix): Handle warn_476. * config/tc-ppc.h (TC_CONS_FIX_CHECK): Define. (ppc_elf_cons_fix_check): Declare. * read.c (cons_worker): Invoke TC_CONS_FIX_CHECK.
2014-04-09gas TC_PARSE_CONS_EXPRESSION communication with TC_CONS_FIX_NEWAlan Modra46-299/+240
A number of targets pass extra information from TC_PARSE_CONS_EXPRESSION to TC_CONS_FIX_NEW via static variables. That's OK, but not best practice. tc-ppc.c goes further in implementing its own replacement for cons(), because the generic one doesn't allow relocation modifiers on constants. This patch fixes both of these warts. * gas/config/tc-alpha.h (TC_CONS_FIX_NEW): Add RELOC parameter. * gas/config/tc-arc.c (arc_cons_fix_new): Add reloc parameter. * gas/config/tc-arc.h (arc_cons_fix_new): Update prototype. (TC_CONS_FIX_NEW): Add RELOC parameter. * gas/config/tc-arm.c (cons_fix_new_arm): Similarly * gas/config/tc-arm.h (cons_fix_new_arm, TC_CONS_FIX_NEW): Similarly. * gas/config/tc-cr16.c (cr16_cons_fix_new): Similarly. * gas/config/tc-cr16.h (cr16_cons_fix_new, TC_CONS_FIX_NEW): Similarly. * gas/config/tc-crx.h (TC_CONS_FIX_NEW): Similarly. * gas/config/tc-m32c.c (m32c_cons_fix_new): Similarly. * gas/config/tc-m32c.h (m32c_cons_fix_new, TC_CONS_FIX_NEW): Similarly. * gas/config/tc-mn10300.c (mn10300_cons_fix_new): Similarly. * gas/config/tc-mn10300.h (mn10300_cons_fix_new, TC_CONS_FIX_NEW): Similarly. * gas/config/tc-ns32k.c (cons_fix_new_ns32k): Similarly. * gas/config/tc-ns32k.h (cons_fix_new_ns32k): Similarly. * gas/config/tc-pj.c (pj_cons_fix_new_pj): Similarly. * gas/config/tc-pj.h (pj_cons_fix_new_pj, TC_CONS_FIX_NEW): Similarly. * gas/config/tc-rx.c (rx_cons_fix_new): Similarly. * gas/config/tc-rx.h (rx_cons_fix_new, TC_CONS_FIX_NEW): Similarly. * gas/config/tc-sh.c (sh_cons_fix_new): Similarly. * gas/config/tc-sh.h (sh_cons_fix_new, TC_CONS_FIX_NEW): Similarly. * gas/config/tc-tic54x.c (tic54x_cons_fix_new): Similarly. * gas/config/tc-tic54x.h (tic54x_cons_fix_new, TC_CONS_FIX_NEW): Similarly. * gas/config/tc-tic6x.c (tic6x_cons_fix_new): Similarly. * gas/config/tc-tic6x.h (tic6x_cons_fix_new, TC_CONS_FIX_NEW): Similarly. * gas/config/tc-arc.c (arc_parse_cons_expression): Return reloc. * gas/config/tc-arc.h (arc_parse_cons_expression): Update proto. * gas/config/tc-avr.c (exp_mod_data): Make global. (pexp_mod_data): Delete. (avr_parse_cons_expression): Return exp_mod_data pointer. (avr_cons_fix_new): Add exp_mod_data_t pointer param. (exp_mod_data_t): Move typedef.. * gas/config/tc-avr.h: ..to here. (exp_mod_data): Declare. (TC_PARSE_CONS_RETURN_TYPE, TC_PARSE_CONS_RETURN_NONE): Define. (avr_parse_cons_expression, avr_cons_fix_new): Update prototype. (TC_CONS_FIX_NEW): Update. * gas/config/tc-hppa.c (hppa_field_selector): Delete static var. (cons_fix_new_hppa): Add hppa_field_selector param. (fix_new_hppa): Adjust. (parse_cons_expression_hppa): Return field selector. * gas/config/tc-hppa.h (parse_cons_expression_hppa): Update proto. (cons_fix_new_hppa): Likewise. (TC_PARSE_CONS_RETURN_TYPE, TC_PARSE_CONS_RETURN_NONE): Define. * gas/config/tc-i386.c (got_reloc): Delete static var. (x86_cons_fix_new): Add reloc param. (x86_cons): Return got reloc. * gas/config/tc-i386.h (x86_cons, x86_cons_fix_new): Update proto. (TC_CONS_FIX_NEW): Add RELOC param. * gas/config/tc-ia64.c (ia64_cons_fix_new): Add reloc param. Adjust calls. * gas/config/tc-ia64.h (ia64_cons_fix_new): Update prototype. (TC_CONS_FIX_NEW): Add reloc param. * gas/config/tc-microblaze.c (parse_cons_expression_microblaze): Return reloc. (cons_fix_new_microblaze): Add reloc param. * gas/config/tc-microblaze.h: Formatting. (parse_cons_expression_microblaze): Update proto. (cons_fix_new_microblaze): Likewise. * gas/config/tc-nios2.c (nios2_tls_ldo_reloc): Delete static var. (nios2_cons): Return ldo reloc. (nios2_cons_fix_new): Delete. * gas/config/tc-nios2.h (nios2_cons): Update prototype. (nios2_cons_fix_new, TC_CONS_FIX_NEW): Delete. * gas/config/tc-ppc.c (md_pseudo_table): Remove quad, long, word, short. Make llong use cons. (ppc_elf_suffix): Return BFD_RELOC_NONE rather than BFD_RELOC_UNUSED. (ppc_elf_cons): Delete. (ppc_elf_parse_cons): New function. (ppc_elf_validate_fix): Don't check for BFD_RELOC_UNUSED. (md_assemble): Use BFD_RELOC_NONE rather than BFD_RELOC_UNUSED. * gas/config/tc-ppc.h (TC_PARSE_CONS_EXPRESSION): Define (ppc_elf_parse_cons): Declare. * gas/config/tc-sparc.c (sparc_cons_special_reloc): Delete static var. (sparc_cons): Return reloc specifier. (cons_fix_new_sparc): Add reloc specifier param. (sparc_cfi_emit_pcrel_expr): Use emit_expr_with_reloc. * gas/config/tc-sparc.h (TC_PARSE_CONS_RETURN_TYPE): Define. (TC_PARSE_CONS_RETURN_NONE): Define. (sparc_cons, cons_fix_new_sparc): Update prototype. * gas/config/tc-v850.c (hold_cons_reloc): Delete static var. (v850_reloc_prefix): Use BFD_RELOC_NONE rather than BFD_RELOC_UNUSED. (md_assemble): Likewise. (parse_cons_expression_v850): Return reloc. (cons_fix_new_v850): Add reloc parameter. * gas/config/tc-v850.h (parse_cons_expression_v850): Update proto. (cons_fix_new_v850): Likewise. * gas/config/tc-vax.c (vax_cons_special_reloc): Delete static var. (vax_cons): Return reloc. (vax_cons_fix_new): Add reloc parameter. * gas/config/tc-vax.h (vax_cons, vax_cons_fix_new): Update proto. * gas/config/tc-xstormy16.c (xstormy16_cons_fix_new): Add reloc param. * gas/config/tc-xstormy16.h (xstormy16_cons_fix_new): Update proto. * gas/dwarf2dbg.c (TC_PARSE_CONS_RETURN_NONE): Provide default. (emit_fixed_inc_line_addr): Adjust exmit_expr_fix calls. * gas/read.c (TC_PARSE_CONS_EXPRESSION): Return value. (do_parse_cons_expression): Adjust. (cons_worker): Pass return value from TC_PARSE_CONS_EXPRESSION to emit_expr_with_reloc. (emit_expr_with_reloc): New function handling reloc, mostly extracted from.. (emit_expr): ..here. (emit_expr_fix): Add reloc param. Adjust TC_CONS_FIX_NEW invocation. Handle reloc. (parse_mri_cons): Convert to ISO. * gas/read.h (TC_PARSE_CONS_RETURN_TYPE): Define. (TC_PARSE_CONS_RETURN_NONE): Define. (emit_expr_with_reloc): Declare. (emit_expr_fix): Update prototype. * gas/write.c (write_object_file): Update TC_CONS_FIX_NEW invocation.
2014-04-04Add support for Intel SGX instructionsIlya Tocar1-0/+2
Add Intel SGX instructions support to assembler and disassembler. gas/ * config/tc-i386.c (cpu_arch): Add .se1. * doc/c-i386.texi: Document .se1/se1. gas/testsuite/ * gas/i386/i386.exp: Run SE1 tests. * gas/i386/se1.d: New file. * gas/i386/se1.s: Ditto. * gas/i386/x86-64-se1.d: Ditto. * gas/i386/x86-64-se1.s: Ditto. opcodes/ * i386-dis.c (rm_table): Add encls, enclu. * i386-gen.c (cpu_flag_init): Add CPU_SE1_FLAGS, (cpu_flags): Add CpuSE1. * i386-opc.h (enum): Add CpuSE1. (i386_cpu_flags): Add cpuse1. * i386-opc.tbl: Add encls, enclu. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.
2014-04-02Add checks for overfar branchesDJ Delorie1-2/+12
Check 8 and 16 bit PCREL fixes for overflow, since we bypass the later overflow checks in write.c. Direct relocs are left alone, as gcc has been known to take advantage of the silent overflows when comparing addresses to constant ranges.
2014-04-02This fixes an internal error in GAS, triggered by the test case reported in ↵Nick Clifton1-2/+7
PR 16765. The problem was that gcc was generating assembler with missing unwind directives in it, so that a gas_assert was being triggered. The patch replaces the assert with an error message. * config/tc-arm.c (create_unwind_entry): Report an error if an attempt to recreate an unwind directive is encountered.
2014-03-29 * config/tc-avr.c: Add specified_mcu variable for selected mcu.Denis Chertykov1-3/+17
(enum options): add OPTION_RMW_ISA for -mrmw option. (struct option md_longopts): Add mrmw option. (md_show_usage): add -mrmw option description. (md_parse_option): Update isa details if -mrmw option specified. * doc/c-avr.texi: Add doc for new option -mrmw. * gas/avr/avr.exp: Run new tests. * gas/avr/rmw.d: Add test for additional ISA support. * gas/avr/rmw.s: Ditto.
2014-03-29 * gas/ChangeLog: RevertDenis Chertykov1-17/+3
* gas/config/tc-avr.c: Revert * gas/doc/c-avr.texi: Revert * gas/testsuite/ChangeLog: Revert * gas/testsuite/gas/avr/avr.exp: Revert * gas/testsuite/gas/avr/rmw.d: Revert * gas/testsuite/gas/avr/rmw.s: Revert This reverts commit d24e46e3e247e46eb2f5e7ebb5efd0f9fcc5fcdd.
2014-03-29 * config/tc-avr.c: Add specified_mcu variable for selected mcu.Denis Chertykov1-3/+17
(enum options): add OPTION_RMW_ISA for -mrmw option. (struct option md_longopts): Add mrmw option. (md_show_usage): add -mrmw option description. (md_parse_option): Update isa details if -mrmw option specified. * doc/c-avr.texi: Add doc for new option -mrmw. * gas/avr/avr.exp: Run new tests. * gas/avr/rmw.d: Add test for additional ISA support. * gas/avr/rmw.s: Ditto.
2014-03-27This fixes a compile time error triggered by -Werror=format-security becauseNick Clifton1-1/+1
a call to sprintf was being made with a non-constant formatting string. * config/tc-score.c (s3_parse_pce_inst): Add "%s" parameter to sprintf in order to avoid a compile time warning.
2014-03-26Add support for %hi8, %hi16 and %lo16 being used when relocation are necessary.Nick Clifton1-2/+28
* config/tc-rl78.c (rl78_op): Issue an error message if a 16-bit relocation is used on an 8-bit operand or vice versa. (tc_gen_reloc): Use the RL78_16U relocation for RL78_CODE. (md_apply_fix): Add support for RL78_HI8, RL78_HI16 and RL78_LO16.
2014-03-25This patch adds a new pseudo-op - .seh_code - to structured exception handlingNick Clifton2-1/+10
suite of ops. It changes the current section back to the code section of the current function. This is helpful because the code section may not be .text. * config/obj-coff-seh.c (obj_coff_seh_code): New function - switches the current segment back to the code segment recorded when seh_proc was last invoked. * config/obj-coff-seh.h (SEH_CMDS): Add seh_code.
2014-03-25Revert "Remove magic treatment of toc symbols for powerpc ELF"Alan Modra1-4/+19
It turns out that glibc's sysdeps/powerpc/powerpc64/start.S uses this feature. :-( * config/tc-ppc.c (ppc_is_toc_sym): Revert 2014-03-05. (md_assemble): Likewise. Warn.
2014-03-21Add support to the Xtensa target for creating trampolines for out-of-range ↵David Weatherford2-2/+561
branches. * tc-xtensa.c (xtensa_check_frag_count, xtensa_create_trampoline_frag) (xtensa_maybe_create_trampoline_frag, init_trampoline_frag) (find_trampoline_seg, search_trampolines, get_best_trampoline) (check_and_update_trampolines, add_jump_to_trampoline) (dump_trampolines): New function. (md_parse_option): Add cases for --[no-]trampolines options. (md_assemble, finish_vinsn, xtensa_end): Add call to xtensa_check_frag_count. (xg_assemble_vliw_tokens): Add call to xtensa_maybe_create_trampoline_frag. (xtensa_relax_frag): Relax fragments with RELAX_TRAMPOLINE state. (relax_frag_immed): Relax jump instructions that cannot reach its target. * tc-xtensa.h (xtensa_relax_statesE::RELAX_TRAMPOLINE): New relax state. * as.texinfo: Document --[no-]trampolines command-line options. * c-xtensa.texi: Document trampolines relaxation and command line options. * frags.c (get_frag_count, clear_frag_count): New function. (frag_alloc): Increment totalfrags counter. * frags.h (get_frag_count, clear_frag_count): New function. * all.exp: Add test for trampoline relaxation. * trampoline.d: Trampoline relaxation expected dump. * trampoline.s: Trampoline relaxation test source.
2014-03-20Add opcode relaxation for rl78-elfDJ Delorie4-23/+495
This patch adds initial in-gas opcode relaxation for the rl78 backend. Specifically, it checks for conditional branches that are too far and replaces them with inverted branches around longer fixed branches.
2014-03-20gas/Richard Sandiford2-18/+35
* config/tc-mips.h (DIFF_EXPR_OK, CFI_DIFF_EXPR_OK): Define. * config/tc-mips.c (md_pcrel_from): Remove error message. (md_apply_fix): Convert PC-relative BFD_RELOC_32s to BFD_RELOC_32_PCREL. Report a specific error message for unhandled PC-relative expressions. Handle BFD_RELOC_8. gas/testsuite/ * gas/all/gas.exp: Remove XFAIL of forward.d for MIPS. * gas/mips/pcrel-1.s, gas/mips/pcrel-1.d, gas/mips/pcrel-2.s, gas/mips/pcrel-2.d, gas/mips/pcrel-3.s, gas/mips/pcrel-3.l, gas/mips/pcrel-4.s, gas/mips/pcrel-4-32.d, gas/mips/pcrel-4-n32.d, gas/mips/pcrel-4-64.d: New tests. * gas/mips/mips.exp: Run them. * gas/mips/lui-2.l: Tweak error message for line 7. ld/testsuite/ * ld-elf/merge.d: Remove MIPS XFAIL.
2014-03-19This patch adds support for the hyperprivileged registers %hstick_offsetJose E. Marchesi1-0/+2
and %hstick_enable to the Sparc assembler. * config/tc-sparc.c (hpriv_reg_table): Added entries for %hstick_offset and %hstick_enable. * doc/c-sparc.texi (Sparc-Regs): Document the %hstick_offset and %hstick_enable hyperprivileged registers. * sparc-dis.c (v9_hpriv_reg_names): Names for %hstick_offset and %hstick_enable added. * gas/sparc/rdhpr.s: Test rd %hstick_offset and %hstick_enable. * gas/sparc/rdhpr.d: Likewise. * gas/sparc/wrhpr.s: Test wr %hstick_offset and %hstick_enable. * gas/sparc/wrhpr.d: Likewise.
2014-03-19Add support for ARM assembler produced by CodeCompositor Studio.Daniel Gutson2-2/+168
* config/tc-arm.c (codecomposer_syntax): New flag that states whether the CCS syntax compatibility mode is on or off. (asmfunc_states): New enum to represent the asmfunc directive state. (asmfunc_state): New variable holding the asmfunc directive state. (comment_chars): Rename to arm_comment_chars. (line_separator_chars): Rename to arm_line_separator_chars. (s_ccs_ref): New function that handles the .ref directive. (asmfunc_debug): New function. (s_ccs_asmfunc): New function that handles the .asmfunc directive. (s_ccs_endasmfunc): New function that handles the .endasmfunc directive. (s_ccs_def): New function that handles the .def directive. (tc_start_label_without_colon): New function. (md_pseudo_table): Added new CCS directives. (arm_ccs_mode): New function that handles the -mccs command line option. (arm_long_opts): Added new -mccs command line option. * config/tc-arm.h (LABELS_WITHOUT_COLONS): New macro. (TC_START_LABEL_WITHOUT_COLON): New macro. (tc_start_label_without_colon): Added extern function declaration. (tc_comment_chars): Define. (tc_line_separator_chars): Define. * app.c (do_scrub_begin): Use tc_line_separator_chars, if defined. * read.c (read_begin): Likewise. * doc/as.texinfo: Add documentation for the -mccs command line option. * doc/c-arm.texi: Likewise. * doc/internals.texi: Document tc_line_separator_chars. * NEWS: Mention the new feature. * gas/arm/ccs.s: New test case. * gas/arm/ccs.d: New expected disassembly.
2014-03-18Enable verbose error messages by default for AArch64 gas.Yufeng Zhang1-3/+5
gas/ * config/tc-aarch64.c (aarch64_opts): Add new option "mno-verbose-error". (verbose_error_p): Initialize to 1. * doc/c-aarch64.texi (AArch64 Options): Document -mverbose-error and -mno-verbose-error. gas/testsuite/ * gas/aarch64/illegal.d: Pass -mno-verbose-error. * gas/aarch64/verbose-error.s: Add more verbose message testcases. * gas/aarch64/verbose-error.l: Ditto.
2014-03-17Add support for parsing VFP register names in .cfi_offset directives.Nick Clifton1-6/+23
PR gas/16694 * config/tc-arm.c (tc_arm_regname_to_dw2regnum): Parse VFP registers as well. * gas/cfi/cfi-arm-1.s: Add checks of VFP registers. * gas/cfi/cfi-arm-1.d: Update expected output.
2014-03-13Add pe/x86_64 bigobj file format.Tristan Gingold1-1/+23
bfd/ * peicode.h (pe_ILF_object_p): Adjust, as the version number has been read. (pe_bfd_object_p): Also read version number to detect ILF. * pe-x86_64.c (COFF_WITH_PE_BIGOBJ): Define. (x86_64pe_bigobj_vec): Define * coffcode.h (bfd_coff_backend_data): Add _bfd_coff_max_nscns field. (bfd_coff_max_nscns): New macro. (coff_compute_section_file_positions): Use unsigned int for target_index. Compare with bfd_coff_max_nscns. (bfd_coff_std_swap_table, ticoff0_swap_table, ticoff1_swap_table): Set a value for _bfd_coff_max_nscns. (header_bigobj_classid): New constant. (coff_bigobj_swap_filehdr_in, coff_bigobj_swap_filehdr_out) (coff_bigobj_swap_sym_in, coff_bigobj_swap_sym_out) (coff_bigobj_swap_aux_in, coff_bigobj_swap_aux_out): New functions. (bigobj_swap_table): New table. * libcoff.h: Regenerate. * coff-sh.c (bfd_coff_small_swap_table): Likewise. * coff-alpha.c (alpha_ecoff_backend_data): Add value for _bfd_coff_max_nscns. * coff-mips.c (mips_ecoff_backend_data): Likewise. * coff-rs6000.c (bfd_xcoff_backend_data) (bfd_pmac_xcoff_backend_data): Likewise. * coff64-rs6000.c (bfd_xcoff_backend_data) (bfd_xcoff_aix5_backend_data): Likewise. * targets.c (x86_64pe_bigobj_vec): Declare. * configure.in (x86_64pe_bigobj_vec): New vector. * configure: Regenerate. * config.bfd: Add bigobj object format for Windows targets. gas/ * config/tc-i386.c (use_big_obj): Declare. (OPTION_MBIG_OBJ): Define. (md_longopts): Add -mbig-obj option. (md_parse_option): Handle it. (md_show_usage): Display help for this option. (i386_target_format): Use bigobj for x86-64 if -mbig-obj. * doc/c-i386.texi: Document the option. gas/testsuite/ * gas/pe/big-obj.d, gas/pe/big-obj.s: Add test. * gas/pe/pe.exp: Add test. include/coff/ * pe.h (struct external_ANON_OBJECT_HEADER_BIGOBJ): Declare. (FILHSZ_BIGOBJ): Define. (struct external_SYMBOL_EX): Declare. (SYMENT_BIGOBJ, SYMESZ_BIGOBJ): Define. (union external_AUX_SYMBOL_EX): Declare. (AUXENT_BIGOBJ, AUXESZ_BIGOBJ): Define. * internal.h (struct internal_filehdr): Change type of f_nscns.
2014-03-12The value of a bignum expression is held in a single global array. This meansNick Clifton1-12/+49
that if multiple bignum values are encountered only the most recent is valid. If such expressions are cached, eg to be emitted into a literal pool later on in the assembly, then only one expression - the last - will be correct. This patch fixes the problem for the AArch64 target by caching each bignum value locally. PR gas/16688 * config/tc-aarch64.c (literal_expression): New structure. (literal_pool): Replace exp array with literal_expression array. (add_to_lit_pool): When adding a bignum cache the big value. (s_ltorg): When emitting a bignum initialise the global bignum array from the cached value. * gas/aarch64/litpool.s: New test case. * gas/aarch64/litpool.d: Expected disassembly.
2014-03-06 * gas/tc-avr.c: Add new devicesDenis Chertykov1-1/+45
avr25: ata5272, attiny828 avr35: ata5505, attiny1634 avr4: atmega8a, ata6285, ata6286, atmega48pa avr5: at90pwm161, ata5790, ata5795, atmega164pa, atmega165pa, atmega168pa, atmega32a, atmega64rfr2, atmega644rfr2, atmega64a, atmega16hva2 avr51: atmega128a, atmega1284 avrxmega2: atxmega16a4u, atxmega16c4, atxmega32a4u, atxmega32c4, atxmega32e5, atxmega16e5, atxmega8e5 avrxmega4: atxmega64a3u, atxmega64a4u, atxmega64b1, atxmega64b3, atxmega64c3, atxmega64d4 avrxmega6: atxmega128a3u, atxmega128b3, atxmega128c3, atxmega128d4, atxmega192a3u, atxmega192c3, atxmega256a3u, atxmega256c3, atxmega384c3, atxmega384d3 avrxmega7: atxmega128a4u * doc/c-avr.texi: Ditto.
2014-03-05Update copyright yearsAlan Modra231-376/+231
2014-03-05Support R_PPC64_ADDR64_LOCALAlan Modra1-0/+2
This adds support for "func@localentry", an expression that returns the ELFv2 local entry point address of function "func". I've excluded dynamic relocation support because that obviously would require glibc changes. include/elf/ * ppc64.h (R_PPC64_REL24_NOTOC, R_PPC64_ADDR64_LOCAL): Define. bfd/ * elf64-ppc.c (ppc64_elf_howto_raw): Add R_PPC64_ADDR64_LOCAL entry. (ppc64_elf_reloc_type_lookup): Support R_PPC64_ADDR64_LOCAL. (ppc64_elf_check_relocs): Likewise. (ppc64_elf_relocate_section): Likewise. * Add BFD_RELOC_PPC64_ADDR64_LOCAL. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. gas/ * config/tc-ppc.c (ppc_elf_suffix): Support @localentry. (md_apply_fix): Support R_PPC64_ADDR64_LOCAL. ld/testsuite/ * ld-powerpc/elfv2-2a.s, ld-powerpc/elfv2-2b.s: New files. * ld-powerpc/elfv2-2exe.d, ld-powerpc/elfv2-2so.d: New files. * ld-powerpc/powerpc.exp: Run new test. elfcpp/ * powerpc.h (R_PPC64_REL24_NOTOC, R_PPC64_ADDR64_LOCAL): Define. gold/ * powerpc.cc (Target_powerpc::Scan::local, global): Support R_PPC64_ADDR64_LOCAL. (Target_powerpc::Relocate::relocate): Likewise.
2014-03-05Support more relocs on 16-bit insn fieldsAlan Modra1-116/+109
This patch allows gas to assemble a testcase like li 3,ext_sym which oddly was not accepted while the following is OK: li 3,ext_sym@l * config/tc-ppc.c (md_assemble): Move code adjusting reloc types later. Merge absolute and relative branch reloc selection. Generate 16-bit relocs for most 16-bit insn fields given a non-constant expression.
2014-03-05Remove magic treatment of toc symbols for powerpc ELFAlan Modra1-27/+10
The XCOFF assembler does some wierd things with instructions like `lwz 9,sym(30'. See the comment in md_apply_fix. From an ELF perspective, it's weird even to magically select a TOC16 reloc when a symbol is in the TOC/GOT. ELF assemblers generally use modifiers like @toc to select relocs, so remove this "feature" for ELF. I believe this was to support gcc -m32 -mcall-aixdesc but that combination of gcc options has been broken for a long time. * config/tc-ppc.c (ppc_is_toc_sym): Remove OBJ_ELF support. (md_assemble): Don't call ppc_is_toc_sym for ELF.
2014-03-04bfd/Richard Sandiford1-1/+1
2014-02-04 Heiher <r@hev.cc> * elfxx-mips.c (mips_set_isa_flags): Use E_MIPS_ARCH_64R2 for Loongson-3A. (mips_mach_extensions): Make bfd_mach_mips_loongson_3a an extension of bfd_mach_mipsisa64r2. opcodes/ 2014-02-04 Heiher <r@hev.cc> * mips-dis.c (mips_arch_choices): Usee ISA_MIPS64R2 for Loongson-3A. gas/ 2014-02-04 Heiher <r@hev.cc> * config/tc-mips.c (mips_cpu_info_table): Use ISA_MIPS64R2 for Loongson-3A.
2014-03-03This patch enhances the MSP430 port of GAS so that, if requested, it willNick Clifton2-572/+233
generate warning messages about an instruction that changes the interrupt state not being followed by a NOP instruction. * config/msp430/msp430.c: Replace known mcu array with known msp430 ISA mcu name array. Accept any name for -mmcu option. Add -mz option to warn about missing NOP following an interrupt status change. (check_for_nop): New. (msp430_operands): Emit a warning, if requested, when an interrupt changing instruction is not followed by a NOP. * doc/c-msp430.c: Document -mz option. * gas/msp430/bad.d: Add -mz option. * gas/msp430/bad.s: Add more cases where warnings should be generated. * gas/msp430/bad.l: Add expected warning messages.
2014-03-03More copyright fixesAlan Modra2-2/+2
* config/obj-fdpicelf.c: Correct copyright date. * config/obj-fdpicelf.h: Likewise.
2014-03-03Fix various copyright issuesAlan Modra7-8/+7
binutils/ * README: Add "Copyright Notices" paragraph. gas/ * config/bfin-lex-wrapper.c: Correct copyright date. * config/tc-frv.c: Correct copyright punctuation. * config/tc-ip2k.c: Likewise. * config/tc-iq2000.c: Likewise. * config/tc-mep.c: Likewise. * config/tc-tic4x.c: Likewise. * config/tc-tic4x.h: Likewise. ld/testsuite/ * ld-scripts/phdrs2.exp: Correct copyright punctuation. * ld-v850/v850.exp: Correct copyright typo. opcodes/ * i386-gen.c (process_copyright): Emit copyright notice on one line. gold/ * dwp.cc (print_version): Update copyright year to current.
2014-03-01 * config/tc-avr.c: Remove atxmega16x1.Denis Chertykov1-1/+0
2014-02-21Add support for CPUID PREFETCHWT1Ilya Tocar1-0/+2
Latest AVX512 spec http://download-software.intel.com/sites/default/files/managed/50/1a/319433-018.pdf Has CPUID PREFETCHWT1 for prefetchwt1 instruction, which we list as AVX512PF. This patch introduces CPUID PREFETCHWT1. gas/ * config/tc-i386.c (cpu_arch): Add .prefetchwt1. * doc/c-i386.texi: Document .prefetchwt1/prefetchwt1. opcodes/ * i386-gen.c (cpu_flag_init): Add CPU_PREFETCHWT1_FLAGS/ (cpu_flags): Add CpuPREFETCHWT1. * i386-init.h: Regenerate. * i386-opc.h (CpuPREFETCHWT1): New. (i386_cpu_flags): Add cpuprefetchwt1. * i386-opc.tbl: Cahnge CPU of prefetchwt1 from CpuAVX512PF to CpuPREFETCHWT1. * i386-tbl.h: Regenerate. gas/testsuite * gas/i386/avx512pf-intel.d: Remove prefetchwt1. * gas/i386/avx512pf.s: Ditto. * gas/i386/avx512pf.d: Ditto. * gas/i386/x86-64-avx512pf-intel.d: Ditto. * gas/i386/x86-64-avx512pf.s: Ditto. * gas/i386/x86-64-avx512pf.d: Ditto. * gas/i386/prefetchwt1-intel.d: New file. * gas/i386/prefetchwt1.s: Ditto. * gas/i386/prefetchwt1.d: Ditto. * gas/i386/x86-64-prefetchwt1-intel.d: Ditto. * gas/i386/x86-64-prefetchwt1.s: Ditto. * gas/i386/x86-64-prefetchwt1.d: Ditto.
2014-02-12Add clflushopt, xsaves, xsavec, xrstorsIlya Tocar1-0/+6
gas/ 2014-02-12 Ilya Tocar <ilya.tocar@intel.com> * config/tc-i386.c (cpu_arch): Add .clflushopt, .xsavec, .xsaves. * doc/c-i386.texi: Document .xsavec/xsavec/.xsaves/xsaves/ clflushopt/.clfushopt. gas/testsuite/ 2014-02-12 Ilya Tocar <ilya.tocar@intel.com> * gas/i386/clflushopt-intel.d: New. * gas/i386/clflushopt.d: Ditto. * gas/i386/clflushopt.s: Ditto. * gas/i386/i386.exp: Run new tests. * gas/i386/x86-64-clflushopt-intel.d: New. * gas/i386/x86-64-clflushopt.d: Ditto. * gas/i386/x86-64-clflushopt.s: Ditto. * gas/i386/x86-64-xsavec-intel.d: Ditto. * gas/i386/x86-64-xsavec.d: Ditto. * gas/i386/x86-64-xsavec.s: Ditto. * gas/i386/x86-64-xsaves-intel.d: Ditto. * gas/i386/x86-64-xsaves.d: Ditto. * gas/i386/x86-64-xsaves.s: Ditto. * gas/i386/xsavec-intel.d: Ditto. * gas/i386/xsavec.d: Ditto. * gas/i386/xsavec.s: Ditto. * gas/i386/xsaves-intel.d: Ditto. * gas/i386/xsaves.d: Ditto. * gas/i386/xsaves.s: Ditto. opcodes/ 2014-02-12 Ilya Tocar <ilya.tocar@intel.com> * i386-dis.c (MOD enum): Add MOD_0FC7_REG_3, MOD_0FC7_REG_4, MOD_0FC7_REG_5. (PREFIX enum): Add PREFIX_0FAE_REG_7. (reg_table): Add MOD_0FC7_REG_3, MOD_0FC7_REG_4 MOD_0FC7_REG_5. (prefix_table): Add clflusopt. (mod_table): Add xrstors, xsavec, xsaves. * i386-gen.c (cpu_flag_init): Add CPU_CLFLUSHOPT_FLAGS, CPU_XSAVES_FLAGS, CPU_XSAVEC_FLAGS. (cpu_flags): Add CpuClflushOpt, CpuXSAVES, CpuXSAVEC. * i386-init.h: Regenerate. * i386-opc.tbl: Add clflushopt, xrstors, xrstors64, xsaves, xsaves64, xsavec, xsavec64. * i386-tbl.h: Regenerate.
generated by cgit v1.1 at 2024-07-14 02:36:07 +0000