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AgeCommit message (Expand)AuthorFilesLines
2023-11-07aarch64: Add arch support for LSE128 extensionVictor Do Nascimento1-0/+1
2023-11-07aarch64: Add LSE128 instruction operand supportVictor Do Nascimento1-0/+5
2023-11-07aarch64: Add THE system register supportVictor Do Nascimento1-0/+1
2023-11-07RISC-V: Add support for XCValu extension in CV32E40PMary Bennett1-0/+14
2023-11-07RISC-V: Add support for XCVmac extension in CV32E40PMary Bennett1-0/+28
2023-11-03RISC-V: reduce redundancy in load/store macro insn handlingJan Beulich1-85/+6
2023-11-03RISC-V: make FLQ/FSQ macro-insns workJan Beulich1-0/+10
2023-11-02aarch64: Add support for GCSB DSYNC instruction.Srinath Parvathaneni1-63/+22
2023-11-02aarch64: Add support for GCS extension.srinath1-0/+1
2023-11-02aarch64: Add support for Check Feature Status Extension.Srinath Parvathaneni1-9/+20
2023-11-02aarch64: Add support for Armv8.9-A and Armv9.4-A Architectures.srinath1-0/+2
2023-10-31Support Intel USER_MSRHu, Lin11-4/+36
2023-10-28gas: tc-bpf.c: fix formatting of commentJose E. Marchesi1-4/+5
2023-10-27RISC-V: Clarify the behaviors of SET/ADD/SUB relocations.Nelson Chu1-0/+1
2023-10-24as: fixed internal error when immediate value of relocation overflow.Lulu Cai1-1/+1
2023-10-23x86: fold a few of the "alternative" NOP patternsJan Beulich1-6/+3
2023-10-23x86: add a few more NOP patternsJan Beulich1-27/+12
2023-10-23x86: don't record full i386_cpu_flags in struct i386_tc_frag_dataJan Beulich2-4/+4
2023-10-23x86: i686 != PentiumProJan Beulich2-3/+6
2023-10-23x86: respect ".arch nonop" when selecting which NOPs to emitJan Beulich2-27/+11
2023-10-23x86: don't use operand size override with NOP in 16-bit codeJan Beulich1-1/+2
2023-10-23x86: don't use 32-bit LEA as NOP surrogate in 64-bit codeJan Beulich1-10/+21
2023-10-23x86: i386_generate_nops() may not derive decisions from global variablesJan Beulich1-2/+2
2023-10-23x86: record flag_code in tc_frag_dataJan Beulich2-14/+16
2023-10-20bfd: microblaze: Add 32_NONE reloc typeNeal Frager1-0/+3
2023-10-16RISC-V: Add "lp64e" ABI supportTsukasa OI1-1/+3
2023-10-15opcodes: microblaze: Add new bit-field instructionsNeal Frager1-1/+82
2023-10-10LoongArch/GAS: Add support for branch relaxationmengqinggang1-41/+195
2023-10-08as: add option for generate R_LARCH_32/64_PCREL.cailulu2-6/+36
2023-10-07Revert "opcodes: microblaze: Add new bit-field instructions"Michael J. Eager1-76/+1
2023-10-06opcodes: microblaze: Add new bit-field instructionsNeal Frager1-1/+76
2023-10-05aarch64: Enable Cortex-X4 CPUSaurabh Jha1-0/+2
2023-10-02Fix memory leak in RiscV assembler.Nick Clifton1-0/+1
2023-09-29tc-microblaze.c - int compare for X_add_number.Neal Frager1-1/+1
2023-09-28Added support in gas for mlittle-endian and mbig-endian flags as options.Michael J. Eager1-0/+5
2023-09-27x86: prefer VEX encodings over EVEX ones when possibleJan Beulich1-0/+31
2023-09-27x86: drop cpu_arch_tune_flagsJan Beulich1-22/+4
2023-09-27x86: correct cpu_arch_isa_flags maintenanceJan Beulich1-47/+35
2023-09-27x86: fold FMA VEX and EVEX templatesJan Beulich1-0/+4
2023-09-27x86: fold VAES/VPCLMULQDQ VEX and EVEX templatesJan Beulich1-4/+12
2023-09-27x86: fold certain VEX and EVEX templatesJan Beulich2-5/+102
2023-09-27x86: tighten .insn SAE and broadcast checkingJan Beulich1-2/+3
2023-09-27x86-64: REX.W overrides DATA_PREFIXJan Beulich1-2/+5
2023-09-27x86-64: fix suffix-less PUSH of symbol addressJan Beulich1-1/+6
2023-09-26aarch64: Restructure feature flag handlingRichard Sandiford1-300/+162
2023-09-25Revert "arc: Update ARC's Gnu Assembler backend with ARCv3 ISA."Claudiu Zissulescu2-531/+238
2023-09-25arc: Update ARC's Gnu Assembler backend with ARCv3 ISA.Claudiu Zissulescu2-238/+531
2023-09-20elf-attrs.c memory allocation failAlan Modra9-81/+137
2023-09-18Fix: Use of uninitialized memoryJacob Navia1-1/+1
2023-09-15LoongArch: Enable gas sort relocsJinyang He1-0/+1
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