riscv-gnu-toolchain/gdb.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2022-10-28	RISC-V/gas: fix build with certain gcc versions	Jan Beulich	1	-7/+7
2022-10-28	RISC-V: Fix build failure for -Werror=maybe-uninitialized	Tsukasa OI	1	-1/+1
2022-10-28	RISC-V: Output mapping symbols with ISA string.	Nelson Chu	1	-35/+127
2022-10-04	RISC-V/gas: allow generating up to 176-bit instructions with .insn	Jan Beulich	1	-6/+26
2022-10-04	RISC-V/gas: don't open-code insn_length()	Jan Beulich	1	-1/+1
2022-10-04	RISC-V/gas: drop stray call to install_insn()	Jan Beulich	1	-1/+0
2022-10-04	RISC-V/gas: drop riscv_subsets static variable	Jan Beulich	1	-18/+14
2022-10-04	RISC-V: don't cast expressions' X_add_number to long in diagnostics	Jan Beulich	1	-4/+4
2022-10-03	RISC-V: Assign DWARF numbers to vector registers	Tsukasa OI	1	-0/+3
2022-09-30	RISC-V: Eliminate long-casts of X_add_number in diagnostics	Christoph Müllner	1	-8/+8
2022-09-30	RISC-V: fix build after "Add support for arbitrary immediate encoding formats"	Jan Beulich	1	-4/+4
2022-09-22	RISC-V: Add support for literal instruction arguments	Christoph Müllner	1	-0/+10
2022-09-22	RISC-V: Add support for arbitrary immediate encoding formats	Christoph Müllner	1	-0/+74
2022-09-22	RISC-V: Add macro-only operands to validate_riscv_insn	Tsukasa OI	1	-0/+3
2022-09-21	RISC-V: Fix riscv_set_tso declaration	Tsukasa OI	1	-1/+1
2022-09-21	RISC-V: Set EF_RISCV_TSO also on .option arch	Tsukasa OI	1	-0/+3
2022-09-21	RISC-V: Implement Ztso extension	Shihua	1	-0/+11
2022-09-21	RISC-V: Always generate R_RISCV_CALL_PLT reloc for call in assembler.	Nelson Chu	1	-6/+2
2022-09-15	bfd, binutils, gas: Remove/mark unused variables	Tsukasa OI	1	-3/+0
2022-09-09	RISC-V: Fix vector CSR requirements	Tsukasa OI	1	-1/+1
2022-08-04	Don't use BFD_VMA_FMT in binutils	Alan Modra	1	-5/+5
2022-07-29	RISC-V: Add `OP_V' to .insn named opcodes	Tsukasa OI	1	-1/+1
2022-07-09	gas: target string hash tables	Alan Modra	1	-1/+1
2022-07-09	gas: rename md_end to md_finish	Alan Modra	1	-1/+1
2022-06-28	RISC-V: Add 'Sstc' extension and its CSRs	Tsukasa OI	1	-0/+14
2022-06-28	RISC-V: Add 'Sscofpmf' extension with its CSRs	Tsukasa OI	1	-0/+8
2022-06-28	RISC-V: Add 'Smstateen' extension and its CSRs	Tsukasa OI	1	-0/+14
2022-06-28	RISC-V: Add new CSR feature gate handling (RV32,H)	Tsukasa OI	1	-4/+7
2022-06-22	RISC-V: Use single h extension to control hypervisor CSRs and instructions.	Nelson Chu	1	-1/+9
2022-06-22	RISC-V: Fix inconsistent error message (range)	Tsukasa OI	1	-1/+1
2022-05-17	RISC-V: Added half-precision floating-point v1.0 instructions.	Nelson Chu	1	-1/+11
2022-04-08	gas: Port "copy st_size only if unset" to aarch64 and riscv	Fangrui Song	1	-11/+10
2022-03-18	RISC-V: Prefetch hint instructions and operand set	Tsukasa OI	1	-0/+18
2022-03-04	RISC-V: make .insn actually work for 64-bit insns	Jan Beulich	1	-1/+1
2022-02-23	RISC-V: PR28733, add missing extension info to 'unrecognized opcode' error	Patrick O'Neill	1	-14/+47
2022-02-23	RISC-V: PR28733, add missing extension info to 'invalid CSR' error	Patrick O'Neill	1	-15/+21
2022-01-22	RISC-V: create new frag after alignment.	Lifang Xia	1	-0/+6
2022-01-07	RISC-V: update docs for -mpriv-spec/--with-priv-spec for 1.12	Philipp Tomsich	1	-1/+1
2022-01-07	RISC-V: Updated the default ISA spec to 20191213.	Nelson Chu	1	-1/+1
2022-01-02	Update year range in copyright notice of binutils files	Alan Modra	1	-1/+1
2021-12-24	RISC-V: Hypervisor ext: support Privileged Spec 1.12	Vineet Gupta	1	-5/+5
2021-11-22	RISC-V: Replace .option rvc/norvc with .option arch, +c/-c.	Nelson Chu	1	-0/+4
2021-11-19	RISC-V: Support new .option arch directive.	Nelson Chu	1	-17/+40
2021-11-19	RISC-V: Support STO_RISCV_VARIANT_CC and DT_RISCV_VARIANT_CC.	Nelson Chu	1	-0/+55
2021-11-18	RISC-V: Add instructions and operand set for z[fdq]inx	jiawei	1	-1/+3
2021-11-17	RISC-V: Support rvv extension with released version 1.0.	Nelson Chu	1	-11/+409
2021-11-16	RISC-V: Scalar crypto instructions and operand set.	jiawei	1	-0/+29
2021-11-11	RISC-V: Dump objects according to the elf architecture attribute.	Nelson Chu	1	-87/+23
2021-11-04	RISC-V: Clarify the behavior of .option rvc or norvc.	Nelson Chu	1	-21/+18
2021-10-27	RISC-V: Tidy riscv assembler and disassembler.	Nelson Chu	1	-288/+304