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path: root/gas/config/tc-i386.c
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2023-12-28x86-64: Add R_X86_64_CODE_4_GOTTPOFF/R_X86_64_CODE_4_GOTPC32_TLSDESCH.J. Lu1-0/+20
2023-12-28x86-64: Add R_X86_64_CODE_4_GOTPCRELXH.J. Lu1-3/+15
2023-12-28Support APX NDD optimized encoding.Hu, Lin11-0/+104
2023-12-28Support APX pushp/poppCui, Lili1-1/+2
2023-12-28Support APX Push2/Pop2Mo, Zewei1-0/+44
2023-12-28Support APX NDDkonglin11-17/+45
2023-12-28Support APX GPR32 with extend evex prefixCui, Lili1-12/+73
2023-12-28Support APX GPR32 with rex2 prefixCui, Lili1-20/+158
2023-12-22x86-64: refuse "high" 8-bit regs with .insn and VEX/XOP/EVEX encodingsJan Beulich1-0/+10
2023-12-22x86: properly respect rex/{rex}Jan Beulich1-62/+71
2023-12-19x86: Remove the restriction for size of the mask register in AVX10Haochen Jiang1-4/+5
2023-12-15x86: last-insn recording should be per-subsectionJan Beulich1-0/+33
2023-12-15x86: don't needlessly override .bssJan Beulich1-8/+5
2023-12-15x86: fold assembly dialect attributesJan Beulich1-3/+4
2023-12-15x86: Intel syntax implies Intel mnemonicsJan Beulich1-4/+5
2023-12-13Clean base_reg and assign correct values to regs for input_output_operand (%dx).Cui, Lili1-0/+2
2023-12-01x86: adjust NOP generation after potential non-insnJan Beulich1-0/+8
2023-12-01x86: i386_cons_align() badly affects diagnosticsJan Beulich1-12/+1
2023-12-01x86: suppress optimization after potential non-insnJan Beulich1-0/+5
2023-12-01x86: last-insn recording should be per-sectionJan Beulich1-58/+47
2023-11-24x86: shrink opcode sets tableJan Beulich1-96/+96
2023-11-24x86: also prefer VEX encoding over EVEX one for VCVTNEPS2BF16 when possibleJan Beulich1-6/+14
2023-11-17x86: improve a few diagnosticsJan Beulich1-9/+18
2023-11-17x86: don't allow pseudo-prefixes to be overridden by legacy suffixesJan Beulich1-3/+19
2023-11-17x86: CPU-qualify {disp16} / {disp32}Jan Beulich1-1/+10
2023-11-17x86: use IS_ELFJan Beulich1-3/+2
2023-11-17x86: conditionally hide object-format-specific functionsJan Beulich1-23/+23
2023-11-17x86: fold conditionals in check_long_reg()Jan Beulich1-13/+5
2023-11-17x86-64: extend expected-size check in check_qword_reg()Jan Beulich1-1/+2
2023-11-09x86: rework UWRMSR operand swappingJan Beulich1-15/+8
2023-11-09x86: do away with is_evex_encoding()Jan Beulich1-30/+15
2023-11-09x86: split insn templates' CPU fieldJan Beulich1-92/+81
2023-11-09x86: Cpu64 handling improvementsJan Beulich1-5/+13
2023-10-31Support Intel USER_MSRHu, Lin11-4/+36
2023-10-23x86: fold a few of the "alternative" NOP patternsJan Beulich1-6/+3
2023-10-23x86: add a few more NOP patternsJan Beulich1-27/+12
2023-10-23x86: don't record full i386_cpu_flags in struct i386_tc_frag_dataJan Beulich1-2/+2
2023-10-23x86: i686 != PentiumProJan Beulich1-3/+5
2023-10-23x86: respect ".arch nonop" when selecting which NOPs to emitJan Beulich1-27/+8
2023-10-23x86: don't use operand size override with NOP in 16-bit codeJan Beulich1-1/+2
2023-10-23x86: don't use 32-bit LEA as NOP surrogate in 64-bit codeJan Beulich1-10/+21
2023-10-23x86: i386_generate_nops() may not derive decisions from global variablesJan Beulich1-2/+2
2023-10-23x86: record flag_code in tc_frag_dataJan Beulich1-13/+5
2023-09-27x86: prefer VEX encodings over EVEX ones when possibleJan Beulich1-0/+31
2023-09-27x86: drop cpu_arch_tune_flagsJan Beulich1-22/+4
2023-09-27x86: correct cpu_arch_isa_flags maintenanceJan Beulich1-47/+35
2023-09-27x86: fold FMA VEX and EVEX templatesJan Beulich1-0/+4
2023-09-27x86: fold VAES/VPCLMULQDQ VEX and EVEX templatesJan Beulich1-4/+12
2023-09-27x86: fold certain VEX and EVEX templatesJan Beulich1-5/+97
2023-09-27x86: tighten .insn SAE and broadcast checkingJan Beulich1-2/+3
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