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path: root/gas/config/tc-i386.c
AgeCommit message (Expand)AuthorFilesLines
2020-01-21x86: replace adhoc ambiguous operand checking for CRC32Jan Beulich1-44/+22
2020-01-21x86: improve handling of insns with ambiguous operand sizesJan Beulich1-33/+37
2020-01-20x86-64: Fix TLSDESC relaxation for x32H.J. Lu1-2/+5
2020-01-17x86: Add {vex} pseudo prefixH.J. Lu1-3/+3
2020-01-16x86: drop found_cpu_match local variableJan Beulich1-8/+2
2020-01-09x86: refine when to trigger optimizationsJan Beulich1-10/+9
2020-01-09x86-64: assert sane internal state for REX conversionsJan Beulich1-1/+3
2020-01-09x86: consistently convert to byte registers for TEST w/ imm optimizationJan Beulich1-11/+10
2020-01-01Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2019-12-27x86: adjust ignored prefix warning for branchesJan Beulich1-6/+6
2019-12-27x86-64: correct / adjust prefix emissionJan Beulich1-12/+11
2019-12-27x86-64: fix Intel64 handling of branch with data16 prefixJan Beulich1-5/+39
2019-12-27x86: consolidate Disp<NN> handling a littleJan Beulich1-45/+49
2019-12-12i386: Also check R12-R15 registers when optimizing testq to testbH.J. Lu1-3/+2
2019-12-12i386: Add -mbranches-within-32B-boundariesH.J. Lu1-0/+13
2019-12-12i386: Align branches within a fixed boundaryH.J. Lu1-3/+1043
2019-12-11x86: further refine SSE check (SSE4a, SHA, GFNI)Jan Beulich1-0/+3
2019-12-04x86: consolidate tracking of MMX register useJan Beulich1-9/+3
2019-12-04x86: make sure all PUSH/POP honor DefaultSizeJan Beulich1-8/+14
2019-12-04x86: drop some stray/bogus DefaultSizeJan Beulich1-1/+3
2019-11-14x86: fold individual Jump* attributes into a single Jump oneJan Beulich1-24/+22
2019-11-14x86: make JumpAbsolute an insn attributeJan Beulich1-14/+23
2019-11-14x86: make AnySize an insn attributeJan Beulich1-1/+1
2019-11-12x86: fold EsSeg into IsStringJan Beulich1-34/+23
2019-11-12x86: eliminate ImmExt abuseJan Beulich1-48/+2
2019-11-12x86: introduce operand type "instance"Jan Beulich1-29/+44
2019-11-08i386: Only check suffix in instruction mnemonicH.J. Lu1-42/+33
2019-11-08x86: convert RegMask and RegBND from bitfield to enumeratorJan Beulich1-6/+7
2019-11-08x86: convert RegSIMD and RegMMX from bitfield to enumeratorJan Beulich1-43/+45
2019-11-08x86: convert Control/Debug/Test from bitfield to enumeratorJan Beulich1-14/+14
2019-11-08x86: convert SReg from bitfield to enumeratorJan Beulich1-7/+8
2019-11-08x86: introduce operand type "class"Jan Beulich1-41/+59
2019-11-07x86: support further AMD Zen2 instructionsJan Beulich1-0/+4
2019-11-04x86: re-arrange process_operands()Jan Beulich1-57/+49
2019-10-30x86: drop stray WJan Beulich1-5/+6
2019-10-07x86/Intel: correct MOVSD and CMPSD handlingJan Beulich1-2/+2
2019-09-21tc-i386.c gcc10 warning fixAlan Modra1-2/+2
2019-09-20x86-64: fix handling of PUSH/POP of segment registerJan Beulich1-2/+2
2019-09-19bfd_section_* macrosAlan Modra1-5/+4
2019-07-17x86: replace "anymem" checks where possibleJan Beulich1-8/+14
2019-07-16x86: make RegMem an opcode modifierJan Beulich1-12/+18
2019-07-16x86: fold SReg{2,3}Jan Beulich1-20/+20
2019-07-04x86: correct "-Q" option handlingJan Beulich1-1/+3
2019-07-01x86: drop Vec_Imm4Jan Beulich1-25/+11
2019-07-01x86: limit ImmExt abuseJan Beulich1-13/+10
2019-07-01x86: optimize AND/OR with twice the same registerJan Beulich1-0/+23
2019-07-01x86-64: optimize certain commutative VEX-encoded insnsJan Beulich1-0/+43
2019-07-01x86: StaticRounding implies SAEJan Beulich1-6/+3
2019-07-01x86: optimize EVEX packed integer logical instructionsJan Beulich1-11/+19
2019-07-01x86: use encoding_length() also elsewhereJan Beulich1-32/+4
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