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2021-11-18Add multibyte character warning option to the assembler.Nick Clifton1-0/+22
* as.c (parse_args): Add support for --multibyte-handling. * as.h (multibyte_handling): Declare. * app.c (scan_for_multibyte_characters): New function. (do_scrub_chars): Call the new function if multibyte warning is enabled. * input-scrub,c (input_scrub_next_buffer): Call the multibyte scanning function if multibyte warnings are enabled. * symbols.c (struct symbol_flags): Add multibyte_warned bit. (symbol_init): Call the multibyte scanning function if multibyte symbol warnings are enabled. (S_SET_SEGMENT): Likewise. * NEWS: Mention the new feature. * doc/as.texi: Document the new feature. * testsuite/gas/all/multibyte.s: New test source file. * testsuite/gas/all/multibyte1.d: New test driver file. * testsuite/gas/all/multibyte1.l: New test expected output. * testsuite/gas/all/multibyte2.d: New test driver file. * testsuite/gas/all/multibyte2.l: New test expected output. * testsuite/gas/all/gas.exp: Run the new tests.
2021-11-15Deal with full path in .file 0 directiveEric Botcazou1-0/+13
Gas uses the directory part, if present, of the .file 0 directive to set entry 0 of the directory table in DWARF 5, which represents the "current directory". Now Gas also uses the file part of the same directive to set entry 0 of the file table, which represents the "current compilation file". But the latter need not be located in the former so GCC will use a full path in the file part when it is passed a full path: gcc -c /full/path/test.c -save-temps yields: .file 0 "/current/directory" "/full/path/test.c" in the assembly file and: The Directory Table (offset 0x22, lines 2, columns 1): Entry Name 0 (indirect line string, offset: 0x25): /current/directory 1 (indirect line string, offset: 0x38): /full/path The File Name Table (offset 0x30, lines 2, columns 2): Entry Dir Name 0 0 (indirect line string, offset: 0x43): /full/path/test.c in the object file. Note the full path and the questionable Dir value in the 0 entry of the file table.
2021-10-28ARM assembler: Allow up to 32 single precision registers in the VPUSH and ↵Markus Klein1-0/+9
VPOP instructions. PR 28436 * config/tc-arm.c (do_vfp_nsyn_push_pop_check): New function. (do_vfp_nsyn_pop): Use the new function. (do_vfp_nsyn_push): Use the new function. * testsuite/gas/arm/v8_1m-mve.s: Add new instructions. * testsuite/gas/arm/v8_1m-mve.d: Updated expected disassembly.
2021-09-27configure: regenerate in all projects that use libtool.m4Nick Alcock1-0/+4
(including sim/, which has no changelog.) bfd/ChangeLog 2021-09-27 Nick Alcock <nick.alcock@oracle.com> * configure: Regenerate. binutils/ChangeLog 2021-09-27 Nick Alcock <nick.alcock@oracle.com> * configure: Regenerate. gas/ChangeLog 2021-09-27 Nick Alcock <nick.alcock@oracle.com> * configure: Regenerate. gprof/ChangeLog 2021-09-27 Nick Alcock <nick.alcock@oracle.com> * configure: Regenerate. ld/ChangeLog 2021-09-27 Nick Alcock <nick.alcock@oracle.com> * configure: Regenerate. libctf/ChangeLog 2021-09-27 Nick Alcock <nick.alcock@oracle.com> * configure: Regenerate. * Makefile.in: Regenerate. opcodes/ChangeLog 2021-09-27 Nick Alcock <nick.alcock@oracle.com> * configure: Regenerate. zlib/ChangeLog 2021-09-27 Nick Alcock <nick.alcock@oracle.com> * configure: Regenerate.
2021-09-25PowerPC: Enable mfppr mfppr32, mtppr and mtppr32 extended mnemonics on POWER5Peter Bergner1-0/+9
SPR 896 and the mfppr mfppr32, mtppr and mtppr32 extended mnemonics were added in ISA 2.03, so enable them on POWER5 and later. opcodes/ * ppc-opc.c (powerpc_opcodes) <mfppr, mfppr32, mtppr, mtppr32>: Enable on POWER5 and later. gas/ * testsuite/gas/ppc/power5.s: New test. * testsuite/gas/ppc/power5.d: Likewise. * testsuite/gas/ppc/ppc.exp: Run it. * testsuite/gas/ppc/power7.s: Remove tests for mfppr, mfppr32, mtppr and mtppr32. * testsuite/gas/ppc/power7.d: Likewise.
2021-09-13MIPS: don't use get_symbol_name() for section parsing. With ↵Jan Beulich1-0/+1
s_change_section() later calling obj_elf_section(), it seems better to pre-parse the section name by the same function that will be used there. This way no differences in what is accepted will result. gas * config/tc-mips.c (s_change_section): Use obj_elf_section_name to parse the section name.
2021-09-13ia64: don't use get_symbol_name() for section parsing. With cross_section() ↵Jan Beulich1-0/+5
later calling obj_elf_section(), it seems better to pre-parse the section name by the same function that will be used there. This way no differences in what is accepted will result. gas * config/tc-ia64.c (cross_section): Use obj_elf_section_name to parse the section name.
2021-09-02Fix the V850 assembler's generation of relocations for the st.b instruction.Nick Clifton1-0/+8
PR 28292 gas * config/tc-v850.c (handle_lo16): Also accept BFD_RELOC_V850_LO16_SPLIT_OFFSET. * testsuite/gas/v850/split-lo16.s: Add extra line. * testsuite/gas/v850/split-lo16.d: Update expected disassembly. opcodes * v850-opc.c (D16): Use BFD_RELOC_V850_LO16_SPLIT_OFFSET in place of BFD_RELOC_16.
2021-08-11Fix a typo in the RX asse,bler. The Double-precision floating-point ↵Darius Galis1-0/+7
exception handling control register name is DECNT not DCENT. * config/rx-parse.y (DECNT): Fixed typo. * testsuite/gas/rx/dpopm.sm (DECNT): Fixed typo. * testsuite/gas/rx/dpushm.sm (DECNT): Fixed typo. * testsuite/gas/rx/macros.inc (DECNT): Fixed typo.
2021-08-11Fix an internal error in the CSKY assembler when asked to resolve an ↵Nick Clifton1-0/+6
overlarge constant. PR 28215 * config/tc-csky.c (md_apply_fix): Correctly handle a fixup that involves an overlarge constant.
2021-08-11Add a -mno-dollar-line-separator command line option to the AVR assembler.Matt Jacobson1-0/+9
Some frontends, like the gcc Objective-C frontend, emit symbols with $ characters in them. The AVR target code in gas treats $ as a line separator, so the code doesn?t assemble correctly. Provide a machine-specific option to disable treating $ as a line separator. * config/tc-avr.c (enum options): Add option flag. (struct option): Add option -mno-dollar-line-separator. (md_parse_option): Adjust treatment of $ when option is present. * config/tc-avr.h: Use avr_line_separator_chars.
2021-08-11Fix typo in previous deltaNick Clifton1-0/+4
2021-08-10Updated Serbian and Russian translations for various sub-directoriesNick Clifton1-0/+4
2021-08-09GAS: DWARF-5: Ensure that the 0'th entry in the directory table contains the ↵Nick Clifton1-0/+12
current working directory. * dwarf2dbg.c (get_directory_table_entry): Ensure that dir[0] contains current working directory. (out_dir_and_file_list): Likewise. * testsuite/gas/elf/dwarf-5-dir0.s: New test source file. * testsuite/gas/elf/dwarf-5-dir0.d: New test driver. * testsuite/gas/elf/elf.exp: Run the new test. * testsuite/gas/elf/dwarf-5-file0.d: Adjust expected output. * testsuite/gas/i386/dwarf5-line-1.d: Likewise. * testsuite/gas/i386/dwarf5-line-2.d: Likewise.
2021-07-14gas: default TC_VALIDATE_FIX_SUB to 0Alan Modra1-1/+10
gas/write.c provides a fallback TC_VALIDATE_FIX_SUB define that can be a problem for some targets, the problem being that a non-zero definition of TC_VALIDATE_FIX_SUB says that some uses of fx_subsy are OK, in effect that the target will handle fx_subsy in md_apply_fix and/or tc_gen_reloc. A lot of targets don't have the necessary md_apply_fix and tc_gen_reloc support. So a safer default is to disallow fx_subsy by default. I've had a good look over target usage of fx_subsy, and think I've caught all the cases where targets need TC_VALIDATE_FIX_SUB. Possible failures would be limited to alpha, microblaze, ppc and s390 (the targets that define UNDEFINED_DIFFERENCE_OK), or targets that generate fixups with BFD_RELOC_GPREL32/16 and use a syntax explicitly showing a difference expression. * write.c (TC_VALIDATE_FIX_SUB): Default to 0. * config/tc-hppa.h (TC_VALIDATE_FIX_SUB): Define. * config/tc-microblaze.h (TC_VALIDATE_FIX_SUB): Define. * config/tc-alpha.h (TC_VALIDATE_FIX_SUB): Define for ECOFF. * config/tc-ppc.h (TC_VALIDATE_FIX_SUB): Don't define for ELF. Do define for XCOFF.
2021-07-14objdump: add DWARF support for AIXClément Chigot1-0/+5
DWARF sections have special names on AIX which need be handled by objdump in order to correctly print them. This patch also adds the correlation in bfd for future uses. bfd/ * libxcoff.h (struct xcoff_dwsect_name): Add DWARF name. * coff-rs6000.c (xcoff_dwsect_names): Update. * coffcode.h (sec_to_styp_flags): Likewise. (coff_new_section_hook): Likewise. binutils/ * dwarf.h (struct dwarf_section): Add XCOFF name. * dwarf.c (struct dwarf_section_display): Update. * objdump.c (load_debug_section): Add XCOFF name handler. (dump_dwarf_section): Likewise. gas/ * config/tc-ppc.c (ppc_change_debug_section): Update to match new name's field.
2021-07-12Add the SEC_ELF_OCTETS flag to debug sections created by the assembler.Tucker1-0/+6
PR 28054 gas * config/obj-elf.c (obj_elf_change_section): Set the SEF_ELF_OCTETS flag on debug sections.
2021-07-07Add changelog entries for last commitAndreas Krebbel1-0/+5
2021-07-07Fix problems translating messages when a percentage sign appears at the end ↵Nick Clifton1-0/+11
of a string. PR 28051 gas * config/tc-i386.c (offset_in_range): Reformat error messages in order to fix problems when translating. (md_assemble): Likewise. * messages.c (as_internal_value_out_of_range): Likewise. * read.c (emit_expr_with_reloc): Likewise. * testsuite/gas/all/overflow.l Change expected output format. * po/gas.pot: Regenerate. bfd * coff-rs6000.c (xcoff_reloc_type_tls): Reformat error messages in order to fix problems when translating. * cofflink.c (_bfd_coff_write_global_sym): Likewise. * elfnn-aarch64.c (_bfd_aarch64_erratum_843419_branch_to_stub): Likewise. * po/bfd.pot: Regenerate.
2021-07-03Update version number and regenerate filesNick Clifton1-0/+5
2021-07-03Add markers for 2.37 branchNick Clifton1-0/+4
2021-07-02Re: Fix minor NDS32 renaming snafuAlan Modra1-0/+5
Some extern declarations differ in constnes to their definitions too. Let's make sure this sort of thing doesn't happen again, but putting the externs in a header where they belong. gas/ * config/tc-nds32.c (nds32_keyword_gpr): Don't declare. (md_begin): Constify k. opcodes/ * nds32-dis.c (nds32_find_reg_keyword): Constify arg and return. (nds32_parse_audio_ext, nds32_parse_opcode): Constify psys_reg. (nds32_field_table, nds32_opcode_table, nds32_keyword_table), (nds32_opcodes, nds32_operand_fields, nds32_keywords), (nds32_keyword_gpr): Move declarations to.. * nds32-asm.h: ..here, constifying to match definitions.
2021-07-02Fix minor NDS32 renaming snafu.Nick Clifton1-0/+5
* config/tc-nds32.c: Change all references of keyword_gpr to nds32_keyword_gpr.
2021-07-01opcodes: constify & scope microblaze opcodesMike Frysinger1-0/+5
This is exporting the variable "opcodes" as a large writable blob. This is not a namespace friendly name, so add a "microblaze" prefix, and then sprinkle const over its definition & use.
2021-07-01opcodes: constify aarch64_opcode_tablesMike Frysinger1-0/+6
This table is huge (~350k), so stop putting it into writable .data since it's only const data.
2021-06-24gas: update csect alignment for PPC prefixed instructions on XCOFFClément Chigot1-0/+5
Power10 prefixed instructions must not cross 64-byte boundaries. This is already handled. However, on XCOFF, the csect must be updated to match the new alignment. * config/tc-ppc.c (md_assemble): Update ppc_current_csect alignment when finding prefixed instructions.
2021-06-22picojava assembler and disassembler fixesAlan Modra1-0/+9
Commit 54758c3e398d made changes to the picojava support based on https://sourceware.org/pipermail/binutils/2005-November/045136.html An update from picojava to picojava II, I think. Unfortunately the patch neglected any changes to the gas testsuite, resulting in "FAIL: pj" since that date. This patch makes a few relatively simple changes to cure the regression. gas/ * config/tc-pj.c (md_apply_fix): Apply PJ_CODE_REL32 relocs. * testsuite/gas/pj/ops.s: Update jsr, ret, getstatic, putstatic, getfield, putfield, invokevirtual, invokespecial, invokestatic, invokeinterface, goto_w, jsr_w assembly. Delete version 1 picojava opcodes. * testsuite/gas/pj/ops.d: Match expected output. opcodes/ * pj-dis.c (print_insn_pj): Don't print trailing tab. Do print separator for pcrel insns.
2021-06-19ubsan errors when 32-bit bfdAlan Modra1-0/+4
A shift count exceeding the size of the value is undefined behaviour, and so is negating a signed LONG_MIN. * config/tc-z80.c (signed_overflow, unsigned_overflow): Avoid UB.
2021-06-19ppc raw test failure when 32-bit bfdAlan Modra1-0/+5
The test contained an expression that can't be evaluated unless expressions are 64-bit. * testsuite/gas/ppc/raw.s: Use 0 as pli constant. * testsuite/gas/ppc/raw.d: Update to suit.
2021-06-18gas: fold symbol table entries generated for .startof.() / .sizeof.()Jan Beulich1-0/+7
When the same such construct is used multiple times in a source file, there's still no need to emit a separate symbol each time. Under the assumption that there won't be many of these, use a simple array lookup method to record previously used symbols.
2021-06-17Fix an assertion failure in the AArch64 assembler triggered by incorrect ↵Nick Clifton1-0/+7
instruction syntax. PR 27904 * config/tc-aarch64.c (ldst_lo12_determine_real_reloc_type): Generate a syntax error message if the reloc qualifier does not match the instruction's size.
2021-06-17gas: handle csect in bss section for XCOFFClément Chigot1-0/+7
Latest gcc versions are now generating csects instead of .lcomm for bss symbols. Some adjustements are needed in order to handle them. * config/tc-ppc.c (md_begin): Create bss section with dummy symbol. (ppc_frob_symbol): Output XTY_CM for bss csects. (ppc_fix_adjustable): Adjust condition to avoid bss csects.
2021-06-17gas: ensure sections contents is zero for BFD_RELOC_PPC*_TLSM on XCOFF.Clément Chigot1-0/+10
AIX ld expects the section contents for relocations BFD_RELOC_PPC_TLSM or BFD_RELOC_PPC64_TLSM to be zero. Actually, it seems to be the case for all the TLS relocations generated by AIX assembly but only these two are mandatory. * config/tc-ppc.c (md_apply_fix): Adjust addend to nullify section contents for BFD_RELOC_PPC_TLSM or BFD_RELOC_PPC64_TLSM. * testsuite/gas/ppc/xcoff-tlsm-32.d: New test. * testsuite/gas/ppc/xcoff-tlsm-64.d: New test. * testsuite/gas/ppc/xcoff-tlsm.s: New test. * testsuite/gas/ppc/aix.exp: Run new tests.
2021-06-16gas: fix hex float parsing from .dcb.? directivesJan Beulich1-0/+6
Unlike for .dc.? the parsing here failed to skip the colon before calling hex_float(). To avoid both variants of parsing going out of sync again, introduce a helper used by both.
2021-06-16gas: fix overflow diagnosticsJan Beulich1-0/+10
While the logic in fixup_segment() so far was off by 1 for fixups dealing with quantities without known signedness, thus failing to report an overflow when e.g. a byte-sized resulting value is -0x100, the logic in emit_expr_with_reloc() reported an overflow even on large negative values when the respective positive ones would not be warned about, and when fixup_segment() wouldn't do so either. Such diagnostics all ought to follow a similar pattern of what value range is acceptable. (If expressions' X_unsigned was reliably set, emit_expr_with_reloc()'s checking might make sense to tighten based on that flag.) Note that with commit 80aab57939a0 ("Changes to let cons handle bignums like general expressions") having added handling of nbytes > sizeof(valueT) in the O_constant case, converting to O_big, the setting to zero of "hibit" had become dead. With "hibit" no longer used, this code now gets dropped altogether. But additionally a respective know() gets inserted.
2021-06-15x86: bring "gas --help" output for --32 etc in sync with realityJan Beulich1-0/+7
The testsuite uses the output to determine whether BFD64 is in effect. --x32 is supported for ELF only; don't advertise it for PE/COFF. --64 is also supported for Mach-O; advertise it. Adjust the testsuite's BFD64 check accordingly. Also replace "code" by "object", since it's the object format that the options primarily control. It's also _initial_ code bitness, but this can be changed by directives.
2021-06-15x86: simplify .dispNN settingJan Beulich1-0/+7
First of all eliminate the disp{16,32,32s} static variables, which are used solely for setting a temporary variable in build_modrm_byte(). The effect there can be had without use of such a temporary and without operand_type_or(), by just setting the single bit each that needs setting. Then use operand_type_and_not(..., anydisp) when all dispNN bits want clearing together.
2021-06-15x86: slightly simplify offset_in_range()Jan Beulich1-0/+5
Applying a mask with all bits set (or its inverse, with hence all bits clear) won't alter the result (or won't trigger the warning). Re-arrange the code to eliminate two more of the somewhat odd (2 << width_minus_1) constructs.
2021-06-15x86: harmonize disp with imm handlingJan Beulich1-0/+10
Certain disp values may trigger "... shortened to ..." warnings when equivalent imm ones don't. In some of the cases there are also differences (for non-64-bit code) between BFD64 and !BFD64 builds. The resulting encodings (i.e. use [or not] of the shorter disp8 / imm8 forms) are also different in some cases. Make this handling consistent. Note that using equivalent 16-bit mode displacements / immediates continues to expose entirely different behavior (see the disp-imm-16 testcase added by an earlier patch). This may want to be the subject of further changes, but it'll then quickly become obvious that e.g. keying use of extend_to_32bit_address() to non-64-bit mode isn't appropriate either: Once we allow wrapping operands, we would better do so consistently, in which case all of this would need to become dependent upon address or operand size instead of mode.
2021-06-15x86: make offset_in_range()'s warning contents useful (again)Jan Beulich1-0/+5
In case there is something which gets shortened (perhaps only on a BFD64 build targeting a 32-bit binary), seeing the full original value is often helpful to understand what's actually going wrong. Of course for non-64-bit binaries we better wouldn't be seeing such warnings at all, as they're often indicative of a behavioral difference between BFD64 and !BFD64 builds. Prior to "gas: drop sprint_value()", which introduced the use of bfd_sprintf_vma(), the output had other shortcomings.
2021-06-15x86: off-by-1 in offset_in_range()Jan Beulich1-0/+9
Just like e.g. 0x10000 triggers a warning for size 2, -0x10000 ought to as well. Note that some of the encodings produced aren't ones one would expect, and hence the generated code is not being checked for in the new testcases.
2021-06-15x86: permit parenthesized expressions again as addressing scale factorJan Beulich1-0/+8
The description of e68c3d59acd0 ("x86: better respect quotes in parse_operands()") wrongly states: "In i386_att_operand(), which needs adjustment to remain in sync, besides respecting double quotes now, also change the logic such that we don't count parentheses anymore: Finding any opening or closing parenthesis or any double quote means we're done, because the subsequent parsing code wouldn't accept (extra) instances of these anyway." I didn't pay attention to the possibility of the scale factor being specified as an expression, which may contain parentheses. Thanks to Martin for pointing this out. Restore prior behavior or matching parentheses (backwards), while giving the variable a more suitable name. Note that this simple and immediate fix is not ging to be enough: This expression could itself involve quoted symbols. However, to address this backwards parsing needs to be done away with altogether here (such that parentheses which are part of such a quoted symbol name can also properly be accounted for), which is going to be a more intrusive change.
2021-06-14gas: fold three as_warn() in emit_expr_with_reloc()Jan Beulich1-0/+4
Simply use the available abstraction instead of, effectively, trying to open-code it.
2021-06-14gas: drop TC_ADDRESS_BYTES conditionalsJan Beulich1-0/+6
I've been repeatedly confused by, in particular, the .dc.a potable[] entry being conditional. Grepping in gas/config/ reveals only very few targets actually #define-ing it. But as of 7be1c4891a20 the symbol is always defined, so #ifdef-s are pointless (and, as said, potentially confusing). Also adjust documentation to reflect this.
2021-06-11x86: Always define TC_PARSE_CONS_EXPRESSIONH.J. Lu1-0/+6
Always define TC_PARSE_CONS_EXPRESSION to properly wrap constants for all x86 targets. * config/tc-i386.c (x86_cons): Handle GOT/PLT relocations only if needed. * config/tc-i386.h (TC_PARSE_CONS_EXPRESSION): Always define.
2021-06-11RISC-V: Update the riscv_opts.[rvc|rve] in the riscv_set_arch.Nelson Chu1-0/+6
We also need to update the riscv_opts.[rvc|rve] for elf attributes. Otherwise, the following case will fail, $ cat cadd.s .attribute arch, "rv64gc" c.add a0, a1 $ riscv64-unknown-elf-as cadd.s -o cadd.o cadd.s: Assembler messages: cadd.s:2: Error: illegal operands `c.add a0,a1 After applying this patch, $ riscv64-unknown-elf-as cadd.s -o cadd.o $ riscv64-unknown-elf-objdump -d cadd.o cadd.o: file format elf64-littleriscv Disassembly of section .text: 0000000000000000 <.text>: 0: 952e add a0,a0,a1 ... gas/ * config/tc-riscv.c (riscv_set_arch): Call riscv_set_rvc and riscv_set_rve both for -march and elf attributes. (riscv_after_parse_args): Likewise.
2021-06-10arm: avoid "shadowing" of glibc function nameJan Beulich1-0/+8
Old enough glibc has an (unguarded) declaration of index() in string.h, which triggers a "shadows a global declaration" warning.
2021-06-10arm: fix array-out-of-bounds upon register parsing errorJan Beulich1-0/+4
Despite the comment ahead of the enum explicitly pointing out the need to also update the corresponding array, 1b8833198c0 ("Add support for MVE instructions: vcmp and vpt") failed to do so. Oddly enough the issue appears to be spotted only by rather old gcc (4.3-ish in my case).
2021-06-10x86: suppress LEA optimization in a specific 16-bit caseJan Beulich1-0/+8
In 16-bit mode a 16-bit address size LEA with a 16-bit displacement and a 32-bit destination is shorter to encode than the corresponding MOV. Commit fe134c656991 ("x86: optimize LEA")'s promise was to only do the transformation when the encoding size wouldn't grow, i.e. it did go a little too far. Restrict this specific case of the transformation to -O2.
2021-06-08x86: cover a.out in recently added testsJan Beulich1-0/+6
Follow the pattern found elsewhere when relocations are involved. For wrap32-data also drop a mistakenly left "ELF" from the test name. (Note that Darwin, for which the wrap32 tests are also failing, is left as-is, for there being numerous other failures already anyway, and it hence being questionable whether that target is actually properly maintained.)
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