Age | Commit message (Collapse) | Author | Files | Lines |
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(md_gather_operands): Add support for optional operands.
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* config/tc-msp430.c (msp430_enable_relax): New flag.
(msp430_enable_polys): Likewise.
(OPTION_RELAX): New option.
(OPTION_POLYMORPHS): Likewise.
(md_longopts): New long options.
(md_show_usage): Updated.
(md_parse_option): Add new options handler.
(msp430_operands): Add check if polymorph insns are enabled.
(msp430_force_relocation_local): New function.
(md_apply_fix): Now delete relocs according to new flags combination.
(msp430_relax_frag): Convert long branches to short branches only if
flag msp430_enable_relax is set.
* config/tc-msp430.h (TC_FORCE_RELOCATION_LOCAL): Defined.
(msp430_force_relocation_local): Likewise.
* doc/c-msp430.texi: Describe new options.
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(stamp-mk.com): Likewise.
(EXTRA_DIST): Remove make-gas.com from list.
(MOSTLYCLEANFILES): Remove stamp-mk.com from list.
* Makefile.in: Regenerate.
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first statement.
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* config-gas.com: Delete.
* makefile.vms: Delete.
* vmsconf.sh: Delete.
* config/atof-tahoe.c: Delete.
* config/m88k-opcode.h: Delete.
* config/obj-bout.c: Delete.
* config/obj-bout.h: Delete.
* config/obj-hp300.c: Delete.
* config/obj-hp300.h: Delete.
* config/tc-a29k.c: Delete.
* config/tc-a29k.h: Delete.
* config/tc-h8500.c: Delete.
* config/tc-h8500.h: Delete.
* config/tc-m88k.c: Delete.
* config/tc-m88k.h: Delete.
* config/tc-tahoe.c: Delete.
* config/tc-tahoe.h: Delete.
* config/tc-tic80.c: Delete.
* config/tc-tic80.h: Delete.
* config/tc-w65.c: Delete.
* config/tc-w65.h: Delete.
* config/te-aux.h: Delete.
* config/te-delt88.h: Delete.
* config/te-delta.h: Delete.
* config/te-dpx2.h: Delete.
* config/te-hp300.h: Delete.
* config/te-ic960.h: Delete.
* config/vms-a-conf.h: Delete.
* doc/c-a29k.texi: Delete.
* doc/c-h8500.texi: Delete.
* doc/c-m88k.texi: Delete.
* README: Remove obsolete examples, and list of supported targets.
* Makefile.am: Remove a29k, h8500, m88k, tahoe, tic80, w65,
bout and hp300 support.
(DEP_FLAGS): Don't define BFD_ASSEMBLER.
* configure.in: Remove --enable-bfd-assembler, need_bfd,
primary_bfd_gas.
* configure.tgt: Remove a29k, h8300-coff, h8500-*, i960 non-elf,
m68k non bfd, m88k, or32-coff, tic80-*, vax non-bfd, w65k-*, *-nindy.
* as.c: Remove all non-BFD_ASSEMBLER code, support for above targets.
* as.h: Likewise.
* dw2gencfi.c: Likewise.
* dwarf2dbg.c: Likewise.
* ehopt.c: Likewise.
* input-file.c: Likewise.
* listing.c: Likewise.
* literal.c: Likewise.
* messages.c: Likewise.
* obj.h: Likewise.
* output-file.c: Likewise.
* read.c: Likewise.
* stabs.c: Likewise.
* struc-symbol.h: Likewise.
* subsegs.c: Likewise.
* subsegs.h: Likewise.
* symbols.c: Likewise.
* symbols.h: Likewise.
* tc.h: Likewise.
* write.c: Likewise.
* write.h: Likewise.
* config/aout_gnu.h: Likewise.
* config/obj-aout.c: Likewise.
* config/obj-aout.h: Likewise.
* config/obj-coff.c: Likewise.
* config/obj-coff.h: Likewise.
* config/obj-evax.h: Likewise.
* config/obj-ieee.h: Likewise.
* config/tc-arm.c: Likewise.
* config/tc-arm.h: Likewise.
* config/tc-avr.c: Likewise.
* config/tc-avr.h: Likewise.
* config/tc-crx.h: Likewise.
* config/tc-d10v.h: Likewise.
* config/tc-d30v.h: Likewise.
* config/tc-dlx.h: Likewise.
* config/tc-fr30.h: Likewise.
* config/tc-frv.h: Likewise.
* config/tc-h8300.c: Likewise.
* config/tc-h8300.h: Likewise.
* config/tc-hppa.h: Likewise.
* config/tc-i370.h: Likewise.
* config/tc-i386.c: Likewise.
* config/tc-i386.h: Likewise.
* config/tc-i860.h: Likewise.
* config/tc-i960.c: Likewise.
* config/tc-i960.h: Likewise.
* config/tc-ip2k.h: Likewise.
* config/tc-iq2000.h: Likewise.
* config/tc-m32c.h: Likewise.
* config/tc-m32r.h: Likewise.
* config/tc-m68hc11.h: Likewise.
* config/tc-m68k.c: Likewise.
* config/tc-m68k.h: Likewise.
* config/tc-maxq.c: Likewise.
* config/tc-maxq.h: Likewise.
* config/tc-mcore.c: Likewise.
* config/tc-mcore.h: Likewise.
* config/tc-mn10200.h: Likewise.
* config/tc-mn10300.c: Likewise.
* config/tc-mn10300.h: Likewise.
* config/tc-ms1.h: Likewise.
* config/tc-msp430.c: Likewise.
* config/tc-msp430.h: Likewise.
* config/tc-ns32k.c: Likewise.
* config/tc-ns32k.h: Likewise.
* config/tc-openrisc.h: Likewise.
* config/tc-or32.c: Likewise.
* config/tc-or32.h: Likewise.
* config/tc-ppc.c: Likewise.
* config/tc-ppc.h: Likewise.
* config/tc-s390.h: Likewise.
* config/tc-sh.c: Likewise.
* config/tc-sh.h: Likewise.
* config/tc-sparc.c: Likewise.
* config/tc-tic30.c: Likewise.
* config/tc-tic30.h: Likewise.
* config/tc-tic4x.c: Likewise.
* config/tc-tic4x.h: Likewise.
* config/tc-tic54x.c: Likewise.
* config/tc-tic54x.h: Likewise.
* config/tc-v850.h: Likewise.
* config/tc-vax.c: Likewise.
* config/tc-vax.h: Likewise.
* config/tc-xstormy16.h: Likewise.
* config/tc-xtensa.h: Likewise.
* config/tc-z8k.c: Likewise.
* config/tc-z8k.h: Likewise.
* config/vms-a-conf.h
* doc/Makefile.am: Likewise.
* doc/all.texi: Likewise.
* doc/as.texinfo: Likewise.
* doc/Makefile.in: Regenerate.
* Makefile.in: Regenerate.
* configure: Regenerate.
* config.in: Regenerate.
* po/POTFILES.in: Regenerate.
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* macro.c (getstring): Do not treat round parentheses exactly the same as angle
brackets - the parentheses need to be preserved and passed on to the macro processing code.
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* macro.c (getstring): Treat round parentheses in the same way as angle brackets.
(get_any_string): Likewise.
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PR gas/1118
* as.c (parse_args): Handle -al=<FILE>.
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for assembler-with-cpp files.
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gas/
* config/tc-arm.c (current_it_mask, current_cc): New variables.
(do_t_add_sub): Use correct encodings inside IT block.
(do_t_arit3c): Ditto.
(do_t_it): Simplify logic. Set current_it_mask and current_cc.
(md_assemble): Verify conditional suffixes agains IT blocks.
gas/testsuite/
* gas/arm/thumb32.s: Use correct conditional suffixes inside IT
blocks.
* gas/arm/thumb2_it.d, gas/arm/thumb2_it.s: New test.
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gas/
* config/tc-arm.c (encode_thumb32_immediate): Only accept shifted
constants.
(encode_thumb32_shifted_operand): Prohibit register shifts.
(encode_thumb32_addr_mode): Fix typo.
(insns): Correct thumb2 ldm and stm opcodes.
gas/testsuite/
* gas/arm/thumb32.d: Update ldm/stm dests.
* gas/arm/thumb32.s: Ditto.
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instruction.
gas/arm/iwmmxt-bad2.s: New file: Check for error messages about erroneous
offsets in iwmmxt instructions. Cannot be part of iwmmxt-bad.s because
the errors there stop the assembler before it gets to check the offsets
in instructions.
gas/arm/iwmmxt-bad2.d: New file.
gas/arm/iwmmxt-bad2.l: New file: Expected error messages.
gas/arm/iwmmxt.s: Change the offset values of the WLDRD, WSTRD and WSTRW
instructions to be larger than +/-255.
gas/arm/iwmmxt.d: Fix the expected results for these instructions.
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if emitting a reloc.
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bfd/
* reloc.c: Add BFD_RELOC_ARM_T32_ADD_PC12.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
gas/
* config/tc-arm.c (T16_32_TAB): Add "addr". Fix encoding of push and
pop.
(do_t_addr): Implement 32-bit variant.
(do_t_push_pop): Make some errors warnings. Handle single register
32-bit case.
(insns): Use tCE for adr.
(md_pcrel_from_section): Handle BFD_RELOC_ARM_T32_ADD_PC12.
(md_apply_fix): Ditto.
gas/testsuite/
* gas/arm/thumb32.d: Fix expected output for writeback addressing
modes. Add single high reg push/pop test.
* gas/asm/thumb32.s: Add single high reg push/pop test.
opcodes/
* arm-dis.c: Fix disassebly of thumb2 writeback addressing modes.
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bfd/
* reloc.c (BFD_RELOC_ARM_T32_IMM12): Add.
* bfd-in2.h: Regeenrate.
* libbfd.h: Regenerate.
gas/
* config/tc-arm.c (parse_tb): New function.
(enum operand_parse_code): Add OP_TB.
(parse_operands): Handle OP_TB.
(do_t_add_sub_w, do_t_tb): New functions.
(insns): Add entries for addw, subw, tbb and tbh.
(md_apply_fix): Handle BFD_RELOC_ARM_T32_IMM12.
gas/testsuite/
* gas/arm/thumb32.s: Add tests for addw, subw, tbb and tbh.
* gas/arm/thumb32.d: Ditto.
opcodes/
* arm-dis.c (thumb32_opc): Fix addressing mode for tbh.
(print_insn_thumb32): Fix decoding of thumb2 'I' operands.
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* config/tc-i386.c (handle_large_common): Declare only for ELF.
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2005-07-27 Jan Beulich <jbeulich@novell.com>
* config/tc-ia64.h (unw_r_record): Change type of fr_mem to unsigned
int.
(unw_p_record): Remove unused/redundant fields imask and rmask.
Combine spoff and pspoff into a union. Combine gr and br into a
union. Change type of grmask and brmask to unsigned char. Change type
of frmask to unsigned int.
(unw_x_record): Combine spoff, pspoff, and treg into a union.
* config/tc-ia64.c (unwind): New field 'pending_saves'.
(check_pending_save): New.
(alloc_record): Clear out entire record.
(output_psp_gr): Use renamed structure fields.
(output_psp_sprel): Likewise.
(output_rp_gr): Likewise.
(output_rp_br): Likewise.
(output_rp_psprel): Likewise.
(output_rp_sprel): Likewise.
(output_pfs_gr): Likewise.
(output_pfs_psprel): Likewise.
(output_pfs_sprel): Likewise.
(output_preds_gr): Likewise.
(output_preds_psprel): Likewise.
(output_preds_sprel): Likewise.
(output_spill_base): Likewise.
(output_unat_gr): Likewise.
(output_unat_psprel): Likewise.
(output_unat_sprel): Likewise.
(output_lc_gr): Likewise.
(output_lc_psprel): Likewise.
(output_lc_sprel): Likewise.
(output_fpsr_gr): Likewise.
(output_fpsr_psprel): Likewise.
(output_fpsr_sprel): Likewise.
(output_priunat_gr): Likewise.
(output_priunat_psprel): Likewise.
(output_priunat_sprel): Likewise.
(output_bsp_gr): Likewise.
(output_bsp_psprel): Likewise.
(output_bsp_sprel): Likewise.
(output_bspstore_gr): Likewise.
(output_bspstore_psprel): Likewise.
(output_bspstore_sprel): Likewise.
(output_rnat_gr): Likewise.
(output_rnat_psprel): Likewise.
(output_rnat_sprel): Likewise.
(output_spill_psprel): Likewise.
(output_spill_sprel): Likewise.
(output_spill_reg): Likewise.
(output_fr_mem): Likewise. Allocate one unwind record per set mask
bit.
(output_frgr_mem): Likewise.
(output_gr_mem): Likewise.
(output_br_mem): Likewise.
(output_gr_gr): Likewise.
(output_br_gr): Likewise.
(fixup_unw_records): Likewise.
(process_one_record): Use renamed structure fields. For gr_gr and
br_gr, collect mask from chain of records before output.
(in_prologue): Simplify and eliminate early returns. Call
check_pending_save.
(in_body): Simplify and eliminate early returns.
(dot_body): Call check_pending_save.
(md_assemble): Update comment. Deal with pending saves.
gas/testsuite/
2005-07-27 Jan Beulich <jbeulich@novell.com>
* gas/ia64/unwind-bad.l: Uncomment patterns matching new warnings.
* gas/ia64/unwind-ok.d: Correct expectations.
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2005-07-26 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (optimize_imm): Calculate candidate immediates
mask from guessed suffix, but mask out other immediate types only
if at least on candidate is valid for the insn.
gas/testsuite/
2005-07-26 Jan Beulich <jbeulich@novell.com>
* gas/i386/immed32.[sd]: New.
* gas/i386/immed64.[sd]: New.
* gas/i386/i386.exp: Run new tests.
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* reloc.c: Remove unused M32C relocs, add BFD_RELOC_M32C_HI8.
* libbfd.h: Regenerate.
* bfd-in2.h: Regenerate.
* elf32-m32c.c (m32c_elf_howto_table): Add R_M32C_8, R_M32C_LO16,
R_M32C_HI8, R_M32C_HI16.
(m32c_reloc_map): Likewise.
(m32c_elf_relocate_section): Add R_M32C_HI8 and R_M32C_HI16.
[cpu]
* m32c.opc (parse_unsigned8): Add %dsp8().
(parse_signed8): Add %hi8().
(parse_unsigned16): Add %dsp16().
(parse_signed16): Add %lo16() and %hi16().
(parse_lab_5_3): Make valuep a bfd_vma *.
[gas]
* config/tc-m32c.c (md_cgen_lookup_reloc): Add 8 bit operands.
Support %mod() modifiers from opcodes.
* doc/c-m32c.texi (M32C-Modifiers): New section.
[include/elf]
* m32c.h: Add R_M32C_8, R_M32C_LO16, R_M32C_HI8, and R_M32C_HI16.
[opcodes]
* m32c-asm.c Regenerate.
* m32c-dis.c Regenerate.
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2005-07-25 Jan Hubicka <jh@suse.cz>
H.J. Lu <hongjiu.lu@intel.com>
* elf-bfd.h (_bfd_elf_large_com_section): New.
* elf.c (_bfd_elf_large_com_section): New. Defined.
* elf64-x86-64.c (elf64_x86_64_add_symbol_hook): New.
(elf64_x86_64_elf_section_from_bfd_section): New.
(elf64_x86_64_symbol_processing): New.
(elf64_x86_64_common_definition): New.
(elf64_x86_64_common_section_index): New.
(elf64_x86_64_common_section): New.
(elf64_x86_64_merge_symbol): New.
(elf64_x86_64_additional_program_headers): New.
(elf64_x86_64_special_sections): New.
(elf_backend_section_from_bfd_section): New. Defined.
(elf_backend_add_symbol_hook): Likewise.
(elf_backend_common_section_index): Likewise.
(elf_backend_common_section): Likewise.
(elf_backend_common_definition): Likewise.
(elf_backend_merge_symbol): Likewise.
(elf_backend_special_sections): Likewise.
(elf_backend_additional_program_headers): Likewise.
binutils/
2005-07-25 H.J. Lu <hongjiu.lu@intel.com>
* readelf.c (dump_relocations): Handle SHN_X86_64_LCOMMON.
(get_symbol_index_type): Likewise.
(get_elf_section_flags): Handle SHF_X86_64_LARGE.
gas/
2005-07-25 Jan Hubicka <jh@suse.cz>
H.J. Lu <hongjiu.lu@intel.com>
* config/obj-elf.c: Include "elf/x86-64.h" if TC_I386 is
defined.
(elf_com_section_ptr): New.
(elf_begin): Set elf_com_section_ptr to bfd_com_section_ptr.
(elf_common_parse): Make it global. Use elf_com_section_ptr
instead of bfd_com_section_ptr.
(obj_elf_change_section): Handle x86-64 large bss sections.
* config/obj-elf.h (elf_com_section_ptr): New.
(elf_common_parse): New.
* config/tc-i386.c (handle_large_common): New.
(md_pseudo_table): Add "largecomm".
(x86_64_section_letter): New.
(x86_64_section_word): New.
* config/tc-i386.h (x86_64_section_word): New.
(x86_64_section_letter): New.
(md_elf_section_letter): New. Defined.
(md_elf_section_word): Likewise.
include/elf/
2005-07-25 Jan Hubicka <jh@suse.cz>
* x86-64.h (SHN_X86_64_LCOMMON): New.
(SHF_X86_64_LARGE): New.
ld/
2005-07-25 Jan Hubicka <jh@suse.cz>
H.J. Lu <hongjiu.lu@intel.com>
* emulparams/elf_x86_64.sh (LARGE_SECTIONS): New.
* scripttempl/elf.sc: Updated for large section support.
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the default rtems targets.
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* Makefile.am (BFD32_BACKENDS): Remove cf-m68klynx.lo.
(BFD32_BACKENDS): Likewise, remove m68klynx.lo.
(BFD32_BACKENDS_CFILES): Remove cf-m68klynx.c, m68klynx.c.
(cf-m68klynx.lo, m68klynx.lo): Remove targets.
* Makefile.in: Regenerate.
* cf-m68klynx.c: Remove.
* m68klynx.c: Likewise.
* configure.in (m68klynx_aout_vec): Remove vector.
(m68klynx_coff_vec): Likewise.
* configure: Regenerate.
* targets.c (m68klynx_aout_vec): Remove extern.
(m68klynx_coff_vec): Likewise.
(_bfd_target_vector): Remove m68klynx_{aout,coff}_vec.
* po/SRC-POTFILES.in: Remove cf-m68klynx.c, m68klynx.c.
gas/
* config/tc-m68k.h: Remove TE_LYNX conditional code.
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gas/
* config/tc-arm.c (encode_thumb32_addr_mode): Don't set
inst.reloc.pc_rel.
gas/testsuite/
* gas/arm/thumb32.s: Add tests for [pc, #imm] addressing modes.
* gas/arm/thumb32.d: Ditto.
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2005-07-18 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (md_begin): Use IS_ELF.
(tc_i386_fix_adjustable): Likewise.
(md_estimate_size_before_relax): Likewise.
(md_apply_fix): Likewise.
(i386_target_format): Likewise.
(lex_got): Define to NULL when not ELF or when LEX_AT. Check IS_ELF.
(i386_immediate): Remove #ifdef LEX_AT.
(i386_displacement): Likewise.
* config/tc-i386.h (x86_cons): Prototype only when ELF and when not
LEX_AT.
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2005-07-18 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (reloc): Convert to ISO C90. Change first
parameter to unsigned. Parameter sign now is tristate - zero/
positive mean unsigned/signed, negative means signedness doesn't
matter. Check field size,
signedness, and pcrel-ness are in agreement between relocated field
and relocation type. Adjust diagnostics.
(optimize_imm): And type mask of operand instead of overwriting it.
(lex_got): Convert to ISO C90. Add third parameter. Add new field to
local structure and initialize gotrel accordingly. Pass caller as
mask of types that the operator can match.
(x86_cons_fix_new): Let reloc know that signedness of relocation
doesn't matter.
(x86_pe_cons_fix_new): Likewise.
(x86_cons): Pass additional argument to lex_got.
(i386_immediate): New local variable 'types'. Pass its address as
additional argument to lex_got. Mask out operand types not supported
befoe returning.
(i386_displacement): Likewise. Set bigdisp to all types supported in
64-bit mode, combining the previously split initialization.
gas/testsuite/
2005-07-18 Jan Beulich <jbeulich@novell.com>
* gas/i386/reloc32.[sdl]: New.
* gas/i386/reloc64.[sdl]: New.
* gas/i386/i386.exp: Run new tests.
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2005-07-18 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (parse_insn): Reject prefix if unavailable in
current mode.
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promoted match.
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* Makefile.am: Run "make dep-am".
* Makefile.in: Regenerate.
opcodes/
* Makefile.am: Run "make dep-am".
(stamp-m32c): Fix cpu dependencies.
* Makefile.in: Regenerate.
* ip2k-dis.c: Regenerate.
binutils/
* Makefile.am: Run "make dep-am".
* Makefile.in: Regenerate.
gas/
* Makefile.am: Run "make dep-am".
* Makefile.in: Regenerate.
ld/
* Makefile.am: Run "make dep-am".
(emipsidt.c, emipsidtl.c): Depend on generic.em.
* Makefile.in: Regenerate.
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2007-07-15 H.J. Lu <hongjiu.lu@intel.com>
* gas/config/tc-i386.h (CpuVMX): New.
(CpuUnknownFlags): Add CpuVMX.
gas/testsuite/
2007-07-15 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Add vmx and x86-64-vmx.
* gas/i386/vmx.d: New file.
* gas/i386/vmx.s: Likewise.
* gas/i386/x86-64-vmx.d: Likewise.
* gas/i386/x86-64-vmx.s: Likewise.
include/opcode/
2007-07-15 H.J. Lu <hongjiu.lu@intel.com>
* i386.h (i386_optab): Support Intel VMX Instructions.
opcodes/
2007-07-15 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (OP_VMX): New. Handle Intel VMX Instructions.
(VMX_Fixup): New. Fix up Intel VMX Instructions.
(Em): New.
(Gm): New.
(VM): New.
(dis386_twobyte): Updated entries 0x78 and 0x79.
(twobyte_has_modrm): Likewise.
(grps): Use OP_VMX in the "sgdtIQ" entry. Updated GRP9.
(OP_G): Handle m_mode.
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2005-07-14 Jim Blandy <jimb@redhat.com>
* configure.in: Add cases for Renesas m32c.
* configure: Regenerated.
bfd/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
Add support for m32c-*-elf (Renesas m32c and m16c).
* Makefile.am (ALL_MACHINES): Add cpu-m32c.lo.
(ALL_MACHINES_CFILES): Add cpu-m32c.c.
(BFD32_BACKENDS): Add elf32-m32c.lo.
(BFD32_BACKENDS_CFILES): Add elf32-m32c.c.
(cpu-m32c.lo, elf32-m32c.lo): New rules, generated by 'make dep-am'.
* Makefile.in: Regenerated.
* archures.c (bfd_arch_m32c, bfd_mach_m16c, bfd_mach_m32c): New
arch and mach codes.
(bfd_m32c_arch): New arch info object.
(bfd_archures_list): List bfd_m32c_arch.
* bfd-in2.h: Regenerated.
* config.bfd: Add case for the m32c.
* configure.in: Add case for the m32c.
* configure: Regenerated.
* cpu-m32c.c, elf32-m32c.c: New files.
* libbfd.h: Regenerated.
* targets.c (bfd_elf32_m32c_vec): Declare.
(_bfd_target_vector): List bfd_elf32_m32c_vec.
binutils/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
* readelf.c: #include "elf/m32c.h"
(guess_is_rela, dump_relocations, get_machine_name): Add cases for
EM_M32C.
* Makefile.am (readelf.o): Update dependencies.
* Makefile.in: Regenerated.
cpu/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
* m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
gas/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
Add support for the Renesas M32C.
* Makefile.am (CPU_TYPES): List m32c.
(TARGET_CPU_CFILES): List config/tc-m32c.c.
(TARGET_CPU_HFILES): List config/tc-m32c.h.
* configure.in: Add case for m32c.
* configure.tgt: Add cases for m32c and m32c-*-elf.
* configure: Regenerated.
* config/tc-m32c.c, config/tc-m32c.h: New files.
* doc/Makefile.am (CPU_DOCS): Add c-m32c.texi.
* doc/Makefile.in: Regenerated.
* doc/all.texi: Set M32C.
* doc/as.texinfo: Add text for the M32C-specific options and line
comment characters, and refer to c-m32c.texi.
* doc/c-m32c.texi: New file.
include/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
* dis-asm.h (print_insn_m32c): New declaration.
include/elf/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
Add support for Renesas M32C and M16C.
* common.h (EM_M32C): New machine number.
* m32c.h: New file.
ld/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
Add support for the Renesas M32C and M16C.
* Makefile.am (ALL_EMULATIONS): Add eelf32m32c.o.
(eelf32m32c.c): New target.
* Makefile.in: Regenerated.
* configure.tgt: Add case for m32c-*-elf.
* emulparams/elf32m32c.sh: New file.
opcodes/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
Add support for the Renesas M32C and M16C.
* m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New.
* m32c-desc.h, m32c-opc.h: New.
* Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h.
(CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c,
m32c-opc.c.
(ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo,
m32c-ibld.lo, m32c-opc.lo.
(CLEANFILES): List stamp-m32c.
(M32C_DEPS): List stamp-m32c, if CGEN_MAINT.
(CGEN_CPUS): Add m32c.
(m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c)
(m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS.
(m32c_opc_h): New variable.
(stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo)
(m32c-opc.lo): New rules.
* Makefile.in: Regenerated.
* configure.in: Add case for bfd_m32c_arch.
* configure: Regenerated.
* disassemble.c (ARCH_m32c): New.
[ARCH_m32c]: #include "m32c-desc.h".
(disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c.
(disassemble_init_for_target) [ARCH_m32c]: Same.
* cgen-ops.h, cgen-types.h: New files.
* Makefile.am (HFILES): List them.
* Makefile.in: Regenerated.
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sparc-*-rtemsaout*.
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2005-07-10 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (optimize_disp): Optimize signed 32bit
displacements.
testsuite/gas/
2005-07-10 H.J. Lu <hongjiu.lu@intel.com>
* i386/x86_64.s: Add absolute siged 32bit addressing tests for
mov.
* i386/x86_64.d: Updated.
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* config/obj-elf.h: Likewise.
* config/tc-h8300.h: Likewise.
* config/tc-h8500.h: Likewise.
* config/tc-i370.h: Likewise.
* config/tc-i386.h: Likewise.
* config/tc-m68hc11.h: Likewise.
* config/tc-m68k.h: Likewise.
* config/tc-ppc.h: Likewise.
* config/tc-s390.h: Likewise.
* config/tc-sh.h: Likewise.
* config/tc-sparc.h: Likewise.
* config/tc-tic30.c: Likewise.
* config/tc-w65.h: Likewise.
* config/tc-xtensa.h: Likewise.
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* config/tc-cris.h (MD_APPLY_SYM_VALUE): Define.
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bfd:
* elf32-xtensa.c (vsprint_msg): Add format attribute. Fix
format bugs.
* vms.h (_bfd_vms_debug): Add format attribute.
(_bfd_vms_debug, _bfd_hexdump): Fix typos.
binutils:
* bucomm.h (report): Add format attribute.
* dlltool.c (inform): Likewise.
* dllwrap.c (display, inform, warn): Likewise.
* objdump.c (objdump_sprintf): Likewise.
* readelf.c (error, warn): Likewise. Fix format bugs.
gas:
* config/tc-tic30.c (debug): Add format attribute. Fix format
bugs.
include:
* dis-asm.h (fprintf_ftype): Add format attribute.
opcodes:
* arc-dis.c, arm-dis.c, cris-dis.c, crx-dis.c, d10v-dis.c,
d30v-dis.c, fr30-dis.c, h8300-dis.c, h8500-dis.c, i860-dis.c,
ia64-dis.c, ip2k-dis.c, m10200-dis.c, m10300-dis.c,
m88k-dis.c, mcore-dis.c, mips-dis.c, ms1-dis.c, or32-dis.c,
ppc-dis.c, sh64-dis.c, sparc-dis.c, tic4x-dis.c, tic80-dis.c,
v850-dis.c: Fix format bugs.
* ia64-gen.c (fail, warn): Add format attribute.
* or32-opc.c (debug): Likewise.
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* config/tc-i386.c (cpu_arch): Add sse3.
* config/tc-i386.h (CpuSSE3): Renamed from ...
(CpuPNI): This. Defined as CpuSSE3.
* doc/c-i386.texi: Document .sse3.
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2005-07-06 Jan Beulich <jbeulich@novell.com>
* config/tc-ia64.c (nop): Use zero for L-unit pseudo-nop.
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bfd/
* config.bfd: Add separate case for ppc-vxworks.
* configure: Regenerate.
* configure.in: Include elf-vxworks.lo on ppc targets.
* elf-vxworks.c (elf_vxworks_final_write_processing): Handle
.rela.plt.unloaded.
* elf32-ppc.c: Add VxWorks target vec. Include elf-vxworks.h.
(PLT_ENTRY_SIZE, PLT_INITIAL_ENTRY_SIZE, PLT_SLOT_SIZE): Remove.
(VXWORKS_PLT_ENTRY_SIZE, ppc_elf_vxworks_plt_entry,
ppc_elf_vxworks_pic_plt_entry, VXWORKS_PLT_INITIAL_ENTRY_SIZE,
ppc_elf_vxworks_plt0_entry, ppc_elf_vxworks_pic_plt0_entry,
VXWORKS_PLT_NON_JMP_SLOT_RELOCS, VXWORKS_PLTRESOLVE_RELOCS,
VXWORKS_PLTRESOLVE_RELOCS_SHLIB): New.
(ppc_elf_link_hash_table): Add srelplt2, sgotplt, hgot, hplt,
is_vxworks, plt_entry_size, plt_slot_size, plt_initial_entry_size.
(ppc_elf_link_hash_table_create): Initialize hadtab plt fields.
(ppc_elf_create_got): Create .got.plt for VxWorks.
(ppc_elf_create_dynamic_sections): Create unloaded plt relocation
section for VxWorks.
(ppc_elf_select_plt_layout): Handle VxWorks plt format.
(allocate_got): VxWorks does not need a got header.
(allocate_dynrelocs): Handle VxWorks plt format.
(ppc_elf_size_dynamic_sections): Save _G_O_T_ and _P_L_T_ symbols for
VxWorks. Handle VxWorks plt/got.
(ppc_elf_finish_dynamic_sections): Fill in VxWorks plt.
(ppc_elf_vxworks_special_sections): New.
(ppc_elf_vxworks_link_hash_table_create,
ppc_elf_vxworks_add_symbol_hook,
elf_i386_vxworks_link_output_symbol_hook,
ppc_elf_vxworks_final_write_processing): New functions.
* targets.c (bfd_elf32_powerpc_vxworks_vec): Declare.
(_bfd_target_vector): Use it.
gas/
* config/tc-ppc.c (ppc_target_format): Add VxWorks.
gas/testsuite/
* gas/ppc/altivec.d: Match all powerpc target vecs.
* gas/ppc/booke.d: Ditto.
* gas/ppc/e500.d: Ditto.
ld/
* Makefile.am (ALL_EMULATIONS): Add eelf32ppcvxworks.o.
(eelf32ppcvxworks.o): Add dependencies.
* Makefile.in: Regenerate.
* configure.tgt: Add entry for powerpc-vxworks.
* emulparams/elf32-ppc.c: Mention elf32ppcvxworks.sh in comment.
* emulparams/elf32ppcvxworks.sh: New file.
* emultempl/ppc32elf.em (bfd_elf32_powerpc_vxworks_vec): Declare.
(is_ppc_elf32_vec): New function.
(ppc_after_open, ppc_before_allocation,
gld${EMULATION_NAME}_after_allocation): Use it.
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* config/tc-ms1.h: New.
* testsuite/gas/ms1/allinsn.d: New.
* testsuite/gas/ms1/allinsn.s: New.
* testsuite/gas/ms1/badinsn.s: New.
* testsuite/gas/ms1/badinsn1.s: New.
* testsuite/gas/ms1/badoffsethigh.s: New.
* testsuite/gas/ms1/badoffsetlow.s: New.
* testsuite/gas/ms1/badorder.s: New.
* testsuite/gas/ms1/badreg.s: New.
* testsuite/gas/ms1/badsignedimmhigh.s: New.
* testsuite/gas/ms1/badsignedimmlow.s: New.
* testsuite/gas/ms1/badsyntax.s: New.
* testsuite/gas/ms1/badsyntax1.s: New.
* testsuite/gas/ms1/badunsignedimmhigh.s: New.
* testsuite/gas/ms1/badunsignedimmlow.s: New.
* testsuite/gas/ms1/errors.exp: New.
* testsuite/gas/ms1/ldst.s: New.
* testsuite/gas/ms1/misc.d: New.
* testsuite/gas/ms1/misc.s: New.
* testsuite/gas/ms1/ms1-16-003.d: New.
* testsuite/gas/ms1/ms1-16-003.s: New.
* testsuite/gas/ms1/ms1.exp: New.
* testsuite/gas/ms1/msys.d: New.
* testsuite/gas/ms1/msys.s: New.
* testsuite/gas/ms1/relocs.d: New.
* testsuite/gas/ms1/relocs.exp: New.
* testsuite/gas/ms1/relocs1.s: New.
* testsuite/gas/ms1/relocs2.s: New.
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2005-07-05 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.h (CpuSVME): New.
(CpuUnknownFlags): Include CpuSVME.
* config/tc-i386.c (cpu_arch): Add .pacifica and .svme. Add opteron
as alias of sledgehammer.
(md_assemble): Include invlpga in the check for insns with two source
operands.
(process_operands): Include SVME insns in the check for ignored
segment overrides. Adjust diagnostic.
(i386_index_check): Special-case SVME insns with memory operands.
gas/testsuite/
2005-07-05 Jan Beulich <jbeulich@novell.com>
* gas/i386/svme.d: New.
* gas/i386/svme.s: New.
* gas/i386/svme64.d: New.
* gas/i386/i386.exp: Run new tests.
include/opcode/
2005-07-05 Jan Beulich <jbeulich@novell.com>
* i386.h (i386_optab): Add new insns.
opcodes/
2005-07-05 Jan Beulich <jbeulich@novell.com>
* i386-dis.c (SVME_Fixup): New.
(grps): Use it for the lidt entry.
(PNI_Fixup): Call OP_M rather than OP_E.
(INVLPG_Fixup): Likewise.
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