aboutsummaryrefslogtreecommitdiff
path: root/gas/ChangeLog
AgeCommit message (Expand)AuthorFilesLines
2017-07-05[ARM] Add support for Cortex-A55 and Cortex-A75.James Greenhalgh1-0/+5
2017-07-05X86: Disassemble primary opcode map's group 2 ModRM.reg == 6 aliases correctlyBorislav Petkov1-0/+7
2017-07-05Fixup changelog entries for previous commitRamana Radhakrishnan1-0/+11
2017-07-04Regenerate configure.Tristan Gingold1-0/+4
2017-07-04Add markers.Tristan Gingold1-0/+4
2017-07-03Disable symver test on hppa64-hpuxAlan Modra1-0/+4
2017-07-01MIPS/GAS: Use a switch on relaxation type in microMIPS fixup creationMaciej W. Rozycki1-0/+5
2017-07-01MIPS/GAS: Use frag symbol/offset directly in fixup creationMaciej W. Rozycki1-0/+5
2017-07-01MIPS/GAS: Use non-zero frag offset directly in PIC branch relaxationMaciej W. Rozycki1-0/+14
2017-06-30Add support for a __gcc_isr pseudo isntruction to the AVR assembler.Georg-Johann Lay1-0/+36
2017-06-30MIPS/GAS: Update `match_float_constant' and `match_operand' descriptionsMaciej W. Rozycki1-0/+5
2017-06-30MIPS: Add microMIPS XPA supportMaciej W. Rozycki1-0/+8
2017-06-30MIPS: Add microMIPS R5 supportMaciej W. Rozycki1-0/+6
2017-06-30MIPS: Fix XPA base and Virtualization ASE instruction handlingMaciej W. Rozycki1-0/+14
2017-06-30MIPS/opcodes: Correctly combine ASE flags for ASE_MIPS16E2_MT calculationMaciej W. Rozycki1-0/+7
2017-06-30MIPS/GAS: Clear the ASE_MIPS16E2_MT flag for recalculationMaciej W. Rozycki1-0/+9
2017-06-28[AArch64] Add dot product support for AArch64 to binutilsTamar Christina1-0/+8
2017-06-28[ARM] Assembler and disassembler support Dot Product ExtensionJiong Wang1-0/+21
2017-06-28MIPS: Add new Imagination interAptiv MR2 GAS and LD testsMaciej W. Rozycki1-0/+39
2017-06-28MIPS: Add Imagination interAptiv MR2 GAS test infrastructureMaciej W. Rozycki1-0/+57
2017-06-28MIPS: Add Imagination interAptiv MR2 MIPS32r3 processor supportMaciej W. Rozycki1-0/+15
2017-06-27MIPS/GAS/testsuite: Drop the `mips16e-' prefix from SAVE/RESTORE testsMaciej W. Rozycki1-0/+17
2017-06-27MIPS/GAS/testsuite: Run SAVE/RESTORE tests across all MIPS16e architecturesMaciej W. Rozycki1-0/+13
2017-06-27MIPS/GAS/testsuite: Convert `mips16e-save-err' list test to a dump testMaciej W. Rozycki1-0/+6
2017-06-27MIPS/GAS/testsuite: Capitalize the name of the `mips16e-save' testMaciej W. Rozycki1-0/+5
2017-06-26RISC-V: Use pc-relative relocation for FDE initial locationKuan-Lin Chen1-0/+5
2017-06-26Check unsupported .symver with common symbolH.J. Lu1-0/+10
2017-06-26Fix compile time warning building gas for arm-wince target.Nick Clifton1-0/+4
2017-06-26Update check conditions for illegal placed instructions.claziss1-0/+10
2017-06-24[ARM] Add support for ARM Cortex-R52 processorThomas Preud'homme1-0/+6
2017-06-24[ARM] Add support for ARMv8-R in assembler and readelfThomas Preud'homme1-0/+68
2017-06-24[ARM] Remove ARMv6S-M special casingThomas Preud'homme1-0/+13
2017-06-23RISC-V: Error, don't warn, for shfit amounts/CSRsAndrew Waterman1-0/+5
2017-06-22Fix compile time warning about unused static variable.Nick Clifton1-0/+4
2017-06-21[ARM] Rework Tag_CPU_arch build attribute value selectionThomas Preud'homme1-0/+19
2017-06-21x86: CET v2.0: Update incssp and setssbsyH.J. Lu1-0/+9
2017-06-21x86: CET v2.0: Rename savessp to saveprevsspH.J. Lu1-0/+9
2017-06-21x86: CET v2.0: Update NOTRACK prefixH.J. Lu1-0/+16
2017-06-21[ARM] Allow Thumb division as an extension for ARMv7Thomas Preud'homme1-0/+11
2017-06-21[ARM] Rework selection of feature bits to base build attributes onThomas Preud'homme1-0/+6
2017-06-21[ARM] Simplify Tag_DSP_extension selection logicThomas Preud'homme1-0/+6
2017-06-21[ARM] Keep separation between extensions and architecture bits throughout exe...Thomas Preud'homme1-0/+31
2017-06-21[ARM] Separate extensions from architectures in arm_cpusThomas Preud'homme1-0/+11
2017-06-21Add support for the Cortex-A55 and Cortex-A75 versions of the AArch64 archite...James Greenhalgh1-0/+5
2017-06-15i386-dis: Add 2 tests with invalid bnd registerH.J. Lu1-0/+9
2017-06-14xtensa: don't expect XCHAL_* macros to be constantMax Filippov1-0/+11
2017-06-07Add support for AArch64 system register names IP0, IP1, FP and LR.Michael Collison1-0/+10
2017-06-06[Patch, ARM] Relax the restrictions on REG_SP under Thumb mode on ARMv8-AJiong Wang1-0/+21
2017-06-05Drop arm support for falkor/qdf24xx targets, not present in released hardware.Jim Wilson1-0/+5
2017-05-30[ARC] Add arc-cpu.def with processor definitionsAnton Kolesov1-0/+4
generated by cgit v1.1 at 2024-08-11 11:29:56 +0000