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2019-08-28RISC-V: Fix a gp relaxation reloc overflow error.Jim Wilson2-7/+16
This was broken when I changed how we compute the value for the gp register. It used to be computed inside the sdata section. Now it is computed at the end which makes it an abs section symbol. There is code that tries to use the alignment of the section that the gp value is in, but this does not work if it is in the abs section, as the abs section has alignment of 1 byte. There are people using alternative linker scripts that still define it in the sdata section, so the code is still useful. Thus adding a check to disable this when gp is in the abs section. bfd/ * elfnn-riscv.c (_bfd_riscv_relax_lui): Add check to exclude abs section when setting max_alignment. Update comment. (_bfd_riscv_relax_pc): Likewise.
2019-08-29Automatic date update in version.inGDB Administrator1-1/+1
2019-08-29PR24891, objdump memory leaks when parsing malformed archiveAlan Modra4-3/+24
BFD was leaking memory in bfd_check_format_matches. As part of deciding the proper format of an archive, BFD looks at the format of the first file stored. That file's bfd was left open for reasons given in a comment removed in git commit 0e71e4955cd1 that said: /* We ought to close `first' here, but we can't, because we have no way to remove it from the archive cache. It's close to impossible to figure out when we can release bfd_ardata. FIXME. */ Well, things have changed since that comment was true and we now can remove files from the archive cache. Closing the first file is good and cures some of the leaks. Other leaks are caused by bfd_check_format_matches throwing away bfd tdata before trying a new match. That lost the element cache set up when format checking the first element in the archive. The easiest and cleanest fix is to simply disable the caching when checking the first element. PR 24891 * bfd.c (struct bfd): Add no_element_cache. * archive.c (_bfd_get_elt_at_filepos): Don't add element to archive cache when no_element_cache. (bfd_generic_archive_p): Set no_element_cache when opening first element to check format. Close first element too. (do_slurp_bsd_armap): Don't zero ardata->cache here. * bfd-in2.h: Regenerate.
2019-08-28Automatic date update in version.inGDB Administrator1-1/+1
2019-08-27Automatic date update in version.inGDB Administrator1-1/+1
2019-08-26Automatic date update in version.inGDB Administrator1-1/+1
2019-08-25Automatic date update in version.inGDB Administrator1-1/+1
2019-08-24PowerPC64 segfault in ppc64_elf_edit_tocAlan Modra2-0/+10
Found on a GOT reference to __ehdr_start, which is tweaked to be undefined weak at some stages of linking. SYMBOL_REFERENCES_LOCAL isn't a sufficient test. * elf64-ppc.c (ppc64_elf_edit_toc): Exclude undefined weak symbols from GOT optimisation.
2019-08-24Automatic date update in version.inGDB Administrator1-1/+1
2019-08-23or1k: Fix incorrect value in PLT GOT entries, causing infinite loopStafford Horne2-2/+10
The PLT GOT entry should point to the first PLT entry which contains the runtime linker function. It was pointing back to the symbol PLT entry causing an infinite loop. I found this when testing the OpenRISC glibc port which uses the runtime dynamic linker. It seems other libc's we use so far have not been making use of the initial PLT GOT entries. bfd/ChangeLog: * elf32-or1k.c (or1k_elf_finish_dynamic_symbol): Use correct value for PLT GOT entries.
2019-08-23Stop the BFD library from failing when encountering a second set of relocs ↵Nick Clifton2-2/+19
for the same section. PR 24456 * elf.c (bfd_section_from_shdr): Issue an informative warning message and continue processing other sections after encountering a reloc section for a section which already has other relocs associated with it.
2019-08-23PR24933, Memory leak in elf_x86_64_get_synthetic_symtabAlan Modra2-3/+10
PR 24933 * elfxx-x86.c (_bfd_x86_elf_get_synthetic_symtab): Don't exit on error without freeing plts[] contents.
2019-08-23Automatic date update in version.inGDB Administrator1-1/+1
2019-08-22Arm: Add support for missing CPUsDennis Zhang2-0/+7
This patch adds support for following CPUs: Cortex-M35P, Cortex-A77, Cortex-A76AE. Related specifications can be found at https://developer.arm.com/ip-products/processors. gas/ChangeLog: * config/tc-arm.c: New entries for Cortex-M35P, Cortex-A77, and Cortex-A76AE. * doc/c-arm.texi: Document new processors. * testsuite/gas/arm/cpu-cortex-a76ae.d: New test. * testsuite/gas/arm/cpu-cortex-a77.d: New test. * testsuite/gas/arm/cpu-cortex-m35p.d: New test. bfd/ChangeLog: * cpu-arm.c: New entries for Cortex-M35P, Cortex-A77, Cortex-A76AE.
2019-08-22Fix an illegal memory access when dumping corrupt x86_64 PE unwind data.Nick Clifton2-9/+68
PR 24922 * pei-x86_64.c (pex64_xdata_print_uwd_codes): Add checks before reading data from extra records.
2019-08-22AArch64: Fix LD crash on weak and undefined TLS symbols. (PR/24602).Tamar Christina4-23/+88
This patch fixes a few linker crashes due to TLS code reaching an assert when it shouldn't. The first scenario is with weak TLS symbols that remain weak during linking. In this case the mid-end would not have seen a TLS symbol and so wouldn't have allocated the TLS section. We currently assert here and the linker crashes with a not very useful message. This patch changes this to return the value 0 for the TLS symbol in question emulating what lld and gold and other BFD targets do. However because weak TLS is implementation defined and we don't define any behavior for it I also emit a warning to the user to inform them of such. Secondly when a strong TLS reference is undefined. The linker crashes even after it correctly reported that there is an undefined reference. This changes it so that it gracefully exits and reports a useful error. bfd/ChangeLog: PR ld/24601 * elfnn-aarch64.c (aarch64_relocate): Handle weak TLS and undefined TLS. Also Pass input_bfd to _bfd_aarch64_elf_resolve_relocation. * elfxx-aarch64.c (_bfd_aarch64_elf_resolve_relocation): Use it. * elfxx-aarch64.h (_bfd_aarch64_elf_resolve_relocation): Emit warning for weak TLS. ld/ChangeLog: PR ld/24601 * testsuite/ld-aarch64/aarch64-elf.exp (undef-tls, weak-tls): New. * testsuite/ld-aarch64/undef-tls.d: New test. * testsuite/ld-aarch64/undef-tls.s: New test. * testsuite/ld-aarch64/weak-tls.d: New test. * testsuite/ld-aarch64/weak-tls.s: New test.
2019-08-22ARM CMSE symbolsAlan Modra2-20/+14
This patch removes use of st_target_internal to cache the result of comparing symbol names against CMSE_PREFIX. The problem with setting a bit in st_target_internal in swap_symbol_in is that calling bfd_elf_sym_name from swap_symbol_in requires symtab_hdr, and you don't know for sure whether swap_symbol_in is operating on dynsyms (and thus elf_tdata (abfd)->dynsymtab_hdr should be used) or on the normal symtab (thus elf_tdata (abfd)->symtab_hdr). You can make an educated guess based on abfd->flags & DYNAMIC but that relies on knowing a lot about calls to bfd_elf_get_elf_syms, and is fragile in the face of possible future changes. include/ * elf/arm.h (ARM_GET_SYM_CMSE_SPCL, ARM_SET_SYM_CMSE_SPCL): Delete. bfd/ * elf32-arm.c (cmse_scan): Don't use ARM_GET_SYM_CMSE_SPCL, instead recognize CMSE_PREFIX in symbol name. (elf32_arm_gc_mark_extra_sections): Likewise. (elf32_arm_filter_cmse_symbols): Don't test ARM_GET_SYM_CMSE_SPCL. (elf32_arm_swap_symbol_in): Don't invoke ARM_SET_SYM_CMSE_SPCL.
2019-08-22Automatic date update in version.inGDB Administrator1-1/+1
2019-08-21Automatic date update in version.inGDB Administrator1-1/+1
2019-08-20Adds support for following CPUs to the ARM and Aarch64 assemblers: ↵Dennis Zhang2-4/+10
Cortex-A77, Cortex-A76AE, Cortex-A34, Cortex-A65, and Cortex-A65AE. Related specifications can be found at https://developer.arm.com/ip-products/processors. gas * NEWS: Mention the Arm and AArch64 new processors. * config/tc-aarch64.c: New entries for Cortex-A34, Cortex-A65, Cortex-A77, cortex-A65AE, and Cortex-A76AE. * doc/c-aarch64.texi: Document new CPUs. * testsuite/gas/aarch64/cpu-cortex-a34.d: New test. * testsuite/gas/aarch64/cpu-cortex-a65.d: New test. * testsuite/gas/aarch64/cpu-cortex-a65ae.d: New test. * testsuite/gas/aarch64/cpu-cortex-a76ae.d: New test. * testsuite/gas/aarch64/cpu-cortex-a77.d: New test. * testsuite/gas/aarch64/nop-asm.s: New test. bfd * cpu-aarch64.c: New entries for Cortex-A34, Cortex-A65, Cortex-A77, cortex-A65AE, and Cortex-A76AE.
2019-08-20Arm: Fix performance issue with thumb-2 tailcallsTamar Christina2-9/+27
We currently use a padding NOP after a Thumb to Arm interworking veneer (BX pc). The NOP is never executed but may result in a performance penalty on some cores. For this reason this patch changes the NOPs after Thumb to Arm veneers into B .-2 and adds a note to this in the source code for future reference. bfd/ChangeLog: * elf32-arm.c (elf32_thumb2_plt_entry, elf32_arm_plt_thumb_stub, elf32_arm_stub_long_branch_v4t_thumb_thumb, elf32_arm_stub_long_branch_v4t_thumb_arm, elf32_arm_stub_short_branch_v4t_thumb_arm, elf32_arm_stub_long_branch_v4t_thumb_arm_pic, elf32_arm_stub_long_branch_v4t_thumb_thumb_pic, elf32_arm_stub_long_branch_v4t_thumb_tls_pic): Change nop to branch to previous instruction. ld/ChangeLog: * testsuite/ld-arm/cortex-a8-fix-b-plt.d: Update Testcase. * testsuite/ld-arm/cortex-a8-fix-b-rel-arm.d: Likewise. * testsuite/ld-arm/cortex-a8-fix-bcc-plt.d: Likewise. * testsuite/ld-arm/farcall-cond-thumb-arm.d: Likewise. * testsuite/ld-arm/farcall-mixed-app.d: Likewise. * testsuite/ld-arm/farcall-mixed-app2.d: Likewise. * testsuite/ld-arm/farcall-mixed-lib-v4t.d: Likewise. * testsuite/ld-arm/farcall-thumb-arm-pic-veneer.d: Likewise. * testsuite/ld-arm/farcall-thumb-arm-short.d: Likewise. * testsuite/ld-arm/farcall-thumb-arm.d: Likewise. * testsuite/ld-arm/farcall-thumb-thumb-pic-veneer.d: Likewise. * testsuite/ld-arm/farcall-thumb-thumb.d: Likewise. * testsuite/ld-arm/fix-arm1176-on.d: Likewise. * testsuite/ld-arm/ifunc-10.dd: Likewise. * testsuite/ld-arm/ifunc-2.dd: Likewise. * testsuite/ld-arm/ifunc-4.dd: Likewise. * testsuite/ld-arm/ifunc-6.dd: Likewise. * testsuite/ld-arm/ifunc-8.dd: Likewise. * testsuite/ld-arm/jump-reloc-veneers-long.d: Likewise. * testsuite/ld-arm/mixed-app.d: Likewise. * testsuite/ld-arm/thumb2-b-interwork.d: Likewise. * testsuite/ld-arm/tls-longplt.d: Likewise. * testsuite/ld-arm/tls-thumb1.d: Likewise.
2019-08-20Automatic date update in version.inGDB Administrator1-1/+1
2019-08-19Fix N^2 behavior in _bfd_dwarf2_find_symbol_biasTom Tromey2-10/+51
A customer reported a case where addr2line was very slow. We tracked this down to some N^2 behavior in _bfd_dwarf2_find_symbol_bias in the unusual case where no function can be found. This patch fixes the bug, and reduces the runtime for a particular request from 127 seconds to 1 second. bfd/ChangeLog 2019-08-19 Tom Tromey <tromey@adacore.com> * dwarf2.c (_bfd_dwarf2_find_symbol_bias): Create hash table holding symbols.
2019-08-19PowerPC64 ha/lo insn checksAlan Modra2-72/+109
These are done in ppc64_elf_edit_toc, which now also garbage collects unused GOT entries. The checks for legitimate instructions weren't being done for the GOT relocs, unless the file also happened to have a toc section. * elf64-ppc.c (struct ppc64_elf_obj_tdata): Rename has_gotrel to has_optrel. (struct _ppc64_elf_section_data): Likewise. (ppc64_elf_check_relocs): Set has_optrel for more relocs. (ppc64_elf_edit_toc): Do ha/lo insn checks in GOT loop rather than TOC loop. Check PLT16 insns too.
2019-08-19Automatic date update in version.inGDB Administrator1-1/+1
2019-08-18Automatic date update in version.inGDB Administrator1-1/+1
2019-08-17Automatic date update in version.inGDB Administrator1-1/+1
2019-08-16x86-64: Move PIC check for PC-relative relocations backH.J. Lu2-79/+77
commit 83924b3846361f2f76f9a6e7b5afa01c0eebbd4f Author: H.J. Lu <hjl.tools@gmail.com> Date: Tue Feb 5 18:45:23 2019 -0800 x86-64: Restore PIC check for PCREL reloc against protected symbol moved PIC check for PC-relative relocations to elf_x86_64_check_relocs. Since linker defined symbols may not be processed at the time, we need to move the check back to elf_x86_64_relocate_section. bfd/ PR ld/24905 * elf64-x86-64.c (elf_x86_64_check_relocs): Move PIC check for PC-relative relocations back to ... (elf_x86_64_relocate_section): Here. ld/ PR ld/24905 * testsuite/ld-x86-64/pr24905-x32.d: New file. * testsuite/ld-x86-64/pr24905.d: Likewise. * testsuite/ld-x86-64/pr24905.s: Likewise. * testsuite/ld-x86-64/pr24905.t: Likewise. * testsuite/ld-x86-64/x86-64.exp: Run pr24905 and pr24905-x32.
2019-08-16Fix detection of missing plugin for LTO objects.Martin Liska3-19/+15
2019-08-16 Martin Liska <mliska@suse.cz> PR ld/24912 * elflink.c: Report error only for not relocatable. * linker.c (_bfd_generic_link_add_one_symbol): Do not handle here lto_slim_object as it's handled in caller. 2019-08-16 Martin Liska <mliska@suse.cz> PR ld/24912 * object.cc (big_endian>::do_layout): Do not report error, but only set a flag. (big_endian>::do_add_symbols): Report error only for when relocatable.
2019-08-16Aligned vs. unaligned ppc32 relocsAlan Modra2-0/+12
Given R_PPC_ADDR32 or R_PPC_UADDR32 relocs, this patch generates R_PPC_ADDR32 or R_PPC_UADDR32 dynamic relocs from either type depending on whether r_offset is 4-byte aligned, and similarly for R_PPC_ADDR16/R_PPC_UADDR16. * elf32-ppc.c (ppc_elf_relocate_section): Optimize unaligned relocs.
2019-08-16Automatic date update in version.inGDB Administrator1-1/+1
2019-08-15RISC-V: Fix lui relaxation issue with code at address 0.Jim Wilson2-2/+20
This fixes a problem originally reported at https://github.com/riscv/riscv-binutils-gdb/issues/173 If you have code linked at address zero, you can have a lui instruction loading a value 0x800 which gets relaxed to a c.lui which is valid (c.lui 0x1 followed by addi -0x800). Relaxation can reduce the value below 0x800 at which point the c.lui 0x0 is no longer valid. We can fix this by converting the c.lui to a c.li which can load 0. bfd/ * elfnn-riscv.c (perform_relocation) <R_RISCV_RVC_LUI>: If RISCV_CONST_HIGH_PART (value) is zero, then convert c.lui instruction to c.li instruction, and use ENCODE_RVC_IMM to set value. ld/ * testsuite/ld-riscv-elf/c-lui-2.d: New. * testsuite/ld-riscv-elf/c-lui-2.ld: New. * testsuite/ld-riscv-elf/c-lui-2.s: New. * testsuite/ld-riscv-elf/ld-riscv-elf.exp: Run the c-lui-2 test.
2019-08-15Fix CU overrun in scan_unit_for_symbolsTom Tromey2-1/+6
A customer program had a DWARF CU that consisted of just a CU DIE, without any children. In this situation, scan_unit_for_symbols will try to read past the end of the current CU, and will take use the first bytes of the next CU as an abbrev, printing an error message. This patch fixes the bug by changing scan_unit_for_symbols to stop at the end of the CU rather than the end of the .debug_info section. bfd/ChangeLog 2019-08-15 Tom Tromey <tromey@adacore.com> * dwarf2.c (scan_unit_for_symbols): Check for end of CU, not end of section.
2019-08-15Automatic date update in version.inGDB Administrator1-1/+1
2019-08-14PR24623, DWARF errorsAlan Modra2-110/+139
PR 24623 * dwarf2.c (stash_comp_unit): New function, extracted from.. (_bfd_dwarf2_find_nearest_line): ..here. (find_abstract_instance): Parse comp units and decode line info as needed.
2019-08-14Use comp_unit_maybe_decode_line_info in more placesAlan Modra2-32/+11
* dwarf2.c (comp_unit_maybe_decode_line_info): Declare. (comp_unit_find_nearest_line): Use it here.. (_bfd_dwarf2_find_symbol_bias): ..and here.
2019-08-14Remove _bfd_dwarf2_find_nearest_line addr_size parameterAlan Modra11-24/+26
This parameter might appear to be used to set up offset_size, but since git commit 024b2372f5 offset_size is either set from the debug_info data or is set to 4. * dwarf2.c (_bfd_dwarf2_find_nearest_line): Remove addr_size parameter. * libbfd-in.h (_bfd_dwarf2_find_nearest_line): Update prototype. * coffgen.c (coff_find_nearest_line_with_names): Adjust _bfd_dwarf2_find_nearest_line calls. * elf.c (_bfd_elf_find_nearest_line, _bfd_elf_find_line): Likewise. * elf32-arm.c (elf32_arm_find_nearest_line): Likewise. * elf64-alpha.c (elf64_alpha_find_nearest_line): Likewise. * elfnn-aarch64.c (elfNN_aarch64_find_nearest_line): Likewise. * elfxx-mips.c (_bfd_mips_elf_find_nearest_line): Likewise. * mach-o.c (bfd_mach_o_find_nearest_line): Likewise. * libbfd.h: Regenerate.
2019-08-14Automatic date update in version.inGDB Administrator1-1/+1
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2019-08-09Add support for a MIPS specific .MIPS.xhash section.Mihailo Stojanovic6-10/+176
This patch is a reimplementation of [1] which was submitted in 2015 by Neil Schellenberger. Copyright issue was sorted out [2] last year. It proposed a new section (.gnu.xhash) and related dynamic tag (DT_GNU_XHASH). The new section would be virtually identical to the existing .gnu.hash except for the translation table (xlat) which would contain correct MIPS .dynsym indexes corresponding to the hashvals in chains. This is because MIPS ABI imposes a different ordering on the dynsyms than the one expected by the .gnu.hash section. Another addition would be a leading word (ngnusyms) which would contain the number of entries in the translation table. In this patch, the new section name and dynamic tag are changed to reflect the fact that the section should be treated as MIPS-specific (.MIPS.xhash and DT_MIPS_XHASH). This patch addresses the alignment issue as reported in [3], which is caused by the leading word added to the .MIPS.xhash section. Leading word is removed in this patch, and the number of entries in the translation table is now calculated using DT_MIPS_SYMTABNO dynamic tag (this is addressed by the corresponding glibc patch). Suggestions on coding style in [4] were taken into account. Existing GNU hash testcase was covered, and another one was added in the MIPS part of the testsuite. The other major change is reserving MIPS ABI version 5 for .MIPS.xhash, marking the need of support for .MIPS.xhash in the dynamic linker (again, addressed in the corresponding glibc patch). This is something which I am not sure of, especially after reading [5]. I am confused on whether this ABI version is reserved for IFUNC, or it can be used for this purpose. Already mentioned glibc patch is submitted at: https://sourceware.org/ml/libc-alpha/2019-06/msg00456.html [1] https://sourceware.org/ml/binutils/2015-10/msg00057.html [2] https://sourceware.org/ml/binutils/2018-03/msg00025.html [3] https://sourceware.org/ml/binutils/2016-01/msg00006.html [4] https://sourceware.org/ml/binutils/2016-02/msg00097.html [5] https://sourceware.org/ml/libc-alpha/2016-12/msg00853.html ld * emulparams/elf32bmip.sh: Add .MIPS.xhash section. * emulparams/elf32bmipn32-defs.sh: Add .MIPS.xhash section. * emulparams/elf64bmip-defs.sh: Add .MIPS.xhash section. * emultempl/mipself.em: Remove mips_after_parse function. * testsuite/ld-elf/hash.d: Update comment. * testsuite/ld-mips-elf/hash1.d: New test. * testsuite/ld-mips-elf/hash1.s: Ditto. * testsuite/ld-mips-elf/hash1a.d: Remove. * testsuite/ld-mips-elf/hash1b.d: Ditto. * testsuite/ld-mips-elf/hash1c.d: Ditto * testsuite/ld-mips-elf/hash2.d: New test. * testsuite/ld-mips-elf/mips-elf.exp: New tests. * testsuite/ld-mips-elf/start.s: New test. bfd * elf-bfd.h (struct elf_backend_data): New members. * elflink.c (_bfd_elf_link_create_dynamic_sections): Create .gnu.hash section if necessary. (struct collect_gnu_hash_codes): New member. (elf_gnu_hash_process_symidx): New function name. (elf_renumber_gnu_hash_syms): Ignore local and undefined symbols. Record xlat location for every symbol which should have a .MIPS.xhash entry. (bfd_elf_size_dynamic_sections): Add DT_GNU_HASH dynamic tag to dynamic section if necessary. (GNU_HASH_SECTION_NAME): New define. (bfd_elf_size_dynsym_hash_dynstr): Get .MIPS.xhash section. Update the section size info. * elfxx-mips.c (struct mips_elf_hash_sort_data): New members. (struct mips_elf_link_hash_entry): New member. (mips_elf_link_hash_newfunc): Initialize .MIPS.xhash translation table location. (mips_elf_sort_hash_table): Initialize the pointer to the .MIPS.xhash section. (mips_elf_sort_hash_table_f): Populate the .MIPS.xhash translation table entry with the symbol dynindx. (_bfd_mips_elf_section_from_shdr): Add SHT_MIPS_XHASH. (_bfd_mips_elf_fake_sections): Initialize .MIPS.xhash section info. (_bfd_mips_elf_create_dynamic_sections): Create .MIPS.xhash section. (_bfd_mips_elf_size_dynamic_sections): Add DT_MIPS_XHASH tag to dynamic section. (_bfd_mips_elf_finish_synamic_sections): Add DT_MIPS_XHASH. (_bfd_mips_elf_final_write_processing): Set .MIPS.xhash section sh_link info. (_bfd_mips_elf_get_target_dtag): Get DT_MIPS_XHASH tag. (MIPS_LIBC_ABI_XHASH): New ABI version enum value. (_bfd_mips_post_process_headers): Mark the ABI version as MIPS_LIBC_ABI_XHASH if there exists a .MIPS.xhash section, but not a .hash section. (_bfd_mips_elf_record_xhash_symbol): New function. Record a position in the translation table, associated with the hash entry. * elfxx-mips.h (literal_reloc_p): Define elf_backend_record_xhash_symbol backend hook. * elfxx-target.h: Initialize elf_backend_record_xhash_symbol backend hook. include * elf/mips.h (SHT_GNU_XHASH): New define. (DT_GNU_XHASH): New define. binutils * readelf.c (get_mips_dynamic_type): Return MIPS_XHASH dynamic type. (get_mips_section_type_name): Return MI{S_XHASH name string. (dynamic_section_mips_val): Initialize the .MIPS.xhash dynamic info. (process_symbol_table): Initialize the .MIPS.xhash section pointer. Adjust the readelf output to support the new section. (process_object): Set the .MIPS.xhash dynamic info to zero.
2019-08-09Automatic date update in version.inGDB Administrator1-1/+1
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2019-08-07bfd: use the ELF linker to perform relocations in BPF targetsJose E. Marchesi2-95/+193
This patch changes the eBPF linker to provide a relocate_section function instead of relying on using special functions in relocation howtos. Tested in x86_64 host. No regressions. bfd/ChangeLog: 2019-08-07 Jose E. Marchesi <jose.marchesi@oracle.com> * elf64-bpf.c (bpf_elf_relocate_section): New function. (bpf_elf_insn_disp_reloc): Delete function. (elf_backend_relocate_section): Define.
2019-08-07PR24644, OOM-Bug in _bfd_archive_64_bit_slurp_armapAlan Modra2-1/+14
PR 24644 * archive64.c (_bfd_archive_64_bit_slurp_armap): Properly check for overflow in expressions involving nsymz.
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