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2023-10-10asan: buffer overflow in elf32_arm_get_synthetic_symtabAlan Modra1-8/+16
Guard against fuzzed files where .plt size isn't commensurate with plt relocations. * elf32-arm.c (elf32_arm_plt0_size): Add data_size param. Return -1 if data_size is too small. (elf32_arm_plt_size): Likewise. Delete temp var. Formatting. (elf32_arm_get_synthetic_symtab): Adjust to suit.
2023-10-10asan: invalid free in bfd_init_section_compress_statusAlan Modra1-8/+8
With specially crafted compressed sections, it's possible to tickle a problem when decompressing: If the compression headers says the uncompressed size is zero, this will be seen as an error return from bfd_compress_section_contents. On errors the caller should free any malloc'd input buffers, but this isn't really an error and the section contents have been updated to a bfd_alloc'd buffer which can't be freed. * compress.c (bfd_compress_section_contents): Return -1 as error rather than 0. (bfd_init_section_compress_status, bfd_compress_section): Adjust.
2023-10-10Automatic date update in version.inGDB Administrator1-1/+1
2023-10-09Fix: Null pointer dereference in elf32-i386.cNick Clifton2-0/+10
PR 30950 * elf32-i386.c (elf_i386_convert_load_reloc): Check for elf_x86_hash_table returning a NULL pointer.
2023-10-09Fix: A potential bug of null pointer dereferenceNick Clifton2-1/+7
PR 30949 * elflink.c (elf_gc_mark_debug_section): Check for bfd_section_from_elf_index returning a NULL pointer.
2023-10-09Automatic date update in version.inGDB Administrator1-1/+1
2023-10-08Automatic date update in version.inGDB Administrator1-1/+1
2023-10-07Revert "opcodes: microblaze: Add new bit-field instructions"Michael J. Eager4-83/+2
This reverts commit 6bbf249557ba17cfebe01c67370df4da9e6a56f9. Maciej W. Rozycki <macro@orcam.me.uk>: Yet it has caused numerous regressions: microblaze-elf +FAIL: unordered .debug_info references to .debug_ranges microblaze-elf +FAIL: binutils-all/pr26548 microblaze-elf +FAIL: readelf -Wwi pr26548e (reason: unexpected output) microblaze-elf +FAIL: readelf --debug-dump=loc locview-1 (reason: unexpected output) Yet it has caused numerous regressions: microblaze-elf +FAIL: unordered .debug_info references to .debug_ranges microblaze-elf +FAIL: binutils-all/pr26548 microblaze-elf +FAIL: readelf -Wwi pr26548e (reason: unexpected output) ...
2023-10-07Automatic date update in version.inGDB Administrator1-1/+1
2023-10-06opcodes: microblaze: Add new bit-field instructionsNeal Frager4-2/+83
This patches adds new bsefi and bsifi instructions. BSEFI- The instruction shall extract a bit field from a register and place it right-adjusted in the destination register. The other bits in the destination register shall be set to zero. BSIFI- The instruction shall insert a right-adjusted bit field from a register at another position in the destination register. The rest of the bits in the destination register shall be unchanged. Further documentation of these instructions can be found here: https://docs.xilinx.com/v/u/en-US/ug984-vivado-microblaze-ref This patch has been tested for years of AMD Xilinx Yocto releases as part of the following patch set: https://github.com/Xilinx/meta-xilinx/tree/master/meta-microblaze/recipes-devtools/binutils/binutils Signed-off-by: nagaraju <nagaraju.mekala@amd.com> Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@amd.com> Signed-off-by: Neal Frager <neal.frager@amd.com> Signed-off-by: Michael J. Eager <eager@eagercon.com>
2023-10-06Fix: alpha: ld segfaults inNick Clifton2-2/+7
PR 30940 * elf64-alpha.c (elf64_alpha_check_relocs): Correct error message.
2023-10-06Automatic date update in version.inGDB Administrator1-1/+1
2023-10-05Fix: nm: SEGV at bfd/elf.c:2267 in _bfd_elf_get_dynamic_symbolsNick Clifton2-1/+7
PR 30904 * elf.c (_bfd_elf_get_dynamic_symbols): Fix typo when checking to see if the gnuchains array has been successfully created.
2023-10-05aarch64: Enable Cortex-X4 CPUSaurabh Jha1-1/+2
2023-10-05Automatic date update in version.inGDB Administrator1-1/+1
2023-10-04Automatic date update in version.inGDB Administrator1-1/+1
2023-10-03Automatic date update in version.inGDB Administrator1-1/+1
2023-10-02Use bfd_get_current_time in places where it is suitableNick Clifton2-11/+6
2023-10-02Automatic date update in version.inGDB Administrator1-1/+1
2023-10-01Automatic date update in version.inGDB Administrator1-1/+1
2023-09-30Automatic date update in version.inGDB Administrator1-1/+1
2023-09-29bfd: microblaze: Fix bug in TLSTPREL RelocationNeal Frager1-2/+2
Fixed the problem related to the fixup/relocations TLSTPREL. When the fixup is applied the addend is not added at the correct offset of the instruction. The offset is hard coded considering its big endian and it fails for Little endian. This patch allows support for both big & little-endian compilers. This patch has been tested for years of AMD Xilinx Yocto releases as part of the following patch set: https://github.com/Xilinx/meta-xilinx/tree/master/meta-microblaze/recipes-devtools/binutils/binutils Signed-off-by: nagaraju <nagaraju.mekala@amd.com> Signed-off-by: Neal Frager <neal.frager@amd.com>
2023-09-29x86-64: Add -z mark-plt and -z nomark-pltH.J. Lu4-2/+58
The PLT entry in executables and shared libraries contains an indirect branch, like jmp *foo@GOTPCREL(%rip) push $index_foo jmp .PLT0 or endbr64 jmp *foo@GOTPCREL(%rip) NOP padding which is used to branch to the function, foo, defined in another object. Each R_X86_64_JUMP_SLOT relocation has a corresponding PLT entry. The dynamic tags have been added to the x86-64 psABI to mark such PLT entries: https://gitlab.com/x86-psABIs/x86-64-ABI/-/commit/6d824a52a42d173eb838b879616c1be5870b593e Add an x86-64 linker option, -z mark-plt, to mark PLT entries with #define DT_X86_64_PLT (DT_LOPROC + 0) #define DT_X86_64_PLTSZ (DT_LOPROC + 1) #define DT_X86_64_PLTENT (DT_LOPROC + 3) 1. DT_X86_64_PLT: The address of the procedure linkage table. 2. DT_X86_64_PLTSZ: The total size, in bytes, of the procedure linkage table. 3. DT_X86_64_PLTENT: The size, in bytes, of a procedure linkage table entry. and set the r_addend field of the R_X86_64_JUMP_SLOT relocation to the memory offset of the indirect branch instruction. The dynamic linker can use these tags to update the PLT section to direct branch. bfd/ * elf-linker-x86.h (elf_linker_x86_params): Add mark_plt. * elf64-x86-64.c (elf_x86_64_finish_dynamic_symbol): Set the r_addend of R_X86_64_JUMP_SLOT to the indirect branch offset in PLT entry for -z mark-plt. * elfxx-x86.c (_bfd_x86_elf_size_dynamic_sections): Add DT_X86_64_PLT, DT_X86_64_PLTSZ and DT_X86_64_PLTENT for -z mark-plt. (_bfd_x86_elf_finish_dynamic_sections): Set DT_X86_64_PLT, DT_X86_64_PLTSZ and DT_X86_64_PLTENT. (_bfd_x86_elf_get_synthetic_symtab): Ignore addend for JUMP_SLOT relocation. (_bfd_x86_elf_link_setup_gnu_properties): Set plt_indirect_branch_offset. * elfxx-x86.h (elf_x86_plt_layout): Add plt_indirect_branch_offset. binutils/ * readelf.c (get_x86_64_dynamic_type): New function. (get_dynamic_type): Call get_x86_64_dynamic_type. include/ * elf/x86-64.h (DT_X86_64_PLT): New. (DT_X86_64_PLTSZ): Likewise. (DT_X86_64_PLTENT): Likewise. ld/ * ld.texi: Document -z mark-plt and -z nomark-plt. * emulparams/elf32_x86_64.sh: Source x86-64-plt.sh. * emulparams/elf_x86_64.sh: Likewise. * emulparams/x86-64-plt.sh: New file. * testsuite/ld-x86-64/mark-plt-1.s: Likewise. * testsuite/ld-x86-64/mark-plt-1a-x32.d: Likewise. * testsuite/ld-x86-64/mark-plt-1a.d: Likewise. * testsuite/ld-x86-64/mark-plt-1b-x32.d: Likewise. * testsuite/ld-x86-64/mark-plt-1b.d: Likewise. * testsuite/ld-x86-64/mark-plt-1c-x32.d: Likewise. * testsuite/ld-x86-64/mark-plt-1c.d: Likewise. * testsuite/ld-x86-64/mark-plt-1d-x32.d: Likewise. * testsuite/ld-x86-64/mark-plt-1d.d: Likewise. * testsuite/ld-x86-64/x86-64.exp: Run -z mark-plt tests.
2023-09-29Fix: Segmentation fault caused by npd in objdumpNick Clifton2-2/+12
PR 30906 * elf.c (_bfd_elf_slurp_version_tables): Test that the verref section header has been initialised before using it.
2023-09-29Automatic date update in version.inGDB Administrator1-1/+1
2023-09-28Fix: nm: SEGV on unknow address at nm.c:718 in print_symnameNick Clifton3-9/+42
PR 30886 * elf-bfd.h (struct elf_obj_tdata): Add dt_strsz field. * elf.c (_bfd_elf_get_dynamic_symbols): Add a NUL byte at the end of the string table. Initialise the dt_strsz field. (_bfd_elf_slurp_version_tables): Only free the contents if they were malloc'ed. Add checks before setting string pointers in the dt_strtab buffer.
2023-09-28Automatic date update in version.inGDB Administrator1-1/+1
2023-09-27nm: heap-buffer-overflow at elfcode.h:1507 in bfd_elf64_slurp_symbol_tableNick Clifton2-2/+11
PR 30885 * elfcode.h (elf_slurp_symbol_table): Compute the symcount for non dynamic symbols in the same way as _bfd_elf_get_symtab_upper_bound.
2023-09-27Add support for "pcaddi rd, symbol"mengqinggang1-2/+2
Add a macro pcaddi instruction to support "pcaddi rd, symbol". pcaddi has a 20-bit signed immediate, it can address a +/- 2MB pc relative address, and the address should be 4-byte aligned.
2023-09-27Automatic date update in version.inGDB Administrator1-1/+1
2023-09-26Allow the use of SOURCE_DATE_EPOCH in the timestamps for members of static ↵Nick Clifton4-6/+82
archives. (For some reason this commit was not applied at the time that the patch was approved).
2023-09-26Automatic date update in version.inGDB Administrator1-1/+1
2023-09-25Revert "arc: Add new ARCv3 ISA to BFD."Claudiu Zissulescu17-1592/+824
This reverts commit 06e8d9861d16c5b7e6920ad0e89889ccf45c575a.
2023-09-25Revert "arc: Update bfd arc pattern file to allow enable-targets=all"Claudiu Zissulescu1-9/+5
This reverts commit 5e5116071b09e187ee3c6b7e86e86114f6a65ef3.
2023-09-25arc: Update bfd arc pattern file to allow enable-targets=allClaudiu Zissulescu1-5/+9
The ARC backend uses a BFD pattern file to generate three ARC targets: - an BFD ARC target for ARCv1 and ARCv2 CPU families. It also works for big-endian variants. - an BFD ARC64 target for ARCv3 64bit machines. It also allows working with ARCv3 32bit machines. - an BFD ARC32 target for ARCv4 32bit machines. It also allows working with ARCv3 64bit machines. When configuring with `--enable-targets=all` some patterns are defined multiple times. Fix this issue. Signed-off-by: Claudiu Zissulescu <claziss@gmail.com>
2023-09-25arc: Add new ARCv3 ISA to BFD.Claudiu Zissulescu17-824/+1592
The new Synopsys's ARCv3 ISA is capable to run either 64-bit or 32-bit ISA. The new 32-bit ISA is not compatible with the old Synopsys ARCv1/ARCv2 ISA, however, it retains a lot of common concepts. Thus, this patch is reusing the old ARC BFD backend and adds the necessary bits for the new architecture in a similar way as it is done for RISCV backend. bfd/ xxxx-xx-xx Claudiu Zissulescu <claziss@synopsys.com> Cupertino Miranda <cupertinomiranda@gmail.com> * bfd/Makefile.am: Add ARC64 files. * bfd/Makefile.in: Regerate. * bfd/arc-got.h (TCB_SIZE): Depends on the target architecture. (GOT_ENTRY_SIZE): New define. (write_in_got): Likewise. (read_from_got): Likewise. (align_power): Likewise. (arc_got_entry_type_for_reloc): Use RELA_SIZE and GOT_ENTRY_SIZE. (arc_fill_got_info_for_reloc): Update formating. (relocate_fix_got_relocs_for_got_info): Likewise. (arc_static_sym_data): Deleted structure. (get_static_sym_data): Deleted function. (relocate_fix_got_relocs_for_got_info): Use symbol static data. (create_got_dynrelocs_for_single_entry): Update formating. (create_got_dynrelocs_for_got_info): Likewise. * bfd/arc-plt.c: New file. * bfd/arc-plt.def: Add ARC64 PLT entry. * bfd/arc-plt.h: Clean it up, move functionality to arc-plt.c file. * bfd/archures.c: Add ARC64 target. * bfd/config.bfd: Likewise. * bfd/configure.ac: Likewise. * bfd/bfd-in2.h: Regenerate. * bfd/configure: Likewise. * bfd/libbfd.h: Likewise. * bfd/cpu-arc.c: Clean it up. * bfd/cpu-arc64.c: New file. * bfd/elf32-arc.c: Renamed to elfnn-arc.c. * bfd/elfnn-arc.c: New file. * bfd/reloc.c: Add new ARC64 relocs. * bfd/targets.c: Add ARC64 target. Signed-off-by: Claudiu Zissulescu <claziss@synopsys.com>
2023-09-25Automatic date update in version.inGDB Administrator1-1/+1
2023-09-24Automatic date update in version.inGDB Administrator1-1/+1
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2023-09-20PR30870, VMS_DEBUG compilation errorSong Mengzhi1-1/+1
Introduced by 8169954446. PR 30870 * vms-alpha.c (image_write): Remove extraneous parenthesis.
2023-09-20Automatic date update in version.inGDB Administrator1-1/+1
2023-09-20elf-attrs.c memory allocation failAlan Modra2-31/+62
Report errors rather than segfaulting. bfd/ * elf-attrs.c (elf_new_obj_attr): Return NULL on bfd_alloc fail. (bfd_elf_add_obj_attr_int): Handle NULL return from the above, and propagate return to callers. (elf_add_obj_attr_string, elf_add_obj_attr_int_string): Likewise. (bfd_elf_add_obj_attr_string): Similarly. (_bfd_elf_copy_obj_attributes): Report error on alloc fails. (_bfd_elf_parse_attributes): Likewise. * elf-bfd.h (bfd_elf_add_obj_attr_int): Update prototype. (bfd_elf_add_obj_attr_string): Likewise. (bfd_elf_add_obj_attr_int_string): Likewise. gas/ * config/obj-elf.c (obj_elf_vendor_attribute): Report fatal error on out of memory from bfd attribute functions. * config/tc-arc.c (arc_set_attribute_int): Likewise. (arc_set_attribute_string, arc_set_public_attributes): Likewise. * config/tc-arm.c (aeabi_set_attribute_int): Likewise. (aeabi_set_attribute_string): Likewise. * config/tc-mips.c (mips_md_finish): Likewise. * config/tc-msp430.c (msp430_md_finish): Likewise. * config/tc-riscv.c (riscv_write_out_attrs): Likewise. * config/tc-sparc.c (sparc_md_finish): Likewise. * config/tc-tic6x.c (tic6x_set_attribute_int): Likewise. * config/tc-csky.c (md_begin): Likewise. (set_csky_attribute): Return ok status.
2023-09-19Automatic date update in version.inGDB Administrator1-1/+1
2023-09-18Automatic date update in version.inGDB Administrator1-1/+1
2023-09-17Automatic date update in version.inGDB Administrator1-1/+1
2023-09-16Automatic date update in version.inGDB Administrator1-1/+1
2023-09-15arc: Fix alignment of the TLS Translation Control BlockClaudiu Zissulescu1-4/+17
The R_ARC_TLS_LE_32 is defined as S + A + TLS_TBSS - TLS_REL, where - S is the base address of the symbol in the memory - A is the symbol addendum - TLS_TBSS is the TLS Translation Control Block size (aligned) - TLS_REL is the base of the TLS section Given the next code snip: __thread int data_var = 12; __attribute__((__aligned__(128))) __thread int data_var_128 = 128; __thread int bss_var; __attribute__((__aligned__(256))) __thread int bss_var_256; int __start(void) { return data_var + data_var_128 + bss_var + bss_var_256; } The current code returns different TLS_TBSS values for .tdata and .tbss. This patch fixes this by using the linker provided tls_sec. bfd/ * elf32-arc.c (TLS_REL): Clean up. (TLS_TBSS): Use tls_sec alignment. (arc_do_relocation): Check if we have valid tls_sec. Signed-off-by: Claudiu Zissulescu <claziss@gmail.com>
2023-09-15Automatic date update in version.inGDB Administrator1-1/+1
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