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path: root/bfd/reloc.c
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2019-05-24PowerPC relocations for prefix insnsAlan Modra1-0/+34
2019-05-23bfd: add support for eBPFJose E. Marchesi1-0/+13
2019-05-06PowerPC reloc symbols that shouldn't be adjustedAlan Modra1-8/+8
2019-04-15[binutils, ARM, 16/16] Add support to VLDR and VSTR of system registersAndre Vieira1-0/+2
2019-04-15[binutils, ARM, 12/16] Scalar Low Overhead loop instructions for Armv8.1-M Ma...Andre Vieira1-0/+5
2019-04-15[binutils, ARM, 11/16] New BFCSEL instruction for Armv8.1-M MainlineAndre Vieira1-0/+5
2019-04-15[binutils, ARM, 10/16] BFCSEL infrastructure with new global reloc R_ARM_THM_...Andre Vieira1-0/+5
2019-04-15[binutils, ARM, 8/16] BFL infrastructure with new global reloc R_ARM_THM_BF18Andre Vieira1-0/+5
2019-04-15[binutils, ARM, 5/16] BF insns infrastructure with new global reloc R_ARM_THM...Andre Vieira1-0/+5
2019-04-15[binutils, ARM, 3/16] BF insns infrastructure with new bfd_reloc_code_real fo...Andre Vieira1-0/+5
2019-01-16S12Z: Emit RELOC_S12Z_OPR instead of RELOC_EXT24 where appropriate.John Darrington1-0/+5
2019-01-01Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2018-10-13_bfd_clear_contents bounds checkingAlan Modra1-6/+13
2018-10-05or1k: Add the l.adrp insn and supporting relocationsStafford Horne1-0/+24
2018-10-05or1k: Add relocations for high-signed and low-storesRichard Henderson1-3/+9
2018-09-20Andes Technology has good news for you, we plan to update the nds32 port of b...Nick Clifton1-7/+41
2018-09-14PR23425, unresolved symbol diagnosticAlan Modra1-1/+12
2018-08-31PowerPC64 higher REL16 relocationsAlan Modra1-0/+12
2018-08-21Pack reloc_howto_structAlan Modra1-59/+51
2018-08-21Delete NEWHOWTO and tidy some uses of reloc_howto_structAlan Modra1-29/+2
2018-08-11Factor out common relocation processingAlan Modra1-244/+108
2018-08-11Deal with relocations which are 3 bytes in sizeJohn Darrington1-4/+21
2018-08-05R_PPC64_REL24_NOTOC supportAlan Modra1-0/+2
2018-07-30Add support for the C_SKY series of processors.Andrew Jenner1-0/+133
2018-06-18Add support for the TLV relocation generated by LLVM for x86_64 MACH-O targets.Mephi1-0/+4
2018-05-18Add support for the Freescale s12z processor.John Darrington1-0/+17
2018-04-25[ARM] Add TLS relocations for FDPIC.Christophe Lyon1-0/+6
2018-04-25[ARM] Add FDPIC relocations definitionsChristophe Lyon1-0/+11
2018-04-17[MicroBlaze] PIC data text relativeMichael Eager1-0/+12
2018-04-16Remove m88k supportAlan Modra1-10/+10
2018-04-11Remove i860, i960, bout and aout-adobe targetsAlan Modra1-80/+4
2018-03-28[1/2][GAS][AARCH64]Add BFD_RELOC_AARCH64_TLSLE_LDST8/16/32/64_TPREL_LO12 supp...Renlin Li1-0/+46
2018-02-26BFD messagesAlan Modra1-2/+2
2018-02-26unrecognized/unsupported reloc messageAlan Modra1-1/+1
2018-02-19Use %pI, %pR, %pS, %pT in place of %I, %R, %S and %T.Alan Modra1-3/+3
2018-02-19Use %pA and %pB in messages rather than %A and %BAlan Modra1-5/+5
2018-02-16Remove bfd stub function casts.Alan Modra1-0/+23
2018-01-24[GAS][AARCH64]Add group relocations to create PC-relative offset.Renlin Li1-0/+37
2018-01-03Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2017-12-06BFD whitespace fixesAlan Modra1-136/+136
2017-11-28Fix a memory access violation when attempting to parse a corrupt COFF binary ...users/ARM/embedded-gdb-master-2017q4users/ARM/embedded-binutils-master-2017q4Nick Clifton1-6/+34
2017-11-01FT32B is a new FT32 family member. It has a code compression scheme, which re...James Bowman1-0/+8
2017-10-12FT32: support for FT32B processor - part 1James Bowman1-0/+2
2017-10-12Force the AArch64 linker backend to refuse to link when it encounters unresol...Nick Clifton1-2/+3
2017-07-24Improve "unrecognized relocation" error messages to add the suggestion that t...Nick Clifton1-6/+37
2017-07-19[ARC] Add JLI support.John Eric Martin1-0/+2
2017-06-26RISC-V: Use pc-relative relocation for FDE initial locationKuan-Lin Chen1-0/+2
2017-06-23[AArch64] Fix typo in comments on relocation nameJiong Wang1-2/+2
2017-06-21Fix seg-fault in the BFD parsing a corrupt input binary.Nick Clifton1-0/+3
2017-05-10bfd: new BFD target entry point _bfd_set_reloc.Jose E. Marchesi1-0/+26