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2016-06-17bfd,opcodes: sparc: new opcode v9{c,d,e,v,m} architectures and bfd machine ↵Jose E. Marchesi12-16/+382
numbers. This patch adds support for the opcode architectures SPARC_OPCODE_ARCH_V9{C,D,E,V,M} and its associated BFD machine numbers bfd_mach_sparc_v9{c,d,e,v,m} and bfd_mach_sparc_v8plus{c,d,e,v,m}. Note that for arches up to v9b (UltraSPARC III), the detection of the BFD machine type was based on the bits in the e_machine field of the ELF header. However, there are no more available bits in that field, so this patch takes the approach of using the hardware capabilities stored in the object attributes HWCAPS/HWCAPS2 in order to characterize the machine the object was built for. bfd/ChangeLog: 2016-06-17 Jose E. Marchesi <jose.marchesi@oracle.com> * archures.c (bfd_mach_sparc_v8plusc): Define. (bfd_mach_sparc_v9c): Likewise. (bfd_mach_sparc_v8plusd): Likewise. (bfd_mach_sparc_v9d): Likewise. (bfd_mach_sparc_v8pluse): Likewise. (bfd_mach_sparc_v9e): Likewise. (bfd_mach_sparc_v8plusv): Likewise (bfd_mach_sparc_v9v): Likewise. (bfd_mach_sparc_v8plusm): Likewise. (bfd_mach_sparc_v9m): Likewise. (bfd_mach_sparc_v9_p): Adapt to v8plusm and v9m. (bfd_mach_sparc_64bit_p): Likewise. * bfd-in2.h: Regenerate. * cpu-sparc.c (arch_info_struct): Add entries for bfd_mach_sparc_v8plus{c,d,e,v,m} and bfd_mach_sparc_v9{c,d,e,v,m}. * aoutx.h (machine_type): Handle bfd_mach_sparc_v8plus{c,d,e,v,m} and bfd_mach_sparc_v9{c,d,e,v,m}. * elf32-sparc.c (elf32_sparc_final_write_processing): Likewise. * elfxx-sparc.c (_bfd_sparc_elf_object_p): Likewise. include/ChangeLog: 2016-06-17 Jose E. Marchesi <jose.marchesi@oracle.com> * opcode/sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9C, SPARC_OPCODE_ARCH_V9D, SPARC_OPCODE_ARCH_V9E, SPARC_OPCODE_ARCH_V9V and SPARC_OPCODE_ARCH_V9M. opcodes/ChangeLog: 2016-06-17 Jose E. Marchesi <jose.marchesi@oracle.com> * sparc-dis.c (MASK_V9): Add SPARC_OPCODE_ARCH_V9{C,D,E,V,M}. (compute_arch_mask): Handle bfd_mach_sparc_v8plus{c,d,e,v,m} and bfd_mach_sparc_v9{c,d,e,v,m}. * sparc-opc.c (MASK_V9C): Define. (MASK_V9D): Likewise. (MASK_V9E): Likewise. (MASK_V9V): Likewise. (MASK_V9M): Likewise. (v6): Add MASK_V9{C,D,E,V,M}. (v6notlet): Likewise. (v7): Likewise. (v8): Likewise. (v9): Likewise. (v9andleon): Likewise. (v9a): Likewise. (v9b): Likewise. (v9c): Define. (v9d): Likewise. (v9e): Likewise. (v9v): Likewise. (v9m): Likewise. (sparc_opcode_archs): Add entry for v9{c,d,e,v,m}.
2016-06-17Automatic date update in version.inGDB Administrator1-1/+1
2016-06-16Add missing ChangeLog entriesH.J. Lu2-0/+13
commit bf52d7c72035679e6b3ab601133c56a4388f4dc9 Author: H.J. Lu <hjl.tools@gmail.com> Date: Wed Jun 15 10:35:38 2016 -0700 Don't check undefined symbol for IFUNC reloc
2016-06-16Don't check undefined symbol for IFUNC relocH.J. Lu5-18/+31
Since x86 elf_*_check_relocs is called after all symbols have been resolved, there is no need to check undefined symbols for relocations against IFUNC symbols. bfd/ * elf32-i386.c (elf_i386_check_relocs): Don't check undefined symbols for relocations against IFUNC symbols. * elf64-x86-64.c (elf_x86_64_check_relocs): Likewise. ld/ * testsuite/ld-i386/i386.exp: Run pr19636-2e-nacl. * testsuite/ld-i386/pr19636-2e.d: Skip for NaCl targets. Remove .rel.plt section. * testsuite/ld-i386/pr19636-2e-nacl.d: New file.
2016-06-16bfd/s390: Fix DT_PLTRELSZ in presence of R_390_IRELATIVE.Marcin Kościelnicki3-6/+10
This was broken by 4ade44b727ee77adaa9c22719935d012e253a5e6, which changed the calculation to use the .rela.plt linker section instead of its output section - thus skipping .rela.iplt . Fix the calculations to include it. bfd/ChangeLog: * elf32-s390.c (elf_s390_finish_dynamic_sections): Include .rela.iplt in DT_PLTRELSZ. * elf64-s390.c (elf_s390_finish_dynamic_sections): Likewise, for DT_PLTRELSZ and DT_RELASZ as well.
2016-06-16Skip relocations in non-loaded, non-alloced sectionsH.J. Lu3-28/+49
Don't do anything special with non-loaded, non-alloced sections. In particular, any relocs in such sections should not affect GOT and PLT reference counting (ie. we don't allow them to create GOT or PLT entries), there's no possibility or desire to optimize TLS relocs, and there's not much point in propagating relocs to shared libs that the dynamic linker won't relocate. * elf32-i386.c (elf_i386_check_relocs): Skip relocations in non-loaded, non-alloced sections. * elf64-x86-64.c (elf_x86_64_check_relocs): Likewise.
2016-06-15Check SEC_ALLOC before allocating dynamic relocationH.J. Lu3-28/+32
* elf32-i386.c (elf_i386_check_relocs): Check SEC_ALLOC before allocating dynamic relocation. * elf64-x86-64.c (elf_x86_64_check_relocs): Likewise.
2016-06-16Automatic date update in version.inGDB Administrator1-1/+1
2016-06-15X86: Add tests for static function pointerH.J. Lu24-6/+116
* testsuite/ld-i386/no-plt-check1a.S (check): Test static function pointer. * testsuite/ld-i386/no-plt-check1b.S (check): Likewise. * testsuite/ld-x86-64/no-plt-check1.S (check): Likewise. * testsuite/ld-i386/no-plt-extern1a.S (func_p): New. Static function pointer. * testsuite/ld-i386/no-plt-extern1b.S (func_p): Likewise. * testsuite/ld-x86-64/no-plt-extern1.S (func_p): Likewise. * testsuite/ld-i386/no-plt-1a.dd: Updated. * testsuite/ld-i386/no-plt-1b.dd: Likewise. * testsuite/ld-i386/no-plt-1c.dd: Likewise. * testsuite/ld-i386/no-plt-1d.dd: Likewise. * testsuite/ld-i386/no-plt-1e.dd: Likewise. * testsuite/ld-i386/no-plt-1f.dd: Likewise. * testsuite/ld-i386/no-plt-1g.dd: Likewise. * testsuite/ld-i386/no-plt-1h.dd: Likewise. * testsuite/ld-i386/no-plt-1i.dd: Likewise. * testsuite/ld-i386/no-plt-1j.dd: Likewise. * testsuite/ld-x86-64/no-plt-1a.dd: Likewise. * testsuite/ld-x86-64/no-plt-1b.dd: Likewise. * testsuite/ld-x86-64/no-plt-1c.dd: Likewise. * testsuite/ld-x86-64/no-plt-1d.dd: Likewise. * testsuite/ld-x86-64/no-plt-1e.dd: Likewise. * testsuite/ld-x86-64/no-plt-1f.dd: Likewise. * testsuite/ld-x86-64/no-plt-1g.dd: Likewise.
2016-06-15Fix simple gas testsuite failures.Nick Clifton35-543/+682
binutils* readelf.c (is_24bit_abs_reloc): Add support for R_FT32_20 reloc. gas * config/tc-ft32.c (md_assemble): Call dwarf2_emit_insn with the instruction size. * config/tc-mcore.c (md_assemble): Likewise. * config/tc-mn10200.c (md_assemble): Likewise. * config/tc-moxie.c (md_assemble): Likewise. * config/tc-pj.c (md_apply_fix): Handle BFD_RELOC_PJ_CODE_REL32. * testsuite/gas/all/gas.exp (diff1 test): Alpha sort list of exception targets. Add alpha, hppa, microblaze and rl78 to list of exceptions. (forward): Add microblaze to list of exceptions. (fwdexp): Add alpha to list of exceptions. (redef2): Add arm-epoc-pe and rl78 to list of exceptions. (redef3): Add rl78 and x86_64 cygwin to list of exceptions. (do_930509a): Alpha sort list of exception targets. Add h8300 and mn10200 to list of exceptions. (align2): Expect to fail for nds32. (cond): Add alpha and rl78 to list of exceptions. * testsuite/gas/all/none.d: Skip for ft32 and hppa. * testsuite/gas/all/string.d: Skip for tic4x. * testsuite/gas/alpha/alpha.exp: Note that the alpha-linuxecoff target does not support ELF. * testsuite/gas/arm/blx-bl-convert.dL Skip for the nto target. * testsuite/gas/cfi/cfi-alpha-2.d: All extended format names. * testsuite/gas/cfi/cfi.exp: Alpha sort list of targets. Skip SH tests for sh-pe and sh-rtemscoff targets. * testsuite/gas/elf/elf.exp (redef): Add rl78, xgate and vax to list of exceptions. (type): Run the noifunc version for alpha-freebsd and visium. * testsuite/gas/elf/warn-2.s: Do not expect to fail on the mcore, mn10200 or moxie targets. * testsuite/gas/ft32/insn.d: Update expected disassembly. * testsuite/gas/i386/i386.exp (x86-64-pcrel): Skip for cygwin targets. * testsuite/gas/lns/lns.exp (lns-common-1): No longer skip for mcore and rx targets. * testsuite/gas/macros/macros.exp (dot): Add exceptions for ns32k, rl78 and vax. (purge): Expect to fail on the ns32k and vax. * testsuite/gas/nds32/alu-2.d: Update expected disassembly. * testsuite/gas/nds32/ls.d: Likewise. * testsuite/gas/nds32/sys-reg.d: Likewise. * testsuite/gas/nds32/usr-spe-reg.d: Likewise. * testsuite/gas/pe/aligncomm-d.d: Skip for the sh. * testsuite/gas/pe/section-align-3.d: Likewise. * testsuite/gas/pe/section-exclude.d: Likewise. * testsuite/gas/ppc/test2xcoff32.d: Pass once all the required data has been seen. * testsuite/gas/ppc/textalign-xcoff-001.d: Fix up regexp to allow for variations in whitespace. * testsuite/gas/tilepro/t_constants.d: Pass once all the required data has been seen. * testsuite/gas/tilepro/t_constants.s (.safe_word): New macro. Installs a 32-bit value without generating warnings on 64-bit hosts. Use the new macro to replace the .word directives. opcodes * nds32-dis.c (nds32_parse_audio_ext): Change printing of integer constants to match expected behaviour. (nds32_parse_opcode): Likewise. Also for whitespace.
2016-06-15opcodes/arc: Fix extract for some add_s instructionsAndrew Burgess5-1/+22
The extract function used for some arc_s instructions was not implemented, and instead always returned 0. Fixed in this commit. opcodes/ChangeLog: * arc-opc.c (extract_rhv1): Extract value from insn. gas/ChangeLog: * testsuite/gas/arc/add_s.d: New file. * testsuite/gas/arc/add_s.s: New file.
2016-06-15Fix PR ld/20254Senthil Kumar Selvaraj5-2/+48
This patch fixes another edge case related to alignment property records - reloc offsets adjacent to property record offsets were not getting adjusted during relaxation. bfd/ PR ld/20254 * elf32-avr.c (elf32_avr_relax_delete_bytes): Adjust reloc offsets until reloc_toaddr. ld/ PR ld/20254 * testsuite/ld-avr/avr-prop-6.d: New test. * testsuite/ld-avr/avr-prop-6.s: New test.
2016-06-15Automatic date update in version.inGDB Administrator1-1/+1
2016-06-14opcode/gas: Fix incorrect dates on ChangeLog entriesGraham Markall2-6/+6
When committing three recent patches incorrect dates were left on the ChangeLog entries in gas/ChangeLog and opcodes/ChangeLog. Fixed in this commit.
2016-06-14Remove unneeded checks on type lengths.John Baldwin2-1/+5
Type lengths are unsigned, so they are always greater than or equal to zero. A check against the length of 'tgt_type' is retained to prevent dividing by zero. gdb/ChangeLog: * v850-tdep.c (v850_use_struct_convention): Trim type length checks.
2016-06-14Pass a NULL pointer as the last argument to find_pc_partial_function.John Baldwin2-1/+5
gdb/ChangeLog: * tui/tui-stack.c (tui_show_frame_info): Fix type mismatch.
2016-06-14Initialize 'ra' to zero to avoid uninitialized use.John Baldwin2-0/+5
If the instruction in this case does not include an RA field, then 'ra' is used uninitialized. Use the same idiom used elsewhere in this file of initializing ra to zero before check for an RA field. gdb/ChangeLog: * rs6000-tdep.c (ppc_process_record_op31): Initialize ra.
2016-06-14Change the size field of MSP430_Opcode_Decoded to a plain integer.John Baldwin2-8/+6
The size field was defined as an instance of an enum, but existing code treats the size field as a plain integer containing a bit count. include/ChangeLog: * opcode/msp430-decode.h (MSP430_Size): Remove. (Msp430_Opcode_Decoded): Change type of size to int.
2016-06-14Use correct enum type for do_elf_stt_common.John Baldwin2-1/+5
binutils/ChangeLog: * objcopy.c (do_elf_stt_common): Use correct type.
2016-06-14Check R_*_IRELATIVE in x86 reloc_type_classH.J. Lu3-11/+23
elf_{i386|x86_64}_reloc_type_class should return reloc_class_ifunc for R_386_IRELATIVE/R_X86_64_IRELATIVE relocations. There is no need to check symbol type for STN_UNDEF symbol index. * elf32-i386.c (elf_i386_reloc_type_class): Check R_386_IRELATIVE. Don't check symbol type for STN_UNDEF symbol index. * elf64-x86-64.c (elf_x86_64_reloc_type_class): Check R_X86_64_IRELATIVE. Don't check symbol type for STN_UNDEF symbol index.
2016-06-14Fix elf_x86_64_reloc_type_classH.J. Lu1-8/+14
2016-06-14[ARC] Add ldbit for npsGraham Markall6-0/+133
This commit adds the ldbit instruction for the NPS-400. The ldbit instruction uses the same encoding as the ld instruction, but sets the ZZ field to 11 (which is a reserved setting), and sets the AA field to 1 or 2 for the x2 and x4 flags respectively.
2016-06-14[ARC] Add deep packet inspection instructions for npsGraham Markall7-50/+348
With the exception of ldbit, this commit adds implementations of all DPI instructions for the NPS-400. These instructions are: - hash / hash.p[0-3] - tr - utf8 - e4by - addf
2016-06-14[ARC] Add arithmetic and logic instructions for npsGraham Markall6-1/+582
This commit completes the implementation of arithmetic and logic instructions for the NPS-400. These instructions are: - calcbsd / calcbxd - calckey / calcxkey - mxb / imxb - addl, subl, orl, andl, xorl - andab / orab - lbdsize - bdlen - csms, csma, cbba - zncv - hofs
2016-06-14Fix compile time warning building gas for the NDS32 with gcc v6.1.1Nick Clifton2-1/+6
gas * config/tc-nds32.c (nds32_get_align): Avoid left shifting a signed constant.
2016-06-14Fix feature checks based on ARM architecture valueThomas Preud'homme2-17/+48
2016-06-14 Thomas Preud'homme <thomas.preudhomme@arm.com> bfd/ * elf32-arm.c (using_thumb_only): Force review of arch check logic for new architecture. (using_thumb2): Try Tag_THUMB_ISA_use first and check for exact arch value then. Force review of arch check logic for new architecture. (arch_has_arm_nop): Update and fix arch check logic. Force review of that logic for new architecture. (arch_has_thumb2_nop): Remove. (elf32_arm_tls_relax): Use using_thumb2 instead of above function. (elf32_arm_final_link_relocate): Likewise but using thumb2.
2016-06-14Formatting fixes.Alan Modra10-185/+207
* ldbuildid.c: Formatting. * ldcref.c: Formatting. * ldctor.c: Formatting. * ldemul.c: Formatting. * ldexp.c: Formatting. * ldfile.c: Formatting. * ldlang.c: Formatting. * ldmain.c: Formatting. * ldwrite.c: Formatting.
2016-06-14Delete bfd_my_archive macroAlan Modra11-24/+39
Many more places use abfd->my_archive rather than bfd_my_archive (abfd), so let's make the code consistently use the first idiom. bfd/ * bfd-in.h (bfd_my_archive): Delete. * bfd-in2.h: Regenerate. binutils/ * ar.c: Expand uses of bfd_my_archive. * size.c: Likewise. ld/ * ldlang.c: Expand uses of bfd_my_archive. * ldmain.c: Likewise. * ldmisc.c: Likewise. * plugin.c: Likewise.
2016-06-14Set my_archive for thin archivesAlan Modra15-19/+66
LTO plugin support in plugin_maybe_claim wants to close the IR bfd after replacing it with the recompiled object, but can't do so for archive elements due to various pointers that access the archive bfd. Thin archives have the same problem. They too cannot have their element bfds closed. PR ld/20241 bfd/ * archive.c (open_nested_file): Set my_archive. * bfd.c (_bfd_default_error_handler <%B>): Exclude archive file name for thin archives. * bfdio.c (bfd_tell): Don't adjust origin for thin archives. (bfd_seek): Likewise. * bfdwin.c (bfd_get_file_window): Likewise. * cache.c (cache_bmmap): Likewise. (bfd_cache_lookup_worker): Don't look in my_archive for thin archives. * mach-o.c (bfd_mach_o_follow_dsym): Don't open my_archive for thin archives. * plugin.c (try_claim): Likewise. * xcofflink.c (xcoff_link_add_dynamic_symbols): Use import path of file within thin archive, not the archive. binutils/ * bucomm.c (bfd_get_archive_filename): Return file name within thin archive. ld/ * ldmain.c (add_archive_element): Just print file name of file within thin archives. * ldmisc.c (vfinfo): Likewise. * plugin.c (plugin_object_p): Open file within thin archives. (plugin_maybe_claim): Expand comment.
2016-06-14Automatic date update in version.inGDB Administrator1-1/+1
2016-06-13Add .got.plt to testsuite/script_test_2.tH.J. Lu2-0/+6
The .got.plt section must be placed right after the .got section. Otherwise, GOT offset will be wrong. PR gold/20246 * testsuite/script_test_2.t: Add .got.plt after .got.
2016-06-13Add the GOT base for GOT32 relocs against IFUNCH.J. Lu14-5/+260
Add the GOT base for R_386_GOT32/R_386_GOT32X relocations against IFUNC symbols if there is no base register and disallow them for PIC. bfd/ PR ld/20244 * elf32-i386.c (elf_i386_relocate_section): Add the .got.plt section address for R_386_GOT32/R_386_GOT32X relocations against IFUNC symbols if there is no base register and return error for PIC. ld/ PR ld/20244 * testsuite/ld-i386/i386.exp: Run pr20244-2a, pr20244-2b, pr20244-2c and pr20244-2d. * testsuite/ld-i386/no-plt.exp: Run pr20244-3a and pr20244-3b. * testsuite/ld-i386/pr20244-2.s: New file. * testsuite/ld-i386/pr20244-2a.d: Likewise. * testsuite/ld-i386/pr20244-2b.d: Likewise. * testsuite/ld-i386/pr20244-2c.d: Likewise. * testsuite/ld-i386/pr20244-2d.d: Likewise. * testsuite/ld-i386/pr20244-3a.c: Likewise. * testsuite/ld-i386/pr20244-3b.S: Likewise. * testsuite/ld-i386/pr20244-3c.S: Likewise. * testsuite/ld-i386/pr20244-3d.S: Likewise.
2016-06-13Add 2 i386 tests to call IFUNC functions via GOTH.J. Lu8-13/+209
bfd/ * elf32-i386.c (elf_i386_relocate_section): Simplify IFUNC GOT32 adjustment for static executables. ld/ 2016-06-13 H.J. Lu <hongjiu.lu@intel.com> * testsuite/ld-i386/i386.exp: Run ifunc-1a and ifunc-1b. * testsuite/ld-i386/ifunc-1a.c: New file. * testsuite/ld-i386/ifunc-1b.S: Likewise. * testsuite/ld-i386/ifunc-1c.S: Likewise. * testsuite/ld-i386/ifunc-1d.S: Likewise.
2016-06-13MIPS/GAS: Don't convert RELA JALR relocations on R6Maciej W. Rozycki13-5/+342
Revert an inadvertent change to make RELA JALR relocations section-relative on MIPS R6 targets made with commit 7361da2c952e ("Add support for MIPS R6."). There is no need to make this a special case and the comment introduced with the said change clearly indicates this was not intended. gas/ * config/tc-mips.c (mips_fix_adjustable): Don't convert RELA JALR relocations on R6. * testsuite/gas/mips/jal-svr4pic-local.d: New test. * testsuite/gas/mips/mips1@jal-svr4pic-local.d: New test. * testsuite/gas/mips/r3000@jal-svr4pic-local.d: New test. * testsuite/gas/mips/micromips@jal-svr4pic-local.d: New test. * testsuite/gas/mips/jal-svr4pic-local-n32.d: New test. * testsuite/gas/mips/micromips@jal-svr4pic-local-n32.d: New test. * testsuite/gas/mips/jal-svr4pic-local-n64.d: New test. * testsuite/gas/mips/micromips@jal-svr4pic-local-n64.d: New test. * testsuite/gas/mips/jal-svr4pic-local.s: New test source. * testsuite/gas/mips/jal-svr4pic-local-newabi.s: New test source. * testsuite/gas/mips/mips.exp: Run the new tests.
2016-06-13MIPS/BFD: Update outdated comment about o32 R_MIPS_PC32 reloc supportMaciej W. Rozycki2-3/+7
Complement: commit b47468a6dbd1b54c44c2edc0f7db64a073d894ea Author: Catherine Moore <clm@redhat.com> Date: Mon May 6 15:25:45 2013 +0000 and the return of support for R_MIPS_PC32 there. bfd/ * elf32-mips.c (elf_mips_gnu_pcrel32): Update comment.
2016-06-13[ARC] Fix condition.Claudiu Zissulescu2-1/+6
bfd/ 2016-06-13 Cupertino Miranda <cmiranda@synospsy.com> * elf32-arc.c (elf_arc_relocate_section): Fixed condition.
2016-06-13gdb: Use UNSUPPORTED not XFAIL for unsupported target featuresAndrew Burgess19-41/+41
If a target does not support making function calls from GDB then in a number of test files, we currently report an XFAIL and skip some, or all of the tests. This commit changes the XFAIL to an UNSUPPORTED as this seems more appropriate in these cases. Some of the tests used bug ID 2416 to be reported in the XFAIL. In the current GDB bugzilla bug 2416 has nothing to do with calling target functions from GDB. gdb/testsuite/ChangeLog: * gdb.base/call-ar-st.exp: Report unsupported rather than xfail for unsupported target features. * gdb.base/call-rt-st.exp: Likewise. * gdb.base/call-sc.exp: Likewise. * gdb.base/call-signal-resume.exp: Likewise. * gdb.base/call-strs.exp: Likewise. * gdb.base/callexit.exp: Likewise. * gdb.base/callfuncs.exp: Likewise. * gdb.base/nodebug.exp: Likewise. * gdb.base/printcmds.exp: Likewise. * gdb.base/ptype.exp: Likewise. * gdb.base/structs.exp: Likewise. * gdb.base/unwindonsignal.exp: Likewise. * gdb.cp/gdb2495.exp: Likewise. * gdb.cp/templates.exp: Likewise. * gdb.cp/virtfunc.exp: Likewise. * gdb.threads/hand-call-in-threads.exp: Likewise. * gdb.threads/interrupted-hand-call.exp: Likewise. * gdb.threads/thread-unwindonsignal.exp: Likewise.
2016-06-13[ARC] XFAIL S-Records tests for both little and big endian ARC target.Cupertino Miranda2-2/+7
ld/ 2016-06-13 Cupertino Miranda <cmiranda@synospsy.com> * testsuite/ld-srec/srec.exp: Changed to XFAIL on both little and big endian ARC targets.
2016-06-13[ARC] Fixes related to reordering of .got and .got.pltCupertino Miranda2-5/+16
- Correctly solved relocations on the .got header. - This bug arrised from enabling RELRO (-z combreloc). Because the .got and .got.plt sections were split in new linker scripts the header is no longer part of sgotplt contents. Changed the patch to sgot contents instead. - Latest fix to .got header relocs. bfd/ 2016-06-13 Cupertino Miranda <cmiranda@synospsy.com> * elf32-arc.c (elf_arc_finish_dynamic_sections): Changed.
2016-06-13[ARC] General bug fixesCupertino Miranda2-19/+25
Fail safe for trying to reloc GOT and PLT on non dynamic linker. Fix issue with dynamic relocs not being generated with -pie. Removed some structures that were not being used. Fixed typo changing RELENT to RELAENT. Fix for all SECTOFF relocations. bfd/ 2016-06-13 Cupertino Miranda <cmiranda@synospsy.com> * elf32-arc.c (arc_local_data, arc_local_data): Removed. (SECTSTART): Changed. (elf_arc_relocate_section): Fixed mistake in PIE related condition. (elf_arc_size_dynamic_sections): Changed DT_RELENT to DT_RELAENT.
2016-06-13[ARC] Generate DT_RELACOUNT.Cupertino Miranda2-0/+34
bfd/ 2016-06-13 Cupertino Miranda <cmiranda@synospsy.com> * elf32-arc.c (elf32_arc_reloc_type_class): Defined function to enable support for "-z combreloc" and DT_RELACOUNT. (elf_backend_reloc_type_class): Likewise
2016-06-13Fix compile time warning about a redundant comparison in an assertion statement.Nick Clifton2-1/+5
* gdbtypes.c (replace_type): Fix assertion.
2016-06-13Accept vulcan as a cpu name for the AArch64 port of GAS.Virendra Pathak3-0/+10
* config/tc-aarch64.c (aarch64_cpus): Add Broadcom Vulcan. * doc/c-aarch64.texi: Document that vulcan is a valid processor name.
2016-06-13Fix compile time warning messages building with gcc v6.1.1Nick Clifton8-5/+30
etc * texi2pod.pl: Escape curly braces, whilst searching for keyword strong. gas * config/tc-arm.c: For non-ELF based targets skip ARM feature sets that are not supported. * config/tc-arc.c (md_apply_fix): Avoid left shifting a signed constant. * config/tc-cr16.c (check_range): Likewise. * config/tc-nios2.c (nios2_check_overflow): Likewise.
2016-06-13Automatic date update in version.inGDB Administrator1-1/+1
2016-06-12Update x86-64 no-PLT tests for x32H.J. Lu16-40/+58
X32 has different output formats for readelf and objdump as well as a different conversion of load symbol address via GOT. * testsuite/ld-x86-64/libno-plt-1b.dd: Updated for x32. * testsuite/ld-x86-64/libno-plt-1b.rd: Likewise. * testsuite/ld-x86-64/no-plt-1a.dd: Likewise. * testsuite/ld-x86-64/no-plt-1a.rd: Likewise. * testsuite/ld-x86-64/no-plt-1b.dd: Likewise. * testsuite/ld-x86-64/no-plt-1b.rd: Likewise. * testsuite/ld-x86-64/no-plt-1c.dd: Likewise. * testsuite/ld-x86-64/no-plt-1c.rd: Likewise. * testsuite/ld-x86-64/no-plt-1d.dd: Likewise. * testsuite/ld-x86-64/no-plt-1e.dd: Likewise. * testsuite/ld-x86-64/no-plt-1e.rd: Likewise. * testsuite/ld-x86-64/no-plt-1f.dd: Likewise. * testsuite/ld-x86-64/no-plt-1f.rd: Likewise. * testsuite/ld-x86-64/no-plt-1g.dd: Likewise. * testsuite/ld-x86-64/no-plt-1g.rd: Likewise.
2016-06-11Subtract GOT base only with a base registerH.J. Lu8-4/+109
When relocating R_386_GOT32 in "op $0, bar@GOT", we shouldn't subtract GOT base without a base register and we should disallow it without a base register for PIC. bfd/ PR ld/20244 * elf32-i386.c (elf_i386_relocate_section): When relocating R_386_GOT32, return error without a base register for PIC and subtract the .got.plt section address only with a base register. ld/ PR ld/20244 * testsuite/ld-i386/i386.exp: Run pr20244-1a and pr20244-1b. * testsuite/ld-i386/pr20244-1.s: New file. * testsuite/ld-i386/pr20244-1a.d: Likewise. * testsuite/ld-i386/pr20244-1b.d: Likewise. * testsuite/ld-i386/pr20244-1c.d: Likewise.
2016-06-12Automatic date update in version.inGDB Administrator1-1/+1
2016-06-11Add support for .MIPS.abiflags and .gnu.attributes sections.Vladimir Radosavljevic5-62/+988
elfcpp/ * elfcpp.h (SHT_MIPS_ABIFLAGS): New enum constant. * mips.h (EF_MIPS_FP64, EF_MIPS_NAN2008): New enum constants for processor-specific flags. (E_MIPS_MACH_5900): New enum constant for machine variant. (AFL_REG_NONE, AFL_REG_32, AFL_REG_64, AFL_REG_128): New enum constants. (AFL_ASE_DSP, AFL_ASE_DSPR2, AFL_ASE_EVA, AFL_ASE_MCU, AFL_ASE_MDMX, AFL_ASE_MIPS3D, AFL_ASE_MT, AFL_ASE_SMARTMIPS, AFL_ASE_VIRT, AFL_ASE_MSA, AFL_ASE_MIPS16, AFL_ASE_MICROMIPS, AFL_ASE_XPA): Likewise. (AFL_EXT_XLR, AFL_EXT_OCTEON2, AFL_EXT_OCTEONP, AFL_EXT_LOONGSON_3A, AFL_EXT_OCTEON, AFL_EXT_5900, AFL_EXT_4650, AFL_EXT_4010, AFL_EXT_4100, AFL_EXT_3900, AFL_EXT_10000, AFL_EXT_SB1, AFL_EXT_4111, AFL_EXT_4120, AFL_EXT_5400, AFL_EXT_5500, AFL_EXT_LOONGSON_2E, AFL_EXT_LOONGSON_2F, AFL_EXT_OCTEON3): Likewise. (Tag_GNU_MIPS_ABI_FP, Tag_GNU_MIPS_ABI_MSA): Likewise. (Val_GNU_MIPS_ABI_FP_ANY, Val_GNU_MIPS_ABI_FP_DOUBLE, Val_GNU_MIPS_ABI_FP_SINGLE, Val_GNU_MIPS_ABI_FP_SOFT, Val_GNU_MIPS_ABI_FP_OLD_64,Val_GNU_MIPS_ABI_FP_XX, Val_GNU_MIPS_ABI_FP_64, Val_GNU_MIPS_ABI_FP_64A, Val_GNU_MIPS_ABI_FP_NAN2008, Val_GNU_MIPS_ABI_MSA_ANY, Val_GNU_MIPS_ABI_MSA_128): Likewise. (AFL_FLAGS1_ODDSPREG): New enum constant. gold/ * mips.cc (struct Mips_abiflags): New struct. (Mips_relobj::Mips_relobj): Initialize attributes_section_data_ and abiflags_. (Mips_relobj::~Mips_relobj): Delete object pointed by attributes_section_data_. (Mips_relobj::abiflags): New method. (Mips_relobj::attributes_section_data): Likewise. (Mips_relobj::attributes_section_data_): New data member. (Mips_relobj::abiflags_): Likewise. (class Mips_output_section_abiflags): New class. (Target_mips::Target_mips): Initialize attributes_section_data_, abiflags_ and has_abiflags_section_. (Target_mips::do_should_include_section): Don't emit input .MIPS.abiflags sections to output .MIPS.abiflags. (Target_mips::Mips_mach): Add new enum constants. (Target_mips::mips_isa_ext_mach): New method. (Target_mips::mips_isa_ext): Likewise. (Target_mips::update_abiflags_isa): Likewise. (Target_mips::infer_abiflags): Likewise. (Target_mips::create_abiflags): Likewise. (Target_mips::fp_abi_string): Likewise. (Target_mips::select_fp_abi): Likewise. (Target_mips::merge_obj_attributes): Likewise. (Target_mips::merge_obj_abiflags): Likewise. (Target_mips::level_rev): Likewise. (Target_mips::merge_obj_e_flags): Rename from merge_processor_specific_flags. Remove dyn_obj argument, call update_abiflags_isa when needed, compare NaN encodings and compare FP64 state. (Target_mips::add_machine_extensions): Add two machine extensions and fix one. (Target_mips::attributes_section_data_): New data member. (Target_mips::abiflags_): Likewise. (Target_mips::has_abiflags_section_): Likewise. (Mips_relobj::do_read_symbols): Read .gnu.attributes and .MIPS.abiflags sections if they exists. (Target_mips::elf_mips_mach): Add E_MIPS_MACH_5900 and E_MIPS_MACH_OCTEON3 support. (Target_mips::do_adjust_elf_header): Setup EI_ABIVERSION flag. (Target_mips::do_finalize_sections): Merge .gnu.attributes and .MIPS.abiflags sections from input. Create these sections if needed. (Target_mips::elf_mips_mach_name): Add E_MIPS_MACH_5900 and E_MIPS_MACH_OCTEON3 support, and change strings for E_MIPS_MACH_LS2E, E_MIPS_MACH_LS2F and E_MIPS_MACH_LS3A just to match bfd.
2016-06-11sparc-coff writing uninitialized memoryAlan Modra2-0/+12
sparc-coff has a 20 byte symbol entry with an extra field, but neglects to initialize the field. Fix that. * coff/sparc.h (COFF_ADJUST_SYM_OUT_POST): Define.
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