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AgeCommit message (Expand)AuthorFilesLines
2021-05-29sim: v850: add pointer casts for execv on WindowsMike Frysinger2-2/+6
2021-05-29sim: mn10300: add SIGTRAP fallbackMike Frysinger2-0/+7
2021-05-29sim: pull in extra gnulib libs tooMike Frysinger2-1/+5
2021-05-29sim: mips: fix build w/out dv-sockserMike Frysinger2-3/+9
2021-05-29sim: frv: fix up a bunch of prototype warningsMike Frysinger7-6/+41
2021-05-29sim: frv: fix compiler parentheses suggestions warningsMike Frysinger4-25/+39
2021-05-29sim: sh: fix a few compiler warningsMike Frysinger2-2/+7
2021-05-29sim: m32c: rename open symbol to avoid collisionsMike Frysinger2-4/+10
2021-05-29sim: leverage gnulibMike Frysinger8-3/+44
2021-05-29Re: readelf and objdump helpAlan Modra2-4/+8
2021-05-29Fix InlinedFrameDecorator exampleHannes Domani2-1/+5
2021-05-29PowerPC table driven -Mraw disassemblyAlan Modra7-1635/+1755
2021-05-29readelf and objdump helpAlan Modra3-132/+254
2021-05-28sim: bfin: fix the otp fix fixMike Frysinger2-2/+6
2021-05-29MIPS/opcodes: Reorder legacy COP0, COP2, COP3 opcode instructionsMaciej W. Rozycki2-66/+73
2021-05-29MIPS/GAS/testsuite: Add C0, C1, C2, C3 opcode testsMaciej W. Rozycki54-0/+7580
2021-05-29MIPS/GAS/testsuite: Run RFE test across all ISAsMaciej W. Rozycki8-7/+39
2021-05-29MIPS/GAS/testsuite: Run coprocessor tests across all ISAsMaciej W. Rozycki96-467/+1646
2021-05-29MIPS/opcodes: Accurately record coprocessor opcode CPU/ISA membershipMaciej W. Rozycki5-53/+114
2021-05-29MIPS/opcodes: Remove DMFC3 and DMTC3 instructionsMaciej W. Rozycki2-4/+5
2021-05-29MIPS/GAS/testsuite: Add tests for coprocessor branch instructionsMaciej W. Rozycki16-0/+215
2021-05-29MIPS/opcodes: Disassemble the RFE instructionMaciej W. Rozycki6-2/+34
2021-05-29MIPS/opcodes: Properly handle ISA exclusionMaciej W. Rozycki2-19/+24
2021-05-29MIPS/opcodes: Factor out ISA matching against flagsMaciej W. Rozycki2-4/+27
2021-05-29MIPS/opcodes: Add legacy CP1 control register namesMaciej W. Rozycki11-54/+94
2021-05-29MIPS/GAS/testsuite: Add tests for coprocessor access instructionsMaciej W. Rozycki27-0/+2180
2021-05-29MIPS/opcodes: Do not use CP0 register names for control registersMaciej W. Rozycki11-25/+73
2021-05-29MIPS/opcodes: Add TX39 CP0 register namesMaciej W. Rozycki5-1/+68
2021-05-29MIPS/binutils/testsuite: Fix XPA and Virtualization ASE casesMaciej W. Rozycki5-4/+12
2021-05-29MIPS/opcodes: Free up redundant `g' operand codeMaciej W. Rozycki4-6/+15
2021-05-29microMIPS/opcodes: Refer FPRs rather than FCRs with DMTC1Maciej W. Rozycki9-322/+337
2021-05-29MIPS/GAS: Use FCSR rather than RA with CFC1/CTC1Maciej W. Rozycki2-4/+11
2021-05-29Automatic date update in version.inGDB Administrator1-1/+1
2021-05-28x86: Restore PC16 relocation overflow checkH.J. Lu16-96/+70
2021-05-28sim: h8300 add special case test.Yoshinori Sato10-16/+520
2021-05-28sim: h8300 Fixed different behavior in preinc/predec.Yoshinori Sato3-3/+60
2021-05-28Automatic date update in version.inGDB Administrator1-1/+1
2021-05-27PowerPC: Add new xxmr and xxlnot extended mnemonicsPeter Bergner5-0/+19
2021-05-27gdb: fix tab after space indentation issuesSimon Marchi46-138/+142
2021-05-27gdb: fix some indentation issuesSimon Marchi29-698/+704
2021-05-27gdb: remove iterate_over_bp_locations functionSimon Marchi4-29/+25
2021-05-27gdb: remove iterate_over_breakpoints functionSimon Marchi9-77/+65
2021-05-27gdb: add all_bp_locations_at_addr functionSimon Marchi2-148/+119
2021-05-27gdb: add all_bp_locations functionSimon Marchi2-58/+32
2021-05-27gdb: make bp_locations an std::vectorSimon Marchi2-58/+40
2021-05-27gdb: add breakpoint::locations methodSimon Marchi9-101/+83
2021-05-27gdb: add all_tracepoints functionSimon Marchi4-48/+58
2021-05-27gdb: add all_breakpoints_safe functionSimon Marchi2-68/+47
2021-05-27gdb: add all_breakpoints functionSimon Marchi2-119/+78
2021-05-27Add optional full_window argument to TuiWindow.writeHannes Domani4-7/+30
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