diff options
Diffstat (limited to 'sim')
| -rw-r--r-- | sim/frv/cache.c | 2 | ||||
| -rw-r--r-- | sim/frv/interrupts.c | 4 |
2 files changed, 3 insertions, 3 deletions
diff --git a/sim/frv/cache.c b/sim/frv/cache.c index c2beb39..2d0fe5a 100644 --- a/sim/frv/cache.c +++ b/sim/frv/cache.c @@ -136,7 +136,7 @@ frv_cache_reconfigure (SIM_CPU *current_cpu, FRV_CACHE *cache) break; } } - /* fall through */ + ATTRIBUTE_FALLTHROUGH; default: /* Set the cache to its original settings. */ cache->sets = cache->configured_sets; diff --git a/sim/frv/interrupts.c b/sim/frv/interrupts.c index baf058f..9793607 100644 --- a/sim/frv/interrupts.c +++ b/sim/frv/interrupts.c @@ -835,7 +835,7 @@ set_exception_status_registers ( { case FRV_DIVISION_EXCEPTION: set_isr_exception_fields (current_cpu, item); - /* fall thru to set reg_index. */ + ATTRIBUTE_FALLTHROUGH; /* To set reg_index. */ case FRV_COMMIT_EXCEPTION: /* For fr550, always use ESR0. */ if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_fr550) @@ -855,7 +855,7 @@ set_exception_status_registers ( break; case FRV_DATA_ACCESS_EXCEPTION: set_daec = 1; - /* fall through */ + ATTRIBUTE_FALLTHROUGH; case FRV_DATA_ACCESS_MMU_MISS: case FRV_MEM_ADDRESS_NOT_ALIGNED: /* Get the appropriate ESR, EPCR, EAR and EDR. |