aboutsummaryrefslogtreecommitdiff
path: root/sim
diff options
context:
space:
mode:
Diffstat (limited to 'sim')
-rw-r--r--sim/ChangeLog4
-rw-r--r--sim/avr/interp.c2
2 files changed, 5 insertions, 1 deletions
diff --git a/sim/ChangeLog b/sim/ChangeLog
index 72736f4..6a5e74e 100644
--- a/sim/ChangeLog
+++ b/sim/ChangeLog
@@ -1,3 +1,7 @@
+2009-11-09 Tristan Gingold <gingold@adacore.com>
+
+ * avr/interp.c (sim_resume): Fix typo for OP_ret.
+
2009-10-23 Doug Evans <dje@sebabeach.org>
* cris/arch.c: Regenerate.
diff --git a/sim/avr/interp.c b/sim/avr/interp.c
index 8bb9ec2..903370f 100644
--- a/sim/avr/interp.c
+++ b/sim/avr/interp.c
@@ -985,7 +985,7 @@ sim_resume (SIM_DESC sd, int step, int signal)
unsigned int sp = read_word (REG_SP);
if (avr_pc22)
{
- pc = sram[++sp] = pc << 16;
+ pc = sram[++sp] << 16;
cycles++;
}
else