diff options
Diffstat (limited to 'sim')
| -rw-r--r-- | sim/ChangeLog | 4 | ||||
| -rw-r--r-- | sim/i960/ChangeLog | 215 | ||||
| -rw-r--r-- | sim/i960/Makefile.in | 130 | ||||
| -rw-r--r-- | sim/i960/README | 23 | ||||
| -rw-r--r-- | sim/i960/TODO | 64 | ||||
| -rw-r--r-- | sim/i960/acconfig.h | 15 | ||||
| -rw-r--r-- | sim/i960/arch.c | 38 | ||||
| -rw-r--r-- | sim/i960/arch.h | 44 | ||||
| -rw-r--r-- | sim/i960/config.in | 162 | ||||
| -rwxr-xr-x | sim/i960/configure | 4294 | ||||
| -rw-r--r-- | sim/i960/configure.in | 16 | ||||
| -rw-r--r-- | sim/i960/cpu.c | 85 | ||||
| -rw-r--r-- | sim/i960/cpu.h | 601 | ||||
| -rw-r--r-- | sim/i960/cpuall.h | 67 | ||||
| -rw-r--r-- | sim/i960/decode.c | 5569 | ||||
| -rw-r--r-- | sim/i960/decode.h | 160 | ||||
| -rw-r--r-- | sim/i960/devices.c | 107 | ||||
| -rw-r--r-- | sim/i960/i960-desc.c | 2106 | ||||
| -rw-r--r-- | sim/i960/i960-desc.h | 317 | ||||
| -rw-r--r-- | sim/i960/i960-opc.h | 170 | ||||
| -rw-r--r-- | sim/i960/i960-sim.h | 54 | ||||
| -rw-r--r-- | sim/i960/i960.c | 205 | ||||
| -rw-r--r-- | sim/i960/mloop.in | 301 | ||||
| -rw-r--r-- | sim/i960/model.c | 10065 | ||||
| -rw-r--r-- | sim/i960/sem-switch.c | 7345 | ||||
| -rw-r--r-- | sim/i960/sem.c | 7918 | ||||
| -rw-r--r-- | sim/i960/sim-if.c | 311 | ||||
| -rw-r--r-- | sim/i960/sim-main.h | 69 | ||||
| -rw-r--r-- | sim/i960/tconfig.in | 49 | ||||
| -rw-r--r-- | sim/i960/traps.c | 214 |
30 files changed, 4 insertions, 40714 deletions
diff --git a/sim/ChangeLog b/sim/ChangeLog index c2c667f..888f1ff 100644 --- a/sim/ChangeLog +++ b/sim/ChangeLog @@ -1,3 +1,7 @@ +2004-12-01 Andrew Cagney <cagney@gnu.org> + + * i960: Delete directory. + 2004-11-12 Andrew Cagney <cagney@gnu.org> * d30v, fr30, mn10200, z8k: Delete directory. diff --git a/sim/i960/ChangeLog b/sim/i960/ChangeLog deleted file mode 100644 index 2ba6ddb..0000000 --- a/sim/i960/ChangeLog +++ /dev/null @@ -1,215 +0,0 @@ -2004-12-01 Hans-Peter Nilsson <hp@axis.com> - - * Makefile.in (stamp-desc): Specify opcfile. - -2003-09-08 Dave Brolley <brolley@redhat.com> - - On behalf of Doug Evans <dje@sebabeach.org> - * Makefile.in (stamp-arch,stamp-cpu, stamp-desc): Pass archfile to cgen. - -2003-02-27 Andrew Cagney <cagney@redhat.com> - - * sim-if.c (sim_open, sim_create_inferior): Rename _bfd to bfd. - -2002-06-16 Andrew Cagney <ac131313@redhat.com> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - -2001-07-05 Ben Elliston <bje@redhat.com> - - * Makefile.in (stamp-arch): Use $(CGEN_CPU_DIR). - (stamp-cpu): Likewise. - (stamp-desc): Likewise. - -2001-02-06 DJ Delorie <dj@redhat.com> - - * i960-desc.c: Update all the A macro definitions to the new - stdc-sensitive versions that cgen would have used. - -2001-01-12 Frank Ch. Eigler <fche@redhat.com> - - * configure: Regenerated with sim_scache fix. - -2000-11-18 Greg McGary <greg@mcgary.org> - - * Makefile.in: remove `@true' commands for rules that have - $(CGEN_MAINT) as a prerequisite. - -2000-08-21 Frank Ch. Eigler <fche@redhat.com> - - * Makefile.in (i960-clean): Add stamp-arch, stamp-cpu. - (stamp-arch, stamp-cpu): New targets. - -Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - -2000-03-30 Dave Brolley <brolley@redhat.com> - - * configure: Regenerated. - -1999-10-04 Doug Evans <devans@casey.cygnus.com> - - * sem.c,sem-switch.c: Rebuild. - * traps.c (sim_engine_invalid_insn): New arg `vpc'. Change type of - result to SEM_PC. Return vpc. - -Wed Sep 29 14:46:36 1999 Dave Brolley <brolley@cygnus.com> - - * traps.c (sim_engine_invalid_insn): Return PC. - -Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - -1999-08-28 Doug Evans <devans@casey.cygnus.com> - - * cpu.h,decode.c,sem-switch.c,sem.c: Rebuild. - -1999-08-09 Doug Evans <devans@casey.cygnus.com> - - * cpu.h,decode.c,decode.h,model.c,sem-switch.c,sem.c: Rebuild. - -1999-08-04 Doug Evans <devans@casey.cygnus.com> - - * cpu.h,cpuall.h,decode.c,model.c,sem-switch.c,sem.c: Rebuild. - * i960-desc.h: Rebuild. - -1999-05-08 Felix Lee <flee@cygnus.com> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - -Fri Apr 16 16:50:31 1999 Doug Evans <devans@charmed.cygnus.com> - - * devices.c (device_io_read_buffer): New arg `sd'. - (device_io_write_buffer): New arg `sd'. - (device_error): Give proper arg spec. - -1999-04-14 Doug Evans <devans@casey.cygnus.com> - - * i960-desc.c,i960-desc.h: Rebuild. - -Sun Apr 11 00:25:17 1999 Jim Wilson <wilson@cygnus.com> - - * TODO: Document more toolchain problems. - * cpu.h, decode.c, model.c, sem-switch.c, sem.c: Rebuild. - -1999-04-10 Doug Evans <devans@casey.cygnus.com> - - * cpu.h,decode.c,sem-switch.c,sem.c: Rebuild. - -Fri Apr 9 19:30:05 1999 Jim Wilson <wilson@cygnus.com> - - * README, TODO: Clean up and update. - * sim-if.c: s/m32r/i960. s/sparc32/i960. - * decode.c, decode.h, i960-desc.c, i960-desc.h, i960-opc.h, model.c, - sem-switch.c, sem.c: Rebuild. - -1999-03-27 Doug Evans <devans@casey.cygnus.com> - - * decode.c: Rebuild. - -1999-03-22 Doug Evans <devans@casey.cygnus.com> - - * arch.c,arch.h,model.c,i960-desc.c,i960-desc.h,i960-opc.h: Rebuild. - * i960-sim.h (a_i960_h_gr_get,a_i960_h_gr_set): Declare. - (a_i960_h_pc_get,a_i960_h_pc_set): Declare. - * i960.c (a_i960_h_gr_get,a_i960_h_gr_set): New functions. - (a_i960_h_pc_get,a_i960_h_pc_set): Ditto. - * sim-if.c (sim_open): Update call to i960_cgen_cpu_open. - -1999-03-11 Doug Evans <devans@casey.cygnus.com> - - * arch.c,arch.h,cpu.c,i960-desc.c,i960-desc.h: Rebuild. - * sim-if.c (sim_open): Update call to i960_cgen_cpu_open. - -1999-02-25 Doug Evans <devans@casey.cygnus.com> - - * i960-desc.c,i960-desc.h: Rebuild. - -1999-02-09 Doug Evans <devans@casey.cygnus.com> - - * Makefile.in (I960_OBJS): Add i960-desc.o. - (SIM_EXTRA_DEPS): Replace cpu-opc.h with i960-desc.h,i960-opc.h. - * configure.in (sim_link_files,sim_link_links): Delete. - * configure: Rebuild. - * decode.c,decode.h,model.c,sem-switch.c,sem.c: Rebuild. - * devices.c: s/m32r/i960/. - * i960-desc.c: New file. - * i960-desc.h: New file. - * i960-opc.h: New file. - * i960-sim.h (I960_MISC_PROFILE): Delete. - * i960.c (i960base_model_insn_before): Delete unused code. - (i960base_model_insn_after): Ditto. - (i960_model_init_insn_cycles,i960_model_update_insn_cycles): Ditto. - (i960_model_record_cycles): Ditto. - * mloop.in (execute): CGEN_INSN_ATTR renamed to CGEN_INSN_ATTR_VALUE. - (extract-pbb): Use idesc->length to get insn length. - * sim-if.c (i960_disassemble_insn): New function. - (sim_open): Delete misc. profiling support. i960_cgen_cpu_open renamed - from i960_cgen_opcode_open. Set disassembler. - (sim_close): i960_cgen_cpu_open renamed from i960_cgen_opcode_open. - * sim-main.h: Don't include cpu-opc.h,cpu-sim.h. Include - i960-desc.h,i960-opc.h,i960-sim.h. - (struct _sim_cpu): Delete member i960_misc_profile. - -1999-01-27 Doug Evans <devans@casey.cygnus.com> - - * cpu.h,decode.c,model.c,sem-switch.c,sem.c: Rebuild. - -1999-01-14 Doug Evans <devans@casey.cygnus.com> - - * arch.c,arch.c,cpuall.h: Regenerate. - * cpu.c,cpu.h,decode.c,decode.h,model.c,sem-switch.c,sem.c: Regenerate. - -1999-01-11 Doug Evans <devans@casey.cygnus.com> - - * Makefile.in (i960-clean): rm eng.h. - * sim-main.h: Delete inclusion of ansidecl.h. - Delete inclusion of cgen-scache.h,cgen-cpu.h,cgen-trace.h,cpuall.h. - (SIM_CORE_SIGNAL): m32r -> i960. - * cpu.h: Regenerate. - * traps.c: m32r -> i960. - -1999-01-05 Doug Evans <devans@casey.cygnus.com> - - * Makefile.in (SIM_EXTRA_DEPS): Use CGEN_INCLUDE_DEPS. - (MAIN_INCLUDE_DEPS,INCLUDE_DEPS,OPS_INCLUDE_DEPS): Delete. - (sim-if.o): Use SIM_MAIN_DEPS. - (arch.o): Ditto. - (traps.o): Ditto. - (devices.o): Ditto. - (I960BASE_INCLUDE_DEPS): Use CGEN_MAIN_CPU_DEPS. - (i960.o): Use I960BASE_INCLUDE_DEPS. - (mloop.o,cpu.o,decode.o,sem.o,model.o): Ditto. - (stamp-arch): Pass mach=all to cgen-arch. - * cpu.c,cpu.h,decode.c,model.c,sem-switch.c,sem.c: Regenerate. - * sim-if.c (sim_open): Model probing code moved to sim-model.c. - -1998-12-14 James E Wilson <wilson@wilson-pc.cygnus.com> - - * cpu.h, decode.c, sem-switch.c, sem.c: Rebuilt. - * traps.c (i960_trap): Store syscall results in regs 16 to 18 instead - of regs 0 to 2. - -Mon Dec 14 22:33:38 1998 Jim Wilson <wilson@cygnus.com> - - * mloop.in (extract32): Add calls to @cpu@_fill_argbuf and - @cpu@_fil_argbuf_tp. - -1998-12-14 Doug Evans <devans@casey.cygnus.com> - - * configure.in: --enable-cgen-maint support moved to common/aclocal.m4. - * configure: Regenerate. - - * sem-switch.c,sem.c: Regenerate. - -1998-12-09 James E Wilson <wilson@wilson-pc.cygnus.com> - - * mloop.in execute): Test ARGBUF_PROFILE_P before profiling. - Update calls to TRACE_INSN_INIT,TRACE_INSN_FINI. - * cpu.h, cpuall.h, decode.c, sem-switch.c, sem.c: Regenerate. - -1998-12-08 James E Wilson <wilson@wilson-pc.cygnus.com> - - * New directory. diff --git a/sim/i960/Makefile.in b/sim/i960/Makefile.in deleted file mode 100644 index 9ffbc7b..0000000 --- a/sim/i960/Makefile.in +++ /dev/null @@ -1,130 +0,0 @@ -# Makefile template for Configure for the i960 simulator -# Copyright (C) 1996, 1997, 1998, 1999, 2004 Free Software Foundation, Inc. -# Contributed by Cygnus Support. -# -# This file is part of GDB, the GNU debugger. -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2 of the License, or -# (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License along -# with this program; if not, write to the Free Software Foundation, Inc., -# 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -## COMMON_PRE_CONFIG_FRAG - -I960_OBJS = i960.o cpu.o decode.o sem.o model.o mloop.o i960-desc.o - -CONFIG_DEVICES = dv-sockser.o -CONFIG_DEVICES = - -SIM_OBJS = \ - $(SIM_NEW_COMMON_OBJS) \ - sim-cpu.o \ - sim-engine.o \ - sim-hload.o \ - sim-hrw.o \ - sim-model.o \ - sim-reason.o \ - cgen-utils.o cgen-trace.o cgen-scache.o \ - cgen-run.o sim-reason.o sim-engine.o sim-stop.o \ - sim-if.o arch.o \ - $(I960_OBJS) \ - traps.o devices.o \ - $(CONFIG_DEVICES) - -# Extra headers included by sim-main.h. -SIM_EXTRA_DEPS = \ - $(CGEN_INCLUDE_DEPS) \ - arch.h cpuall.h i960-sim.h i960-desc.h i960-opc.h - -SIM_EXTRA_CFLAGS = - -SIM_RUN_OBJS = nrun.o -SIM_EXTRA_CLEAN = i960-clean - -# This selects the i960 newlib/libgloss syscall definitions. -# -# ??? This affects what stuff gets included from ../common/nltvals.def. -# For now, we need SYS_exit because of traps.c. If we really need this, -# then we need to add i960 specific definitions to nltvals.def. -NL_TARGET = -DNL_TARGET_i960 - -## COMMON_POST_CONFIG_FRAG - -arch = i960 - -sim-if.o: sim-if.c $(SIM_MAIN_DEPS) $(srcdir)/../common/sim-core.h - -arch.o: arch.c $(SIM_MAIN_DEPS) - -traps.o: traps.c targ-vals.h $(SIM_MAIN_DEPS) -devices.o: devices.c $(SIM_MAIN_DEPS) - -# I960 objs - -I960BASE_INCLUDE_DEPS = \ - $(CGEN_MAIN_CPU_DEPS) \ - cpu.h decode.h eng.h - -i960.o: i960.c $(I960BASE_INCLUDE_DEPS) - -# FIXME: Use of `mono' is wip. -mloop.c eng.h: stamp-mloop -stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile - $(SHELL) $(srccom)/genmloop.sh \ - -mono -fast -pbb -switch sem-switch.c \ - -cpu i960base -infile $(srcdir)/mloop.in - $(SHELL) $(srcroot)/move-if-change eng.hin eng.h - $(SHELL) $(srcroot)/move-if-change mloop.cin mloop.c - touch stamp-mloop -# $(SHELL) $(srccom)/genmloop.sh \ -# -mono -scache -fast i960base $(srcdir)/mloop.in \ -# | sed -e 's/@cpu@/i960base/' -e 's/@CPU@/I960BASE/' >mloop.c -mloop.o: mloop.c sem-switch.c $(I960BASE_INCLUDE_DEPS) - -cpu.o: cpu.c $(I960BASE_INCLUDE_DEPS) -decode.o: decode.c $(I960BASE_INCLUDE_DEPS) -sem.o: sem.c $(I960BASE_INCLUDE_DEPS) -model.o: model.c $(I960BASE_INCLUDE_DEPS) - -i960-clean: - rm -f mloop.c eng.h stamp-mloop - rm -f tmp-* - rm -f stamp-arch stamp-cpu stamp-desc - -# cgen support, enable with --enable-cgen-maint -CGEN_MAINT = ; @true -# The following line is commented in or out depending upon --enable-cgen-maint. -@CGEN_MAINT@CGEN_MAINT = - -stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(CGEN_CPU_DIR)/i960.cpu - $(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=all \ - archfile=$(CGEN_CPU_DIR)/i960.cpu \ - FLAGS="with-scache with-profile=fn" - touch stamp-arch -arch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-arch - -stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CGEN_CPU_DIR)/i960.cpu - $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \ - cpu=i960base mach=i960:ka_sa,i960:ca SUFFIX= \ - archfile=$(CGEN_CPU_DIR)/i960.cpu \ - FLAGS="with-scache with-profile=fn" \ - EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)" - touch stamp-cpu -cpu.h sem.c sem-switch.c model.c decode.c decode.h: $(CGEN_MAINT) stamp-cpu - -stamp-desc: $(CGEN_READ_SCM) $(CGEN_DESC_SCM) \ - $(CGEN_CPU_DIR)/sparc.cpu $(CGEN_CPU_DIR)/sparccom.cpu $(CGEN_CPU_DIR)/i960.cpu $(CGEN_CPU_DIR)/i960.cpu - $(MAKE) cgen-desc $(CGEN_FLAGS_TO_PASS) \ - cpu=i960 mach=all \ - archfile=$(CGEN_CPU_DIR)/i960.cpu opcfile=$(CGEN_CPU_DIR)/i960.opc - touch stamp-desc -i960-desc.c i960-desc.h i960-opc.h: $(CGEN_MAINT) stamp-desc diff --git a/sim/i960/README b/sim/i960/README deleted file mode 100644 index 6d38a40..0000000 --- a/sim/i960/README +++ /dev/null @@ -1,23 +0,0 @@ -This is the i960 simulator directory. - -It is still a work in progress. The current sources are reasonably -well tested and lots of features are in. However, there's lots -more yet to come. - ---- - -The simulator only supports the i960KA currently. Not all instructions -are supported yet, only those instructions needed by the gcc/g++ testsuites -have been added so far. There is no profiling support as yet. There is -no pipeline or timing support as yet. - ---- - -There are lots of machine generated files in the source directory! -They are only generated if you configure with --enable-cgen-maint, -similar in behaviour to Makefile.in, configure under automake/autoconf. - -For details on the generator, see ../../cgen. - -devo/cgen isn't part of the comp-tools module yet. -You'll need to check it out manually (also akin to automake/autoconf). diff --git a/sim/i960/TODO b/sim/i960/TODO deleted file mode 100644 index 5e156b1..0000000 --- a/sim/i960/TODO +++ /dev/null @@ -1,64 +0,0 @@ -See ??? comments here and in cgen, and in libgloss/i960. - -Simulator: - -Update sim/i960 directory from sim/m32r directory. sim/i960 dir was created -by copying the sim/m32r in September 1998, and is missing all sim/m32r updates -since then. - -Review, clean up, finish, etc simulator files that are not cgen generated. -This includes devices.c, i960-sim.h, mloop.in, sim-if.c, sim-main.h, -tconfig.in, and traps.c. - -Some functions do not show up in trace output. This occasionally happens -for main. - -Gdb core dumps if compile without -mka. Apparently a problem with recognizing -"core" machine type. - -Get profiling working. - -Add pipelining, execution unit, timing, etc info. - -Add support for other models, besides KA. - -Add support for newer architectures, e.g. v1.1 instructions. - -Compiler: - -Running gcc gives nm warning from collect about missing a.out file. -The output file is b.out, not a.out. Collect is probably looking for -the wrong file name. - -Use of -mca gives lots of linker warnings for ka/ca architecture conflicts, -but the two architectures are compatible. - -Need 96 bit long double support in fp-bit.c, otherwise any testcase using -long double arithmetic hits an abort and runtime. - -Compiler takes far too much time to compile PlumHall testcases at high -optimization levels. - -r2 seems to be an available call-clobbered registers, since it isn't used -until a call occurs, and is dead when the call returns. - -BSP: - -Libgloss does not check for syscall error returns, which means errno never -gets set. - -Libgloss does not use the syscall.h file. - -Binutils: - -Objdump -d fails on 64-bit host, specifically irix6. - -Gdb: - -Gdb sometimes prints messages about trace/breakpoint trap when hitting a -breakpoint. - -Frame, up, down and related commands don't work. - -Gdb fails when next'ing over a leaf function compiled with -mleaf-procedure. -Gdb fails when step'ing over a return from such a leaf function. diff --git a/sim/i960/acconfig.h b/sim/i960/acconfig.h deleted file mode 100644 index f9b87a1..0000000 --- a/sim/i960/acconfig.h +++ /dev/null @@ -1,15 +0,0 @@ - -/* Define to 1 if NLS is requested. */ -#undef ENABLE_NLS - -/* Define as 1 if you have catgets and don't want to use GNU gettext. */ -#undef HAVE_CATGETS - -/* Define as 1 if you have gettext and don't want to use GNU gettext. */ -#undef HAVE_GETTEXT - -/* Define as 1 if you have the stpcpy function. */ -#undef HAVE_STPCPY - -/* Define if your locale.h file contains LC_MESSAGES. */ -#undef HAVE_LC_MESSAGES diff --git a/sim/i960/arch.c b/sim/i960/arch.c deleted file mode 100644 index 74833b0..0000000 --- a/sim/i960/arch.c +++ /dev/null @@ -1,38 +0,0 @@ -/* Simulator support for i960. - -THIS FILE IS MACHINE GENERATED WITH CGEN. - -Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc. - -This file is part of the GNU Simulators. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -*/ - -#include "sim-main.h" -#include "bfd.h" - -const MACH *sim_machs[] = -{ -#ifdef HAVE_CPU_I960BASE - & i960_ka_sa_mach, -#endif -#ifdef HAVE_CPU_I960BASE - & i960_ca_mach, -#endif - 0 -}; - diff --git a/sim/i960/arch.h b/sim/i960/arch.h deleted file mode 100644 index fdfbf35..0000000 --- a/sim/i960/arch.h +++ /dev/null @@ -1,44 +0,0 @@ -/* Simulator header for i960. - -THIS FILE IS MACHINE GENERATED WITH CGEN. - -Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc. - -This file is part of the GNU Simulators. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -*/ - -#ifndef I960_ARCH_H -#define I960_ARCH_H - -#define TARGET_BIG_ENDIAN 1 - -/* Enum declaration for model types. */ -typedef enum model_type { - MODEL_I960KA, MODEL_I960CA, MODEL_MAX -} MODEL_TYPE; - -#define MAX_MODELS ((int) MODEL_MAX) - -/* Enum declaration for unit types. */ -typedef enum unit_type { - UNIT_NONE, UNIT_I960KA_U_EXEC, UNIT_I960CA_U_EXEC, UNIT_MAX -} UNIT_TYPE; - -#define MAX_UNITS (1) - -#endif /* I960_ARCH_H */ diff --git a/sim/i960/config.in b/sim/i960/config.in deleted file mode 100644 index 9723b86..0000000 --- a/sim/i960/config.in +++ /dev/null @@ -1,162 +0,0 @@ -/* config.in. Generated automatically from configure.in by autoheader. */ - -/* Define if using alloca.c. */ -#undef C_ALLOCA - -/* Define to empty if the keyword does not work. */ -#undef const - -/* Define to one of _getb67, GETB67, getb67 for Cray-2 and Cray-YMP systems. - This function is required for alloca.c support on those systems. */ -#undef CRAY_STACKSEG_END - -/* Define if you have alloca, as a function or macro. */ -#undef HAVE_ALLOCA - -/* Define if you have <alloca.h> and it should be used (not on Ultrix). */ -#undef HAVE_ALLOCA_H - -/* Define if you have a working `mmap' system call. */ -#undef HAVE_MMAP - -/* Define as __inline if that's what the C compiler calls it. */ -#undef inline - -/* Define to `long' if <sys/types.h> doesn't define. */ -#undef off_t - -/* Define if you need to in order for stat and other things to work. */ -#undef _POSIX_SOURCE - -/* Define as the return type of signal handlers (int or void). */ -#undef RETSIGTYPE - -/* Define to `unsigned' if <sys/types.h> doesn't define. */ -#undef size_t - -/* If using the C implementation of alloca, define if you know the - direction of stack growth for your system; otherwise it will be - automatically deduced at run-time. - STACK_DIRECTION > 0 => grows toward higher addresses - STACK_DIRECTION < 0 => grows toward lower addresses - STACK_DIRECTION = 0 => direction of growth unknown - */ -#undef STACK_DIRECTION - -/* Define if you have the ANSI C header files. */ -#undef STDC_HEADERS - -/* Define if your processor stores words with the most significant - byte first (like Motorola and SPARC, unlike Intel and VAX). */ -#undef WORDS_BIGENDIAN - -/* Define to 1 if NLS is requested. */ -#undef ENABLE_NLS - -/* Define as 1 if you have gettext and don't want to use GNU gettext. */ -#undef HAVE_GETTEXT - -/* Define as 1 if you have the stpcpy function. */ -#undef HAVE_STPCPY - -/* Define if your locale.h file contains LC_MESSAGES. */ -#undef HAVE_LC_MESSAGES - -/* Define if you have the __argz_count function. */ -#undef HAVE___ARGZ_COUNT - -/* Define if you have the __argz_next function. */ -#undef HAVE___ARGZ_NEXT - -/* Define if you have the __argz_stringify function. */ -#undef HAVE___ARGZ_STRINGIFY - -/* Define if you have the __setfpucw function. */ -#undef HAVE___SETFPUCW - -/* Define if you have the dcgettext function. */ -#undef HAVE_DCGETTEXT - -/* Define if you have the getcwd function. */ -#undef HAVE_GETCWD - -/* Define if you have the getpagesize function. */ -#undef HAVE_GETPAGESIZE - -/* Define if you have the getrusage function. */ -#undef HAVE_GETRUSAGE - -/* Define if you have the munmap function. */ -#undef HAVE_MUNMAP - -/* Define if you have the putenv function. */ -#undef HAVE_PUTENV - -/* Define if you have the setenv function. */ -#undef HAVE_SETENV - -/* Define if you have the setlocale function. */ -#undef HAVE_SETLOCALE - -/* Define if you have the sigaction function. */ -#undef HAVE_SIGACTION - -/* Define if you have the stpcpy function. */ -#undef HAVE_STPCPY - -/* Define if you have the strcasecmp function. */ -#undef HAVE_STRCASECMP - -/* Define if you have the strchr function. */ -#undef HAVE_STRCHR - -/* Define if you have the time function. */ -#undef HAVE_TIME - -/* Define if you have the <argz.h> header file. */ -#undef HAVE_ARGZ_H - -/* Define if you have the <fcntl.h> header file. */ -#undef HAVE_FCNTL_H - -/* Define if you have the <fpu_control.h> header file. */ -#undef HAVE_FPU_CONTROL_H - -/* Define if you have the <limits.h> header file. */ -#undef HAVE_LIMITS_H - -/* Define if you have the <locale.h> header file. */ -#undef HAVE_LOCALE_H - -/* Define if you have the <malloc.h> header file. */ -#undef HAVE_MALLOC_H - -/* Define if you have the <nl_types.h> header file. */ -#undef HAVE_NL_TYPES_H - -/* Define if you have the <stdlib.h> header file. */ -#undef HAVE_STDLIB_H - -/* Define if you have the <string.h> header file. */ -#undef HAVE_STRING_H - -/* Define if you have the <strings.h> header file. */ -#undef HAVE_STRINGS_H - -/* Define if you have the <sys/param.h> header file. */ -#undef HAVE_SYS_PARAM_H - -/* Define if you have the <sys/resource.h> header file. */ -#undef HAVE_SYS_RESOURCE_H - -/* Define if you have the <sys/time.h> header file. */ -#undef HAVE_SYS_TIME_H - -/* Define if you have the <time.h> header file. */ -#undef HAVE_TIME_H - -/* Define if you have the <unistd.h> header file. */ -#undef HAVE_UNISTD_H - -/* Define if you have the <values.h> header file. */ -#undef HAVE_VALUES_H diff --git a/sim/i960/configure b/sim/i960/configure deleted file mode 100755 index d848325..0000000 --- a/sim/i960/configure +++ /dev/null @@ -1,4294 +0,0 @@ -#! /bin/sh - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -sim_inline="-DDEFAULT_INLINE=0" - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -# This file is derived from `gettext.m4'. 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Not all systems have dirname. - ac_dest_dir=`echo $ac_dest|sed 's%/[^/][^/]*$%%'` - if test "$ac_dest_dir" != "$ac_dest" && test "$ac_dest_dir" != .; then - # The dest file is in a subdirectory. - test ! -d "$ac_dest_dir" && mkdir "$ac_dest_dir" - ac_dest_dir_suffix="/`echo $ac_dest_dir|sed 's%^\./%%'`" - # A "../" for each directory in $ac_dest_dir_suffix. - ac_dots=`echo $ac_dest_dir_suffix|sed 's%/[^/]*%../%g'` - else - ac_dest_dir_suffix= ac_dots= - fi - - case "$srcdir" in - [/$]*) ac_rel_source="$srcdir/$ac_source" ;; - *) ac_rel_source="$ac_dots$srcdir/$ac_source" ;; - esac - - # Make a symlink if possible; otherwise try a hard link. - if ln -s $ac_rel_source $ac_dest 2>/dev/null || - ln $srcdir/$ac_source $ac_dest; then : - else - { echo "configure: error: can not link $ac_dest to $srcdir/$ac_source" 1>&2; exit 1; } - fi -done -EOF -cat >> $CONFIG_STATUS <<EOF - -EOF -cat >> $CONFIG_STATUS <<\EOF -case "x$CONFIG_FILES" in - xMakefile*) - echo "Merging Makefile.sim+Make-common.sim into Makefile ..." - rm -f Makesim1.tmp Makesim2.tmp Makefile - sed -n -e '/^## COMMON_PRE_/,/^## End COMMON_PRE_/ p' <Make-common.sim >Makesim1.tmp - sed -n -e '/^## COMMON_POST_/,/^## End COMMON_POST_/ p' <Make-common.sim >Makesim2.tmp - sed -e '/^## COMMON_PRE_/ r Makesim1.tmp' \ - -e '/^## COMMON_POST_/ r Makesim2.tmp' \ - <Makefile.sim >Makefile - rm -f Makefile.sim Make-common.sim Makesim1.tmp Makesim2.tmp - ;; - esac - case "x$CONFIG_HEADERS" in xconfig.h:config.in) echo > stamp-h ;; esac - -exit 0 -EOF -chmod +x $CONFIG_STATUS -rm -fr confdefs* $ac_clean_files -test "$no_create" = yes || ${CONFIG_SHELL-/bin/sh} $CONFIG_STATUS || exit 1 - - diff --git a/sim/i960/configure.in b/sim/i960/configure.in deleted file mode 100644 index 7c55875..0000000 --- a/sim/i960/configure.in +++ /dev/null @@ -1,16 +0,0 @@ -dnl Process this file with autoconf to produce a configure script. -sinclude(../common/aclocal.m4) -AC_PREREQ(2.5)dnl -AC_INIT(Makefile.in) - -SIM_AC_COMMON - -SIM_AC_OPTION_ENDIAN(LITTLE_ENDIAN) -SIM_AC_OPTION_ALIGNMENT(NONSTRICT_ALIGNMENT) -SIM_AC_OPTION_HOSTENDIAN -SIM_AC_OPTION_SCACHE(1024) -SIM_AC_OPTION_DEFAULT_MODEL(i960KA) -SIM_AC_OPTION_ENVIRONMENT -SIM_AC_OPTION_CGEN_MAINT - -SIM_AC_OUTPUT diff --git a/sim/i960/cpu.c b/sim/i960/cpu.c deleted file mode 100644 index c41b643..0000000 --- a/sim/i960/cpu.c +++ /dev/null @@ -1,85 +0,0 @@ -/* Misc. support for CPU family i960base. - -THIS FILE IS MACHINE GENERATED WITH CGEN. - -Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc. - -This file is part of the GNU Simulators. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -*/ - -#define WANT_CPU i960base -#define WANT_CPU_I960BASE - -#include "sim-main.h" -#include "cgen-ops.h" - -/* Get the value of h-pc. */ - -USI -i960base_h_pc_get (SIM_CPU *current_cpu) -{ - return CPU (h_pc); -} - -/* Set a value for h-pc. */ - -void -i960base_h_pc_set (SIM_CPU *current_cpu, USI newval) -{ - CPU (h_pc) = newval; -} - -/* Get the value of h-gr. */ - -SI -i960base_h_gr_get (SIM_CPU *current_cpu, UINT regno) -{ - return CPU (h_gr[regno]); -} - -/* Set a value for h-gr. */ - -void -i960base_h_gr_set (SIM_CPU *current_cpu, UINT regno, SI newval) -{ - CPU (h_gr[regno]) = newval; -} - -/* Get the value of h-cc. */ - -SI -i960base_h_cc_get (SIM_CPU *current_cpu) -{ - return CPU (h_cc); -} - -/* Set a value for h-cc. */ - -void -i960base_h_cc_set (SIM_CPU *current_cpu, SI newval) -{ - CPU (h_cc) = newval; -} - -/* Record trace results for INSN. */ - -void -i960base_record_trace_results (SIM_CPU *current_cpu, CGEN_INSN *insn, - int *indices, TRACE_RECORD *tr) -{ -} diff --git a/sim/i960/cpu.h b/sim/i960/cpu.h deleted file mode 100644 index 1822b69..0000000 --- a/sim/i960/cpu.h +++ /dev/null @@ -1,601 +0,0 @@ -/* CPU family header for i960base. - -THIS FILE IS MACHINE GENERATED WITH CGEN. - -Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc. - -This file is part of the GNU Simulators. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -*/ - -#ifndef CPU_I960BASE_H -#define CPU_I960BASE_H - -/* Maximum number of instructions that are fetched at a time. - This is for LIW type instructions sets (e.g. m32r). */ -#define MAX_LIW_INSNS 1 - -/* Maximum number of instructions that can be executed in parallel. */ -#define MAX_PARALLEL_INSNS 1 - -/* CPU state information. */ -typedef struct { - /* Hardware elements. */ - struct { - /* program counter */ - USI h_pc; -#define GET_H_PC() CPU (h_pc) -#define SET_H_PC(x) (CPU (h_pc) = (x)) - /* general registers */ - SI h_gr[32]; -#define GET_H_GR(a1) CPU (h_gr)[a1] -#define SET_H_GR(a1, x) (CPU (h_gr)[a1] = (x)) - /* condition code */ - SI h_cc; -#define GET_H_CC() CPU (h_cc) -#define SET_H_CC(x) (CPU (h_cc) = (x)) - } hardware; -#define CPU_CGEN_HW(cpu) (& (cpu)->cpu_data.hardware) -} I960BASE_CPU_DATA; - -/* Cover fns for register access. */ -USI i960base_h_pc_get (SIM_CPU *); -void i960base_h_pc_set (SIM_CPU *, USI); -SI i960base_h_gr_get (SIM_CPU *, UINT); -void i960base_h_gr_set (SIM_CPU *, UINT, SI); -SI i960base_h_cc_get (SIM_CPU *); -void i960base_h_cc_set (SIM_CPU *, SI); - -/* These must be hand-written. */ -extern CPUREG_FETCH_FN i960base_fetch_register; -extern CPUREG_STORE_FN i960base_store_register; - -typedef struct { - int empty; -} MODEL_I960KA_DATA; - -typedef struct { - int empty; -} MODEL_I960CA_DATA; - -/* Instruction argument buffer. */ - -union sem_fields { - struct { /* no operands */ - int empty; - } fmt_empty; - struct { /* */ - IADDR i_ctrl_disp; - } sfmt_bno; - struct { /* */ - SI* i_br_src1; - unsigned char out_br_src1; - } sfmt_testno_reg; - struct { /* */ - IADDR i_br_disp; - SI* i_br_src2; - UINT f_br_src1; - unsigned char in_br_src2; - } sfmt_cmpobe_lit; - struct { /* */ - IADDR i_br_disp; - SI* i_br_src1; - SI* i_br_src2; - unsigned char in_br_src1; - unsigned char in_br_src2; - } sfmt_cmpobe_reg; - struct { /* */ - SI* i_dst; - UINT f_src1; - UINT f_src2; - UINT f_srcdst; - unsigned char out_dst; - unsigned char out_h_gr_add__DFLT_index_of__DFLT_dst_1; - } sfmt_emul3; - struct { /* */ - SI* i_dst; - SI* i_src1; - UINT f_src2; - UINT f_srcdst; - unsigned char in_src1; - unsigned char out_dst; - unsigned char out_h_gr_add__DFLT_index_of__DFLT_dst_1; - } sfmt_emul2; - struct { /* */ - SI* i_dst; - SI* i_src2; - UINT f_src1; - UINT f_srcdst; - unsigned char in_src2; - unsigned char out_dst; - unsigned char out_h_gr_add__DFLT_index_of__DFLT_dst_1; - } sfmt_emul1; - struct { /* */ - SI* i_dst; - SI* i_src1; - SI* i_src2; - UINT f_srcdst; - unsigned char in_src1; - unsigned char in_src2; - unsigned char out_dst; - unsigned char out_h_gr_add__DFLT_index_of__DFLT_dst_1; - } sfmt_emul; - struct { /* */ - SI* i_abase; - SI* i_st_src; - UINT f_offset; - UINT f_srcdst; - unsigned char in_abase; - unsigned char in_h_gr_add__DFLT_index_of__DFLT_st_src_1; - unsigned char in_h_gr_add__DFLT_index_of__DFLT_st_src_2; - unsigned char in_h_gr_add__DFLT_index_of__DFLT_st_src_3; - unsigned char in_st_src; - } sfmt_stq_indirect_offset; - struct { /* */ - SI* i_abase; - SI* i_dst; - UINT f_offset; - UINT f_srcdst; - unsigned char in_abase; - unsigned char out_dst; - unsigned char out_h_gr_add__DFLT_index_of__DFLT_dst_1; - unsigned char out_h_gr_add__DFLT_index_of__DFLT_dst_2; - unsigned char out_h_gr_add__DFLT_index_of__DFLT_dst_3; - } sfmt_ldq_indirect_offset; - struct { /* */ - SI* i_abase; - SI* i_index; - SI* i_st_src; - UINT f_optdisp; - UINT f_scale; - UINT f_srcdst; - unsigned char in_abase; - unsigned char in_h_gr_add__DFLT_index_of__DFLT_st_src_1; - unsigned char in_h_gr_add__DFLT_index_of__DFLT_st_src_2; - unsigned char in_h_gr_add__DFLT_index_of__DFLT_st_src_3; - unsigned char in_index; - unsigned char in_st_src; - } sfmt_stq_indirect_index_disp; - struct { /* */ - SI* i_abase; - SI* i_dst; - SI* i_index; - UINT f_optdisp; - UINT f_scale; - UINT f_srcdst; - unsigned char in_abase; - unsigned char in_index; - unsigned char out_dst; - unsigned char out_h_gr_add__DFLT_index_of__DFLT_dst_1; - unsigned char out_h_gr_add__DFLT_index_of__DFLT_dst_2; - unsigned char out_h_gr_add__DFLT_index_of__DFLT_dst_3; - } sfmt_ldq_indirect_index_disp; - struct { /* */ - SI* i_dst; - SI* i_src1; - UINT f_src1; - UINT f_srcdst; - unsigned char in_h_gr_add__DFLT_index_of__DFLT_src1_1; - unsigned char in_h_gr_add__DFLT_index_of__DFLT_src1_2; - unsigned char in_h_gr_add__DFLT_index_of__DFLT_src1_3; - unsigned char in_src1; - unsigned char out_dst; - unsigned char out_h_gr_add__DFLT_index_of__DFLT_dst_1; - unsigned char out_h_gr_add__DFLT_index_of__DFLT_dst_2; - unsigned char out_h_gr_add__DFLT_index_of__DFLT_dst_3; - } sfmt_movq; - struct { /* */ - UINT f_optdisp; - unsigned char in_h_gr_0; - unsigned char in_h_gr_1; - unsigned char in_h_gr_10; - unsigned char in_h_gr_11; - unsigned char in_h_gr_12; - unsigned char in_h_gr_13; - unsigned char in_h_gr_14; - unsigned char in_h_gr_15; - unsigned char in_h_gr_2; - unsigned char in_h_gr_3; - unsigned char in_h_gr_31; - unsigned char in_h_gr_4; - unsigned char in_h_gr_5; - unsigned char in_h_gr_6; - unsigned char in_h_gr_7; - unsigned char in_h_gr_8; - unsigned char in_h_gr_9; - unsigned char out_h_gr_0; - unsigned char out_h_gr_1; - unsigned char out_h_gr_10; - unsigned char out_h_gr_11; - unsigned char out_h_gr_12; - unsigned char out_h_gr_13; - unsigned char out_h_gr_14; - unsigned char out_h_gr_15; - unsigned char out_h_gr_2; - unsigned char out_h_gr_3; - unsigned char out_h_gr_31; - unsigned char out_h_gr_4; - unsigned char out_h_gr_5; - unsigned char out_h_gr_6; - unsigned char out_h_gr_7; - unsigned char out_h_gr_8; - unsigned char out_h_gr_9; - } sfmt_callx_disp; - struct { /* */ - SI* i_abase; - UINT f_offset; - unsigned char in_abase; - unsigned char in_h_gr_0; - unsigned char in_h_gr_1; - unsigned char in_h_gr_10; - unsigned char in_h_gr_11; - unsigned char in_h_gr_12; - unsigned char in_h_gr_13; - unsigned char in_h_gr_14; - unsigned char in_h_gr_15; - unsigned char in_h_gr_2; - unsigned char in_h_gr_3; - unsigned char in_h_gr_31; - unsigned char in_h_gr_4; - unsigned char in_h_gr_5; - unsigned char in_h_gr_6; - unsigned char in_h_gr_7; - unsigned char in_h_gr_8; - unsigned char in_h_gr_9; - unsigned char out_h_gr_0; - unsigned char out_h_gr_1; - unsigned char out_h_gr_10; - unsigned char out_h_gr_11; - unsigned char out_h_gr_12; - unsigned char out_h_gr_13; - unsigned char out_h_gr_14; - unsigned char out_h_gr_15; - unsigned char out_h_gr_2; - unsigned char out_h_gr_3; - unsigned char out_h_gr_31; - unsigned char out_h_gr_4; - unsigned char out_h_gr_5; - unsigned char out_h_gr_6; - unsigned char out_h_gr_7; - unsigned char out_h_gr_8; - unsigned char out_h_gr_9; - } sfmt_callx_indirect_offset; -#if WITH_SCACHE_PBB - /* Writeback handler. */ - struct { - /* Pointer to argbuf entry for insn whose results need writing back. */ - const struct argbuf *abuf; - } write; - /* x-before handler */ - struct { - /*const SCACHE *insns[MAX_PARALLEL_INSNS];*/ - int first_p; - } before; - /* x-after handler */ - struct { - int empty; - } after; - /* This entry is used to terminate each pbb. */ - struct { - /* Number of insns in pbb. */ - int insn_count; - /* Next pbb to execute. */ - SCACHE *next; - SCACHE *branch_target; - } chain; -#endif -}; - -/* The ARGBUF struct. */ -struct argbuf { - /* These are the baseclass definitions. */ - IADDR addr; - const IDESC *idesc; - char trace_p; - char profile_p; - /* ??? Temporary hack for skip insns. */ - char skip_count; - char unused; - /* cpu specific data follows */ - union sem semantic; - int written; - union sem_fields fields; -}; - -/* A cached insn. - - ??? SCACHE used to contain more than just argbuf. We could delete the - type entirely and always just use ARGBUF, but for future concerns and as - a level of abstraction it is left in. */ - -struct scache { - struct argbuf argbuf; -}; - -/* Macros to simplify extraction, reading and semantic code. - These define and assign the local vars that contain the insn's fields. */ - -#define EXTRACT_IFMT_EMPTY_VARS \ - unsigned int length; -#define EXTRACT_IFMT_EMPTY_CODE \ - length = 0; \ - -#define EXTRACT_IFMT_MULO_VARS \ - UINT f_opcode; \ - UINT f_srcdst; \ - UINT f_src2; \ - UINT f_m3; \ - UINT f_m2; \ - UINT f_m1; \ - UINT f_opcode2; \ - UINT f_zero; \ - UINT f_src1; \ - unsigned int length; -#define EXTRACT_IFMT_MULO_CODE \ - length = 4; \ - f_opcode = EXTRACT_MSB0_UINT (insn, 32, 0, 8); \ - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); \ - f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); \ - f_m3 = EXTRACT_MSB0_UINT (insn, 32, 18, 1); \ - f_m2 = EXTRACT_MSB0_UINT (insn, 32, 19, 1); \ - f_m1 = EXTRACT_MSB0_UINT (insn, 32, 20, 1); \ - f_opcode2 = EXTRACT_MSB0_UINT (insn, 32, 21, 4); \ - f_zero = EXTRACT_MSB0_UINT (insn, 32, 25, 2); \ - f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); \ - -#define EXTRACT_IFMT_MULO1_VARS \ - UINT f_opcode; \ - UINT f_srcdst; \ - UINT f_src2; \ - UINT f_m3; \ - UINT f_m2; \ - UINT f_m1; \ - UINT f_opcode2; \ - UINT f_zero; \ - UINT f_src1; \ - unsigned int length; -#define EXTRACT_IFMT_MULO1_CODE \ - length = 4; \ - f_opcode = EXTRACT_MSB0_UINT (insn, 32, 0, 8); \ - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); \ - f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); \ - f_m3 = EXTRACT_MSB0_UINT (insn, 32, 18, 1); \ - f_m2 = EXTRACT_MSB0_UINT (insn, 32, 19, 1); \ - f_m1 = EXTRACT_MSB0_UINT (insn, 32, 20, 1); \ - f_opcode2 = EXTRACT_MSB0_UINT (insn, 32, 21, 4); \ - f_zero = EXTRACT_MSB0_UINT (insn, 32, 25, 2); \ - f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); \ - -#define EXTRACT_IFMT_MULO2_VARS \ - UINT f_opcode; \ - UINT f_srcdst; \ - UINT f_src2; \ - UINT f_m3; \ - UINT f_m2; \ - UINT f_m1; \ - UINT f_opcode2; \ - UINT f_zero; \ - UINT f_src1; \ - unsigned int length; -#define EXTRACT_IFMT_MULO2_CODE \ - length = 4; \ - f_opcode = EXTRACT_MSB0_UINT (insn, 32, 0, 8); \ - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); \ - f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); \ - f_m3 = EXTRACT_MSB0_UINT (insn, 32, 18, 1); \ - f_m2 = EXTRACT_MSB0_UINT (insn, 32, 19, 1); \ - f_m1 = EXTRACT_MSB0_UINT (insn, 32, 20, 1); \ - f_opcode2 = EXTRACT_MSB0_UINT (insn, 32, 21, 4); \ - f_zero = EXTRACT_MSB0_UINT (insn, 32, 25, 2); \ - f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); \ - -#define EXTRACT_IFMT_MULO3_VARS \ - UINT f_opcode; \ - UINT f_srcdst; \ - UINT f_src2; \ - UINT f_m3; \ - UINT f_m2; \ - UINT f_m1; \ - UINT f_opcode2; \ - UINT f_zero; \ - UINT f_src1; \ - unsigned int length; -#define EXTRACT_IFMT_MULO3_CODE \ - length = 4; \ - f_opcode = EXTRACT_MSB0_UINT (insn, 32, 0, 8); \ - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); \ - f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); \ - f_m3 = EXTRACT_MSB0_UINT (insn, 32, 18, 1); \ - f_m2 = EXTRACT_MSB0_UINT (insn, 32, 19, 1); \ - f_m1 = EXTRACT_MSB0_UINT (insn, 32, 20, 1); \ - f_opcode2 = EXTRACT_MSB0_UINT (insn, 32, 21, 4); \ - f_zero = EXTRACT_MSB0_UINT (insn, 32, 25, 2); \ - f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); \ - -#define EXTRACT_IFMT_LDA_OFFSET_VARS \ - UINT f_opcode; \ - UINT f_srcdst; \ - UINT f_abase; \ - UINT f_modea; \ - UINT f_zeroa; \ - UINT f_offset; \ - unsigned int length; -#define EXTRACT_IFMT_LDA_OFFSET_CODE \ - length = 4; \ - f_opcode = EXTRACT_MSB0_UINT (insn, 32, 0, 8); \ - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); \ - f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); \ - f_modea = EXTRACT_MSB0_UINT (insn, 32, 18, 1); \ - f_zeroa = EXTRACT_MSB0_UINT (insn, 32, 19, 1); \ - f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12); \ - -#define EXTRACT_IFMT_LDA_INDIRECT_VARS \ - UINT f_opcode; \ - UINT f_srcdst; \ - UINT f_abase; \ - UINT f_modeb; \ - UINT f_scale; \ - UINT f_zerob; \ - UINT f_index; \ - unsigned int length; -#define EXTRACT_IFMT_LDA_INDIRECT_CODE \ - length = 4; \ - f_opcode = EXTRACT_MSB0_UINT (insn, 32, 0, 8); \ - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); \ - f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); \ - f_modeb = EXTRACT_MSB0_UINT (insn, 32, 18, 4); \ - f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); \ - f_zerob = EXTRACT_MSB0_UINT (insn, 32, 25, 2); \ - f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); \ - -#define EXTRACT_IFMT_LDA_DISP_VARS \ - UINT f_opcode; \ - UINT f_optdisp; \ - UINT f_srcdst; \ - UINT f_abase; \ - UINT f_modeb; \ - UINT f_scale; \ - UINT f_zerob; \ - UINT f_index; \ - /* Contents of trailing part of insn. */ \ - UINT word_1; \ - unsigned int length; -#define EXTRACT_IFMT_LDA_DISP_CODE \ - length = 8; \ - word_1 = GETIMEMUSI (current_cpu, pc + 4); \ - f_opcode = EXTRACT_MSB0_UINT (insn, 32, 0, 8); \ - f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); \ - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); \ - f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); \ - f_modeb = EXTRACT_MSB0_UINT (insn, 32, 18, 4); \ - f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); \ - f_zerob = EXTRACT_MSB0_UINT (insn, 32, 25, 2); \ - f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); \ - -#define EXTRACT_IFMT_ST_OFFSET_VARS \ - UINT f_opcode; \ - UINT f_srcdst; \ - UINT f_abase; \ - UINT f_modea; \ - UINT f_zeroa; \ - UINT f_offset; \ - unsigned int length; -#define EXTRACT_IFMT_ST_OFFSET_CODE \ - length = 4; \ - f_opcode = EXTRACT_MSB0_UINT (insn, 32, 0, 8); \ - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); \ - f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); \ - f_modea = EXTRACT_MSB0_UINT (insn, 32, 18, 1); \ - f_zeroa = EXTRACT_MSB0_UINT (insn, 32, 19, 1); \ - f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12); \ - -#define EXTRACT_IFMT_ST_INDIRECT_VARS \ - UINT f_opcode; \ - UINT f_srcdst; \ - UINT f_abase; \ - UINT f_modeb; \ - UINT f_scale; \ - UINT f_zerob; \ - UINT f_index; \ - unsigned int length; -#define EXTRACT_IFMT_ST_INDIRECT_CODE \ - length = 4; \ - f_opcode = EXTRACT_MSB0_UINT (insn, 32, 0, 8); \ - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); \ - f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); \ - f_modeb = EXTRACT_MSB0_UINT (insn, 32, 18, 4); \ - f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); \ - f_zerob = EXTRACT_MSB0_UINT (insn, 32, 25, 2); \ - f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); \ - -#define EXTRACT_IFMT_ST_DISP_VARS \ - UINT f_opcode; \ - UINT f_optdisp; \ - UINT f_srcdst; \ - UINT f_abase; \ - UINT f_modeb; \ - UINT f_scale; \ - UINT f_zerob; \ - UINT f_index; \ - /* Contents of trailing part of insn. */ \ - UINT word_1; \ - unsigned int length; -#define EXTRACT_IFMT_ST_DISP_CODE \ - length = 8; \ - word_1 = GETIMEMUSI (current_cpu, pc + 4); \ - f_opcode = EXTRACT_MSB0_UINT (insn, 32, 0, 8); \ - f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); \ - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); \ - f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); \ - f_modeb = EXTRACT_MSB0_UINT (insn, 32, 18, 4); \ - f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); \ - f_zerob = EXTRACT_MSB0_UINT (insn, 32, 25, 2); \ - f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); \ - -#define EXTRACT_IFMT_CMPOBE_REG_VARS \ - UINT f_opcode; \ - UINT f_br_src1; \ - UINT f_br_src2; \ - UINT f_br_m1; \ - SI f_br_disp; \ - UINT f_br_zero; \ - unsigned int length; -#define EXTRACT_IFMT_CMPOBE_REG_CODE \ - length = 4; \ - f_opcode = EXTRACT_MSB0_UINT (insn, 32, 0, 8); \ - f_br_src1 = EXTRACT_MSB0_UINT (insn, 32, 8, 5); \ - f_br_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); \ - f_br_m1 = EXTRACT_MSB0_UINT (insn, 32, 18, 1); \ - f_br_disp = ((((EXTRACT_MSB0_INT (insn, 32, 19, 11)) << (2))) + (pc)); \ - f_br_zero = EXTRACT_MSB0_UINT (insn, 32, 30, 2); \ - -#define EXTRACT_IFMT_CMPOBE_LIT_VARS \ - UINT f_opcode; \ - UINT f_br_src1; \ - UINT f_br_src2; \ - UINT f_br_m1; \ - SI f_br_disp; \ - UINT f_br_zero; \ - unsigned int length; -#define EXTRACT_IFMT_CMPOBE_LIT_CODE \ - length = 4; \ - f_opcode = EXTRACT_MSB0_UINT (insn, 32, 0, 8); \ - f_br_src1 = EXTRACT_MSB0_UINT (insn, 32, 8, 5); \ - f_br_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); \ - f_br_m1 = EXTRACT_MSB0_UINT (insn, 32, 18, 1); \ - f_br_disp = ((((EXTRACT_MSB0_INT (insn, 32, 19, 11)) << (2))) + (pc)); \ - f_br_zero = EXTRACT_MSB0_UINT (insn, 32, 30, 2); \ - -#define EXTRACT_IFMT_BNO_VARS \ - UINT f_opcode; \ - SI f_ctrl_disp; \ - UINT f_ctrl_zero; \ - unsigned int length; -#define EXTRACT_IFMT_BNO_CODE \ - length = 4; \ - f_opcode = EXTRACT_MSB0_UINT (insn, 32, 0, 8); \ - f_ctrl_disp = ((((EXTRACT_MSB0_INT (insn, 32, 8, 22)) << (2))) + (pc)); \ - f_ctrl_zero = EXTRACT_MSB0_UINT (insn, 32, 30, 2); \ - -/* Collection of various things for the trace handler to use. */ - -typedef struct trace_record { - IADDR pc; - /* FIXME:wip */ -} TRACE_RECORD; - -#endif /* CPU_I960BASE_H */ diff --git a/sim/i960/cpuall.h b/sim/i960/cpuall.h deleted file mode 100644 index 772cd9f..0000000 --- a/sim/i960/cpuall.h +++ /dev/null @@ -1,67 +0,0 @@ -/* Simulator CPU header for i960. - -THIS FILE IS MACHINE GENERATED WITH CGEN. - -Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc. - -This file is part of the GNU Simulators. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -*/ - -#ifndef I960_CPUALL_H -#define I960_CPUALL_H - -/* Include files for each cpu family. */ - -#ifdef WANT_CPU_I960BASE -#include "eng.h" -#include "cgen-engine.h" -#include "cpu.h" -#include "decode.h" -#endif - -extern const MACH i960_ka_sa_mach; -extern const MACH i960_ca_mach; - -#ifndef WANT_CPU -/* The ARGBUF struct. */ -struct argbuf { - /* These are the baseclass definitions. */ - IADDR addr; - const IDESC *idesc; - char trace_p; - char profile_p; - /* ??? Temporary hack for skip insns. */ - char skip_count; - char unused; - /* cpu specific data follows */ -}; -#endif - -#ifndef WANT_CPU -/* A cached insn. - - ??? SCACHE used to contain more than just argbuf. We could delete the - type entirely and always just use ARGBUF, but for future concerns and as - a level of abstraction it is left in. */ - -struct scache { - struct argbuf argbuf; -}; -#endif - -#endif /* I960_CPUALL_H */ diff --git a/sim/i960/decode.c b/sim/i960/decode.c deleted file mode 100644 index c1d9f90..0000000 --- a/sim/i960/decode.c +++ /dev/null @@ -1,5569 +0,0 @@ -/* Simulator instruction decoder for i960base. - -THIS FILE IS MACHINE GENERATED WITH CGEN. - -Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc. - -This file is part of the GNU Simulators. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -*/ - -#define WANT_CPU i960base -#define WANT_CPU_I960BASE - -#include "sim-main.h" -#include "sim-assert.h" - -/* The instruction descriptor array. - This is computed at runtime. Space for it is not malloc'd to save a - teensy bit of cpu in the decoder. Moving it to malloc space is trivial - but won't be done until necessary (we don't currently support the runtime - addition of instructions nor an SMP machine with different cpus). */ -static IDESC i960base_insn_data[I960BASE_INSN_MAX]; - -/* Commas between elements are contained in the macros. - Some of these are conditionally compiled out. */ - -static const struct insn_sem i960base_insn_sem[] = -{ - { VIRTUAL_INSN_X_INVALID, I960BASE_INSN_X_INVALID, I960BASE_SFMT_EMPTY }, - { VIRTUAL_INSN_X_AFTER, I960BASE_INSN_X_AFTER, I960BASE_SFMT_EMPTY }, - { VIRTUAL_INSN_X_BEFORE, I960BASE_INSN_X_BEFORE, I960BASE_SFMT_EMPTY }, - { VIRTUAL_INSN_X_CTI_CHAIN, I960BASE_INSN_X_CTI_CHAIN, I960BASE_SFMT_EMPTY }, - { VIRTUAL_INSN_X_CHAIN, I960BASE_INSN_X_CHAIN, I960BASE_SFMT_EMPTY }, - { VIRTUAL_INSN_X_BEGIN, I960BASE_INSN_X_BEGIN, I960BASE_SFMT_EMPTY }, - { I960_INSN_MULO, I960BASE_INSN_MULO, I960BASE_SFMT_MULO }, - { I960_INSN_MULO1, I960BASE_INSN_MULO1, I960BASE_SFMT_MULO1 }, - { I960_INSN_MULO2, I960BASE_INSN_MULO2, I960BASE_SFMT_MULO2 }, - { I960_INSN_MULO3, I960BASE_INSN_MULO3, I960BASE_SFMT_MULO3 }, - { I960_INSN_REMO, I960BASE_INSN_REMO, I960BASE_SFMT_MULO }, - { I960_INSN_REMO1, I960BASE_INSN_REMO1, I960BASE_SFMT_MULO1 }, - { I960_INSN_REMO2, I960BASE_INSN_REMO2, I960BASE_SFMT_MULO2 }, - { I960_INSN_REMO3, I960BASE_INSN_REMO3, I960BASE_SFMT_MULO3 }, - { I960_INSN_DIVO, I960BASE_INSN_DIVO, I960BASE_SFMT_MULO }, - { I960_INSN_DIVO1, I960BASE_INSN_DIVO1, I960BASE_SFMT_MULO1 }, - { I960_INSN_DIVO2, I960BASE_INSN_DIVO2, I960BASE_SFMT_MULO2 }, - { I960_INSN_DIVO3, I960BASE_INSN_DIVO3, I960BASE_SFMT_MULO3 }, - { I960_INSN_REMI, I960BASE_INSN_REMI, I960BASE_SFMT_MULO }, - { I960_INSN_REMI1, I960BASE_INSN_REMI1, I960BASE_SFMT_MULO1 }, - { I960_INSN_REMI2, I960BASE_INSN_REMI2, I960BASE_SFMT_MULO2 }, - { I960_INSN_REMI3, I960BASE_INSN_REMI3, I960BASE_SFMT_MULO3 }, - { I960_INSN_DIVI, I960BASE_INSN_DIVI, I960BASE_SFMT_MULO }, - { I960_INSN_DIVI1, I960BASE_INSN_DIVI1, I960BASE_SFMT_MULO1 }, - { I960_INSN_DIVI2, I960BASE_INSN_DIVI2, I960BASE_SFMT_MULO2 }, - { I960_INSN_DIVI3, I960BASE_INSN_DIVI3, I960BASE_SFMT_MULO3 }, - { I960_INSN_ADDO, I960BASE_INSN_ADDO, I960BASE_SFMT_MULO }, - { I960_INSN_ADDO1, I960BASE_INSN_ADDO1, I960BASE_SFMT_MULO1 }, - { I960_INSN_ADDO2, I960BASE_INSN_ADDO2, I960BASE_SFMT_MULO2 }, - { I960_INSN_ADDO3, I960BASE_INSN_ADDO3, I960BASE_SFMT_MULO3 }, - { I960_INSN_SUBO, I960BASE_INSN_SUBO, I960BASE_SFMT_MULO }, - { I960_INSN_SUBO1, I960BASE_INSN_SUBO1, I960BASE_SFMT_MULO1 }, - { I960_INSN_SUBO2, I960BASE_INSN_SUBO2, I960BASE_SFMT_MULO2 }, - { I960_INSN_SUBO3, I960BASE_INSN_SUBO3, I960BASE_SFMT_MULO3 }, - { I960_INSN_NOTBIT, I960BASE_INSN_NOTBIT, I960BASE_SFMT_NOTBIT }, - { I960_INSN_NOTBIT1, I960BASE_INSN_NOTBIT1, I960BASE_SFMT_NOTBIT1 }, - { I960_INSN_NOTBIT2, I960BASE_INSN_NOTBIT2, I960BASE_SFMT_NOTBIT2 }, - { I960_INSN_NOTBIT3, I960BASE_INSN_NOTBIT3, I960BASE_SFMT_NOTBIT3 }, - { I960_INSN_AND, I960BASE_INSN_AND, I960BASE_SFMT_MULO }, - { I960_INSN_AND1, I960BASE_INSN_AND1, I960BASE_SFMT_MULO1 }, - { I960_INSN_AND2, I960BASE_INSN_AND2, I960BASE_SFMT_MULO2 }, - { I960_INSN_AND3, I960BASE_INSN_AND3, I960BASE_SFMT_MULO3 }, - { I960_INSN_ANDNOT, I960BASE_INSN_ANDNOT, I960BASE_SFMT_MULO }, - { I960_INSN_ANDNOT1, I960BASE_INSN_ANDNOT1, I960BASE_SFMT_MULO1 }, - { I960_INSN_ANDNOT2, I960BASE_INSN_ANDNOT2, I960BASE_SFMT_MULO2 }, - { I960_INSN_ANDNOT3, I960BASE_INSN_ANDNOT3, I960BASE_SFMT_MULO3 }, - { I960_INSN_SETBIT, I960BASE_INSN_SETBIT, I960BASE_SFMT_NOTBIT }, - { I960_INSN_SETBIT1, I960BASE_INSN_SETBIT1, I960BASE_SFMT_NOTBIT1 }, - { I960_INSN_SETBIT2, I960BASE_INSN_SETBIT2, I960BASE_SFMT_NOTBIT2 }, - { I960_INSN_SETBIT3, I960BASE_INSN_SETBIT3, I960BASE_SFMT_NOTBIT3 }, - { I960_INSN_NOTAND, I960BASE_INSN_NOTAND, I960BASE_SFMT_MULO }, - { I960_INSN_NOTAND1, I960BASE_INSN_NOTAND1, I960BASE_SFMT_MULO1 }, - { I960_INSN_NOTAND2, I960BASE_INSN_NOTAND2, I960BASE_SFMT_MULO2 }, - { I960_INSN_NOTAND3, I960BASE_INSN_NOTAND3, I960BASE_SFMT_MULO3 }, - { I960_INSN_XOR, I960BASE_INSN_XOR, I960BASE_SFMT_MULO }, - { I960_INSN_XOR1, I960BASE_INSN_XOR1, I960BASE_SFMT_MULO1 }, - { I960_INSN_XOR2, I960BASE_INSN_XOR2, I960BASE_SFMT_MULO2 }, - { I960_INSN_XOR3, I960BASE_INSN_XOR3, I960BASE_SFMT_MULO3 }, - { I960_INSN_OR, I960BASE_INSN_OR, I960BASE_SFMT_MULO }, - { I960_INSN_OR1, I960BASE_INSN_OR1, I960BASE_SFMT_MULO1 }, - { I960_INSN_OR2, I960BASE_INSN_OR2, I960BASE_SFMT_MULO2 }, - { I960_INSN_OR3, I960BASE_INSN_OR3, I960BASE_SFMT_MULO3 }, - { I960_INSN_NOR, I960BASE_INSN_NOR, I960BASE_SFMT_MULO }, - { I960_INSN_NOR1, I960BASE_INSN_NOR1, I960BASE_SFMT_MULO1 }, - { I960_INSN_NOR2, I960BASE_INSN_NOR2, I960BASE_SFMT_MULO2 }, - { I960_INSN_NOR3, I960BASE_INSN_NOR3, I960BASE_SFMT_MULO3 }, - { I960_INSN_XNOR, I960BASE_INSN_XNOR, I960BASE_SFMT_MULO }, - { I960_INSN_XNOR1, I960BASE_INSN_XNOR1, I960BASE_SFMT_MULO1 }, - { I960_INSN_XNOR2, I960BASE_INSN_XNOR2, I960BASE_SFMT_MULO2 }, - { I960_INSN_XNOR3, I960BASE_INSN_XNOR3, I960BASE_SFMT_MULO3 }, - { I960_INSN_NOT, I960BASE_INSN_NOT, I960BASE_SFMT_NOT }, - { I960_INSN_NOT1, I960BASE_INSN_NOT1, I960BASE_SFMT_NOT1 }, - { I960_INSN_NOT2, I960BASE_INSN_NOT2, I960BASE_SFMT_NOT }, - { I960_INSN_NOT3, I960BASE_INSN_NOT3, I960BASE_SFMT_NOT1 }, - { I960_INSN_ORNOT, I960BASE_INSN_ORNOT, I960BASE_SFMT_MULO }, - { I960_INSN_ORNOT1, I960BASE_INSN_ORNOT1, I960BASE_SFMT_MULO1 }, - { I960_INSN_ORNOT2, I960BASE_INSN_ORNOT2, I960BASE_SFMT_MULO2 }, - { I960_INSN_ORNOT3, I960BASE_INSN_ORNOT3, I960BASE_SFMT_MULO3 }, - { I960_INSN_CLRBIT, I960BASE_INSN_CLRBIT, I960BASE_SFMT_NOTBIT }, - { I960_INSN_CLRBIT1, I960BASE_INSN_CLRBIT1, I960BASE_SFMT_NOTBIT1 }, - { I960_INSN_CLRBIT2, I960BASE_INSN_CLRBIT2, I960BASE_SFMT_NOTBIT2 }, - { I960_INSN_CLRBIT3, I960BASE_INSN_CLRBIT3, I960BASE_SFMT_NOTBIT3 }, - { I960_INSN_SHLO, I960BASE_INSN_SHLO, I960BASE_SFMT_SHLO }, - { I960_INSN_SHLO1, I960BASE_INSN_SHLO1, I960BASE_SFMT_SHLO1 }, - { I960_INSN_SHLO2, I960BASE_INSN_SHLO2, I960BASE_SFMT_SHLO2 }, - { I960_INSN_SHLO3, I960BASE_INSN_SHLO3, I960BASE_SFMT_SHLO3 }, - { I960_INSN_SHRO, I960BASE_INSN_SHRO, I960BASE_SFMT_SHLO }, - { I960_INSN_SHRO1, I960BASE_INSN_SHRO1, I960BASE_SFMT_SHLO1 }, - { I960_INSN_SHRO2, I960BASE_INSN_SHRO2, I960BASE_SFMT_SHLO2 }, - { I960_INSN_SHRO3, I960BASE_INSN_SHRO3, I960BASE_SFMT_SHLO3 }, - { I960_INSN_SHLI, I960BASE_INSN_SHLI, I960BASE_SFMT_SHLO }, - { I960_INSN_SHLI1, I960BASE_INSN_SHLI1, I960BASE_SFMT_SHLO1 }, - { I960_INSN_SHLI2, I960BASE_INSN_SHLI2, I960BASE_SFMT_SHLO2 }, - { I960_INSN_SHLI3, I960BASE_INSN_SHLI3, I960BASE_SFMT_SHLO3 }, - { I960_INSN_SHRI, I960BASE_INSN_SHRI, I960BASE_SFMT_SHLO }, - { I960_INSN_SHRI1, I960BASE_INSN_SHRI1, I960BASE_SFMT_SHLO1 }, - { I960_INSN_SHRI2, I960BASE_INSN_SHRI2, I960BASE_SFMT_SHLO2 }, - { I960_INSN_SHRI3, I960BASE_INSN_SHRI3, I960BASE_SFMT_SHLO3 }, - { I960_INSN_EMUL, I960BASE_INSN_EMUL, I960BASE_SFMT_EMUL }, - { I960_INSN_EMUL1, I960BASE_INSN_EMUL1, I960BASE_SFMT_EMUL1 }, - { I960_INSN_EMUL2, I960BASE_INSN_EMUL2, I960BASE_SFMT_EMUL2 }, - { I960_INSN_EMUL3, I960BASE_INSN_EMUL3, I960BASE_SFMT_EMUL3 }, - { I960_INSN_MOV, I960BASE_INSN_MOV, I960BASE_SFMT_NOT }, - { I960_INSN_MOV1, I960BASE_INSN_MOV1, I960BASE_SFMT_NOT1 }, - { I960_INSN_MOVL, I960BASE_INSN_MOVL, I960BASE_SFMT_MOVL }, - { I960_INSN_MOVL1, I960BASE_INSN_MOVL1, I960BASE_SFMT_MOVL1 }, - { I960_INSN_MOVT, I960BASE_INSN_MOVT, I960BASE_SFMT_MOVT }, - { I960_INSN_MOVT1, I960BASE_INSN_MOVT1, I960BASE_SFMT_MOVT1 }, - { I960_INSN_MOVQ, I960BASE_INSN_MOVQ, I960BASE_SFMT_MOVQ }, - { I960_INSN_MOVQ1, I960BASE_INSN_MOVQ1, I960BASE_SFMT_MOVQ1 }, - { I960_INSN_MODPC, I960BASE_INSN_MODPC, I960BASE_SFMT_MODPC }, - { I960_INSN_MODAC, I960BASE_INSN_MODAC, I960BASE_SFMT_MODPC }, - { I960_INSN_LDA_OFFSET, I960BASE_INSN_LDA_OFFSET, I960BASE_SFMT_LDA_OFFSET }, - { I960_INSN_LDA_INDIRECT_OFFSET, I960BASE_INSN_LDA_INDIRECT_OFFSET, I960BASE_SFMT_LDA_INDIRECT_OFFSET }, - { I960_INSN_LDA_INDIRECT, I960BASE_INSN_LDA_INDIRECT, I960BASE_SFMT_LDA_INDIRECT }, - { I960_INSN_LDA_INDIRECT_INDEX, I960BASE_INSN_LDA_INDIRECT_INDEX, I960BASE_SFMT_LDA_INDIRECT_INDEX }, - { I960_INSN_LDA_DISP, I960BASE_INSN_LDA_DISP, I960BASE_SFMT_LDA_DISP }, - { I960_INSN_LDA_INDIRECT_DISP, I960BASE_INSN_LDA_INDIRECT_DISP, I960BASE_SFMT_LDA_INDIRECT_DISP }, - { I960_INSN_LDA_INDEX_DISP, I960BASE_INSN_LDA_INDEX_DISP, I960BASE_SFMT_LDA_INDEX_DISP }, - { I960_INSN_LDA_INDIRECT_INDEX_DISP, I960BASE_INSN_LDA_INDIRECT_INDEX_DISP, I960BASE_SFMT_LDA_INDIRECT_INDEX_DISP }, - { I960_INSN_LD_OFFSET, I960BASE_INSN_LD_OFFSET, I960BASE_SFMT_LD_OFFSET }, - { I960_INSN_LD_INDIRECT_OFFSET, I960BASE_INSN_LD_INDIRECT_OFFSET, I960BASE_SFMT_LD_INDIRECT_OFFSET }, - { I960_INSN_LD_INDIRECT, I960BASE_INSN_LD_INDIRECT, I960BASE_SFMT_LD_INDIRECT }, - { I960_INSN_LD_INDIRECT_INDEX, I960BASE_INSN_LD_INDIRECT_INDEX, I960BASE_SFMT_LD_INDIRECT_INDEX }, - { I960_INSN_LD_DISP, I960BASE_INSN_LD_DISP, I960BASE_SFMT_LD_DISP }, - { I960_INSN_LD_INDIRECT_DISP, I960BASE_INSN_LD_INDIRECT_DISP, I960BASE_SFMT_LD_INDIRECT_DISP }, - { I960_INSN_LD_INDEX_DISP, I960BASE_INSN_LD_INDEX_DISP, I960BASE_SFMT_LD_INDEX_DISP }, - { I960_INSN_LD_INDIRECT_INDEX_DISP, I960BASE_INSN_LD_INDIRECT_INDEX_DISP, I960BASE_SFMT_LD_INDIRECT_INDEX_DISP }, - { I960_INSN_LDOB_OFFSET, I960BASE_INSN_LDOB_OFFSET, I960BASE_SFMT_LD_OFFSET }, - { I960_INSN_LDOB_INDIRECT_OFFSET, I960BASE_INSN_LDOB_INDIRECT_OFFSET, I960BASE_SFMT_LD_INDIRECT_OFFSET }, - { I960_INSN_LDOB_INDIRECT, I960BASE_INSN_LDOB_INDIRECT, I960BASE_SFMT_LD_INDIRECT }, - { I960_INSN_LDOB_INDIRECT_INDEX, I960BASE_INSN_LDOB_INDIRECT_INDEX, I960BASE_SFMT_LD_INDIRECT_INDEX }, - { I960_INSN_LDOB_DISP, I960BASE_INSN_LDOB_DISP, I960BASE_SFMT_LD_DISP }, - { I960_INSN_LDOB_INDIRECT_DISP, I960BASE_INSN_LDOB_INDIRECT_DISP, I960BASE_SFMT_LD_INDIRECT_DISP }, - { I960_INSN_LDOB_INDEX_DISP, I960BASE_INSN_LDOB_INDEX_DISP, I960BASE_SFMT_LD_INDEX_DISP }, - { I960_INSN_LDOB_INDIRECT_INDEX_DISP, I960BASE_INSN_LDOB_INDIRECT_INDEX_DISP, I960BASE_SFMT_LD_INDIRECT_INDEX_DISP }, - { I960_INSN_LDOS_OFFSET, I960BASE_INSN_LDOS_OFFSET, I960BASE_SFMT_LD_OFFSET }, - { I960_INSN_LDOS_INDIRECT_OFFSET, I960BASE_INSN_LDOS_INDIRECT_OFFSET, I960BASE_SFMT_LD_INDIRECT_OFFSET }, - { I960_INSN_LDOS_INDIRECT, I960BASE_INSN_LDOS_INDIRECT, I960BASE_SFMT_LD_INDIRECT }, - { I960_INSN_LDOS_INDIRECT_INDEX, I960BASE_INSN_LDOS_INDIRECT_INDEX, I960BASE_SFMT_LD_INDIRECT_INDEX }, - { I960_INSN_LDOS_DISP, I960BASE_INSN_LDOS_DISP, I960BASE_SFMT_LD_DISP }, - { I960_INSN_LDOS_INDIRECT_DISP, I960BASE_INSN_LDOS_INDIRECT_DISP, I960BASE_SFMT_LD_INDIRECT_DISP }, - { I960_INSN_LDOS_INDEX_DISP, I960BASE_INSN_LDOS_INDEX_DISP, I960BASE_SFMT_LD_INDEX_DISP }, - { I960_INSN_LDOS_INDIRECT_INDEX_DISP, I960BASE_INSN_LDOS_INDIRECT_INDEX_DISP, I960BASE_SFMT_LD_INDIRECT_INDEX_DISP }, - { I960_INSN_LDIB_OFFSET, I960BASE_INSN_LDIB_OFFSET, I960BASE_SFMT_LD_OFFSET }, - { I960_INSN_LDIB_INDIRECT_OFFSET, I960BASE_INSN_LDIB_INDIRECT_OFFSET, I960BASE_SFMT_LD_INDIRECT_OFFSET }, - { I960_INSN_LDIB_INDIRECT, I960BASE_INSN_LDIB_INDIRECT, I960BASE_SFMT_LD_INDIRECT }, - { I960_INSN_LDIB_INDIRECT_INDEX, I960BASE_INSN_LDIB_INDIRECT_INDEX, I960BASE_SFMT_LD_INDIRECT_INDEX }, - { I960_INSN_LDIB_DISP, I960BASE_INSN_LDIB_DISP, I960BASE_SFMT_LD_DISP }, - { I960_INSN_LDIB_INDIRECT_DISP, I960BASE_INSN_LDIB_INDIRECT_DISP, I960BASE_SFMT_LD_INDIRECT_DISP }, - { I960_INSN_LDIB_INDEX_DISP, I960BASE_INSN_LDIB_INDEX_DISP, I960BASE_SFMT_LD_INDEX_DISP }, - { I960_INSN_LDIB_INDIRECT_INDEX_DISP, I960BASE_INSN_LDIB_INDIRECT_INDEX_DISP, I960BASE_SFMT_LD_INDIRECT_INDEX_DISP }, - { I960_INSN_LDIS_OFFSET, I960BASE_INSN_LDIS_OFFSET, I960BASE_SFMT_LD_OFFSET }, - { I960_INSN_LDIS_INDIRECT_OFFSET, I960BASE_INSN_LDIS_INDIRECT_OFFSET, I960BASE_SFMT_LD_INDIRECT_OFFSET }, - { I960_INSN_LDIS_INDIRECT, I960BASE_INSN_LDIS_INDIRECT, I960BASE_SFMT_LD_INDIRECT }, - { I960_INSN_LDIS_INDIRECT_INDEX, I960BASE_INSN_LDIS_INDIRECT_INDEX, I960BASE_SFMT_LD_INDIRECT_INDEX }, - { I960_INSN_LDIS_DISP, I960BASE_INSN_LDIS_DISP, I960BASE_SFMT_LD_DISP }, - { I960_INSN_LDIS_INDIRECT_DISP, I960BASE_INSN_LDIS_INDIRECT_DISP, I960BASE_SFMT_LD_INDIRECT_DISP }, - { I960_INSN_LDIS_INDEX_DISP, I960BASE_INSN_LDIS_INDEX_DISP, I960BASE_SFMT_LD_INDEX_DISP }, - { I960_INSN_LDIS_INDIRECT_INDEX_DISP, I960BASE_INSN_LDIS_INDIRECT_INDEX_DISP, I960BASE_SFMT_LD_INDIRECT_INDEX_DISP }, - { I960_INSN_LDL_OFFSET, I960BASE_INSN_LDL_OFFSET, I960BASE_SFMT_LDL_OFFSET }, - { I960_INSN_LDL_INDIRECT_OFFSET, I960BASE_INSN_LDL_INDIRECT_OFFSET, I960BASE_SFMT_LDL_INDIRECT_OFFSET }, - { I960_INSN_LDL_INDIRECT, I960BASE_INSN_LDL_INDIRECT, I960BASE_SFMT_LDL_INDIRECT }, - { I960_INSN_LDL_INDIRECT_INDEX, I960BASE_INSN_LDL_INDIRECT_INDEX, I960BASE_SFMT_LDL_INDIRECT_INDEX }, - { I960_INSN_LDL_DISP, I960BASE_INSN_LDL_DISP, I960BASE_SFMT_LDL_DISP }, - { I960_INSN_LDL_INDIRECT_DISP, I960BASE_INSN_LDL_INDIRECT_DISP, I960BASE_SFMT_LDL_INDIRECT_DISP }, - { I960_INSN_LDL_INDEX_DISP, I960BASE_INSN_LDL_INDEX_DISP, I960BASE_SFMT_LDL_INDEX_DISP }, - { I960_INSN_LDL_INDIRECT_INDEX_DISP, I960BASE_INSN_LDL_INDIRECT_INDEX_DISP, I960BASE_SFMT_LDL_INDIRECT_INDEX_DISP }, - { I960_INSN_LDT_OFFSET, I960BASE_INSN_LDT_OFFSET, I960BASE_SFMT_LDT_OFFSET }, - { I960_INSN_LDT_INDIRECT_OFFSET, I960BASE_INSN_LDT_INDIRECT_OFFSET, I960BASE_SFMT_LDT_INDIRECT_OFFSET }, - { I960_INSN_LDT_INDIRECT, I960BASE_INSN_LDT_INDIRECT, I960BASE_SFMT_LDT_INDIRECT }, - { I960_INSN_LDT_INDIRECT_INDEX, I960BASE_INSN_LDT_INDIRECT_INDEX, I960BASE_SFMT_LDT_INDIRECT_INDEX }, - { I960_INSN_LDT_DISP, I960BASE_INSN_LDT_DISP, I960BASE_SFMT_LDT_DISP }, - { I960_INSN_LDT_INDIRECT_DISP, I960BASE_INSN_LDT_INDIRECT_DISP, I960BASE_SFMT_LDT_INDIRECT_DISP }, - { I960_INSN_LDT_INDEX_DISP, I960BASE_INSN_LDT_INDEX_DISP, I960BASE_SFMT_LDT_INDEX_DISP }, - { I960_INSN_LDT_INDIRECT_INDEX_DISP, I960BASE_INSN_LDT_INDIRECT_INDEX_DISP, I960BASE_SFMT_LDT_INDIRECT_INDEX_DISP }, - { I960_INSN_LDQ_OFFSET, I960BASE_INSN_LDQ_OFFSET, I960BASE_SFMT_LDQ_OFFSET }, - { I960_INSN_LDQ_INDIRECT_OFFSET, I960BASE_INSN_LDQ_INDIRECT_OFFSET, I960BASE_SFMT_LDQ_INDIRECT_OFFSET }, - { I960_INSN_LDQ_INDIRECT, I960BASE_INSN_LDQ_INDIRECT, I960BASE_SFMT_LDQ_INDIRECT }, - { I960_INSN_LDQ_INDIRECT_INDEX, I960BASE_INSN_LDQ_INDIRECT_INDEX, I960BASE_SFMT_LDQ_INDIRECT_INDEX }, - { I960_INSN_LDQ_DISP, I960BASE_INSN_LDQ_DISP, I960BASE_SFMT_LDQ_DISP }, - { I960_INSN_LDQ_INDIRECT_DISP, I960BASE_INSN_LDQ_INDIRECT_DISP, I960BASE_SFMT_LDQ_INDIRECT_DISP }, - { I960_INSN_LDQ_INDEX_DISP, I960BASE_INSN_LDQ_INDEX_DISP, I960BASE_SFMT_LDQ_INDEX_DISP }, - { I960_INSN_LDQ_INDIRECT_INDEX_DISP, I960BASE_INSN_LDQ_INDIRECT_INDEX_DISP, I960BASE_SFMT_LDQ_INDIRECT_INDEX_DISP }, - { I960_INSN_ST_OFFSET, I960BASE_INSN_ST_OFFSET, I960BASE_SFMT_ST_OFFSET }, - { I960_INSN_ST_INDIRECT_OFFSET, I960BASE_INSN_ST_INDIRECT_OFFSET, I960BASE_SFMT_ST_INDIRECT_OFFSET }, - { I960_INSN_ST_INDIRECT, I960BASE_INSN_ST_INDIRECT, I960BASE_SFMT_ST_INDIRECT }, - { I960_INSN_ST_INDIRECT_INDEX, I960BASE_INSN_ST_INDIRECT_INDEX, I960BASE_SFMT_ST_INDIRECT_INDEX }, - { I960_INSN_ST_DISP, I960BASE_INSN_ST_DISP, I960BASE_SFMT_ST_DISP }, - { I960_INSN_ST_INDIRECT_DISP, I960BASE_INSN_ST_INDIRECT_DISP, I960BASE_SFMT_ST_INDIRECT_DISP }, - { I960_INSN_ST_INDEX_DISP, I960BASE_INSN_ST_INDEX_DISP, I960BASE_SFMT_ST_INDEX_DISP }, - { I960_INSN_ST_INDIRECT_INDEX_DISP, I960BASE_INSN_ST_INDIRECT_INDEX_DISP, I960BASE_SFMT_ST_INDIRECT_INDEX_DISP }, - { I960_INSN_STOB_OFFSET, I960BASE_INSN_STOB_OFFSET, I960BASE_SFMT_ST_OFFSET }, - { I960_INSN_STOB_INDIRECT_OFFSET, I960BASE_INSN_STOB_INDIRECT_OFFSET, I960BASE_SFMT_ST_INDIRECT_OFFSET }, - { I960_INSN_STOB_INDIRECT, I960BASE_INSN_STOB_INDIRECT, I960BASE_SFMT_ST_INDIRECT }, - { I960_INSN_STOB_INDIRECT_INDEX, I960BASE_INSN_STOB_INDIRECT_INDEX, I960BASE_SFMT_ST_INDIRECT_INDEX }, - { I960_INSN_STOB_DISP, I960BASE_INSN_STOB_DISP, I960BASE_SFMT_ST_DISP }, - { I960_INSN_STOB_INDIRECT_DISP, I960BASE_INSN_STOB_INDIRECT_DISP, I960BASE_SFMT_ST_INDIRECT_DISP }, - { I960_INSN_STOB_INDEX_DISP, I960BASE_INSN_STOB_INDEX_DISP, I960BASE_SFMT_ST_INDEX_DISP }, - { I960_INSN_STOB_INDIRECT_INDEX_DISP, I960BASE_INSN_STOB_INDIRECT_INDEX_DISP, I960BASE_SFMT_ST_INDIRECT_INDEX_DISP }, - { I960_INSN_STOS_OFFSET, I960BASE_INSN_STOS_OFFSET, I960BASE_SFMT_ST_OFFSET }, - { I960_INSN_STOS_INDIRECT_OFFSET, I960BASE_INSN_STOS_INDIRECT_OFFSET, I960BASE_SFMT_ST_INDIRECT_OFFSET }, - { I960_INSN_STOS_INDIRECT, I960BASE_INSN_STOS_INDIRECT, I960BASE_SFMT_ST_INDIRECT }, - { I960_INSN_STOS_INDIRECT_INDEX, I960BASE_INSN_STOS_INDIRECT_INDEX, I960BASE_SFMT_ST_INDIRECT_INDEX }, - { I960_INSN_STOS_DISP, I960BASE_INSN_STOS_DISP, I960BASE_SFMT_ST_DISP }, - { I960_INSN_STOS_INDIRECT_DISP, I960BASE_INSN_STOS_INDIRECT_DISP, I960BASE_SFMT_ST_INDIRECT_DISP }, - { I960_INSN_STOS_INDEX_DISP, I960BASE_INSN_STOS_INDEX_DISP, I960BASE_SFMT_ST_INDEX_DISP }, - { I960_INSN_STOS_INDIRECT_INDEX_DISP, I960BASE_INSN_STOS_INDIRECT_INDEX_DISP, I960BASE_SFMT_ST_INDIRECT_INDEX_DISP }, - { I960_INSN_STL_OFFSET, I960BASE_INSN_STL_OFFSET, I960BASE_SFMT_STL_OFFSET }, - { I960_INSN_STL_INDIRECT_OFFSET, I960BASE_INSN_STL_INDIRECT_OFFSET, I960BASE_SFMT_STL_INDIRECT_OFFSET }, - { I960_INSN_STL_INDIRECT, I960BASE_INSN_STL_INDIRECT, I960BASE_SFMT_STL_INDIRECT }, - { I960_INSN_STL_INDIRECT_INDEX, I960BASE_INSN_STL_INDIRECT_INDEX, I960BASE_SFMT_STL_INDIRECT_INDEX }, - { I960_INSN_STL_DISP, I960BASE_INSN_STL_DISP, I960BASE_SFMT_STL_DISP }, - { I960_INSN_STL_INDIRECT_DISP, I960BASE_INSN_STL_INDIRECT_DISP, I960BASE_SFMT_STL_INDIRECT_DISP }, - { I960_INSN_STL_INDEX_DISP, I960BASE_INSN_STL_INDEX_DISP, I960BASE_SFMT_STL_INDEX_DISP }, - { I960_INSN_STL_INDIRECT_INDEX_DISP, I960BASE_INSN_STL_INDIRECT_INDEX_DISP, I960BASE_SFMT_STL_INDIRECT_INDEX_DISP }, - { I960_INSN_STT_OFFSET, I960BASE_INSN_STT_OFFSET, I960BASE_SFMT_STT_OFFSET }, - { I960_INSN_STT_INDIRECT_OFFSET, I960BASE_INSN_STT_INDIRECT_OFFSET, I960BASE_SFMT_STT_INDIRECT_OFFSET }, - { I960_INSN_STT_INDIRECT, I960BASE_INSN_STT_INDIRECT, I960BASE_SFMT_STT_INDIRECT }, - { I960_INSN_STT_INDIRECT_INDEX, I960BASE_INSN_STT_INDIRECT_INDEX, I960BASE_SFMT_STT_INDIRECT_INDEX }, - { I960_INSN_STT_DISP, I960BASE_INSN_STT_DISP, I960BASE_SFMT_STT_DISP }, - { I960_INSN_STT_INDIRECT_DISP, I960BASE_INSN_STT_INDIRECT_DISP, I960BASE_SFMT_STT_INDIRECT_DISP }, - { I960_INSN_STT_INDEX_DISP, I960BASE_INSN_STT_INDEX_DISP, I960BASE_SFMT_STT_INDEX_DISP }, - { I960_INSN_STT_INDIRECT_INDEX_DISP, I960BASE_INSN_STT_INDIRECT_INDEX_DISP, I960BASE_SFMT_STT_INDIRECT_INDEX_DISP }, - { I960_INSN_STQ_OFFSET, I960BASE_INSN_STQ_OFFSET, I960BASE_SFMT_STQ_OFFSET }, - { I960_INSN_STQ_INDIRECT_OFFSET, I960BASE_INSN_STQ_INDIRECT_OFFSET, I960BASE_SFMT_STQ_INDIRECT_OFFSET }, - { I960_INSN_STQ_INDIRECT, I960BASE_INSN_STQ_INDIRECT, I960BASE_SFMT_STQ_INDIRECT }, - { I960_INSN_STQ_INDIRECT_INDEX, I960BASE_INSN_STQ_INDIRECT_INDEX, I960BASE_SFMT_STQ_INDIRECT_INDEX }, - { I960_INSN_STQ_DISP, I960BASE_INSN_STQ_DISP, I960BASE_SFMT_STQ_DISP }, - { I960_INSN_STQ_INDIRECT_DISP, I960BASE_INSN_STQ_INDIRECT_DISP, I960BASE_SFMT_STQ_INDIRECT_DISP }, - { I960_INSN_STQ_INDEX_DISP, I960BASE_INSN_STQ_INDEX_DISP, I960BASE_SFMT_STQ_INDEX_DISP }, - { I960_INSN_STQ_INDIRECT_INDEX_DISP, I960BASE_INSN_STQ_INDIRECT_INDEX_DISP, I960BASE_SFMT_STQ_INDIRECT_INDEX_DISP }, - { I960_INSN_CMPOBE_REG, I960BASE_INSN_CMPOBE_REG, I960BASE_SFMT_CMPOBE_REG }, - { I960_INSN_CMPOBE_LIT, I960BASE_INSN_CMPOBE_LIT, I960BASE_SFMT_CMPOBE_LIT }, - { I960_INSN_CMPOBNE_REG, I960BASE_INSN_CMPOBNE_REG, I960BASE_SFMT_CMPOBE_REG }, - { I960_INSN_CMPOBNE_LIT, I960BASE_INSN_CMPOBNE_LIT, I960BASE_SFMT_CMPOBE_LIT }, - { I960_INSN_CMPOBL_REG, I960BASE_INSN_CMPOBL_REG, I960BASE_SFMT_CMPOBL_REG }, - { I960_INSN_CMPOBL_LIT, I960BASE_INSN_CMPOBL_LIT, I960BASE_SFMT_CMPOBL_LIT }, - { I960_INSN_CMPOBLE_REG, I960BASE_INSN_CMPOBLE_REG, I960BASE_SFMT_CMPOBL_REG }, - { I960_INSN_CMPOBLE_LIT, I960BASE_INSN_CMPOBLE_LIT, I960BASE_SFMT_CMPOBL_LIT }, - { I960_INSN_CMPOBG_REG, I960BASE_INSN_CMPOBG_REG, I960BASE_SFMT_CMPOBL_REG }, - { I960_INSN_CMPOBG_LIT, I960BASE_INSN_CMPOBG_LIT, I960BASE_SFMT_CMPOBL_LIT }, - { I960_INSN_CMPOBGE_REG, I960BASE_INSN_CMPOBGE_REG, I960BASE_SFMT_CMPOBL_REG }, - { I960_INSN_CMPOBGE_LIT, I960BASE_INSN_CMPOBGE_LIT, I960BASE_SFMT_CMPOBL_LIT }, - { I960_INSN_CMPIBE_REG, I960BASE_INSN_CMPIBE_REG, I960BASE_SFMT_CMPOBE_REG }, - { I960_INSN_CMPIBE_LIT, I960BASE_INSN_CMPIBE_LIT, I960BASE_SFMT_CMPOBE_LIT }, - { I960_INSN_CMPIBNE_REG, I960BASE_INSN_CMPIBNE_REG, I960BASE_SFMT_CMPOBE_REG }, - { I960_INSN_CMPIBNE_LIT, I960BASE_INSN_CMPIBNE_LIT, I960BASE_SFMT_CMPOBE_LIT }, - { I960_INSN_CMPIBL_REG, I960BASE_INSN_CMPIBL_REG, I960BASE_SFMT_CMPOBE_REG }, - { I960_INSN_CMPIBL_LIT, I960BASE_INSN_CMPIBL_LIT, I960BASE_SFMT_CMPOBE_LIT }, - { I960_INSN_CMPIBLE_REG, I960BASE_INSN_CMPIBLE_REG, I960BASE_SFMT_CMPOBE_REG }, - { I960_INSN_CMPIBLE_LIT, I960BASE_INSN_CMPIBLE_LIT, I960BASE_SFMT_CMPOBE_LIT }, - { I960_INSN_CMPIBG_REG, I960BASE_INSN_CMPIBG_REG, I960BASE_SFMT_CMPOBE_REG }, - { I960_INSN_CMPIBG_LIT, I960BASE_INSN_CMPIBG_LIT, I960BASE_SFMT_CMPOBE_LIT }, - { I960_INSN_CMPIBGE_REG, I960BASE_INSN_CMPIBGE_REG, I960BASE_SFMT_CMPOBE_REG }, - { I960_INSN_CMPIBGE_LIT, I960BASE_INSN_CMPIBGE_LIT, I960BASE_SFMT_CMPOBE_LIT }, - { I960_INSN_BBC_REG, I960BASE_INSN_BBC_REG, I960BASE_SFMT_BBC_REG }, - { I960_INSN_BBC_LIT, I960BASE_INSN_BBC_LIT, I960BASE_SFMT_BBC_LIT }, - { I960_INSN_BBS_REG, I960BASE_INSN_BBS_REG, I960BASE_SFMT_BBC_REG }, - { I960_INSN_BBS_LIT, I960BASE_INSN_BBS_LIT, I960BASE_SFMT_BBC_LIT }, - { I960_INSN_CMPI, I960BASE_INSN_CMPI, I960BASE_SFMT_CMPI }, - { I960_INSN_CMPI1, I960BASE_INSN_CMPI1, I960BASE_SFMT_CMPI1 }, - { I960_INSN_CMPI2, I960BASE_INSN_CMPI2, I960BASE_SFMT_CMPI2 }, - { I960_INSN_CMPI3, I960BASE_INSN_CMPI3, I960BASE_SFMT_CMPI3 }, - { I960_INSN_CMPO, I960BASE_INSN_CMPO, I960BASE_SFMT_CMPO }, - { I960_INSN_CMPO1, I960BASE_INSN_CMPO1, I960BASE_SFMT_CMPO1 }, - { I960_INSN_CMPO2, I960BASE_INSN_CMPO2, I960BASE_SFMT_CMPO2 }, - { I960_INSN_CMPO3, I960BASE_INSN_CMPO3, I960BASE_SFMT_CMPO3 }, - { I960_INSN_TESTNO_REG, I960BASE_INSN_TESTNO_REG, I960BASE_SFMT_TESTNO_REG }, - { I960_INSN_TESTG_REG, I960BASE_INSN_TESTG_REG, I960BASE_SFMT_TESTNO_REG }, - { I960_INSN_TESTE_REG, I960BASE_INSN_TESTE_REG, I960BASE_SFMT_TESTNO_REG }, - { I960_INSN_TESTGE_REG, I960BASE_INSN_TESTGE_REG, I960BASE_SFMT_TESTNO_REG }, - { I960_INSN_TESTL_REG, I960BASE_INSN_TESTL_REG, I960BASE_SFMT_TESTNO_REG }, - { I960_INSN_TESTNE_REG, I960BASE_INSN_TESTNE_REG, I960BASE_SFMT_TESTNO_REG }, - { I960_INSN_TESTLE_REG, I960BASE_INSN_TESTLE_REG, I960BASE_SFMT_TESTNO_REG }, - { I960_INSN_TESTO_REG, I960BASE_INSN_TESTO_REG, I960BASE_SFMT_TESTNO_REG }, - { I960_INSN_BNO, I960BASE_INSN_BNO, I960BASE_SFMT_BNO }, - { I960_INSN_BG, I960BASE_INSN_BG, I960BASE_SFMT_BNO }, - { I960_INSN_BE, I960BASE_INSN_BE, I960BASE_SFMT_BNO }, - { I960_INSN_BGE, I960BASE_INSN_BGE, I960BASE_SFMT_BNO }, - { I960_INSN_BL, I960BASE_INSN_BL, I960BASE_SFMT_BNO }, - { I960_INSN_BNE, I960BASE_INSN_BNE, I960BASE_SFMT_BNO }, - { I960_INSN_BLE, I960BASE_INSN_BLE, I960BASE_SFMT_BNO }, - { I960_INSN_BO, I960BASE_INSN_BO, I960BASE_SFMT_BNO }, - { I960_INSN_B, I960BASE_INSN_B, I960BASE_SFMT_B }, - { I960_INSN_BX_INDIRECT_OFFSET, I960BASE_INSN_BX_INDIRECT_OFFSET, I960BASE_SFMT_BX_INDIRECT_OFFSET }, - { I960_INSN_BX_INDIRECT, I960BASE_INSN_BX_INDIRECT, I960BASE_SFMT_BX_INDIRECT }, - { I960_INSN_BX_INDIRECT_INDEX, I960BASE_INSN_BX_INDIRECT_INDEX, I960BASE_SFMT_BX_INDIRECT_INDEX }, - { I960_INSN_BX_DISP, I960BASE_INSN_BX_DISP, I960BASE_SFMT_BX_DISP }, - { I960_INSN_BX_INDIRECT_DISP, I960BASE_INSN_BX_INDIRECT_DISP, I960BASE_SFMT_BX_INDIRECT_DISP }, - { I960_INSN_CALLX_DISP, I960BASE_INSN_CALLX_DISP, I960BASE_SFMT_CALLX_DISP }, - { I960_INSN_CALLX_INDIRECT, I960BASE_INSN_CALLX_INDIRECT, I960BASE_SFMT_CALLX_INDIRECT }, - { I960_INSN_CALLX_INDIRECT_OFFSET, I960BASE_INSN_CALLX_INDIRECT_OFFSET, I960BASE_SFMT_CALLX_INDIRECT_OFFSET }, - { I960_INSN_RET, I960BASE_INSN_RET, I960BASE_SFMT_RET }, - { I960_INSN_CALLS, I960BASE_INSN_CALLS, I960BASE_SFMT_CALLS }, - { I960_INSN_FMARK, I960BASE_INSN_FMARK, I960BASE_SFMT_FMARK }, - { I960_INSN_FLUSHREG, I960BASE_INSN_FLUSHREG, I960BASE_SFMT_FLUSHREG }, -}; - -static const struct insn_sem i960base_insn_sem_invalid = { - VIRTUAL_INSN_X_INVALID, I960BASE_INSN_X_INVALID, I960BASE_SFMT_EMPTY -}; - -/* Initialize an IDESC from the compile-time computable parts. */ - -static INLINE void -init_idesc (SIM_CPU *cpu, IDESC *id, const struct insn_sem *t) -{ - const CGEN_INSN *insn_table = CGEN_CPU_INSN_TABLE (CPU_CPU_DESC (cpu))->init_entries; - - id->num = t->index; - id->sfmt = t->sfmt; - if ((int) t->type <= 0) - id->idata = & cgen_virtual_insn_table[- (int) t->type]; - else - id->idata = & insn_table[t->type]; - id->attrs = CGEN_INSN_ATTRS (id->idata); - /* Oh my god, a magic number. */ - id->length = CGEN_INSN_BITSIZE (id->idata) / 8; - -#if WITH_PROFILE_MODEL_P - id->timing = & MODEL_TIMING (CPU_MODEL (cpu)) [t->index]; - { - SIM_DESC sd = CPU_STATE (cpu); - SIM_ASSERT (t->index == id->timing->num); - } -#endif - - /* Semantic pointers are initialized elsewhere. */ -} - -/* Initialize the instruction descriptor table. */ - -void -i960base_init_idesc_table (SIM_CPU *cpu) -{ - IDESC *id,*tabend; - const struct insn_sem *t,*tend; - int tabsize = I960BASE_INSN_MAX; - IDESC *table = i960base_insn_data; - - memset (table, 0, tabsize * sizeof (IDESC)); - - /* First set all entries to the `invalid insn'. */ - t = & i960base_insn_sem_invalid; - for (id = table, tabend = table + tabsize; id < tabend; ++id) - init_idesc (cpu, id, t); - - /* Now fill in the values for the chosen cpu. */ - for (t = i960base_insn_sem, tend = t + sizeof (i960base_insn_sem) / sizeof (*t); - t != tend; ++t) - { - init_idesc (cpu, & table[t->index], t); - } - - /* Link the IDESC table into the cpu. */ - CPU_IDESC (cpu) = table; -} - -/* Given an instruction, return a pointer to its IDESC entry. */ - -const IDESC * -i960base_decode (SIM_CPU *current_cpu, IADDR pc, - CGEN_INSN_INT base_insn, - ARGBUF *abuf) -{ - /* Result of decoder. */ - I960BASE_INSN_TYPE itype; - - { - CGEN_INSN_INT insn = base_insn; - - { - unsigned int val = (((insn >> 24) & (255 << 0))); - switch (val) - { - case 8 : itype = I960BASE_INSN_B; goto extract_sfmt_b; - case 10 : itype = I960BASE_INSN_RET; goto extract_sfmt_ret; - case 16 : itype = I960BASE_INSN_BNO; goto extract_sfmt_bno; - case 17 : itype = I960BASE_INSN_BG; goto extract_sfmt_bno; - case 18 : itype = I960BASE_INSN_BE; goto extract_sfmt_bno; - case 19 : itype = I960BASE_INSN_BGE; goto extract_sfmt_bno; - case 20 : itype = I960BASE_INSN_BL; goto extract_sfmt_bno; - case 21 : itype = I960BASE_INSN_BNE; goto extract_sfmt_bno; - case 22 : itype = I960BASE_INSN_BLE; goto extract_sfmt_bno; - case 23 : itype = I960BASE_INSN_BO; goto extract_sfmt_bno; - case 32 : itype = I960BASE_INSN_TESTNO_REG; goto extract_sfmt_testno_reg; - case 33 : itype = I960BASE_INSN_TESTG_REG; goto extract_sfmt_testno_reg; - case 34 : itype = I960BASE_INSN_TESTE_REG; goto extract_sfmt_testno_reg; - case 35 : itype = I960BASE_INSN_TESTGE_REG; goto extract_sfmt_testno_reg; - case 36 : itype = I960BASE_INSN_TESTL_REG; goto extract_sfmt_testno_reg; - case 37 : itype = I960BASE_INSN_TESTNE_REG; goto extract_sfmt_testno_reg; - case 38 : itype = I960BASE_INSN_TESTLE_REG; goto extract_sfmt_testno_reg; - case 39 : itype = I960BASE_INSN_TESTO_REG; goto extract_sfmt_testno_reg; - case 48 : - { - unsigned int val = (((insn >> 11) & (1 << 2)) | ((insn >> 0) & (3 << 0))); - switch (val) - { - case 0 : itype = I960BASE_INSN_BBC_REG; goto extract_sfmt_bbc_reg; - case 4 : itype = I960BASE_INSN_BBC_LIT; goto extract_sfmt_bbc_lit; - default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 49 : - { - unsigned int val = (((insn >> 11) & (1 << 2)) | ((insn >> 0) & (3 << 0))); - switch (val) - { - case 0 : itype = I960BASE_INSN_CMPOBG_REG; goto extract_sfmt_cmpobl_reg; - case 4 : itype = I960BASE_INSN_CMPOBG_LIT; goto extract_sfmt_cmpobl_lit; - default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 50 : - { - unsigned int val = (((insn >> 11) & (1 << 2)) | ((insn >> 0) & (3 << 0))); - switch (val) - { - case 0 : itype = I960BASE_INSN_CMPOBE_REG; goto extract_sfmt_cmpobe_reg; - case 4 : itype = I960BASE_INSN_CMPOBE_LIT; goto extract_sfmt_cmpobe_lit; - default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 51 : - { - unsigned int val = (((insn >> 11) & (1 << 2)) | ((insn >> 0) & (3 << 0))); - switch (val) - { - case 0 : itype = I960BASE_INSN_CMPOBGE_REG; goto extract_sfmt_cmpobl_reg; - case 4 : itype = I960BASE_INSN_CMPOBGE_LIT; goto extract_sfmt_cmpobl_lit; - default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 52 : - { - unsigned int val = (((insn >> 11) & (1 << 2)) | ((insn >> 0) & (3 << 0))); - switch (val) - { - case 0 : itype = I960BASE_INSN_CMPOBL_REG; goto extract_sfmt_cmpobl_reg; - case 4 : itype = I960BASE_INSN_CMPOBL_LIT; goto extract_sfmt_cmpobl_lit; - default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 53 : - { - unsigned int val = (((insn >> 11) & (1 << 2)) | ((insn >> 0) & (3 << 0))); - switch (val) - { - case 0 : itype = I960BASE_INSN_CMPOBNE_REG; goto extract_sfmt_cmpobe_reg; - case 4 : itype = I960BASE_INSN_CMPOBNE_LIT; goto extract_sfmt_cmpobe_lit; - default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 54 : - { - unsigned int val = (((insn >> 11) & (1 << 2)) | ((insn >> 0) & (3 << 0))); - switch (val) - { - case 0 : itype = I960BASE_INSN_CMPOBLE_REG; goto extract_sfmt_cmpobl_reg; - case 4 : itype = I960BASE_INSN_CMPOBLE_LIT; goto extract_sfmt_cmpobl_lit; - default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 55 : - { - unsigned int val = (((insn >> 11) & (1 << 2)) | ((insn >> 0) & (3 << 0))); - switch (val) - { - case 0 : itype = I960BASE_INSN_BBS_REG; goto extract_sfmt_bbc_reg; - case 4 : itype = I960BASE_INSN_BBS_LIT; goto extract_sfmt_bbc_lit; - default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 57 : - { - unsigned int val = (((insn >> 11) & (1 << 2)) | ((insn >> 0) & (3 << 0))); - switch (val) - { - case 0 : itype = I960BASE_INSN_CMPIBG_REG; goto extract_sfmt_cmpobe_reg; - case 4 : itype = I960BASE_INSN_CMPIBG_LIT; goto extract_sfmt_cmpobe_lit; - default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 58 : - { - unsigned int val = (((insn >> 11) & (1 << 2)) | ((insn >> 0) & (3 << 0))); - switch (val) - { - case 0 : itype = I960BASE_INSN_CMPIBE_REG; goto extract_sfmt_cmpobe_reg; - case 4 : itype = I960BASE_INSN_CMPIBE_LIT; goto extract_sfmt_cmpobe_lit; - default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 59 : - { - unsigned int val = (((insn >> 11) & (1 << 2)) | ((insn >> 0) & (3 << 0))); - switch (val) - { - case 0 : itype = I960BASE_INSN_CMPIBGE_REG; goto extract_sfmt_cmpobe_reg; - case 4 : itype = I960BASE_INSN_CMPIBGE_LIT; goto extract_sfmt_cmpobe_lit; - default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 60 : - { - unsigned int val = (((insn >> 11) & (1 << 2)) | ((insn >> 0) & (3 << 0))); - switch (val) - { - case 0 : itype = I960BASE_INSN_CMPIBL_REG; goto extract_sfmt_cmpobe_reg; - case 4 : itype = I960BASE_INSN_CMPIBL_LIT; goto extract_sfmt_cmpobe_lit; - default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 61 : - { - unsigned int val = (((insn >> 11) & (1 << 2)) | ((insn >> 0) & (3 << 0))); - switch (val) - { - case 0 : itype = I960BASE_INSN_CMPIBNE_REG; goto extract_sfmt_cmpobe_reg; - case 4 : itype = I960BASE_INSN_CMPIBNE_LIT; goto extract_sfmt_cmpobe_lit; - default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 62 : - { - unsigned int val = (((insn >> 11) & (1 << 2)) | ((insn >> 0) & (3 << 0))); - switch (val) - { - case 0 : itype = I960BASE_INSN_CMPIBLE_REG; goto extract_sfmt_cmpobe_reg; - case 4 : itype = I960BASE_INSN_CMPIBLE_LIT; goto extract_sfmt_cmpobe_lit; - default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 88 : - { - unsigned int val = (((insn >> 10) & (15 << 0))); - switch (val) - { - case 0 : - { - unsigned int val = (((insn >> 6) & (15 << 0))); - switch (val) - { - case 0 : itype = I960BASE_INSN_NOTBIT; goto extract_sfmt_notbit; - case 2 : itype = I960BASE_INSN_AND; goto extract_sfmt_mulo; - case 4 : itype = I960BASE_INSN_ANDNOT; goto extract_sfmt_mulo; - case 6 : itype = I960BASE_INSN_SETBIT; goto extract_sfmt_notbit; - case 8 : itype = I960BASE_INSN_NOTAND; goto extract_sfmt_mulo; - case 12 : itype = I960BASE_INSN_XOR; goto extract_sfmt_mulo; - case 14 : itype = I960BASE_INSN_OR; goto extract_sfmt_mulo; - default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 1 : - { - unsigned int val = (((insn >> 6) & (15 << 0))); - switch (val) - { - case 0 : itype = I960BASE_INSN_NOR; goto extract_sfmt_mulo; - case 2 : itype = I960BASE_INSN_XNOR; goto extract_sfmt_mulo; - case 4 : itype = I960BASE_INSN_NOT; goto extract_sfmt_not; - case 6 : itype = I960BASE_INSN_ORNOT; goto extract_sfmt_mulo; - case 8 : itype = I960BASE_INSN_CLRBIT; goto extract_sfmt_notbit; - default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 2 : - { - unsigned int val = (((insn >> 6) & (15 << 0))); - switch (val) - { - case 0 : itype = I960BASE_INSN_NOTBIT1; goto extract_sfmt_notbit1; - case 2 : itype = I960BASE_INSN_AND1; goto extract_sfmt_mulo1; - case 4 : itype = I960BASE_INSN_ANDNOT1; goto extract_sfmt_mulo1; - case 6 : itype = I960BASE_INSN_SETBIT1; goto extract_sfmt_notbit1; - case 8 : itype = I960BASE_INSN_NOTAND1; goto extract_sfmt_mulo1; - case 12 : itype = I960BASE_INSN_XOR1; goto extract_sfmt_mulo1; - case 14 : itype = I960BASE_INSN_OR1; goto extract_sfmt_mulo1; - default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 3 : - { - unsigned int val = (((insn >> 6) & (15 << 0))); - switch (val) - { - case 0 : itype = I960BASE_INSN_NOR1; goto extract_sfmt_mulo1; - case 2 : itype = I960BASE_INSN_XNOR1; goto extract_sfmt_mulo1; - case 4 : itype = I960BASE_INSN_NOT1; goto extract_sfmt_not1; - case 6 : itype = I960BASE_INSN_ORNOT1; goto extract_sfmt_mulo1; - case 8 : itype = I960BASE_INSN_CLRBIT1; goto extract_sfmt_notbit1; - default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 4 : - { - unsigned int val = (((insn >> 6) & (15 << 0))); - switch (val) - { - case 0 : itype = I960BASE_INSN_NOTBIT2; goto extract_sfmt_notbit2; - case 2 : itype = I960BASE_INSN_AND2; goto extract_sfmt_mulo2; - case 4 : itype = I960BASE_INSN_ANDNOT2; goto extract_sfmt_mulo2; - case 6 : itype = I960BASE_INSN_SETBIT2; goto extract_sfmt_notbit2; - case 8 : itype = I960BASE_INSN_NOTAND2; goto extract_sfmt_mulo2; - case 12 : itype = I960BASE_INSN_XOR2; goto extract_sfmt_mulo2; - case 14 : itype = I960BASE_INSN_OR2; goto extract_sfmt_mulo2; - default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 5 : - { - unsigned int val = (((insn >> 6) & (15 << 0))); - switch (val) - { - case 0 : itype = I960BASE_INSN_NOR2; goto extract_sfmt_mulo2; - case 2 : itype = I960BASE_INSN_XNOR2; goto extract_sfmt_mulo2; - case 4 : itype = I960BASE_INSN_NOT2; goto extract_sfmt_not; - case 6 : itype = I960BASE_INSN_ORNOT2; goto extract_sfmt_mulo2; - case 8 : itype = I960BASE_INSN_CLRBIT2; goto extract_sfmt_notbit2; - default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 6 : - { - unsigned int val = (((insn >> 6) & (15 << 0))); - switch (val) - { - case 0 : itype = I960BASE_INSN_NOTBIT3; goto extract_sfmt_notbit3; - case 2 : itype = I960BASE_INSN_AND3; goto extract_sfmt_mulo3; - case 4 : itype = I960BASE_INSN_ANDNOT3; goto extract_sfmt_mulo3; - case 6 : itype = I960BASE_INSN_SETBIT3; goto extract_sfmt_notbit3; - case 8 : itype = I960BASE_INSN_NOTAND3; goto extract_sfmt_mulo3; - case 12 : itype = I960BASE_INSN_XOR3; goto extract_sfmt_mulo3; - case 14 : itype = I960BASE_INSN_OR3; goto extract_sfmt_mulo3; - default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 7 : - { - unsigned int val = (((insn >> 6) & (15 << 0))); - switch (val) - { - case 0 : itype = I960BASE_INSN_NOR3; goto extract_sfmt_mulo3; - case 2 : itype = I960BASE_INSN_XNOR3; goto extract_sfmt_mulo3; - case 4 : itype = I960BASE_INSN_NOT3; goto extract_sfmt_not1; - case 6 : itype = I960BASE_INSN_ORNOT3; goto extract_sfmt_mulo3; - case 8 : itype = I960BASE_INSN_CLRBIT3; goto extract_sfmt_notbit3; - default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 89 : - { - unsigned int val = (((insn >> 10) & (15 << 0))); - switch (val) - { - case 0 : - { - unsigned int val = (((insn >> 6) & (15 << 0))); - switch (val) - { - case 0 : itype = I960BASE_INSN_ADDO; goto extract_sfmt_mulo; - case 4 : itype = I960BASE_INSN_SUBO; goto extract_sfmt_mulo; - default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 1 : - { - unsigned int val = (((insn >> 6) & (15 << 0))); - switch (val) - { - case 0 : itype = I960BASE_INSN_SHRO; goto extract_sfmt_shlo; - case 6 : itype = I960BASE_INSN_SHRI; goto extract_sfmt_shlo; - case 8 : itype = I960BASE_INSN_SHLO; goto extract_sfmt_shlo; - case 12 : itype = I960BASE_INSN_SHLI; goto extract_sfmt_shlo; - default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 2 : - { - unsigned int val = (((insn >> 6) & (15 << 0))); - switch (val) - { - case 0 : itype = I960BASE_INSN_ADDO1; goto extract_sfmt_mulo1; - case 4 : itype = I960BASE_INSN_SUBO1; goto extract_sfmt_mulo1; - default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 3 : - { - unsigned int val = (((insn >> 6) & (15 << 0))); - switch (val) - { - case 0 : itype = I960BASE_INSN_SHRO1; goto extract_sfmt_shlo1; - case 6 : itype = I960BASE_INSN_SHRI1; goto extract_sfmt_shlo1; - case 8 : itype = I960BASE_INSN_SHLO1; goto extract_sfmt_shlo1; - case 12 : itype = I960BASE_INSN_SHLI1; goto extract_sfmt_shlo1; - default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 4 : - { - unsigned int val = (((insn >> 6) & (15 << 0))); - switch (val) - { - case 0 : itype = I960BASE_INSN_ADDO2; goto extract_sfmt_mulo2; - case 4 : itype = I960BASE_INSN_SUBO2; goto extract_sfmt_mulo2; - default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 5 : - { - unsigned int val = (((insn >> 6) & (15 << 0))); - switch (val) - { - case 0 : itype = I960BASE_INSN_SHRO2; goto extract_sfmt_shlo2; - case 6 : itype = I960BASE_INSN_SHRI2; goto extract_sfmt_shlo2; - case 8 : itype = I960BASE_INSN_SHLO2; goto extract_sfmt_shlo2; - case 12 : itype = I960BASE_INSN_SHLI2; goto extract_sfmt_shlo2; - default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 6 : - { - unsigned int val = (((insn >> 6) & (15 << 0))); - switch (val) - { - case 0 : itype = I960BASE_INSN_ADDO3; goto extract_sfmt_mulo3; - case 4 : itype = I960BASE_INSN_SUBO3; goto extract_sfmt_mulo3; - default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 7 : - { - unsigned int val = (((insn >> 6) & (15 << 0))); - switch (val) - { - case 0 : itype = I960BASE_INSN_SHRO3; goto extract_sfmt_shlo3; - case 6 : itype = I960BASE_INSN_SHRI3; goto extract_sfmt_shlo3; - case 8 : itype = I960BASE_INSN_SHLO3; goto extract_sfmt_shlo3; - case 12 : itype = I960BASE_INSN_SHLI3; goto extract_sfmt_shlo3; - default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 90 : - { - unsigned int val = (((insn >> 10) & (15 << 0))); - switch (val) - { - case 8 : - { - unsigned int val = (((insn >> 6) & (15 << 0))); - switch (val) - { - case 0 : itype = I960BASE_INSN_CMPO; goto extract_sfmt_cmpo; - case 2 : itype = I960BASE_INSN_CMPI; goto extract_sfmt_cmpi; - default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 10 : - { - unsigned int val = (((insn >> 6) & (15 << 0))); - switch (val) - { - case 0 : itype = I960BASE_INSN_CMPO1; goto extract_sfmt_cmpo1; - case 2 : itype = I960BASE_INSN_CMPI1; goto extract_sfmt_cmpi1; - default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 12 : - { - unsigned int val = (((insn >> 6) & (15 << 0))); - switch (val) - { - case 0 : itype = I960BASE_INSN_CMPO2; goto extract_sfmt_cmpo2; - case 2 : itype = I960BASE_INSN_CMPI2; goto extract_sfmt_cmpi2; - default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 14 : - { - unsigned int val = (((insn >> 6) & (15 << 0))); - switch (val) - { - case 0 : itype = I960BASE_INSN_CMPO3; goto extract_sfmt_cmpo3; - case 2 : itype = I960BASE_INSN_CMPI3; goto extract_sfmt_cmpi3; - default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 92 : - { - unsigned int val = (((insn >> 10) & (15 << 0))); - switch (val) - { - case 5 : itype = I960BASE_INSN_MOV; goto extract_sfmt_not; - case 7 : itype = I960BASE_INSN_MOV1; goto extract_sfmt_not1; - default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 93 : - { - unsigned int val = (((insn >> 10) & (15 << 0))); - switch (val) - { - case 5 : itype = I960BASE_INSN_MOVL; goto extract_sfmt_movl; - case 7 : itype = I960BASE_INSN_MOVL1; goto extract_sfmt_movl1; - default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 94 : - { - unsigned int val = (((insn >> 10) & (15 << 0))); - switch (val) - { - case 5 : itype = I960BASE_INSN_MOVT; goto extract_sfmt_movt; - case 7 : itype = I960BASE_INSN_MOVT1; goto extract_sfmt_movt1; - default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 95 : - { - unsigned int val = (((insn >> 10) & (15 << 0))); - switch (val) - { - case 5 : itype = I960BASE_INSN_MOVQ; goto extract_sfmt_movq; - case 7 : itype = I960BASE_INSN_MOVQ1; goto extract_sfmt_movq1; - default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 100 : itype = I960BASE_INSN_MODAC; goto extract_sfmt_modpc; - case 101 : itype = I960BASE_INSN_MODPC; goto extract_sfmt_modpc; - case 102 : - { - unsigned int val = (((insn >> 10) & (15 << 0))); - switch (val) - { - case 12 : itype = I960BASE_INSN_CALLS; goto extract_sfmt_calls; - case 15 : - { - unsigned int val = (((insn >> 6) & (15 << 0))); - switch (val) - { - case 8 : itype = I960BASE_INSN_FMARK; goto extract_sfmt_fmark; - case 10 : itype = I960BASE_INSN_FLUSHREG; goto extract_sfmt_flushreg; - default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 103 : - { - unsigned int val = (((insn >> 10) & (15 << 0))); - switch (val) - { - case 0 : itype = I960BASE_INSN_EMUL; goto extract_sfmt_emul; - case 2 : itype = I960BASE_INSN_EMUL1; goto extract_sfmt_emul1; - case 4 : itype = I960BASE_INSN_EMUL2; goto extract_sfmt_emul2; - case 6 : itype = I960BASE_INSN_EMUL3; goto extract_sfmt_emul3; - default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 112 : - { - unsigned int val = (((insn >> 10) & (15 << 0))); - switch (val) - { - case 0 : itype = I960BASE_INSN_MULO; goto extract_sfmt_mulo; - case 1 : - { - unsigned int val = (((insn >> 6) & (15 << 0))); - switch (val) - { - case 0 : itype = I960BASE_INSN_REMO; goto extract_sfmt_mulo; - case 6 : itype = I960BASE_INSN_DIVO; goto extract_sfmt_mulo; - default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 2 : itype = I960BASE_INSN_MULO1; goto extract_sfmt_mulo1; - case 3 : - { - unsigned int val = (((insn >> 6) & (15 << 0))); - switch (val) - { - case 0 : itype = I960BASE_INSN_REMO1; goto extract_sfmt_mulo1; - case 6 : itype = I960BASE_INSN_DIVO1; goto extract_sfmt_mulo1; - default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 4 : itype = I960BASE_INSN_MULO2; goto extract_sfmt_mulo2; - case 5 : - { - unsigned int val = (((insn >> 6) & (15 << 0))); - switch (val) - { - case 0 : itype = I960BASE_INSN_REMO2; goto extract_sfmt_mulo2; - case 6 : itype = I960BASE_INSN_DIVO2; goto extract_sfmt_mulo2; - default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 6 : itype = I960BASE_INSN_MULO3; goto extract_sfmt_mulo3; - case 7 : - { - unsigned int val = (((insn >> 6) & (15 << 0))); - switch (val) - { - case 0 : itype = I960BASE_INSN_REMO3; goto extract_sfmt_mulo3; - case 6 : itype = I960BASE_INSN_DIVO3; goto extract_sfmt_mulo3; - default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 116 : - { - unsigned int val = (((insn >> 10) & (15 << 0))); - switch (val) - { - case 1 : - { - unsigned int val = (((insn >> 6) & (15 << 0))); - switch (val) - { - case 0 : itype = I960BASE_INSN_REMI; goto extract_sfmt_mulo; - case 6 : itype = I960BASE_INSN_DIVI; goto extract_sfmt_mulo; - default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 3 : - { - unsigned int val = (((insn >> 6) & (15 << 0))); - switch (val) - { - case 0 : itype = I960BASE_INSN_REMI1; goto extract_sfmt_mulo1; - case 6 : itype = I960BASE_INSN_DIVI1; goto extract_sfmt_mulo1; - default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 5 : - { - unsigned int val = (((insn >> 6) & (15 << 0))); - switch (val) - { - case 0 : itype = I960BASE_INSN_REMI2; goto extract_sfmt_mulo2; - case 6 : itype = I960BASE_INSN_DIVI2; goto extract_sfmt_mulo2; - default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 7 : - { - unsigned int val = (((insn >> 6) & (15 << 0))); - switch (val) - { - case 0 : itype = I960BASE_INSN_REMI3; goto extract_sfmt_mulo3; - case 6 : itype = I960BASE_INSN_DIVI3; goto extract_sfmt_mulo3; - default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 128 : - { - unsigned int val = (((insn >> 10) & (15 << 0))); - switch (val) - { - case 0 : /* fall through */ - case 1 : /* fall through */ - case 2 : /* fall through */ - case 3 : itype = I960BASE_INSN_LDOB_OFFSET; goto extract_sfmt_ld_offset; - case 4 : itype = I960BASE_INSN_LDOB_INDIRECT; goto extract_sfmt_ld_indirect; - case 7 : itype = I960BASE_INSN_LDOB_INDIRECT_INDEX; goto extract_sfmt_ld_indirect_index; - case 8 : /* fall through */ - case 9 : /* fall through */ - case 10 : /* fall through */ - case 11 : itype = I960BASE_INSN_LDOB_INDIRECT_OFFSET; goto extract_sfmt_ld_indirect_offset; - case 12 : itype = I960BASE_INSN_LDOB_DISP; goto extract_sfmt_ld_disp; - case 13 : itype = I960BASE_INSN_LDOB_INDIRECT_DISP; goto extract_sfmt_ld_indirect_disp; - case 14 : itype = I960BASE_INSN_LDOB_INDEX_DISP; goto extract_sfmt_ld_index_disp; - case 15 : itype = I960BASE_INSN_LDOB_INDIRECT_INDEX_DISP; goto extract_sfmt_ld_indirect_index_disp; - default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 130 : - { - unsigned int val = (((insn >> 10) & (15 << 0))); - switch (val) - { - case 0 : /* fall through */ - case 1 : /* fall through */ - case 2 : /* fall through */ - case 3 : itype = I960BASE_INSN_STOB_OFFSET; goto extract_sfmt_st_offset; - case 4 : itype = I960BASE_INSN_STOB_INDIRECT; goto extract_sfmt_st_indirect; - case 7 : itype = I960BASE_INSN_STOB_INDIRECT_INDEX; goto extract_sfmt_st_indirect_index; - case 8 : /* fall through */ - case 9 : /* fall through */ - case 10 : /* fall through */ - case 11 : itype = I960BASE_INSN_STOB_INDIRECT_OFFSET; goto extract_sfmt_st_indirect_offset; - case 12 : itype = I960BASE_INSN_STOB_DISP; goto extract_sfmt_st_disp; - case 13 : itype = I960BASE_INSN_STOB_INDIRECT_DISP; goto extract_sfmt_st_indirect_disp; - case 14 : itype = I960BASE_INSN_STOB_INDEX_DISP; goto extract_sfmt_st_index_disp; - case 15 : itype = I960BASE_INSN_STOB_INDIRECT_INDEX_DISP; goto extract_sfmt_st_indirect_index_disp; - default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 132 : - { - unsigned int val = (((insn >> 10) & (15 << 0))); - switch (val) - { - case 4 : itype = I960BASE_INSN_BX_INDIRECT; goto extract_sfmt_bx_indirect; - case 7 : itype = I960BASE_INSN_BX_INDIRECT_INDEX; goto extract_sfmt_bx_indirect_index; - case 8 : /* fall through */ - case 9 : /* fall through */ - case 10 : /* fall through */ - case 11 : itype = I960BASE_INSN_BX_INDIRECT_OFFSET; goto extract_sfmt_bx_indirect_offset; - case 12 : itype = I960BASE_INSN_BX_DISP; goto extract_sfmt_bx_disp; - case 13 : itype = I960BASE_INSN_BX_INDIRECT_DISP; goto extract_sfmt_bx_indirect_disp; - default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 134 : - { - unsigned int val = (((insn >> 10) & (15 << 0))); - switch (val) - { - case 4 : itype = I960BASE_INSN_CALLX_INDIRECT; goto extract_sfmt_callx_indirect; - case 8 : /* fall through */ - case 9 : /* fall through */ - case 10 : /* fall through */ - case 11 : itype = I960BASE_INSN_CALLX_INDIRECT_OFFSET; goto extract_sfmt_callx_indirect_offset; - case 12 : itype = I960BASE_INSN_CALLX_DISP; goto extract_sfmt_callx_disp; - default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 136 : - { - unsigned int val = (((insn >> 10) & (15 << 0))); - switch (val) - { - case 0 : /* fall through */ - case 1 : /* fall through */ - case 2 : /* fall through */ - case 3 : itype = I960BASE_INSN_LDOS_OFFSET; goto extract_sfmt_ld_offset; - case 4 : itype = I960BASE_INSN_LDOS_INDIRECT; goto extract_sfmt_ld_indirect; - case 7 : itype = I960BASE_INSN_LDOS_INDIRECT_INDEX; goto extract_sfmt_ld_indirect_index; - case 8 : /* fall through */ - case 9 : /* fall through */ - case 10 : /* fall through */ - case 11 : itype = I960BASE_INSN_LDOS_INDIRECT_OFFSET; goto extract_sfmt_ld_indirect_offset; - case 12 : itype = I960BASE_INSN_LDOS_DISP; goto extract_sfmt_ld_disp; - case 13 : itype = I960BASE_INSN_LDOS_INDIRECT_DISP; goto extract_sfmt_ld_indirect_disp; - case 14 : itype = I960BASE_INSN_LDOS_INDEX_DISP; goto extract_sfmt_ld_index_disp; - case 15 : itype = I960BASE_INSN_LDOS_INDIRECT_INDEX_DISP; goto extract_sfmt_ld_indirect_index_disp; - default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 138 : - { - unsigned int val = (((insn >> 10) & (15 << 0))); - switch (val) - { - case 0 : /* fall through */ - case 1 : /* fall through */ - case 2 : /* fall through */ - case 3 : itype = I960BASE_INSN_STOS_OFFSET; goto extract_sfmt_st_offset; - case 4 : itype = I960BASE_INSN_STOS_INDIRECT; goto extract_sfmt_st_indirect; - case 7 : itype = I960BASE_INSN_STOS_INDIRECT_INDEX; goto extract_sfmt_st_indirect_index; - case 8 : /* fall through */ - case 9 : /* fall through */ - case 10 : /* fall through */ - case 11 : itype = I960BASE_INSN_STOS_INDIRECT_OFFSET; goto extract_sfmt_st_indirect_offset; - case 12 : itype = I960BASE_INSN_STOS_DISP; goto extract_sfmt_st_disp; - case 13 : itype = I960BASE_INSN_STOS_INDIRECT_DISP; goto extract_sfmt_st_indirect_disp; - case 14 : itype = I960BASE_INSN_STOS_INDEX_DISP; goto extract_sfmt_st_index_disp; - case 15 : itype = I960BASE_INSN_STOS_INDIRECT_INDEX_DISP; goto extract_sfmt_st_indirect_index_disp; - default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 140 : - { - unsigned int val = (((insn >> 10) & (15 << 0))); - switch (val) - { - case 0 : /* fall through */ - case 1 : /* fall through */ - case 2 : /* fall through */ - case 3 : itype = I960BASE_INSN_LDA_OFFSET; goto extract_sfmt_lda_offset; - case 4 : itype = I960BASE_INSN_LDA_INDIRECT; goto extract_sfmt_lda_indirect; - case 7 : itype = I960BASE_INSN_LDA_INDIRECT_INDEX; goto extract_sfmt_lda_indirect_index; - case 8 : /* fall through */ - case 9 : /* fall through */ - case 10 : /* fall through */ - case 11 : itype = I960BASE_INSN_LDA_INDIRECT_OFFSET; goto extract_sfmt_lda_indirect_offset; - case 12 : itype = I960BASE_INSN_LDA_DISP; goto extract_sfmt_lda_disp; - case 13 : itype = I960BASE_INSN_LDA_INDIRECT_DISP; goto extract_sfmt_lda_indirect_disp; - case 14 : itype = I960BASE_INSN_LDA_INDEX_DISP; goto extract_sfmt_lda_index_disp; - case 15 : itype = I960BASE_INSN_LDA_INDIRECT_INDEX_DISP; goto extract_sfmt_lda_indirect_index_disp; - default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 144 : - { - unsigned int val = (((insn >> 10) & (15 << 0))); - switch (val) - { - case 0 : /* fall through */ - case 1 : /* fall through */ - case 2 : /* fall through */ - case 3 : itype = I960BASE_INSN_LD_OFFSET; goto extract_sfmt_ld_offset; - case 4 : itype = I960BASE_INSN_LD_INDIRECT; goto extract_sfmt_ld_indirect; - case 7 : itype = I960BASE_INSN_LD_INDIRECT_INDEX; goto extract_sfmt_ld_indirect_index; - case 8 : /* fall through */ - case 9 : /* fall through */ - case 10 : /* fall through */ - case 11 : itype = I960BASE_INSN_LD_INDIRECT_OFFSET; goto extract_sfmt_ld_indirect_offset; - case 12 : itype = I960BASE_INSN_LD_DISP; goto extract_sfmt_ld_disp; - case 13 : itype = I960BASE_INSN_LD_INDIRECT_DISP; goto extract_sfmt_ld_indirect_disp; - case 14 : itype = I960BASE_INSN_LD_INDEX_DISP; goto extract_sfmt_ld_index_disp; - case 15 : itype = I960BASE_INSN_LD_INDIRECT_INDEX_DISP; goto extract_sfmt_ld_indirect_index_disp; - default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 146 : - { - unsigned int val = (((insn >> 10) & (15 << 0))); - switch (val) - { - case 0 : /* fall through */ - case 1 : /* fall through */ - case 2 : /* fall through */ - case 3 : itype = I960BASE_INSN_ST_OFFSET; goto extract_sfmt_st_offset; - case 4 : itype = I960BASE_INSN_ST_INDIRECT; goto extract_sfmt_st_indirect; - case 7 : itype = I960BASE_INSN_ST_INDIRECT_INDEX; goto extract_sfmt_st_indirect_index; - case 8 : /* fall through */ - case 9 : /* fall through */ - case 10 : /* fall through */ - case 11 : itype = I960BASE_INSN_ST_INDIRECT_OFFSET; goto extract_sfmt_st_indirect_offset; - case 12 : itype = I960BASE_INSN_ST_DISP; goto extract_sfmt_st_disp; - case 13 : itype = I960BASE_INSN_ST_INDIRECT_DISP; goto extract_sfmt_st_indirect_disp; - case 14 : itype = I960BASE_INSN_ST_INDEX_DISP; goto extract_sfmt_st_index_disp; - case 15 : itype = I960BASE_INSN_ST_INDIRECT_INDEX_DISP; goto extract_sfmt_st_indirect_index_disp; - default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 152 : - { - unsigned int val = (((insn >> 10) & (15 << 0))); - switch (val) - { - case 0 : /* fall through */ - case 1 : /* fall through */ - case 2 : /* fall through */ - case 3 : itype = I960BASE_INSN_LDL_OFFSET; goto extract_sfmt_ldl_offset; - case 4 : itype = I960BASE_INSN_LDL_INDIRECT; goto extract_sfmt_ldl_indirect; - case 7 : itype = I960BASE_INSN_LDL_INDIRECT_INDEX; goto extract_sfmt_ldl_indirect_index; - case 8 : /* fall through */ - case 9 : /* fall through */ - case 10 : /* fall through */ - case 11 : itype = I960BASE_INSN_LDL_INDIRECT_OFFSET; goto extract_sfmt_ldl_indirect_offset; - case 12 : itype = I960BASE_INSN_LDL_DISP; goto extract_sfmt_ldl_disp; - case 13 : itype = I960BASE_INSN_LDL_INDIRECT_DISP; goto extract_sfmt_ldl_indirect_disp; - case 14 : itype = I960BASE_INSN_LDL_INDEX_DISP; goto extract_sfmt_ldl_index_disp; - case 15 : itype = I960BASE_INSN_LDL_INDIRECT_INDEX_DISP; goto extract_sfmt_ldl_indirect_index_disp; - default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 154 : - { - unsigned int val = (((insn >> 10) & (15 << 0))); - switch (val) - { - case 0 : /* fall through */ - case 1 : /* fall through */ - case 2 : /* fall through */ - case 3 : itype = I960BASE_INSN_STL_OFFSET; goto extract_sfmt_stl_offset; - case 4 : itype = I960BASE_INSN_STL_INDIRECT; goto extract_sfmt_stl_indirect; - case 7 : itype = I960BASE_INSN_STL_INDIRECT_INDEX; goto extract_sfmt_stl_indirect_index; - case 8 : /* fall through */ - case 9 : /* fall through */ - case 10 : /* fall through */ - case 11 : itype = I960BASE_INSN_STL_INDIRECT_OFFSET; goto extract_sfmt_stl_indirect_offset; - case 12 : itype = I960BASE_INSN_STL_DISP; goto extract_sfmt_stl_disp; - case 13 : itype = I960BASE_INSN_STL_INDIRECT_DISP; goto extract_sfmt_stl_indirect_disp; - case 14 : itype = I960BASE_INSN_STL_INDEX_DISP; goto extract_sfmt_stl_index_disp; - case 15 : itype = I960BASE_INSN_STL_INDIRECT_INDEX_DISP; goto extract_sfmt_stl_indirect_index_disp; - default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 160 : - { - unsigned int val = (((insn >> 10) & (15 << 0))); - switch (val) - { - case 0 : /* fall through */ - case 1 : /* fall through */ - case 2 : /* fall through */ - case 3 : itype = I960BASE_INSN_LDT_OFFSET; goto extract_sfmt_ldt_offset; - case 4 : itype = I960BASE_INSN_LDT_INDIRECT; goto extract_sfmt_ldt_indirect; - case 7 : itype = I960BASE_INSN_LDT_INDIRECT_INDEX; goto extract_sfmt_ldt_indirect_index; - case 8 : /* fall through */ - case 9 : /* fall through */ - case 10 : /* fall through */ - case 11 : itype = I960BASE_INSN_LDT_INDIRECT_OFFSET; goto extract_sfmt_ldt_indirect_offset; - case 12 : itype = I960BASE_INSN_LDT_DISP; goto extract_sfmt_ldt_disp; - case 13 : itype = I960BASE_INSN_LDT_INDIRECT_DISP; goto extract_sfmt_ldt_indirect_disp; - case 14 : itype = I960BASE_INSN_LDT_INDEX_DISP; goto extract_sfmt_ldt_index_disp; - case 15 : itype = I960BASE_INSN_LDT_INDIRECT_INDEX_DISP; goto extract_sfmt_ldt_indirect_index_disp; - default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 162 : - { - unsigned int val = (((insn >> 10) & (15 << 0))); - switch (val) - { - case 0 : /* fall through */ - case 1 : /* fall through */ - case 2 : /* fall through */ - case 3 : itype = I960BASE_INSN_STT_OFFSET; goto extract_sfmt_stt_offset; - case 4 : itype = I960BASE_INSN_STT_INDIRECT; goto extract_sfmt_stt_indirect; - case 7 : itype = I960BASE_INSN_STT_INDIRECT_INDEX; goto extract_sfmt_stt_indirect_index; - case 8 : /* fall through */ - case 9 : /* fall through */ - case 10 : /* fall through */ - case 11 : itype = I960BASE_INSN_STT_INDIRECT_OFFSET; goto extract_sfmt_stt_indirect_offset; - case 12 : itype = I960BASE_INSN_STT_DISP; goto extract_sfmt_stt_disp; - case 13 : itype = I960BASE_INSN_STT_INDIRECT_DISP; goto extract_sfmt_stt_indirect_disp; - case 14 : itype = I960BASE_INSN_STT_INDEX_DISP; goto extract_sfmt_stt_index_disp; - case 15 : itype = I960BASE_INSN_STT_INDIRECT_INDEX_DISP; goto extract_sfmt_stt_indirect_index_disp; - default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 176 : - { - unsigned int val = (((insn >> 10) & (15 << 0))); - switch (val) - { - case 0 : /* fall through */ - case 1 : /* fall through */ - case 2 : /* fall through */ - case 3 : itype = I960BASE_INSN_LDQ_OFFSET; goto extract_sfmt_ldq_offset; - case 4 : itype = I960BASE_INSN_LDQ_INDIRECT; goto extract_sfmt_ldq_indirect; - case 7 : itype = I960BASE_INSN_LDQ_INDIRECT_INDEX; goto extract_sfmt_ldq_indirect_index; - case 8 : /* fall through */ - case 9 : /* fall through */ - case 10 : /* fall through */ - case 11 : itype = I960BASE_INSN_LDQ_INDIRECT_OFFSET; goto extract_sfmt_ldq_indirect_offset; - case 12 : itype = I960BASE_INSN_LDQ_DISP; goto extract_sfmt_ldq_disp; - case 13 : itype = I960BASE_INSN_LDQ_INDIRECT_DISP; goto extract_sfmt_ldq_indirect_disp; - case 14 : itype = I960BASE_INSN_LDQ_INDEX_DISP; goto extract_sfmt_ldq_index_disp; - case 15 : itype = I960BASE_INSN_LDQ_INDIRECT_INDEX_DISP; goto extract_sfmt_ldq_indirect_index_disp; - default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 178 : - { - unsigned int val = (((insn >> 10) & (15 << 0))); - switch (val) - { - case 0 : /* fall through */ - case 1 : /* fall through */ - case 2 : /* fall through */ - case 3 : itype = I960BASE_INSN_STQ_OFFSET; goto extract_sfmt_stq_offset; - case 4 : itype = I960BASE_INSN_STQ_INDIRECT; goto extract_sfmt_stq_indirect; - case 7 : itype = I960BASE_INSN_STQ_INDIRECT_INDEX; goto extract_sfmt_stq_indirect_index; - case 8 : /* fall through */ - case 9 : /* fall through */ - case 10 : /* fall through */ - case 11 : itype = I960BASE_INSN_STQ_INDIRECT_OFFSET; goto extract_sfmt_stq_indirect_offset; - case 12 : itype = I960BASE_INSN_STQ_DISP; goto extract_sfmt_stq_disp; - case 13 : itype = I960BASE_INSN_STQ_INDIRECT_DISP; goto extract_sfmt_stq_indirect_disp; - case 14 : itype = I960BASE_INSN_STQ_INDEX_DISP; goto extract_sfmt_stq_index_disp; - case 15 : itype = I960BASE_INSN_STQ_INDIRECT_INDEX_DISP; goto extract_sfmt_stq_indirect_index_disp; - default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 192 : - { - unsigned int val = (((insn >> 10) & (15 << 0))); - switch (val) - { - case 0 : /* fall through */ - case 1 : /* fall through */ - case 2 : /* fall through */ - case 3 : itype = I960BASE_INSN_LDIB_OFFSET; goto extract_sfmt_ld_offset; - case 4 : itype = I960BASE_INSN_LDIB_INDIRECT; goto extract_sfmt_ld_indirect; - case 7 : itype = I960BASE_INSN_LDIB_INDIRECT_INDEX; goto extract_sfmt_ld_indirect_index; - case 8 : /* fall through */ - case 9 : /* fall through */ - case 10 : /* fall through */ - case 11 : itype = I960BASE_INSN_LDIB_INDIRECT_OFFSET; goto extract_sfmt_ld_indirect_offset; - case 12 : itype = I960BASE_INSN_LDIB_DISP; goto extract_sfmt_ld_disp; - case 13 : itype = I960BASE_INSN_LDIB_INDIRECT_DISP; goto extract_sfmt_ld_indirect_disp; - case 14 : itype = I960BASE_INSN_LDIB_INDEX_DISP; goto extract_sfmt_ld_index_disp; - case 15 : itype = I960BASE_INSN_LDIB_INDIRECT_INDEX_DISP; goto extract_sfmt_ld_indirect_index_disp; - default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 200 : - { - unsigned int val = (((insn >> 10) & (15 << 0))); - switch (val) - { - case 0 : /* fall through */ - case 1 : /* fall through */ - case 2 : /* fall through */ - case 3 : itype = I960BASE_INSN_LDIS_OFFSET; goto extract_sfmt_ld_offset; - case 4 : itype = I960BASE_INSN_LDIS_INDIRECT; goto extract_sfmt_ld_indirect; - case 7 : itype = I960BASE_INSN_LDIS_INDIRECT_INDEX; goto extract_sfmt_ld_indirect_index; - case 8 : /* fall through */ - case 9 : /* fall through */ - case 10 : /* fall through */ - case 11 : itype = I960BASE_INSN_LDIS_INDIRECT_OFFSET; goto extract_sfmt_ld_indirect_offset; - case 12 : itype = I960BASE_INSN_LDIS_DISP; goto extract_sfmt_ld_disp; - case 13 : itype = I960BASE_INSN_LDIS_INDIRECT_DISP; goto extract_sfmt_ld_indirect_disp; - case 14 : itype = I960BASE_INSN_LDIS_INDEX_DISP; goto extract_sfmt_ld_index_disp; - case 15 : itype = I960BASE_INSN_LDIS_INDIRECT_INDEX_DISP; goto extract_sfmt_ld_indirect_index_disp; - default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - } - - /* The instruction has been decoded, now extract the fields. */ - - extract_sfmt_empty: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_empty.f - - - /* Record the fields for the semantic handler. */ - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_empty", (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_mulo: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_emul.f - UINT f_srcdst; - UINT f_src2; - UINT f_src1; - - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); - f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); - - /* Record the fields for the semantic handler. */ - FLD (i_src1) = & CPU (h_gr)[f_src1]; - FLD (i_src2) = & CPU (h_gr)[f_src2]; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mulo", "src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_src1) = f_src1; - FLD (in_src2) = f_src2; - FLD (out_dst) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_mulo1: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_emul1.f - UINT f_srcdst; - UINT f_src2; - UINT f_src1; - - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); - f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); - - /* Record the fields for the semantic handler. */ - FLD (f_src1) = f_src1; - FLD (i_src2) = & CPU (h_gr)[f_src2]; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mulo1", "f_src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_src2) = f_src2; - FLD (out_dst) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_mulo2: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_emul2.f - UINT f_srcdst; - UINT f_src2; - UINT f_src1; - - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); - f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); - - /* Record the fields for the semantic handler. */ - FLD (f_src2) = f_src2; - FLD (i_src1) = & CPU (h_gr)[f_src1]; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mulo2", "f_src2 0x%x", 'x', f_src2, "src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_src1) = f_src1; - FLD (out_dst) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_mulo3: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_emul3.f - UINT f_srcdst; - UINT f_src2; - UINT f_src1; - - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); - f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); - - /* Record the fields for the semantic handler. */ - FLD (f_src1) = f_src1; - FLD (f_src2) = f_src2; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mulo3", "f_src1 0x%x", 'x', f_src1, "f_src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (out_dst) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_notbit: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_emul.f - UINT f_srcdst; - UINT f_src2; - UINT f_src1; - - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); - f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); - - /* Record the fields for the semantic handler. */ - FLD (i_src1) = & CPU (h_gr)[f_src1]; - FLD (i_src2) = & CPU (h_gr)[f_src2]; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_notbit", "src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_src1) = f_src1; - FLD (in_src2) = f_src2; - FLD (out_dst) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_notbit1: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_emul1.f - UINT f_srcdst; - UINT f_src2; - UINT f_src1; - - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); - f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); - - /* Record the fields for the semantic handler. */ - FLD (f_src1) = f_src1; - FLD (i_src2) = & CPU (h_gr)[f_src2]; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_notbit1", "f_src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_src2) = f_src2; - FLD (out_dst) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_notbit2: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_emul2.f - UINT f_srcdst; - UINT f_src2; - UINT f_src1; - - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); - f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); - - /* Record the fields for the semantic handler. */ - FLD (f_src2) = f_src2; - FLD (i_src1) = & CPU (h_gr)[f_src1]; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_notbit2", "f_src2 0x%x", 'x', f_src2, "src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_src1) = f_src1; - FLD (out_dst) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_notbit3: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_emul3.f - UINT f_srcdst; - UINT f_src2; - UINT f_src1; - - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); - f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); - - /* Record the fields for the semantic handler. */ - FLD (f_src1) = f_src1; - FLD (f_src2) = f_src2; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_notbit3", "f_src1 0x%x", 'x', f_src1, "f_src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (out_dst) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_not: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_emul2.f - UINT f_srcdst; - UINT f_src1; - - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); - - /* Record the fields for the semantic handler. */ - FLD (i_src1) = & CPU (h_gr)[f_src1]; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_not", "src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_src1) = f_src1; - FLD (out_dst) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_not1: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_emul3.f - UINT f_srcdst; - UINT f_src1; - - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); - - /* Record the fields for the semantic handler. */ - FLD (f_src1) = f_src1; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_not1", "f_src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (out_dst) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_shlo: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_emul.f - UINT f_srcdst; - UINT f_src2; - UINT f_src1; - - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); - f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); - - /* Record the fields for the semantic handler. */ - FLD (i_src1) = & CPU (h_gr)[f_src1]; - FLD (i_src2) = & CPU (h_gr)[f_src2]; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_shlo", "src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_src1) = f_src1; - FLD (in_src2) = f_src2; - FLD (out_dst) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_shlo1: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_emul1.f - UINT f_srcdst; - UINT f_src2; - UINT f_src1; - - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); - f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); - - /* Record the fields for the semantic handler. */ - FLD (f_src1) = f_src1; - FLD (i_src2) = & CPU (h_gr)[f_src2]; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_shlo1", "f_src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_src2) = f_src2; - FLD (out_dst) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_shlo2: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_emul2.f - UINT f_srcdst; - UINT f_src2; - UINT f_src1; - - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); - f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); - - /* Record the fields for the semantic handler. */ - FLD (f_src2) = f_src2; - FLD (i_src1) = & CPU (h_gr)[f_src1]; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_shlo2", "f_src2 0x%x", 'x', f_src2, "src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_src1) = f_src1; - FLD (out_dst) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_shlo3: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_emul3.f - UINT f_srcdst; - UINT f_src2; - UINT f_src1; - - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); - f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); - - /* Record the fields for the semantic handler. */ - FLD (f_src1) = f_src1; - FLD (f_src2) = f_src2; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_shlo3", "f_src1 0x%x", 'x', f_src1, "f_src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (out_dst) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_emul: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_emul.f - UINT f_srcdst; - UINT f_src2; - UINT f_src1; - - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); - f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); - - /* Record the fields for the semantic handler. */ - FLD (f_srcdst) = f_srcdst; - FLD (i_src1) = & CPU (h_gr)[f_src1]; - FLD (i_src2) = & CPU (h_gr)[f_src2]; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_emul", "f_srcdst 0x%x", 'x', f_srcdst, "src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_src1) = f_src1; - FLD (in_src2) = f_src2; - FLD (out_dst) = f_srcdst; - FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1)); - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_emul1: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_emul1.f - UINT f_srcdst; - UINT f_src2; - UINT f_src1; - - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); - f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); - - /* Record the fields for the semantic handler. */ - FLD (f_srcdst) = f_srcdst; - FLD (f_src1) = f_src1; - FLD (i_src2) = & CPU (h_gr)[f_src2]; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_emul1", "f_srcdst 0x%x", 'x', f_srcdst, "f_src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_src2) = f_src2; - FLD (out_dst) = f_srcdst; - FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1)); - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_emul2: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_emul2.f - UINT f_srcdst; - UINT f_src2; - UINT f_src1; - - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); - f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); - - /* Record the fields for the semantic handler. */ - FLD (f_srcdst) = f_srcdst; - FLD (f_src2) = f_src2; - FLD (i_src1) = & CPU (h_gr)[f_src1]; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_emul2", "f_srcdst 0x%x", 'x', f_srcdst, "f_src2 0x%x", 'x', f_src2, "src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_src1) = f_src1; - FLD (out_dst) = f_srcdst; - FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1)); - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_emul3: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_emul3.f - UINT f_srcdst; - UINT f_src2; - UINT f_src1; - - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); - f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); - - /* Record the fields for the semantic handler. */ - FLD (f_srcdst) = f_srcdst; - FLD (f_src1) = f_src1; - FLD (f_src2) = f_src2; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_emul3", "f_srcdst 0x%x", 'x', f_srcdst, "f_src1 0x%x", 'x', f_src1, "f_src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (out_dst) = f_srcdst; - FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1)); - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_movl: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_movq.f - UINT f_srcdst; - UINT f_src1; - - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); - - /* Record the fields for the semantic handler. */ - FLD (f_src1) = f_src1; - FLD (f_srcdst) = f_srcdst; - FLD (i_src1) = & CPU (h_gr)[f_src1]; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_movl", "f_src1 0x%x", 'x', f_src1, "f_srcdst 0x%x", 'x', f_srcdst, "src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_h_gr_add__DFLT_index_of__DFLT_src1_1) = ((FLD (f_src1)) + (1)); - FLD (in_src1) = f_src1; - FLD (out_dst) = f_srcdst; - FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1)); - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_movl1: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_emul3.f - UINT f_srcdst; - UINT f_src1; - - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); - - /* Record the fields for the semantic handler. */ - FLD (f_srcdst) = f_srcdst; - FLD (f_src1) = f_src1; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_movl1", "f_srcdst 0x%x", 'x', f_srcdst, "f_src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (out_dst) = f_srcdst; - FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1)); - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_movt: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_movq.f - UINT f_srcdst; - UINT f_src1; - - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); - - /* Record the fields for the semantic handler. */ - FLD (f_src1) = f_src1; - FLD (f_srcdst) = f_srcdst; - FLD (i_src1) = & CPU (h_gr)[f_src1]; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_movt", "f_src1 0x%x", 'x', f_src1, "f_srcdst 0x%x", 'x', f_srcdst, "src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_h_gr_add__DFLT_index_of__DFLT_src1_1) = ((FLD (f_src1)) + (1)); - FLD (in_h_gr_add__DFLT_index_of__DFLT_src1_2) = ((FLD (f_src1)) + (2)); - FLD (in_src1) = f_src1; - FLD (out_dst) = f_srcdst; - FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1)); - FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_2) = ((FLD (f_srcdst)) + (2)); - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_movt1: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_movq.f - UINT f_srcdst; - UINT f_src1; - - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); - - /* Record the fields for the semantic handler. */ - FLD (f_srcdst) = f_srcdst; - FLD (f_src1) = f_src1; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_movt1", "f_srcdst 0x%x", 'x', f_srcdst, "f_src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (out_dst) = f_srcdst; - FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1)); - FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_2) = ((FLD (f_srcdst)) + (2)); - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_movq: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_movq.f - UINT f_srcdst; - UINT f_src1; - - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); - - /* Record the fields for the semantic handler. */ - FLD (f_src1) = f_src1; - FLD (f_srcdst) = f_srcdst; - FLD (i_src1) = & CPU (h_gr)[f_src1]; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_movq", "f_src1 0x%x", 'x', f_src1, "f_srcdst 0x%x", 'x', f_srcdst, "src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_h_gr_add__DFLT_index_of__DFLT_src1_1) = ((FLD (f_src1)) + (1)); - FLD (in_h_gr_add__DFLT_index_of__DFLT_src1_2) = ((FLD (f_src1)) + (2)); - FLD (in_h_gr_add__DFLT_index_of__DFLT_src1_3) = ((FLD (f_src1)) + (3)); - FLD (in_src1) = f_src1; - FLD (out_dst) = f_srcdst; - FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1)); - FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_2) = ((FLD (f_srcdst)) + (2)); - FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_3) = ((FLD (f_srcdst)) + (3)); - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_movq1: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_movq.f - UINT f_srcdst; - UINT f_src1; - - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); - - /* Record the fields for the semantic handler. */ - FLD (f_srcdst) = f_srcdst; - FLD (f_src1) = f_src1; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_movq1", "f_srcdst 0x%x", 'x', f_srcdst, "f_src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (out_dst) = f_srcdst; - FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1)); - FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_2) = ((FLD (f_srcdst)) + (2)); - FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_3) = ((FLD (f_srcdst)) + (3)); - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_modpc: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_emul1.f - UINT f_srcdst; - UINT f_src2; - - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); - - /* Record the fields for the semantic handler. */ - FLD (i_src2) = & CPU (h_gr)[f_src2]; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_modpc", "src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_src2) = f_src2; - FLD (out_dst) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_lda_offset: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - UINT f_srcdst; - UINT f_offset; - - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12); - - /* Record the fields for the semantic handler. */ - FLD (f_offset) = f_offset; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lda_offset", "f_offset 0x%x", 'x', f_offset, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (out_dst) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_lda_indirect_offset: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - UINT f_srcdst; - UINT f_abase; - UINT f_offset; - - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); - f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12); - - /* Record the fields for the semantic handler. */ - FLD (f_offset) = f_offset; - FLD (i_abase) = & CPU (h_gr)[f_abase]; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lda_indirect_offset", "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_abase) = f_abase; - FLD (out_dst) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_lda_indirect: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - UINT f_srcdst; - UINT f_abase; - - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); - - /* Record the fields for the semantic handler. */ - FLD (i_abase) = & CPU (h_gr)[f_abase]; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lda_indirect", "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_abase) = f_abase; - FLD (out_dst) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_lda_indirect_index: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - UINT f_srcdst; - UINT f_abase; - UINT f_scale; - UINT f_index; - - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); - f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); - f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); - - /* Record the fields for the semantic handler. */ - FLD (f_scale) = f_scale; - FLD (i_abase) = & CPU (h_gr)[f_abase]; - FLD (i_index) = & CPU (h_gr)[f_index]; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lda_indirect_index", "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_abase) = f_abase; - FLD (in_index) = f_index; - FLD (out_dst) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_lda_disp: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - UINT f_optdisp; - UINT f_srcdst; - /* Contents of trailing part of insn. */ - UINT word_1; - - word_1 = GETIMEMUSI (current_cpu, pc + 4); - f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - - /* Record the fields for the semantic handler. */ - FLD (f_optdisp) = f_optdisp; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lda_disp", "f_optdisp 0x%x", 'x', f_optdisp, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (out_dst) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_lda_indirect_disp: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - UINT f_optdisp; - UINT f_srcdst; - UINT f_abase; - /* Contents of trailing part of insn. */ - UINT word_1; - - word_1 = GETIMEMUSI (current_cpu, pc + 4); - f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); - - /* Record the fields for the semantic handler. */ - FLD (f_optdisp) = f_optdisp; - FLD (i_abase) = & CPU (h_gr)[f_abase]; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lda_indirect_disp", "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_abase) = f_abase; - FLD (out_dst) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_lda_index_disp: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - UINT f_optdisp; - UINT f_srcdst; - UINT f_scale; - UINT f_index; - /* Contents of trailing part of insn. */ - UINT word_1; - - word_1 = GETIMEMUSI (current_cpu, pc + 4); - f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); - f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); - - /* Record the fields for the semantic handler. */ - FLD (f_optdisp) = f_optdisp; - FLD (f_scale) = f_scale; - FLD (i_index) = & CPU (h_gr)[f_index]; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lda_index_disp", "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_index) = f_index; - FLD (out_dst) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_lda_indirect_index_disp: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - UINT f_optdisp; - UINT f_srcdst; - UINT f_abase; - UINT f_scale; - UINT f_index; - /* Contents of trailing part of insn. */ - UINT word_1; - - word_1 = GETIMEMUSI (current_cpu, pc + 4); - f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); - f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); - f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); - - /* Record the fields for the semantic handler. */ - FLD (f_optdisp) = f_optdisp; - FLD (f_scale) = f_scale; - FLD (i_abase) = & CPU (h_gr)[f_abase]; - FLD (i_index) = & CPU (h_gr)[f_index]; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lda_indirect_index_disp", "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_abase) = f_abase; - FLD (in_index) = f_index; - FLD (out_dst) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ld_offset: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - UINT f_srcdst; - UINT f_offset; - - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12); - - /* Record the fields for the semantic handler. */ - FLD (f_offset) = f_offset; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld_offset", "f_offset 0x%x", 'x', f_offset, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (out_dst) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ld_indirect_offset: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - UINT f_srcdst; - UINT f_abase; - UINT f_offset; - - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); - f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12); - - /* Record the fields for the semantic handler. */ - FLD (f_offset) = f_offset; - FLD (i_abase) = & CPU (h_gr)[f_abase]; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld_indirect_offset", "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_abase) = f_abase; - FLD (out_dst) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ld_indirect: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - UINT f_srcdst; - UINT f_abase; - - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); - - /* Record the fields for the semantic handler. */ - FLD (i_abase) = & CPU (h_gr)[f_abase]; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld_indirect", "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_abase) = f_abase; - FLD (out_dst) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ld_indirect_index: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - UINT f_srcdst; - UINT f_abase; - UINT f_scale; - UINT f_index; - - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); - f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); - f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); - - /* Record the fields for the semantic handler. */ - FLD (f_scale) = f_scale; - FLD (i_abase) = & CPU (h_gr)[f_abase]; - FLD (i_index) = & CPU (h_gr)[f_index]; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld_indirect_index", "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_abase) = f_abase; - FLD (in_index) = f_index; - FLD (out_dst) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ld_disp: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - UINT f_optdisp; - UINT f_srcdst; - /* Contents of trailing part of insn. */ - UINT word_1; - - word_1 = GETIMEMUSI (current_cpu, pc + 4); - f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - - /* Record the fields for the semantic handler. */ - FLD (f_optdisp) = f_optdisp; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld_disp", "f_optdisp 0x%x", 'x', f_optdisp, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (out_dst) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ld_indirect_disp: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - UINT f_optdisp; - UINT f_srcdst; - UINT f_abase; - /* Contents of trailing part of insn. */ - UINT word_1; - - word_1 = GETIMEMUSI (current_cpu, pc + 4); - f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); - - /* Record the fields for the semantic handler. */ - FLD (f_optdisp) = f_optdisp; - FLD (i_abase) = & CPU (h_gr)[f_abase]; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld_indirect_disp", "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_abase) = f_abase; - FLD (out_dst) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ld_index_disp: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - UINT f_optdisp; - UINT f_srcdst; - UINT f_scale; - UINT f_index; - /* Contents of trailing part of insn. */ - UINT word_1; - - word_1 = GETIMEMUSI (current_cpu, pc + 4); - f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); - f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); - - /* Record the fields for the semantic handler. */ - FLD (f_optdisp) = f_optdisp; - FLD (f_scale) = f_scale; - FLD (i_index) = & CPU (h_gr)[f_index]; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld_index_disp", "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_index) = f_index; - FLD (out_dst) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ld_indirect_index_disp: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - UINT f_optdisp; - UINT f_srcdst; - UINT f_abase; - UINT f_scale; - UINT f_index; - /* Contents of trailing part of insn. */ - UINT word_1; - - word_1 = GETIMEMUSI (current_cpu, pc + 4); - f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); - f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); - f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); - - /* Record the fields for the semantic handler. */ - FLD (f_optdisp) = f_optdisp; - FLD (f_scale) = f_scale; - FLD (i_abase) = & CPU (h_gr)[f_abase]; - FLD (i_index) = & CPU (h_gr)[f_index]; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld_indirect_index_disp", "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_abase) = f_abase; - FLD (in_index) = f_index; - FLD (out_dst) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ldl_offset: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - UINT f_srcdst; - UINT f_offset; - - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12); - - /* Record the fields for the semantic handler. */ - FLD (f_srcdst) = f_srcdst; - FLD (f_offset) = f_offset; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldl_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (out_dst) = f_srcdst; - FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1)); - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ldl_indirect_offset: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - UINT f_srcdst; - UINT f_abase; - UINT f_offset; - - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); - f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12); - - /* Record the fields for the semantic handler. */ - FLD (f_srcdst) = f_srcdst; - FLD (f_offset) = f_offset; - FLD (i_abase) = & CPU (h_gr)[f_abase]; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldl_indirect_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_abase) = f_abase; - FLD (out_dst) = f_srcdst; - FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1)); - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ldl_indirect: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - UINT f_srcdst; - UINT f_abase; - - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); - - /* Record the fields for the semantic handler. */ - FLD (f_srcdst) = f_srcdst; - FLD (i_abase) = & CPU (h_gr)[f_abase]; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldl_indirect", "f_srcdst 0x%x", 'x', f_srcdst, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_abase) = f_abase; - FLD (out_dst) = f_srcdst; - FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1)); - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ldl_indirect_index: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - UINT f_srcdst; - UINT f_abase; - UINT f_scale; - UINT f_index; - - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); - f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); - f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); - - /* Record the fields for the semantic handler. */ - FLD (f_srcdst) = f_srcdst; - FLD (f_scale) = f_scale; - FLD (i_abase) = & CPU (h_gr)[f_abase]; - FLD (i_index) = & CPU (h_gr)[f_index]; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldl_indirect_index", "f_srcdst 0x%x", 'x', f_srcdst, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_abase) = f_abase; - FLD (in_index) = f_index; - FLD (out_dst) = f_srcdst; - FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1)); - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ldl_disp: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - UINT f_optdisp; - UINT f_srcdst; - /* Contents of trailing part of insn. */ - UINT word_1; - - word_1 = GETIMEMUSI (current_cpu, pc + 4); - f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - - /* Record the fields for the semantic handler. */ - FLD (f_srcdst) = f_srcdst; - FLD (f_optdisp) = f_optdisp; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldl_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (out_dst) = f_srcdst; - FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1)); - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ldl_indirect_disp: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - UINT f_optdisp; - UINT f_srcdst; - UINT f_abase; - /* Contents of trailing part of insn. */ - UINT word_1; - - word_1 = GETIMEMUSI (current_cpu, pc + 4); - f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); - - /* Record the fields for the semantic handler. */ - FLD (f_srcdst) = f_srcdst; - FLD (f_optdisp) = f_optdisp; - FLD (i_abase) = & CPU (h_gr)[f_abase]; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldl_indirect_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_abase) = f_abase; - FLD (out_dst) = f_srcdst; - FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1)); - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ldl_index_disp: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - UINT f_optdisp; - UINT f_srcdst; - UINT f_scale; - UINT f_index; - /* Contents of trailing part of insn. */ - UINT word_1; - - word_1 = GETIMEMUSI (current_cpu, pc + 4); - f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); - f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); - - /* Record the fields for the semantic handler. */ - FLD (f_srcdst) = f_srcdst; - FLD (f_optdisp) = f_optdisp; - FLD (f_scale) = f_scale; - FLD (i_index) = & CPU (h_gr)[f_index]; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldl_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_index) = f_index; - FLD (out_dst) = f_srcdst; - FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1)); - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ldl_indirect_index_disp: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - UINT f_optdisp; - UINT f_srcdst; - UINT f_abase; - UINT f_scale; - UINT f_index; - /* Contents of trailing part of insn. */ - UINT word_1; - - word_1 = GETIMEMUSI (current_cpu, pc + 4); - f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); - f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); - f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); - - /* Record the fields for the semantic handler. */ - FLD (f_srcdst) = f_srcdst; - FLD (f_optdisp) = f_optdisp; - FLD (f_scale) = f_scale; - FLD (i_abase) = & CPU (h_gr)[f_abase]; - FLD (i_index) = & CPU (h_gr)[f_index]; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldl_indirect_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_abase) = f_abase; - FLD (in_index) = f_index; - FLD (out_dst) = f_srcdst; - FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1)); - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ldt_offset: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - UINT f_srcdst; - UINT f_offset; - - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12); - - /* Record the fields for the semantic handler. */ - FLD (f_srcdst) = f_srcdst; - FLD (f_offset) = f_offset; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldt_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (out_dst) = f_srcdst; - FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1)); - FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_2) = ((FLD (f_srcdst)) + (2)); - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ldt_indirect_offset: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - UINT f_srcdst; - UINT f_abase; - UINT f_offset; - - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); - f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12); - - /* Record the fields for the semantic handler. */ - FLD (f_srcdst) = f_srcdst; - FLD (f_offset) = f_offset; - FLD (i_abase) = & CPU (h_gr)[f_abase]; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldt_indirect_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_abase) = f_abase; - FLD (out_dst) = f_srcdst; - FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1)); - FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_2) = ((FLD (f_srcdst)) + (2)); - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ldt_indirect: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - UINT f_srcdst; - UINT f_abase; - - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); - - /* Record the fields for the semantic handler. */ - FLD (f_srcdst) = f_srcdst; - FLD (i_abase) = & CPU (h_gr)[f_abase]; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldt_indirect", "f_srcdst 0x%x", 'x', f_srcdst, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_abase) = f_abase; - FLD (out_dst) = f_srcdst; - FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1)); - FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_2) = ((FLD (f_srcdst)) + (2)); - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ldt_indirect_index: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - UINT f_srcdst; - UINT f_abase; - UINT f_scale; - UINT f_index; - - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); - f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); - f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); - - /* Record the fields for the semantic handler. */ - FLD (f_srcdst) = f_srcdst; - FLD (f_scale) = f_scale; - FLD (i_abase) = & CPU (h_gr)[f_abase]; - FLD (i_index) = & CPU (h_gr)[f_index]; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldt_indirect_index", "f_srcdst 0x%x", 'x', f_srcdst, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_abase) = f_abase; - FLD (in_index) = f_index; - FLD (out_dst) = f_srcdst; - FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1)); - FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_2) = ((FLD (f_srcdst)) + (2)); - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ldt_disp: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - UINT f_optdisp; - UINT f_srcdst; - /* Contents of trailing part of insn. */ - UINT word_1; - - word_1 = GETIMEMUSI (current_cpu, pc + 4); - f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - - /* Record the fields for the semantic handler. */ - FLD (f_srcdst) = f_srcdst; - FLD (f_optdisp) = f_optdisp; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldt_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (out_dst) = f_srcdst; - FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1)); - FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_2) = ((FLD (f_srcdst)) + (2)); - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ldt_indirect_disp: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - UINT f_optdisp; - UINT f_srcdst; - UINT f_abase; - /* Contents of trailing part of insn. */ - UINT word_1; - - word_1 = GETIMEMUSI (current_cpu, pc + 4); - f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); - - /* Record the fields for the semantic handler. */ - FLD (f_srcdst) = f_srcdst; - FLD (f_optdisp) = f_optdisp; - FLD (i_abase) = & CPU (h_gr)[f_abase]; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldt_indirect_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_abase) = f_abase; - FLD (out_dst) = f_srcdst; - FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1)); - FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_2) = ((FLD (f_srcdst)) + (2)); - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ldt_index_disp: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - UINT f_optdisp; - UINT f_srcdst; - UINT f_scale; - UINT f_index; - /* Contents of trailing part of insn. */ - UINT word_1; - - word_1 = GETIMEMUSI (current_cpu, pc + 4); - f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); - f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); - - /* Record the fields for the semantic handler. */ - FLD (f_srcdst) = f_srcdst; - FLD (f_optdisp) = f_optdisp; - FLD (f_scale) = f_scale; - FLD (i_index) = & CPU (h_gr)[f_index]; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldt_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_index) = f_index; - FLD (out_dst) = f_srcdst; - FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1)); - FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_2) = ((FLD (f_srcdst)) + (2)); - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ldt_indirect_index_disp: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - UINT f_optdisp; - UINT f_srcdst; - UINT f_abase; - UINT f_scale; - UINT f_index; - /* Contents of trailing part of insn. */ - UINT word_1; - - word_1 = GETIMEMUSI (current_cpu, pc + 4); - f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); - f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); - f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); - - /* Record the fields for the semantic handler. */ - FLD (f_srcdst) = f_srcdst; - FLD (f_optdisp) = f_optdisp; - FLD (f_scale) = f_scale; - FLD (i_abase) = & CPU (h_gr)[f_abase]; - FLD (i_index) = & CPU (h_gr)[f_index]; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldt_indirect_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_abase) = f_abase; - FLD (in_index) = f_index; - FLD (out_dst) = f_srcdst; - FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1)); - FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_2) = ((FLD (f_srcdst)) + (2)); - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ldq_offset: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - UINT f_srcdst; - UINT f_offset; - - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12); - - /* Record the fields for the semantic handler. */ - FLD (f_srcdst) = f_srcdst; - FLD (f_offset) = f_offset; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldq_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (out_dst) = f_srcdst; - FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1)); - FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_2) = ((FLD (f_srcdst)) + (2)); - FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_3) = ((FLD (f_srcdst)) + (3)); - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ldq_indirect_offset: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - UINT f_srcdst; - UINT f_abase; - UINT f_offset; - - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); - f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12); - - /* Record the fields for the semantic handler. */ - FLD (f_srcdst) = f_srcdst; - FLD (f_offset) = f_offset; - FLD (i_abase) = & CPU (h_gr)[f_abase]; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldq_indirect_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_abase) = f_abase; - FLD (out_dst) = f_srcdst; - FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1)); - FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_2) = ((FLD (f_srcdst)) + (2)); - FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_3) = ((FLD (f_srcdst)) + (3)); - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ldq_indirect: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - UINT f_srcdst; - UINT f_abase; - - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); - - /* Record the fields for the semantic handler. */ - FLD (f_srcdst) = f_srcdst; - FLD (i_abase) = & CPU (h_gr)[f_abase]; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldq_indirect", "f_srcdst 0x%x", 'x', f_srcdst, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_abase) = f_abase; - FLD (out_dst) = f_srcdst; - FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1)); - FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_2) = ((FLD (f_srcdst)) + (2)); - FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_3) = ((FLD (f_srcdst)) + (3)); - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ldq_indirect_index: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - UINT f_srcdst; - UINT f_abase; - UINT f_scale; - UINT f_index; - - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); - f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); - f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); - - /* Record the fields for the semantic handler. */ - FLD (f_srcdst) = f_srcdst; - FLD (f_scale) = f_scale; - FLD (i_abase) = & CPU (h_gr)[f_abase]; - FLD (i_index) = & CPU (h_gr)[f_index]; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldq_indirect_index", "f_srcdst 0x%x", 'x', f_srcdst, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_abase) = f_abase; - FLD (in_index) = f_index; - FLD (out_dst) = f_srcdst; - FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1)); - FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_2) = ((FLD (f_srcdst)) + (2)); - FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_3) = ((FLD (f_srcdst)) + (3)); - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ldq_disp: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - UINT f_optdisp; - UINT f_srcdst; - /* Contents of trailing part of insn. */ - UINT word_1; - - word_1 = GETIMEMUSI (current_cpu, pc + 4); - f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - - /* Record the fields for the semantic handler. */ - FLD (f_srcdst) = f_srcdst; - FLD (f_optdisp) = f_optdisp; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldq_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (out_dst) = f_srcdst; - FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1)); - FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_2) = ((FLD (f_srcdst)) + (2)); - FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_3) = ((FLD (f_srcdst)) + (3)); - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ldq_indirect_disp: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - UINT f_optdisp; - UINT f_srcdst; - UINT f_abase; - /* Contents of trailing part of insn. */ - UINT word_1; - - word_1 = GETIMEMUSI (current_cpu, pc + 4); - f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); - - /* Record the fields for the semantic handler. */ - FLD (f_srcdst) = f_srcdst; - FLD (f_optdisp) = f_optdisp; - FLD (i_abase) = & CPU (h_gr)[f_abase]; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldq_indirect_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_abase) = f_abase; - FLD (out_dst) = f_srcdst; - FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1)); - FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_2) = ((FLD (f_srcdst)) + (2)); - FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_3) = ((FLD (f_srcdst)) + (3)); - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ldq_index_disp: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - UINT f_optdisp; - UINT f_srcdst; - UINT f_scale; - UINT f_index; - /* Contents of trailing part of insn. */ - UINT word_1; - - word_1 = GETIMEMUSI (current_cpu, pc + 4); - f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); - f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); - - /* Record the fields for the semantic handler. */ - FLD (f_srcdst) = f_srcdst; - FLD (f_optdisp) = f_optdisp; - FLD (f_scale) = f_scale; - FLD (i_index) = & CPU (h_gr)[f_index]; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldq_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_index) = f_index; - FLD (out_dst) = f_srcdst; - FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1)); - FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_2) = ((FLD (f_srcdst)) + (2)); - FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_3) = ((FLD (f_srcdst)) + (3)); - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ldq_indirect_index_disp: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - UINT f_optdisp; - UINT f_srcdst; - UINT f_abase; - UINT f_scale; - UINT f_index; - /* Contents of trailing part of insn. */ - UINT word_1; - - word_1 = GETIMEMUSI (current_cpu, pc + 4); - f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); - f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); - f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); - - /* Record the fields for the semantic handler. */ - FLD (f_srcdst) = f_srcdst; - FLD (f_optdisp) = f_optdisp; - FLD (f_scale) = f_scale; - FLD (i_abase) = & CPU (h_gr)[f_abase]; - FLD (i_index) = & CPU (h_gr)[f_index]; - FLD (i_dst) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldq_indirect_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_abase) = f_abase; - FLD (in_index) = f_index; - FLD (out_dst) = f_srcdst; - FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1)); - FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_2) = ((FLD (f_srcdst)) + (2)); - FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_3) = ((FLD (f_srcdst)) + (3)); - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_st_offset: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - UINT f_srcdst; - UINT f_offset; - - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12); - - /* Record the fields for the semantic handler. */ - FLD (f_offset) = f_offset; - FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st_offset", "f_offset 0x%x", 'x', f_offset, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_st_src) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_st_indirect_offset: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - UINT f_srcdst; - UINT f_abase; - UINT f_offset; - - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); - f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12); - - /* Record the fields for the semantic handler. */ - FLD (f_offset) = f_offset; - FLD (i_abase) = & CPU (h_gr)[f_abase]; - FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st_indirect_offset", "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_abase) = f_abase; - FLD (in_st_src) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_st_indirect: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - UINT f_srcdst; - UINT f_abase; - - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); - - /* Record the fields for the semantic handler. */ - FLD (i_abase) = & CPU (h_gr)[f_abase]; - FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st_indirect", "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_abase) = f_abase; - FLD (in_st_src) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_st_indirect_index: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - UINT f_srcdst; - UINT f_abase; - UINT f_scale; - UINT f_index; - - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); - f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); - f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); - - /* Record the fields for the semantic handler. */ - FLD (f_scale) = f_scale; - FLD (i_abase) = & CPU (h_gr)[f_abase]; - FLD (i_index) = & CPU (h_gr)[f_index]; - FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st_indirect_index", "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_abase) = f_abase; - FLD (in_index) = f_index; - FLD (in_st_src) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_st_disp: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - UINT f_optdisp; - UINT f_srcdst; - /* Contents of trailing part of insn. */ - UINT word_1; - - word_1 = GETIMEMUSI (current_cpu, pc + 4); - f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - - /* Record the fields for the semantic handler. */ - FLD (f_optdisp) = f_optdisp; - FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st_disp", "f_optdisp 0x%x", 'x', f_optdisp, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_st_src) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_st_indirect_disp: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - UINT f_optdisp; - UINT f_srcdst; - UINT f_abase; - /* Contents of trailing part of insn. */ - UINT word_1; - - word_1 = GETIMEMUSI (current_cpu, pc + 4); - f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); - - /* Record the fields for the semantic handler. */ - FLD (f_optdisp) = f_optdisp; - FLD (i_abase) = & CPU (h_gr)[f_abase]; - FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st_indirect_disp", "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_abase) = f_abase; - FLD (in_st_src) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_st_index_disp: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - UINT f_optdisp; - UINT f_srcdst; - UINT f_scale; - UINT f_index; - /* Contents of trailing part of insn. */ - UINT word_1; - - word_1 = GETIMEMUSI (current_cpu, pc + 4); - f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); - f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); - - /* Record the fields for the semantic handler. */ - FLD (f_optdisp) = f_optdisp; - FLD (f_scale) = f_scale; - FLD (i_index) = & CPU (h_gr)[f_index]; - FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st_index_disp", "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_index) = f_index; - FLD (in_st_src) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_st_indirect_index_disp: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - UINT f_optdisp; - UINT f_srcdst; - UINT f_abase; - UINT f_scale; - UINT f_index; - /* Contents of trailing part of insn. */ - UINT word_1; - - word_1 = GETIMEMUSI (current_cpu, pc + 4); - f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); - f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); - f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); - - /* Record the fields for the semantic handler. */ - FLD (f_optdisp) = f_optdisp; - FLD (f_scale) = f_scale; - FLD (i_abase) = & CPU (h_gr)[f_abase]; - FLD (i_index) = & CPU (h_gr)[f_index]; - FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st_indirect_index_disp", "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_abase) = f_abase; - FLD (in_index) = f_index; - FLD (in_st_src) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_stl_offset: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - UINT f_srcdst; - UINT f_offset; - - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12); - - /* Record the fields for the semantic handler. */ - FLD (f_srcdst) = f_srcdst; - FLD (f_offset) = f_offset; - FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stl_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_1) = ((FLD (f_srcdst)) + (1)); - FLD (in_st_src) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_stl_indirect_offset: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - UINT f_srcdst; - UINT f_abase; - UINT f_offset; - - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); - f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12); - - /* Record the fields for the semantic handler. */ - FLD (f_srcdst) = f_srcdst; - FLD (f_offset) = f_offset; - FLD (i_abase) = & CPU (h_gr)[f_abase]; - FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stl_indirect_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_abase) = f_abase; - FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_1) = ((FLD (f_srcdst)) + (1)); - FLD (in_st_src) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_stl_indirect: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - UINT f_srcdst; - UINT f_abase; - - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); - - /* Record the fields for the semantic handler. */ - FLD (f_srcdst) = f_srcdst; - FLD (i_abase) = & CPU (h_gr)[f_abase]; - FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stl_indirect", "f_srcdst 0x%x", 'x', f_srcdst, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_abase) = f_abase; - FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_1) = ((FLD (f_srcdst)) + (1)); - FLD (in_st_src) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_stl_indirect_index: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - UINT f_srcdst; - UINT f_abase; - UINT f_scale; - UINT f_index; - - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); - f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); - f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); - - /* Record the fields for the semantic handler. */ - FLD (f_srcdst) = f_srcdst; - FLD (f_scale) = f_scale; - FLD (i_abase) = & CPU (h_gr)[f_abase]; - FLD (i_index) = & CPU (h_gr)[f_index]; - FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stl_indirect_index", "f_srcdst 0x%x", 'x', f_srcdst, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_abase) = f_abase; - FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_1) = ((FLD (f_srcdst)) + (1)); - FLD (in_index) = f_index; - FLD (in_st_src) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_stl_disp: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - UINT f_optdisp; - UINT f_srcdst; - /* Contents of trailing part of insn. */ - UINT word_1; - - word_1 = GETIMEMUSI (current_cpu, pc + 4); - f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - - /* Record the fields for the semantic handler. */ - FLD (f_srcdst) = f_srcdst; - FLD (f_optdisp) = f_optdisp; - FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stl_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_1) = ((FLD (f_srcdst)) + (1)); - FLD (in_st_src) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_stl_indirect_disp: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - UINT f_optdisp; - UINT f_srcdst; - UINT f_abase; - /* Contents of trailing part of insn. */ - UINT word_1; - - word_1 = GETIMEMUSI (current_cpu, pc + 4); - f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); - - /* Record the fields for the semantic handler. */ - FLD (f_srcdst) = f_srcdst; - FLD (f_optdisp) = f_optdisp; - FLD (i_abase) = & CPU (h_gr)[f_abase]; - FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stl_indirect_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_abase) = f_abase; - FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_1) = ((FLD (f_srcdst)) + (1)); - FLD (in_st_src) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_stl_index_disp: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - UINT f_optdisp; - UINT f_srcdst; - UINT f_scale; - UINT f_index; - /* Contents of trailing part of insn. */ - UINT word_1; - - word_1 = GETIMEMUSI (current_cpu, pc + 4); - f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); - f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); - - /* Record the fields for the semantic handler. */ - FLD (f_srcdst) = f_srcdst; - FLD (f_optdisp) = f_optdisp; - FLD (f_scale) = f_scale; - FLD (i_index) = & CPU (h_gr)[f_index]; - FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stl_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_1) = ((FLD (f_srcdst)) + (1)); - FLD (in_index) = f_index; - FLD (in_st_src) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_stl_indirect_index_disp: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - UINT f_optdisp; - UINT f_srcdst; - UINT f_abase; - UINT f_scale; - UINT f_index; - /* Contents of trailing part of insn. */ - UINT word_1; - - word_1 = GETIMEMUSI (current_cpu, pc + 4); - f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); - f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); - f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); - - /* Record the fields for the semantic handler. */ - FLD (f_srcdst) = f_srcdst; - FLD (f_optdisp) = f_optdisp; - FLD (f_scale) = f_scale; - FLD (i_abase) = & CPU (h_gr)[f_abase]; - FLD (i_index) = & CPU (h_gr)[f_index]; - FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stl_indirect_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_abase) = f_abase; - FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_1) = ((FLD (f_srcdst)) + (1)); - FLD (in_index) = f_index; - FLD (in_st_src) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_stt_offset: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - UINT f_srcdst; - UINT f_offset; - - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12); - - /* Record the fields for the semantic handler. */ - FLD (f_srcdst) = f_srcdst; - FLD (f_offset) = f_offset; - FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stt_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_1) = ((FLD (f_srcdst)) + (1)); - FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_2) = ((FLD (f_srcdst)) + (2)); - FLD (in_st_src) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_stt_indirect_offset: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - UINT f_srcdst; - UINT f_abase; - UINT f_offset; - - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); - f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12); - - /* Record the fields for the semantic handler. */ - FLD (f_srcdst) = f_srcdst; - FLD (f_offset) = f_offset; - FLD (i_abase) = & CPU (h_gr)[f_abase]; - FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stt_indirect_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_abase) = f_abase; - FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_1) = ((FLD (f_srcdst)) + (1)); - FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_2) = ((FLD (f_srcdst)) + (2)); - FLD (in_st_src) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_stt_indirect: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - UINT f_srcdst; - UINT f_abase; - - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); - - /* Record the fields for the semantic handler. */ - FLD (f_srcdst) = f_srcdst; - FLD (i_abase) = & CPU (h_gr)[f_abase]; - FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stt_indirect", "f_srcdst 0x%x", 'x', f_srcdst, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_abase) = f_abase; - FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_1) = ((FLD (f_srcdst)) + (1)); - FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_2) = ((FLD (f_srcdst)) + (2)); - FLD (in_st_src) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_stt_indirect_index: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - UINT f_srcdst; - UINT f_abase; - UINT f_scale; - UINT f_index; - - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); - f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); - f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); - - /* Record the fields for the semantic handler. */ - FLD (f_srcdst) = f_srcdst; - FLD (f_scale) = f_scale; - FLD (i_abase) = & CPU (h_gr)[f_abase]; - FLD (i_index) = & CPU (h_gr)[f_index]; - FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stt_indirect_index", "f_srcdst 0x%x", 'x', f_srcdst, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_abase) = f_abase; - FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_1) = ((FLD (f_srcdst)) + (1)); - FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_2) = ((FLD (f_srcdst)) + (2)); - FLD (in_index) = f_index; - FLD (in_st_src) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_stt_disp: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - UINT f_optdisp; - UINT f_srcdst; - /* Contents of trailing part of insn. */ - UINT word_1; - - word_1 = GETIMEMUSI (current_cpu, pc + 4); - f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - - /* Record the fields for the semantic handler. */ - FLD (f_srcdst) = f_srcdst; - FLD (f_optdisp) = f_optdisp; - FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stt_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_1) = ((FLD (f_srcdst)) + (1)); - FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_2) = ((FLD (f_srcdst)) + (2)); - FLD (in_st_src) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_stt_indirect_disp: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - UINT f_optdisp; - UINT f_srcdst; - UINT f_abase; - /* Contents of trailing part of insn. */ - UINT word_1; - - word_1 = GETIMEMUSI (current_cpu, pc + 4); - f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); - - /* Record the fields for the semantic handler. */ - FLD (f_srcdst) = f_srcdst; - FLD (f_optdisp) = f_optdisp; - FLD (i_abase) = & CPU (h_gr)[f_abase]; - FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stt_indirect_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_abase) = f_abase; - FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_1) = ((FLD (f_srcdst)) + (1)); - FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_2) = ((FLD (f_srcdst)) + (2)); - FLD (in_st_src) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_stt_index_disp: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - UINT f_optdisp; - UINT f_srcdst; - UINT f_scale; - UINT f_index; - /* Contents of trailing part of insn. */ - UINT word_1; - - word_1 = GETIMEMUSI (current_cpu, pc + 4); - f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); - f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); - - /* Record the fields for the semantic handler. */ - FLD (f_srcdst) = f_srcdst; - FLD (f_optdisp) = f_optdisp; - FLD (f_scale) = f_scale; - FLD (i_index) = & CPU (h_gr)[f_index]; - FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stt_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_1) = ((FLD (f_srcdst)) + (1)); - FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_2) = ((FLD (f_srcdst)) + (2)); - FLD (in_index) = f_index; - FLD (in_st_src) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_stt_indirect_index_disp: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - UINT f_optdisp; - UINT f_srcdst; - UINT f_abase; - UINT f_scale; - UINT f_index; - /* Contents of trailing part of insn. */ - UINT word_1; - - word_1 = GETIMEMUSI (current_cpu, pc + 4); - f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); - f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); - f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); - - /* Record the fields for the semantic handler. */ - FLD (f_srcdst) = f_srcdst; - FLD (f_optdisp) = f_optdisp; - FLD (f_scale) = f_scale; - FLD (i_abase) = & CPU (h_gr)[f_abase]; - FLD (i_index) = & CPU (h_gr)[f_index]; - FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stt_indirect_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_abase) = f_abase; - FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_1) = ((FLD (f_srcdst)) + (1)); - FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_2) = ((FLD (f_srcdst)) + (2)); - FLD (in_index) = f_index; - FLD (in_st_src) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_stq_offset: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - UINT f_srcdst; - UINT f_offset; - - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12); - - /* Record the fields for the semantic handler. */ - FLD (f_srcdst) = f_srcdst; - FLD (f_offset) = f_offset; - FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stq_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_1) = ((FLD (f_srcdst)) + (1)); - FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_2) = ((FLD (f_srcdst)) + (2)); - FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_3) = ((FLD (f_srcdst)) + (3)); - FLD (in_st_src) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_stq_indirect_offset: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - UINT f_srcdst; - UINT f_abase; - UINT f_offset; - - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); - f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12); - - /* Record the fields for the semantic handler. */ - FLD (f_srcdst) = f_srcdst; - FLD (f_offset) = f_offset; - FLD (i_abase) = & CPU (h_gr)[f_abase]; - FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stq_indirect_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_abase) = f_abase; - FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_1) = ((FLD (f_srcdst)) + (1)); - FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_2) = ((FLD (f_srcdst)) + (2)); - FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_3) = ((FLD (f_srcdst)) + (3)); - FLD (in_st_src) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_stq_indirect: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - UINT f_srcdst; - UINT f_abase; - - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); - - /* Record the fields for the semantic handler. */ - FLD (f_srcdst) = f_srcdst; - FLD (i_abase) = & CPU (h_gr)[f_abase]; - FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stq_indirect", "f_srcdst 0x%x", 'x', f_srcdst, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_abase) = f_abase; - FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_1) = ((FLD (f_srcdst)) + (1)); - FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_2) = ((FLD (f_srcdst)) + (2)); - FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_3) = ((FLD (f_srcdst)) + (3)); - FLD (in_st_src) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_stq_indirect_index: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - UINT f_srcdst; - UINT f_abase; - UINT f_scale; - UINT f_index; - - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); - f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); - f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); - - /* Record the fields for the semantic handler. */ - FLD (f_srcdst) = f_srcdst; - FLD (f_scale) = f_scale; - FLD (i_abase) = & CPU (h_gr)[f_abase]; - FLD (i_index) = & CPU (h_gr)[f_index]; - FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stq_indirect_index", "f_srcdst 0x%x", 'x', f_srcdst, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_abase) = f_abase; - FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_1) = ((FLD (f_srcdst)) + (1)); - FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_2) = ((FLD (f_srcdst)) + (2)); - FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_3) = ((FLD (f_srcdst)) + (3)); - FLD (in_index) = f_index; - FLD (in_st_src) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_stq_disp: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - UINT f_optdisp; - UINT f_srcdst; - /* Contents of trailing part of insn. */ - UINT word_1; - - word_1 = GETIMEMUSI (current_cpu, pc + 4); - f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - - /* Record the fields for the semantic handler. */ - FLD (f_srcdst) = f_srcdst; - FLD (f_optdisp) = f_optdisp; - FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stq_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_1) = ((FLD (f_srcdst)) + (1)); - FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_2) = ((FLD (f_srcdst)) + (2)); - FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_3) = ((FLD (f_srcdst)) + (3)); - FLD (in_st_src) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_stq_indirect_disp: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - UINT f_optdisp; - UINT f_srcdst; - UINT f_abase; - /* Contents of trailing part of insn. */ - UINT word_1; - - word_1 = GETIMEMUSI (current_cpu, pc + 4); - f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); - - /* Record the fields for the semantic handler. */ - FLD (f_srcdst) = f_srcdst; - FLD (f_optdisp) = f_optdisp; - FLD (i_abase) = & CPU (h_gr)[f_abase]; - FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stq_indirect_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_abase) = f_abase; - FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_1) = ((FLD (f_srcdst)) + (1)); - FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_2) = ((FLD (f_srcdst)) + (2)); - FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_3) = ((FLD (f_srcdst)) + (3)); - FLD (in_st_src) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_stq_index_disp: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - UINT f_optdisp; - UINT f_srcdst; - UINT f_scale; - UINT f_index; - /* Contents of trailing part of insn. */ - UINT word_1; - - word_1 = GETIMEMUSI (current_cpu, pc + 4); - f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); - f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); - - /* Record the fields for the semantic handler. */ - FLD (f_srcdst) = f_srcdst; - FLD (f_optdisp) = f_optdisp; - FLD (f_scale) = f_scale; - FLD (i_index) = & CPU (h_gr)[f_index]; - FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stq_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_1) = ((FLD (f_srcdst)) + (1)); - FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_2) = ((FLD (f_srcdst)) + (2)); - FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_3) = ((FLD (f_srcdst)) + (3)); - FLD (in_index) = f_index; - FLD (in_st_src) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_stq_indirect_index_disp: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - UINT f_optdisp; - UINT f_srcdst; - UINT f_abase; - UINT f_scale; - UINT f_index; - /* Contents of trailing part of insn. */ - UINT word_1; - - word_1 = GETIMEMUSI (current_cpu, pc + 4); - f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); - f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); - f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); - f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); - - /* Record the fields for the semantic handler. */ - FLD (f_srcdst) = f_srcdst; - FLD (f_optdisp) = f_optdisp; - FLD (f_scale) = f_scale; - FLD (i_abase) = & CPU (h_gr)[f_abase]; - FLD (i_index) = & CPU (h_gr)[f_index]; - FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stq_indirect_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_abase) = f_abase; - FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_1) = ((FLD (f_srcdst)) + (1)); - FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_2) = ((FLD (f_srcdst)) + (2)); - FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_3) = ((FLD (f_srcdst)) + (3)); - FLD (in_index) = f_index; - FLD (in_st_src) = f_srcdst; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_cmpobe_reg: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f - UINT f_br_src1; - UINT f_br_src2; - SI f_br_disp; - - f_br_src1 = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_br_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); - f_br_disp = ((((EXTRACT_MSB0_INT (insn, 32, 19, 11)) << (2))) + (pc)); - - /* Record the fields for the semantic handler. */ - FLD (i_br_disp) = f_br_disp; - FLD (i_br_src1) = & CPU (h_gr)[f_br_src1]; - FLD (i_br_src2) = & CPU (h_gr)[f_br_src2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpobe_reg", "br_disp 0x%x", 'x', f_br_disp, "br_src1 0x%x", 'x', f_br_src1, "br_src2 0x%x", 'x', f_br_src2, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_br_src1) = f_br_src1; - FLD (in_br_src2) = f_br_src2; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_cmpobe_lit: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f - UINT f_br_src1; - UINT f_br_src2; - SI f_br_disp; - - f_br_src1 = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_br_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); - f_br_disp = ((((EXTRACT_MSB0_INT (insn, 32, 19, 11)) << (2))) + (pc)); - - /* Record the fields for the semantic handler. */ - FLD (f_br_src1) = f_br_src1; - FLD (i_br_disp) = f_br_disp; - FLD (i_br_src2) = & CPU (h_gr)[f_br_src2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpobe_lit", "f_br_src1 0x%x", 'x', f_br_src1, "br_disp 0x%x", 'x', f_br_disp, "br_src2 0x%x", 'x', f_br_src2, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_br_src2) = f_br_src2; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_cmpobl_reg: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f - UINT f_br_src1; - UINT f_br_src2; - SI f_br_disp; - - f_br_src1 = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_br_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); - f_br_disp = ((((EXTRACT_MSB0_INT (insn, 32, 19, 11)) << (2))) + (pc)); - - /* Record the fields for the semantic handler. */ - FLD (i_br_disp) = f_br_disp; - FLD (i_br_src1) = & CPU (h_gr)[f_br_src1]; - FLD (i_br_src2) = & CPU (h_gr)[f_br_src2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpobl_reg", "br_disp 0x%x", 'x', f_br_disp, "br_src1 0x%x", 'x', f_br_src1, "br_src2 0x%x", 'x', f_br_src2, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_br_src1) = f_br_src1; - FLD (in_br_src2) = f_br_src2; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_cmpobl_lit: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f - UINT f_br_src1; - UINT f_br_src2; - SI f_br_disp; - - f_br_src1 = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_br_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); - f_br_disp = ((((EXTRACT_MSB0_INT (insn, 32, 19, 11)) << (2))) + (pc)); - - /* Record the fields for the semantic handler. */ - FLD (f_br_src1) = f_br_src1; - FLD (i_br_disp) = f_br_disp; - FLD (i_br_src2) = & CPU (h_gr)[f_br_src2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpobl_lit", "f_br_src1 0x%x", 'x', f_br_src1, "br_disp 0x%x", 'x', f_br_disp, "br_src2 0x%x", 'x', f_br_src2, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_br_src2) = f_br_src2; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_bbc_reg: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f - UINT f_br_src1; - UINT f_br_src2; - SI f_br_disp; - - f_br_src1 = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_br_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); - f_br_disp = ((((EXTRACT_MSB0_INT (insn, 32, 19, 11)) << (2))) + (pc)); - - /* Record the fields for the semantic handler. */ - FLD (i_br_disp) = f_br_disp; - FLD (i_br_src1) = & CPU (h_gr)[f_br_src1]; - FLD (i_br_src2) = & CPU (h_gr)[f_br_src2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bbc_reg", "br_disp 0x%x", 'x', f_br_disp, "br_src1 0x%x", 'x', f_br_src1, "br_src2 0x%x", 'x', f_br_src2, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_br_src1) = f_br_src1; - FLD (in_br_src2) = f_br_src2; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_bbc_lit: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f - UINT f_br_src1; - UINT f_br_src2; - SI f_br_disp; - - f_br_src1 = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - f_br_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); - f_br_disp = ((((EXTRACT_MSB0_INT (insn, 32, 19, 11)) << (2))) + (pc)); - - /* Record the fields for the semantic handler. */ - FLD (f_br_src1) = f_br_src1; - FLD (i_br_disp) = f_br_disp; - FLD (i_br_src2) = & CPU (h_gr)[f_br_src2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bbc_lit", "f_br_src1 0x%x", 'x', f_br_src1, "br_disp 0x%x", 'x', f_br_disp, "br_src2 0x%x", 'x', f_br_src2, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_br_src2) = f_br_src2; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_cmpi: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_emul.f - UINT f_src2; - UINT f_src1; - - f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); - f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); - - /* Record the fields for the semantic handler. */ - FLD (i_src1) = & CPU (h_gr)[f_src1]; - FLD (i_src2) = & CPU (h_gr)[f_src2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpi", "src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_src1) = f_src1; - FLD (in_src2) = f_src2; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_cmpi1: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_emul1.f - UINT f_src2; - UINT f_src1; - - f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); - f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); - - /* Record the fields for the semantic handler. */ - FLD (f_src1) = f_src1; - FLD (i_src2) = & CPU (h_gr)[f_src2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpi1", "f_src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_src2) = f_src2; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_cmpi2: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_emul2.f - UINT f_src2; - UINT f_src1; - - f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); - f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); - - /* Record the fields for the semantic handler. */ - FLD (f_src2) = f_src2; - FLD (i_src1) = & CPU (h_gr)[f_src1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpi2", "f_src2 0x%x", 'x', f_src2, "src1 0x%x", 'x', f_src1, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_src1) = f_src1; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_cmpi3: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_emul3.f - UINT f_src2; - UINT f_src1; - - f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); - f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); - - /* Record the fields for the semantic handler. */ - FLD (f_src1) = f_src1; - FLD (f_src2) = f_src2; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpi3", "f_src1 0x%x", 'x', f_src1, "f_src2 0x%x", 'x', f_src2, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_cmpo: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_emul.f - UINT f_src2; - UINT f_src1; - - f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); - f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); - - /* Record the fields for the semantic handler. */ - FLD (i_src1) = & CPU (h_gr)[f_src1]; - FLD (i_src2) = & CPU (h_gr)[f_src2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpo", "src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_src1) = f_src1; - FLD (in_src2) = f_src2; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_cmpo1: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_emul1.f - UINT f_src2; - UINT f_src1; - - f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); - f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); - - /* Record the fields for the semantic handler. */ - FLD (f_src1) = f_src1; - FLD (i_src2) = & CPU (h_gr)[f_src2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpo1", "f_src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_src2) = f_src2; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_cmpo2: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_emul2.f - UINT f_src2; - UINT f_src1; - - f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); - f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); - - /* Record the fields for the semantic handler. */ - FLD (f_src2) = f_src2; - FLD (i_src1) = & CPU (h_gr)[f_src1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpo2", "f_src2 0x%x", 'x', f_src2, "src1 0x%x", 'x', f_src1, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_src1) = f_src1; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_cmpo3: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_emul3.f - UINT f_src2; - UINT f_src1; - - f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); - f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); - - /* Record the fields for the semantic handler. */ - FLD (f_src1) = f_src1; - FLD (f_src2) = f_src2; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpo3", "f_src1 0x%x", 'x', f_src1, "f_src2 0x%x", 'x', f_src2, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_testno_reg: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_testno_reg.f - UINT f_br_src1; - - f_br_src1 = EXTRACT_MSB0_UINT (insn, 32, 8, 5); - - /* Record the fields for the semantic handler. */ - FLD (i_br_src1) = & CPU (h_gr)[f_br_src1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_testno_reg", "br_src1 0x%x", 'x', f_br_src1, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (out_br_src1) = f_br_src1; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_bno: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_bno.f - SI f_ctrl_disp; - - f_ctrl_disp = ((((EXTRACT_MSB0_INT (insn, 32, 8, 22)) << (2))) + (pc)); - - /* Record the fields for the semantic handler. */ - FLD (i_ctrl_disp) = f_ctrl_disp; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bno", "ctrl_disp 0x%x", 'x', f_ctrl_disp, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_b: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_bno.f - SI f_ctrl_disp; - - f_ctrl_disp = ((((EXTRACT_MSB0_INT (insn, 32, 8, 22)) << (2))) + (pc)); - - /* Record the fields for the semantic handler. */ - FLD (i_ctrl_disp) = f_ctrl_disp; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_b", "ctrl_disp 0x%x", 'x', f_ctrl_disp, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_bx_indirect_offset: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - UINT f_abase; - UINT f_offset; - - f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); - f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12); - - /* Record the fields for the semantic handler. */ - FLD (f_offset) = f_offset; - FLD (i_abase) = & CPU (h_gr)[f_abase]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bx_indirect_offset", "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_abase) = f_abase; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_bx_indirect: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - UINT f_abase; - - f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); - - /* Record the fields for the semantic handler. */ - FLD (i_abase) = & CPU (h_gr)[f_abase]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bx_indirect", "abase 0x%x", 'x', f_abase, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_abase) = f_abase; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_bx_indirect_index: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - UINT f_abase; - UINT f_scale; - UINT f_index; - - f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); - f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); - f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); - - /* Record the fields for the semantic handler. */ - FLD (f_scale) = f_scale; - FLD (i_abase) = & CPU (h_gr)[f_abase]; - FLD (i_index) = & CPU (h_gr)[f_index]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bx_indirect_index", "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_abase) = f_abase; - FLD (in_index) = f_index; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_bx_disp: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - UINT f_optdisp; - /* Contents of trailing part of insn. */ - UINT word_1; - - word_1 = GETIMEMUSI (current_cpu, pc + 4); - f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); - - /* Record the fields for the semantic handler. */ - FLD (f_optdisp) = f_optdisp; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bx_disp", "f_optdisp 0x%x", 'x', f_optdisp, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_bx_indirect_disp: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - UINT f_optdisp; - UINT f_abase; - /* Contents of trailing part of insn. */ - UINT word_1; - - word_1 = GETIMEMUSI (current_cpu, pc + 4); - f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); - f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); - - /* Record the fields for the semantic handler. */ - FLD (f_optdisp) = f_optdisp; - FLD (i_abase) = & CPU (h_gr)[f_abase]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bx_indirect_disp", "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_abase) = f_abase; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_callx_disp: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_callx_disp.f - UINT f_optdisp; - /* Contents of trailing part of insn. */ - UINT word_1; - - word_1 = GETIMEMUSI (current_cpu, pc + 4); - f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); - - /* Record the fields for the semantic handler. */ - FLD (f_optdisp) = f_optdisp; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_callx_disp", "f_optdisp 0x%x", 'x', f_optdisp, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_h_gr_0) = 0; - FLD (in_h_gr_1) = 1; - FLD (in_h_gr_10) = 10; - FLD (in_h_gr_11) = 11; - FLD (in_h_gr_12) = 12; - FLD (in_h_gr_13) = 13; - FLD (in_h_gr_14) = 14; - FLD (in_h_gr_15) = 15; - FLD (in_h_gr_2) = 2; - FLD (in_h_gr_3) = 3; - FLD (in_h_gr_31) = 31; - FLD (in_h_gr_4) = 4; - FLD (in_h_gr_5) = 5; - FLD (in_h_gr_6) = 6; - FLD (in_h_gr_7) = 7; - FLD (in_h_gr_8) = 8; - FLD (in_h_gr_9) = 9; - FLD (out_h_gr_0) = 0; - FLD (out_h_gr_1) = 1; - FLD (out_h_gr_10) = 10; - FLD (out_h_gr_11) = 11; - FLD (out_h_gr_12) = 12; - FLD (out_h_gr_13) = 13; - FLD (out_h_gr_14) = 14; - FLD (out_h_gr_15) = 15; - FLD (out_h_gr_2) = 2; - FLD (out_h_gr_3) = 3; - FLD (out_h_gr_31) = 31; - FLD (out_h_gr_4) = 4; - FLD (out_h_gr_5) = 5; - FLD (out_h_gr_6) = 6; - FLD (out_h_gr_7) = 7; - FLD (out_h_gr_8) = 8; - FLD (out_h_gr_9) = 9; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_callx_indirect: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_callx_indirect_offset.f - UINT f_abase; - - f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); - - /* Record the fields for the semantic handler. */ - FLD (i_abase) = & CPU (h_gr)[f_abase]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_callx_indirect", "abase 0x%x", 'x', f_abase, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_abase) = f_abase; - FLD (in_h_gr_0) = 0; - FLD (in_h_gr_1) = 1; - FLD (in_h_gr_10) = 10; - FLD (in_h_gr_11) = 11; - FLD (in_h_gr_12) = 12; - FLD (in_h_gr_13) = 13; - FLD (in_h_gr_14) = 14; - FLD (in_h_gr_15) = 15; - FLD (in_h_gr_2) = 2; - FLD (in_h_gr_3) = 3; - FLD (in_h_gr_31) = 31; - FLD (in_h_gr_4) = 4; - FLD (in_h_gr_5) = 5; - FLD (in_h_gr_6) = 6; - FLD (in_h_gr_7) = 7; - FLD (in_h_gr_8) = 8; - FLD (in_h_gr_9) = 9; - FLD (out_h_gr_0) = 0; - FLD (out_h_gr_1) = 1; - FLD (out_h_gr_10) = 10; - FLD (out_h_gr_11) = 11; - FLD (out_h_gr_12) = 12; - FLD (out_h_gr_13) = 13; - FLD (out_h_gr_14) = 14; - FLD (out_h_gr_15) = 15; - FLD (out_h_gr_2) = 2; - FLD (out_h_gr_3) = 3; - FLD (out_h_gr_31) = 31; - FLD (out_h_gr_4) = 4; - FLD (out_h_gr_5) = 5; - FLD (out_h_gr_6) = 6; - FLD (out_h_gr_7) = 7; - FLD (out_h_gr_8) = 8; - FLD (out_h_gr_9) = 9; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_callx_indirect_offset: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_callx_indirect_offset.f - UINT f_abase; - UINT f_offset; - - f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); - f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12); - - /* Record the fields for the semantic handler. */ - FLD (f_offset) = f_offset; - FLD (i_abase) = & CPU (h_gr)[f_abase]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_callx_indirect_offset", "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_abase) = f_abase; - FLD (in_h_gr_0) = 0; - FLD (in_h_gr_1) = 1; - FLD (in_h_gr_10) = 10; - FLD (in_h_gr_11) = 11; - FLD (in_h_gr_12) = 12; - FLD (in_h_gr_13) = 13; - FLD (in_h_gr_14) = 14; - FLD (in_h_gr_15) = 15; - FLD (in_h_gr_2) = 2; - FLD (in_h_gr_3) = 3; - FLD (in_h_gr_31) = 31; - FLD (in_h_gr_4) = 4; - FLD (in_h_gr_5) = 5; - FLD (in_h_gr_6) = 6; - FLD (in_h_gr_7) = 7; - FLD (in_h_gr_8) = 8; - FLD (in_h_gr_9) = 9; - FLD (out_h_gr_0) = 0; - FLD (out_h_gr_1) = 1; - FLD (out_h_gr_10) = 10; - FLD (out_h_gr_11) = 11; - FLD (out_h_gr_12) = 12; - FLD (out_h_gr_13) = 13; - FLD (out_h_gr_14) = 14; - FLD (out_h_gr_15) = 15; - FLD (out_h_gr_2) = 2; - FLD (out_h_gr_3) = 3; - FLD (out_h_gr_31) = 31; - FLD (out_h_gr_4) = 4; - FLD (out_h_gr_5) = 5; - FLD (out_h_gr_6) = 6; - FLD (out_h_gr_7) = 7; - FLD (out_h_gr_8) = 8; - FLD (out_h_gr_9) = 9; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ret: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_callx_disp.f - - - /* Record the fields for the semantic handler. */ - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ret", (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_h_gr_0) = 0; - FLD (in_h_gr_2) = 2; - FLD (in_h_gr_31) = 31; - FLD (out_h_gr_0) = 0; - FLD (out_h_gr_1) = 1; - FLD (out_h_gr_10) = 10; - FLD (out_h_gr_11) = 11; - FLD (out_h_gr_12) = 12; - FLD (out_h_gr_13) = 13; - FLD (out_h_gr_14) = 14; - FLD (out_h_gr_15) = 15; - FLD (out_h_gr_2) = 2; - FLD (out_h_gr_3) = 3; - FLD (out_h_gr_31) = 31; - FLD (out_h_gr_4) = 4; - FLD (out_h_gr_5) = 5; - FLD (out_h_gr_6) = 6; - FLD (out_h_gr_7) = 7; - FLD (out_h_gr_8) = 8; - FLD (out_h_gr_9) = 9; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_calls: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_emul2.f - UINT f_src1; - - f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); - - /* Record the fields for the semantic handler. */ - FLD (i_src1) = & CPU (h_gr)[f_src1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_calls", "src1 0x%x", 'x', f_src1, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_src1) = f_src1; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_fmark: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_empty.f - - - /* Record the fields for the semantic handler. */ - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_fmark", (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_flushreg: - { - const IDESC *idesc = &i960base_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.fmt_empty.f - - - /* Record the fields for the semantic handler. */ - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_flushreg", (char *) 0)); - -#undef FLD - return idesc; - } - -} diff --git a/sim/i960/decode.h b/sim/i960/decode.h deleted file mode 100644 index e88e027..0000000 --- a/sim/i960/decode.h +++ /dev/null @@ -1,160 +0,0 @@ -/* Decode header for i960base. - -THIS FILE IS MACHINE GENERATED WITH CGEN. - -Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc. - -This file is part of the GNU Simulators. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -*/ - -#ifndef I960BASE_DECODE_H -#define I960BASE_DECODE_H - -extern const IDESC *i960base_decode (SIM_CPU *, IADDR, - CGEN_INSN_INT, - ARGBUF *); -extern void i960base_init_idesc_table (SIM_CPU *); -extern void i960base_sem_init_idesc_table (SIM_CPU *); -extern void i960base_semf_init_idesc_table (SIM_CPU *); - -/* Enum declaration for instructions in cpu family i960base. */ -typedef enum i960base_insn_type { - I960BASE_INSN_X_INVALID, I960BASE_INSN_X_AFTER, I960BASE_INSN_X_BEFORE, I960BASE_INSN_X_CTI_CHAIN - , I960BASE_INSN_X_CHAIN, I960BASE_INSN_X_BEGIN, I960BASE_INSN_MULO, I960BASE_INSN_MULO1 - , I960BASE_INSN_MULO2, I960BASE_INSN_MULO3, I960BASE_INSN_REMO, I960BASE_INSN_REMO1 - , I960BASE_INSN_REMO2, I960BASE_INSN_REMO3, I960BASE_INSN_DIVO, I960BASE_INSN_DIVO1 - , I960BASE_INSN_DIVO2, I960BASE_INSN_DIVO3, I960BASE_INSN_REMI, I960BASE_INSN_REMI1 - , I960BASE_INSN_REMI2, I960BASE_INSN_REMI3, I960BASE_INSN_DIVI, I960BASE_INSN_DIVI1 - , I960BASE_INSN_DIVI2, I960BASE_INSN_DIVI3, I960BASE_INSN_ADDO, I960BASE_INSN_ADDO1 - , I960BASE_INSN_ADDO2, I960BASE_INSN_ADDO3, I960BASE_INSN_SUBO, I960BASE_INSN_SUBO1 - , I960BASE_INSN_SUBO2, I960BASE_INSN_SUBO3, I960BASE_INSN_NOTBIT, I960BASE_INSN_NOTBIT1 - , I960BASE_INSN_NOTBIT2, I960BASE_INSN_NOTBIT3, I960BASE_INSN_AND, I960BASE_INSN_AND1 - , I960BASE_INSN_AND2, I960BASE_INSN_AND3, I960BASE_INSN_ANDNOT, I960BASE_INSN_ANDNOT1 - , I960BASE_INSN_ANDNOT2, I960BASE_INSN_ANDNOT3, I960BASE_INSN_SETBIT, I960BASE_INSN_SETBIT1 - , I960BASE_INSN_SETBIT2, I960BASE_INSN_SETBIT3, I960BASE_INSN_NOTAND, I960BASE_INSN_NOTAND1 - , I960BASE_INSN_NOTAND2, I960BASE_INSN_NOTAND3, I960BASE_INSN_XOR, I960BASE_INSN_XOR1 - , I960BASE_INSN_XOR2, I960BASE_INSN_XOR3, I960BASE_INSN_OR, I960BASE_INSN_OR1 - , I960BASE_INSN_OR2, I960BASE_INSN_OR3, I960BASE_INSN_NOR, I960BASE_INSN_NOR1 - , I960BASE_INSN_NOR2, I960BASE_INSN_NOR3, I960BASE_INSN_XNOR, I960BASE_INSN_XNOR1 - , I960BASE_INSN_XNOR2, I960BASE_INSN_XNOR3, I960BASE_INSN_NOT, I960BASE_INSN_NOT1 - , I960BASE_INSN_NOT2, I960BASE_INSN_NOT3, I960BASE_INSN_ORNOT, I960BASE_INSN_ORNOT1 - , I960BASE_INSN_ORNOT2, I960BASE_INSN_ORNOT3, I960BASE_INSN_CLRBIT, I960BASE_INSN_CLRBIT1 - , I960BASE_INSN_CLRBIT2, I960BASE_INSN_CLRBIT3, I960BASE_INSN_SHLO, I960BASE_INSN_SHLO1 - , I960BASE_INSN_SHLO2, I960BASE_INSN_SHLO3, I960BASE_INSN_SHRO, I960BASE_INSN_SHRO1 - , I960BASE_INSN_SHRO2, I960BASE_INSN_SHRO3, I960BASE_INSN_SHLI, I960BASE_INSN_SHLI1 - , I960BASE_INSN_SHLI2, I960BASE_INSN_SHLI3, I960BASE_INSN_SHRI, I960BASE_INSN_SHRI1 - , I960BASE_INSN_SHRI2, I960BASE_INSN_SHRI3, I960BASE_INSN_EMUL, I960BASE_INSN_EMUL1 - , I960BASE_INSN_EMUL2, I960BASE_INSN_EMUL3, I960BASE_INSN_MOV, I960BASE_INSN_MOV1 - , I960BASE_INSN_MOVL, I960BASE_INSN_MOVL1, I960BASE_INSN_MOVT, I960BASE_INSN_MOVT1 - , I960BASE_INSN_MOVQ, I960BASE_INSN_MOVQ1, I960BASE_INSN_MODPC, I960BASE_INSN_MODAC - , I960BASE_INSN_LDA_OFFSET, I960BASE_INSN_LDA_INDIRECT_OFFSET, I960BASE_INSN_LDA_INDIRECT, I960BASE_INSN_LDA_INDIRECT_INDEX - , I960BASE_INSN_LDA_DISP, I960BASE_INSN_LDA_INDIRECT_DISP, I960BASE_INSN_LDA_INDEX_DISP, I960BASE_INSN_LDA_INDIRECT_INDEX_DISP - , I960BASE_INSN_LD_OFFSET, I960BASE_INSN_LD_INDIRECT_OFFSET, I960BASE_INSN_LD_INDIRECT, I960BASE_INSN_LD_INDIRECT_INDEX - , I960BASE_INSN_LD_DISP, I960BASE_INSN_LD_INDIRECT_DISP, I960BASE_INSN_LD_INDEX_DISP, I960BASE_INSN_LD_INDIRECT_INDEX_DISP - , I960BASE_INSN_LDOB_OFFSET, I960BASE_INSN_LDOB_INDIRECT_OFFSET, I960BASE_INSN_LDOB_INDIRECT, I960BASE_INSN_LDOB_INDIRECT_INDEX - , I960BASE_INSN_LDOB_DISP, I960BASE_INSN_LDOB_INDIRECT_DISP, I960BASE_INSN_LDOB_INDEX_DISP, I960BASE_INSN_LDOB_INDIRECT_INDEX_DISP - , I960BASE_INSN_LDOS_OFFSET, I960BASE_INSN_LDOS_INDIRECT_OFFSET, I960BASE_INSN_LDOS_INDIRECT, I960BASE_INSN_LDOS_INDIRECT_INDEX - , I960BASE_INSN_LDOS_DISP, I960BASE_INSN_LDOS_INDIRECT_DISP, I960BASE_INSN_LDOS_INDEX_DISP, I960BASE_INSN_LDOS_INDIRECT_INDEX_DISP - , I960BASE_INSN_LDIB_OFFSET, I960BASE_INSN_LDIB_INDIRECT_OFFSET, I960BASE_INSN_LDIB_INDIRECT, I960BASE_INSN_LDIB_INDIRECT_INDEX - , I960BASE_INSN_LDIB_DISP, I960BASE_INSN_LDIB_INDIRECT_DISP, I960BASE_INSN_LDIB_INDEX_DISP, I960BASE_INSN_LDIB_INDIRECT_INDEX_DISP - , I960BASE_INSN_LDIS_OFFSET, I960BASE_INSN_LDIS_INDIRECT_OFFSET, I960BASE_INSN_LDIS_INDIRECT, I960BASE_INSN_LDIS_INDIRECT_INDEX - , I960BASE_INSN_LDIS_DISP, I960BASE_INSN_LDIS_INDIRECT_DISP, I960BASE_INSN_LDIS_INDEX_DISP, I960BASE_INSN_LDIS_INDIRECT_INDEX_DISP - , I960BASE_INSN_LDL_OFFSET, I960BASE_INSN_LDL_INDIRECT_OFFSET, I960BASE_INSN_LDL_INDIRECT, I960BASE_INSN_LDL_INDIRECT_INDEX - , I960BASE_INSN_LDL_DISP, I960BASE_INSN_LDL_INDIRECT_DISP, I960BASE_INSN_LDL_INDEX_DISP, I960BASE_INSN_LDL_INDIRECT_INDEX_DISP - , I960BASE_INSN_LDT_OFFSET, I960BASE_INSN_LDT_INDIRECT_OFFSET, I960BASE_INSN_LDT_INDIRECT, I960BASE_INSN_LDT_INDIRECT_INDEX - , I960BASE_INSN_LDT_DISP, I960BASE_INSN_LDT_INDIRECT_DISP, I960BASE_INSN_LDT_INDEX_DISP, I960BASE_INSN_LDT_INDIRECT_INDEX_DISP - , I960BASE_INSN_LDQ_OFFSET, I960BASE_INSN_LDQ_INDIRECT_OFFSET, I960BASE_INSN_LDQ_INDIRECT, I960BASE_INSN_LDQ_INDIRECT_INDEX - , I960BASE_INSN_LDQ_DISP, I960BASE_INSN_LDQ_INDIRECT_DISP, I960BASE_INSN_LDQ_INDEX_DISP, I960BASE_INSN_LDQ_INDIRECT_INDEX_DISP - , I960BASE_INSN_ST_OFFSET, I960BASE_INSN_ST_INDIRECT_OFFSET, I960BASE_INSN_ST_INDIRECT, I960BASE_INSN_ST_INDIRECT_INDEX - , I960BASE_INSN_ST_DISP, I960BASE_INSN_ST_INDIRECT_DISP, I960BASE_INSN_ST_INDEX_DISP, I960BASE_INSN_ST_INDIRECT_INDEX_DISP - , I960BASE_INSN_STOB_OFFSET, I960BASE_INSN_STOB_INDIRECT_OFFSET, I960BASE_INSN_STOB_INDIRECT, I960BASE_INSN_STOB_INDIRECT_INDEX - , I960BASE_INSN_STOB_DISP, I960BASE_INSN_STOB_INDIRECT_DISP, I960BASE_INSN_STOB_INDEX_DISP, I960BASE_INSN_STOB_INDIRECT_INDEX_DISP - , I960BASE_INSN_STOS_OFFSET, I960BASE_INSN_STOS_INDIRECT_OFFSET, I960BASE_INSN_STOS_INDIRECT, I960BASE_INSN_STOS_INDIRECT_INDEX - , I960BASE_INSN_STOS_DISP, I960BASE_INSN_STOS_INDIRECT_DISP, I960BASE_INSN_STOS_INDEX_DISP, I960BASE_INSN_STOS_INDIRECT_INDEX_DISP - , I960BASE_INSN_STL_OFFSET, I960BASE_INSN_STL_INDIRECT_OFFSET, I960BASE_INSN_STL_INDIRECT, I960BASE_INSN_STL_INDIRECT_INDEX - , I960BASE_INSN_STL_DISP, I960BASE_INSN_STL_INDIRECT_DISP, I960BASE_INSN_STL_INDEX_DISP, I960BASE_INSN_STL_INDIRECT_INDEX_DISP - , I960BASE_INSN_STT_OFFSET, I960BASE_INSN_STT_INDIRECT_OFFSET, I960BASE_INSN_STT_INDIRECT, I960BASE_INSN_STT_INDIRECT_INDEX - , I960BASE_INSN_STT_DISP, I960BASE_INSN_STT_INDIRECT_DISP, I960BASE_INSN_STT_INDEX_DISP, I960BASE_INSN_STT_INDIRECT_INDEX_DISP - , I960BASE_INSN_STQ_OFFSET, I960BASE_INSN_STQ_INDIRECT_OFFSET, I960BASE_INSN_STQ_INDIRECT, I960BASE_INSN_STQ_INDIRECT_INDEX - , I960BASE_INSN_STQ_DISP, I960BASE_INSN_STQ_INDIRECT_DISP, I960BASE_INSN_STQ_INDEX_DISP, I960BASE_INSN_STQ_INDIRECT_INDEX_DISP - , I960BASE_INSN_CMPOBE_REG, I960BASE_INSN_CMPOBE_LIT, I960BASE_INSN_CMPOBNE_REG, I960BASE_INSN_CMPOBNE_LIT - , I960BASE_INSN_CMPOBL_REG, I960BASE_INSN_CMPOBL_LIT, I960BASE_INSN_CMPOBLE_REG, I960BASE_INSN_CMPOBLE_LIT - , I960BASE_INSN_CMPOBG_REG, I960BASE_INSN_CMPOBG_LIT, I960BASE_INSN_CMPOBGE_REG, I960BASE_INSN_CMPOBGE_LIT - , I960BASE_INSN_CMPIBE_REG, I960BASE_INSN_CMPIBE_LIT, I960BASE_INSN_CMPIBNE_REG, I960BASE_INSN_CMPIBNE_LIT - , I960BASE_INSN_CMPIBL_REG, I960BASE_INSN_CMPIBL_LIT, I960BASE_INSN_CMPIBLE_REG, I960BASE_INSN_CMPIBLE_LIT - , I960BASE_INSN_CMPIBG_REG, I960BASE_INSN_CMPIBG_LIT, I960BASE_INSN_CMPIBGE_REG, I960BASE_INSN_CMPIBGE_LIT - , I960BASE_INSN_BBC_REG, I960BASE_INSN_BBC_LIT, I960BASE_INSN_BBS_REG, I960BASE_INSN_BBS_LIT - , I960BASE_INSN_CMPI, I960BASE_INSN_CMPI1, I960BASE_INSN_CMPI2, I960BASE_INSN_CMPI3 - , I960BASE_INSN_CMPO, I960BASE_INSN_CMPO1, I960BASE_INSN_CMPO2, I960BASE_INSN_CMPO3 - , I960BASE_INSN_TESTNO_REG, I960BASE_INSN_TESTG_REG, I960BASE_INSN_TESTE_REG, I960BASE_INSN_TESTGE_REG - , I960BASE_INSN_TESTL_REG, I960BASE_INSN_TESTNE_REG, I960BASE_INSN_TESTLE_REG, I960BASE_INSN_TESTO_REG - , I960BASE_INSN_BNO, I960BASE_INSN_BG, I960BASE_INSN_BE, I960BASE_INSN_BGE - , I960BASE_INSN_BL, I960BASE_INSN_BNE, I960BASE_INSN_BLE, I960BASE_INSN_BO - , I960BASE_INSN_B, I960BASE_INSN_BX_INDIRECT_OFFSET, I960BASE_INSN_BX_INDIRECT, I960BASE_INSN_BX_INDIRECT_INDEX - , I960BASE_INSN_BX_DISP, I960BASE_INSN_BX_INDIRECT_DISP, I960BASE_INSN_CALLX_DISP, I960BASE_INSN_CALLX_INDIRECT - , I960BASE_INSN_CALLX_INDIRECT_OFFSET, I960BASE_INSN_RET, I960BASE_INSN_CALLS, I960BASE_INSN_FMARK - , I960BASE_INSN_FLUSHREG, I960BASE_INSN_MAX -} I960BASE_INSN_TYPE; - -/* Enum declaration for semantic formats in cpu family i960base. */ -typedef enum i960base_sfmt_type { - I960BASE_SFMT_EMPTY, I960BASE_SFMT_MULO, I960BASE_SFMT_MULO1, I960BASE_SFMT_MULO2 - , I960BASE_SFMT_MULO3, I960BASE_SFMT_NOTBIT, I960BASE_SFMT_NOTBIT1, I960BASE_SFMT_NOTBIT2 - , I960BASE_SFMT_NOTBIT3, I960BASE_SFMT_NOT, I960BASE_SFMT_NOT1, I960BASE_SFMT_SHLO - , I960BASE_SFMT_SHLO1, I960BASE_SFMT_SHLO2, I960BASE_SFMT_SHLO3, I960BASE_SFMT_EMUL - , I960BASE_SFMT_EMUL1, I960BASE_SFMT_EMUL2, I960BASE_SFMT_EMUL3, I960BASE_SFMT_MOVL - , I960BASE_SFMT_MOVL1, I960BASE_SFMT_MOVT, I960BASE_SFMT_MOVT1, I960BASE_SFMT_MOVQ - , I960BASE_SFMT_MOVQ1, I960BASE_SFMT_MODPC, I960BASE_SFMT_LDA_OFFSET, I960BASE_SFMT_LDA_INDIRECT_OFFSET - , I960BASE_SFMT_LDA_INDIRECT, I960BASE_SFMT_LDA_INDIRECT_INDEX, I960BASE_SFMT_LDA_DISP, I960BASE_SFMT_LDA_INDIRECT_DISP - , I960BASE_SFMT_LDA_INDEX_DISP, I960BASE_SFMT_LDA_INDIRECT_INDEX_DISP, I960BASE_SFMT_LD_OFFSET, I960BASE_SFMT_LD_INDIRECT_OFFSET - , I960BASE_SFMT_LD_INDIRECT, I960BASE_SFMT_LD_INDIRECT_INDEX, I960BASE_SFMT_LD_DISP, I960BASE_SFMT_LD_INDIRECT_DISP - , I960BASE_SFMT_LD_INDEX_DISP, I960BASE_SFMT_LD_INDIRECT_INDEX_DISP, I960BASE_SFMT_LDL_OFFSET, I960BASE_SFMT_LDL_INDIRECT_OFFSET - , I960BASE_SFMT_LDL_INDIRECT, I960BASE_SFMT_LDL_INDIRECT_INDEX, I960BASE_SFMT_LDL_DISP, I960BASE_SFMT_LDL_INDIRECT_DISP - , I960BASE_SFMT_LDL_INDEX_DISP, I960BASE_SFMT_LDL_INDIRECT_INDEX_DISP, I960BASE_SFMT_LDT_OFFSET, I960BASE_SFMT_LDT_INDIRECT_OFFSET - , I960BASE_SFMT_LDT_INDIRECT, I960BASE_SFMT_LDT_INDIRECT_INDEX, I960BASE_SFMT_LDT_DISP, I960BASE_SFMT_LDT_INDIRECT_DISP - , I960BASE_SFMT_LDT_INDEX_DISP, I960BASE_SFMT_LDT_INDIRECT_INDEX_DISP, I960BASE_SFMT_LDQ_OFFSET, I960BASE_SFMT_LDQ_INDIRECT_OFFSET - , I960BASE_SFMT_LDQ_INDIRECT, I960BASE_SFMT_LDQ_INDIRECT_INDEX, I960BASE_SFMT_LDQ_DISP, I960BASE_SFMT_LDQ_INDIRECT_DISP - , I960BASE_SFMT_LDQ_INDEX_DISP, I960BASE_SFMT_LDQ_INDIRECT_INDEX_DISP, I960BASE_SFMT_ST_OFFSET, I960BASE_SFMT_ST_INDIRECT_OFFSET - , I960BASE_SFMT_ST_INDIRECT, I960BASE_SFMT_ST_INDIRECT_INDEX, I960BASE_SFMT_ST_DISP, I960BASE_SFMT_ST_INDIRECT_DISP - , I960BASE_SFMT_ST_INDEX_DISP, I960BASE_SFMT_ST_INDIRECT_INDEX_DISP, I960BASE_SFMT_STL_OFFSET, I960BASE_SFMT_STL_INDIRECT_OFFSET - , I960BASE_SFMT_STL_INDIRECT, I960BASE_SFMT_STL_INDIRECT_INDEX, I960BASE_SFMT_STL_DISP, I960BASE_SFMT_STL_INDIRECT_DISP - , I960BASE_SFMT_STL_INDEX_DISP, I960BASE_SFMT_STL_INDIRECT_INDEX_DISP, I960BASE_SFMT_STT_OFFSET, I960BASE_SFMT_STT_INDIRECT_OFFSET - , I960BASE_SFMT_STT_INDIRECT, I960BASE_SFMT_STT_INDIRECT_INDEX, I960BASE_SFMT_STT_DISP, I960BASE_SFMT_STT_INDIRECT_DISP - , I960BASE_SFMT_STT_INDEX_DISP, I960BASE_SFMT_STT_INDIRECT_INDEX_DISP, I960BASE_SFMT_STQ_OFFSET, I960BASE_SFMT_STQ_INDIRECT_OFFSET - , I960BASE_SFMT_STQ_INDIRECT, I960BASE_SFMT_STQ_INDIRECT_INDEX, I960BASE_SFMT_STQ_DISP, I960BASE_SFMT_STQ_INDIRECT_DISP - , I960BASE_SFMT_STQ_INDEX_DISP, I960BASE_SFMT_STQ_INDIRECT_INDEX_DISP, I960BASE_SFMT_CMPOBE_REG, I960BASE_SFMT_CMPOBE_LIT - , I960BASE_SFMT_CMPOBL_REG, I960BASE_SFMT_CMPOBL_LIT, I960BASE_SFMT_BBC_REG, I960BASE_SFMT_BBC_LIT - , I960BASE_SFMT_CMPI, I960BASE_SFMT_CMPI1, I960BASE_SFMT_CMPI2, I960BASE_SFMT_CMPI3 - , I960BASE_SFMT_CMPO, I960BASE_SFMT_CMPO1, I960BASE_SFMT_CMPO2, I960BASE_SFMT_CMPO3 - , I960BASE_SFMT_TESTNO_REG, I960BASE_SFMT_BNO, I960BASE_SFMT_B, I960BASE_SFMT_BX_INDIRECT_OFFSET - , I960BASE_SFMT_BX_INDIRECT, I960BASE_SFMT_BX_INDIRECT_INDEX, I960BASE_SFMT_BX_DISP, I960BASE_SFMT_BX_INDIRECT_DISP - , I960BASE_SFMT_CALLX_DISP, I960BASE_SFMT_CALLX_INDIRECT, I960BASE_SFMT_CALLX_INDIRECT_OFFSET, I960BASE_SFMT_RET - , I960BASE_SFMT_CALLS, I960BASE_SFMT_FMARK, I960BASE_SFMT_FLUSHREG -} I960BASE_SFMT_TYPE; - -/* Function unit handlers (user written). */ - -extern int i960base_model_i960KA_u_exec (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/); -extern int i960base_model_i960CA_u_exec (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/); - -/* Profiling before/after handlers (user written) */ - -extern void i960base_model_insn_before (SIM_CPU *, int /*first_p*/); -extern void i960base_model_insn_after (SIM_CPU *, int /*last_p*/, int /*cycles*/); - -#endif /* I960BASE_DECODE_H */ diff --git a/sim/i960/devices.c b/sim/i960/devices.c deleted file mode 100644 index 0a47569..0000000 --- a/sim/i960/devices.c +++ /dev/null @@ -1,107 +0,0 @@ -/* i960 device support - Copyright (C) 1997, 1998, 1999 Free Software Foundation, Inc. - Contributed by Cygnus Solutions. - -This file is part of GDB, the GNU debugger. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ - -#include "sim-main.h" - -#ifdef HAVE_DV_SOCKSER -#include "dv-sockser.h" -#endif - -/* Handling the MSPR register is done by creating a device in the core - mapping that winds up here. */ - -device i960_devices; - -int -device_io_read_buffer (device *me, void *source, int space, - address_word addr, unsigned nr_bytes, - SIM_DESC sd, SIM_CPU *cpu, sim_cia cia) -{ - if (STATE_ENVIRONMENT (sd) != OPERATING_ENVIRONMENT) - return nr_bytes; - -#ifdef HAVE_DV_SOCKSER - if (addr == UART_INCHAR_ADDR) - { - int c = dv_sockser_read (sd); - if (c == -1) - return 0; - *(char *) source = c; - return 1; - } - if (addr == UART_STATUS_ADDR) - { - int status = dv_sockser_status (sd); - unsigned char *p = source; - p[0] = 0; - p[1] = (((status & DV_SOCKSER_INPUT_EMPTY) -#ifdef UART_INPUT_READY0 - ? UART_INPUT_READY : 0) -#else - ? 0 : UART_INPUT_READY) -#endif - + ((status & DV_SOCKSER_OUTPUT_EMPTY) ? UART_OUTPUT_READY : 0)); - return 2; - } -#endif - - return nr_bytes; -} - -int -device_io_write_buffer (device *me, const void *source, int space, - address_word addr, unsigned nr_bytes, - SIM_DESC sd, SIM_CPU *cpu, sim_cia cia) -{ -#if WITH_SCACHE - /* MSPR support is deprecated but is kept in for upward compatibility - with existing overlay support. */ - if (addr == MSPR_ADDR) - { - if ((*(const char *) source & MSPR_PURGE) != 0) - scache_flush (sd); - return nr_bytes; - } - if (addr == MCCR_ADDR) - { - if ((*(const char *) source & MCCR_CP) != 0) - scache_flush (sd); - return nr_bytes; - } -#endif - - if (STATE_ENVIRONMENT (sd) != OPERATING_ENVIRONMENT) - return nr_bytes; - -#if HAVE_DV_SOCKSER - if (addr == UART_OUTCHAR_ADDR) - { - int rc = dv_sockser_write (sd, *(char *) source); - return rc == 1; - } -#endif - - return nr_bytes; -} - -void -device_error (device *me, char *message, ...) -{ -} diff --git a/sim/i960/i960-desc.c b/sim/i960/i960-desc.c deleted file mode 100644 index cd0531a..0000000 --- a/sim/i960/i960-desc.c +++ /dev/null @@ -1,2106 +0,0 @@ -/* CPU data for i960. - -THIS FILE IS MACHINE GENERATED WITH CGEN. - -Copyright (C) 1996, 1997, 1998, 1999, 2001 Free Software Foundation, Inc. - -This file is part of the GNU Binutils and/or GDB, the GNU debugger. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -*/ - -#include "sysdep.h" -#include <ctype.h> -#include <stdio.h> -#include <stdarg.h> -#include "ansidecl.h" -#include "bfd.h" -#include "symcat.h" -#include "i960-desc.h" -#include "i960-opc.h" -#include "opintl.h" - -/* Attributes. */ - -static const CGEN_ATTR_ENTRY bool_attr[] = -{ - { "#f", 0 }, - { "#t", 1 }, - { 0, 0 } -}; - -static const CGEN_ATTR_ENTRY MACH_attr[] = -{ - { "base", MACH_BASE }, - { "i960_ka_sa", MACH_I960_KA_SA }, - { "i960_ca", MACH_I960_CA }, - { "max", MACH_MAX }, - { 0, 0 } -}; - -static const CGEN_ATTR_ENTRY ISA_attr[] = -{ - { "i960", ISA_I960 }, - { "max", ISA_MAX }, - { 0, 0 } -}; - -const CGEN_ATTR_TABLE i960_cgen_ifield_attr_table[] = -{ - { "MACH", & MACH_attr[0] }, - { "VIRTUAL", &bool_attr[0], &bool_attr[0] }, - { "PCREL-ADDR", &bool_attr[0], &bool_attr[0] }, - { "ABS-ADDR", &bool_attr[0], &bool_attr[0] }, - { "RESERVED", &bool_attr[0], &bool_attr[0] }, - { "SIGN-OPT", &bool_attr[0], &bool_attr[0] }, - { "SIGNED", &bool_attr[0], &bool_attr[0] }, - { 0, 0, 0 } -}; - -const CGEN_ATTR_TABLE i960_cgen_hardware_attr_table[] = -{ - { "MACH", & MACH_attr[0] }, - { "VIRTUAL", &bool_attr[0], &bool_attr[0] }, - { "CACHE-ADDR", &bool_attr[0], &bool_attr[0] }, - { "PC", &bool_attr[0], &bool_attr[0] }, - { "PROFILE", &bool_attr[0], &bool_attr[0] }, - { 0, 0, 0 } -}; - -const CGEN_ATTR_TABLE i960_cgen_operand_attr_table[] = -{ - { "MACH", & MACH_attr[0] }, - { "VIRTUAL", &bool_attr[0], &bool_attr[0] }, - { "PCREL-ADDR", &bool_attr[0], &bool_attr[0] }, - { "ABS-ADDR", &bool_attr[0], &bool_attr[0] }, - { "SIGN-OPT", &bool_attr[0], &bool_attr[0] }, - { "SIGNED", &bool_attr[0], &bool_attr[0] }, - { "NEGATIVE", &bool_attr[0], &bool_attr[0] }, - { "RELAX", &bool_attr[0], &bool_attr[0] }, - { "SEM-ONLY", &bool_attr[0], &bool_attr[0] }, - { 0, 0, 0 } -}; - -const CGEN_ATTR_TABLE i960_cgen_insn_attr_table[] = -{ - { "MACH", & MACH_attr[0] }, - { "ALIAS", &bool_attr[0], &bool_attr[0] }, - { "VIRTUAL", &bool_attr[0], &bool_attr[0] }, - { "UNCOND-CTI", &bool_attr[0], &bool_attr[0] }, - { "COND-CTI", &bool_attr[0], &bool_attr[0] }, - { "SKIP-CTI", &bool_attr[0], &bool_attr[0] }, - { "DELAY-SLOT", &bool_attr[0], &bool_attr[0] }, - { "RELAXABLE", &bool_attr[0], &bool_attr[0] }, - { "RELAX", &bool_attr[0], &bool_attr[0] }, - { "NO-DIS", &bool_attr[0], &bool_attr[0] }, - { "PBB", &bool_attr[0], &bool_attr[0] }, - { 0, 0, 0 } -}; - -/* Instruction set variants. */ - -static const CGEN_ISA i960_cgen_isa_table[] = { - { "i960", 32, 32, 32, 64, }, - { 0 } -}; - -/* Machine variants. */ - -static const CGEN_MACH i960_cgen_mach_table[] = { - { "i960:ka_sa", "i960:ka_sa", MACH_I960_KA_SA }, - { "i960:ca", "i960:ca", MACH_I960_CA }, - { 0 } -}; - -static CGEN_KEYWORD_ENTRY i960_cgen_opval_h_gr_entries[] = -{ - { "fp", 31 }, - { "sp", 1 }, - { "r0", 0 }, - { "r1", 1 }, - { "r2", 2 }, - { "r3", 3 }, - { "r4", 4 }, - { "r5", 5 }, - { "r6", 6 }, - { "r7", 7 }, - { "r8", 8 }, - { "r9", 9 }, - { "r10", 10 }, - { "r11", 11 }, - { "r12", 12 }, - { "r13", 13 }, - { "r14", 14 }, - { "r15", 15 }, - { "g0", 16 }, - { "g1", 17 }, - { "g2", 18 }, - { "g3", 19 }, - { "g4", 20 }, - { "g5", 21 }, - { "g6", 22 }, - { "g7", 23 }, - { "g8", 24 }, - { "g9", 25 }, - { "g10", 26 }, - { "g11", 27 }, - { "g12", 28 }, - { "g13", 29 }, - { "g14", 30 }, - { "g15", 31 } -}; - -CGEN_KEYWORD i960_cgen_opval_h_gr = -{ - & i960_cgen_opval_h_gr_entries[0], - 34 -}; - -static CGEN_KEYWORD_ENTRY i960_cgen_opval_h_cc_entries[] = -{ - { "cc", 0 } -}; - -CGEN_KEYWORD i960_cgen_opval_h_cc = -{ - & i960_cgen_opval_h_cc_entries[0], - 1 -}; - - - -/* The hardware table. */ - -#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE) -#define A(a) (1 << CGEN_HW_##a) -#else -#define A(a) (1 << CGEN_HW_/**/a) -#endif - -const CGEN_HW_ENTRY i960_cgen_hw_table[] = -{ - { "h-memory", HW_H_MEMORY, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } }, - { "h-sint", HW_H_SINT, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } }, - { "h-uint", HW_H_UINT, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } }, - { "h-addr", HW_H_ADDR, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } }, - { "h-iaddr", HW_H_IADDR, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } }, - { "h-pc", HW_H_PC, CGEN_ASM_NONE, 0, { 0|A(PROFILE)|A(PC), { (1<<MACH_BASE) } } }, - { "h-gr", HW_H_GR, CGEN_ASM_KEYWORD, (PTR) & i960_cgen_opval_h_gr, { 0|A(CACHE_ADDR)|A(PROFILE), { (1<<MACH_BASE) } } }, - { "h-cc", HW_H_CC, CGEN_ASM_KEYWORD, (PTR) & i960_cgen_opval_h_cc, { 0|A(CACHE_ADDR)|A(PROFILE), { (1<<MACH_BASE) } } }, - { 0 } -}; - -#undef A - -/* The instruction field table. */ - -#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE) -#define A(a) (1 << CGEN_IFLD_##a) -#else -#define A(a) (1 << CGEN_IFLD_/**/a) -#endif - -const CGEN_IFLD i960_cgen_ifld_table[] = -{ - { I960_F_NIL, "f-nil", 0, 0, 0, 0, { 0, { (1<<MACH_BASE) } } }, - { I960_F_OPCODE, "f-opcode", 0, 32, 0, 8, { 0, { (1<<MACH_BASE) } } }, - { I960_F_SRCDST, "f-srcdst", 0, 32, 8, 5, { 0, { (1<<MACH_BASE) } } }, - { I960_F_SRC2, "f-src2", 0, 32, 13, 5, { 0, { (1<<MACH_BASE) } } }, - { I960_F_M3, "f-m3", 0, 32, 18, 1, { 0, { (1<<MACH_BASE) } } }, - { I960_F_M2, "f-m2", 0, 32, 19, 1, { 0, { (1<<MACH_BASE) } } }, - { I960_F_M1, "f-m1", 0, 32, 20, 1, { 0, { (1<<MACH_BASE) } } }, - { I960_F_OPCODE2, "f-opcode2", 0, 32, 21, 4, { 0, { (1<<MACH_BASE) } } }, - { I960_F_ZERO, "f-zero", 0, 32, 25, 2, { 0, { (1<<MACH_BASE) } } }, - { I960_F_SRC1, "f-src1", 0, 32, 27, 5, { 0, { (1<<MACH_BASE) } } }, - { I960_F_ABASE, "f-abase", 0, 32, 13, 5, { 0, { (1<<MACH_BASE) } } }, - { I960_F_MODEA, "f-modea", 0, 32, 18, 1, { 0, { (1<<MACH_BASE) } } }, - { I960_F_ZEROA, "f-zeroa", 0, 32, 19, 1, { 0, { (1<<MACH_BASE) } } }, - { I960_F_OFFSET, "f-offset", 0, 32, 20, 12, { 0, { (1<<MACH_BASE) } } }, - { I960_F_MODEB, "f-modeb", 0, 32, 18, 4, { 0, { (1<<MACH_BASE) } } }, - { I960_F_SCALE, "f-scale", 0, 32, 22, 3, { 0, { (1<<MACH_BASE) } } }, - { I960_F_ZEROB, "f-zerob", 0, 32, 25, 2, { 0, { (1<<MACH_BASE) } } }, - { I960_F_INDEX, "f-index", 0, 32, 27, 5, { 0, { (1<<MACH_BASE) } } }, - { I960_F_OPTDISP, "f-optdisp", 32, 32, 0, 32, { 0, { (1<<MACH_BASE) } } }, - { I960_F_BR_SRC1, "f-br-src1", 0, 32, 8, 5, { 0, { (1<<MACH_BASE) } } }, - { I960_F_BR_SRC2, "f-br-src2", 0, 32, 13, 5, { 0, { (1<<MACH_BASE) } } }, - { I960_F_BR_M1, "f-br-m1", 0, 32, 18, 1, { 0, { (1<<MACH_BASE) } } }, - { I960_F_BR_DISP, "f-br-disp", 0, 32, 19, 11, { 0|A(PCREL_ADDR), { (1<<MACH_BASE) } } }, - { I960_F_BR_ZERO, "f-br-zero", 0, 32, 30, 2, { 0, { (1<<MACH_BASE) } } }, - { I960_F_CTRL_DISP, "f-ctrl-disp", 0, 32, 8, 22, { 0|A(PCREL_ADDR), { (1<<MACH_BASE) } } }, - { I960_F_CTRL_ZERO, "f-ctrl-zero", 0, 32, 30, 2, { 0, { (1<<MACH_BASE) } } }, - { 0 } -}; - -#undef A - -/* The operand table. */ - -#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE) -#define A(a) (1 << CGEN_OPERAND_##a) -#else -#define A(a) (1 << CGEN_OPERAND_/**/a) -#endif -#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE) -#define OPERAND(op) I960_OPERAND_##op -#else -#define OPERAND(op) I960_OPERAND_/**/op -#endif - -const CGEN_OPERAND i960_cgen_operand_table[] = -{ -/* pc: program counter */ - { "pc", I960_OPERAND_PC, HW_H_PC, 0, 0, - { 0|A(SEM_ONLY), { (1<<MACH_BASE) } } }, -/* src1: source register 1 */ - { "src1", I960_OPERAND_SRC1, HW_H_GR, 27, 5, - { 0, { (1<<MACH_BASE) } } }, -/* src2: source register 2 */ - { "src2", I960_OPERAND_SRC2, HW_H_GR, 13, 5, - { 0, { (1<<MACH_BASE) } } }, -/* dst: source/dest register */ - { "dst", I960_OPERAND_DST, HW_H_GR, 8, 5, - { 0, { (1<<MACH_BASE) } } }, -/* lit1: literal 1 */ - { "lit1", I960_OPERAND_LIT1, HW_H_UINT, 27, 5, - { 0, { (1<<MACH_BASE) } } }, -/* lit2: literal 2 */ - { "lit2", I960_OPERAND_LIT2, HW_H_UINT, 13, 5, - { 0, { (1<<MACH_BASE) } } }, -/* st_src: store src */ - { "st_src", I960_OPERAND_ST_SRC, HW_H_GR, 8, 5, - { 0, { (1<<MACH_BASE) } } }, -/* abase: abase */ - { "abase", I960_OPERAND_ABASE, HW_H_GR, 13, 5, - { 0, { (1<<MACH_BASE) } } }, -/* offset: offset */ - { "offset", I960_OPERAND_OFFSET, HW_H_UINT, 20, 12, - { 0, { (1<<MACH_BASE) } } }, -/* scale: scale */ - { "scale", I960_OPERAND_SCALE, HW_H_UINT, 22, 3, - { 0, { (1<<MACH_BASE) } } }, -/* index: index */ - { "index", I960_OPERAND_INDEX, HW_H_GR, 27, 5, - { 0, { (1<<MACH_BASE) } } }, -/* optdisp: optional displacement */ - { "optdisp", I960_OPERAND_OPTDISP, HW_H_UINT, 0, 32, - { 0, { (1<<MACH_BASE) } } }, -/* br_src1: branch src1 */ - { "br_src1", I960_OPERAND_BR_SRC1, HW_H_GR, 8, 5, - { 0, { (1<<MACH_BASE) } } }, -/* br_src2: branch src2 */ - { "br_src2", I960_OPERAND_BR_SRC2, HW_H_GR, 13, 5, - { 0, { (1<<MACH_BASE) } } }, -/* br_disp: branch displacement */ - { "br_disp", I960_OPERAND_BR_DISP, HW_H_IADDR, 19, 11, - { 0|A(PCREL_ADDR), { (1<<MACH_BASE) } } }, -/* br_lit1: branch literal 1 */ - { "br_lit1", I960_OPERAND_BR_LIT1, HW_H_UINT, 8, 5, - { 0, { (1<<MACH_BASE) } } }, -/* ctrl_disp: ctrl branch disp */ - { "ctrl_disp", I960_OPERAND_CTRL_DISP, HW_H_IADDR, 8, 22, - { 0|A(PCREL_ADDR), { (1<<MACH_BASE) } } }, - { 0 } -}; - -#undef A - -#define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field)) -#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE) -#define A(a) (1 << CGEN_INSN_##a) -#else -#define A(a) (1 << CGEN_INSN_/**/a) -#endif - -/* The instruction table. */ - -static const CGEN_IBASE i960_cgen_insn_table[MAX_INSNS] = -{ - /* Special null first entry. - A `num' value of zero is thus invalid. - Also, the special `invalid' insn resides here. */ - { 0, 0, 0 }, -/* mulo $src1, $src2, $dst */ - { - I960_INSN_MULO, "mulo", "mulo", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* mulo $lit1, $src2, $dst */ - { - I960_INSN_MULO1, "mulo1", "mulo", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* mulo $src1, $lit2, $dst */ - { - I960_INSN_MULO2, "mulo2", "mulo", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* mulo $lit1, $lit2, $dst */ - { - I960_INSN_MULO3, "mulo3", "mulo", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* remo $src1, $src2, $dst */ - { - I960_INSN_REMO, "remo", "remo", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* remo $lit1, $src2, $dst */ - { - I960_INSN_REMO1, "remo1", "remo", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* remo $src1, $lit2, $dst */ - { - I960_INSN_REMO2, "remo2", "remo", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* remo $lit1, $lit2, $dst */ - { - I960_INSN_REMO3, "remo3", "remo", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* divo $src1, $src2, $dst */ - { - I960_INSN_DIVO, "divo", "divo", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* divo $lit1, $src2, $dst */ - { - I960_INSN_DIVO1, "divo1", "divo", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* divo $src1, $lit2, $dst */ - { - I960_INSN_DIVO2, "divo2", "divo", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* divo $lit1, $lit2, $dst */ - { - I960_INSN_DIVO3, "divo3", "divo", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* remi $src1, $src2, $dst */ - { - I960_INSN_REMI, "remi", "remi", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* remi $lit1, $src2, $dst */ - { - I960_INSN_REMI1, "remi1", "remi", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* remi $src1, $lit2, $dst */ - { - I960_INSN_REMI2, "remi2", "remi", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* remi $lit1, $lit2, $dst */ - { - I960_INSN_REMI3, "remi3", "remi", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* divi $src1, $src2, $dst */ - { - I960_INSN_DIVI, "divi", "divi", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* divi $lit1, $src2, $dst */ - { - I960_INSN_DIVI1, "divi1", "divi", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* divi $src1, $lit2, $dst */ - { - I960_INSN_DIVI2, "divi2", "divi", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* divi $lit1, $lit2, $dst */ - { - I960_INSN_DIVI3, "divi3", "divi", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* addo $src1, $src2, $dst */ - { - I960_INSN_ADDO, "addo", "addo", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* addo $lit1, $src2, $dst */ - { - I960_INSN_ADDO1, "addo1", "addo", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* addo $src1, $lit2, $dst */ - { - I960_INSN_ADDO2, "addo2", "addo", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* addo $lit1, $lit2, $dst */ - { - I960_INSN_ADDO3, "addo3", "addo", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* subo $src1, $src2, $dst */ - { - I960_INSN_SUBO, "subo", "subo", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* subo $lit1, $src2, $dst */ - { - I960_INSN_SUBO1, "subo1", "subo", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* subo $src1, $lit2, $dst */ - { - I960_INSN_SUBO2, "subo2", "subo", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* subo $lit1, $lit2, $dst */ - { - I960_INSN_SUBO3, "subo3", "subo", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* notbit $src1, $src2, $dst */ - { - I960_INSN_NOTBIT, "notbit", "notbit", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* notbit $lit1, $src2, $dst */ - { - I960_INSN_NOTBIT1, "notbit1", "notbit", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* notbit $src1, $lit2, $dst */ - { - I960_INSN_NOTBIT2, "notbit2", "notbit", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* notbit $lit1, $lit2, $dst */ - { - I960_INSN_NOTBIT3, "notbit3", "notbit", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* and $src1, $src2, $dst */ - { - I960_INSN_AND, "and", "and", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* and $lit1, $src2, $dst */ - { - I960_INSN_AND1, "and1", "and", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* and $src1, $lit2, $dst */ - { - I960_INSN_AND2, "and2", "and", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* and $lit1, $lit2, $dst */ - { - I960_INSN_AND3, "and3", "and", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* andnot $src1, $src2, $dst */ - { - I960_INSN_ANDNOT, "andnot", "andnot", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* andnot $lit1, $src2, $dst */ - { - I960_INSN_ANDNOT1, "andnot1", "andnot", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* andnot $src1, $lit2, $dst */ - { - I960_INSN_ANDNOT2, "andnot2", "andnot", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* andnot $lit1, $lit2, $dst */ - { - I960_INSN_ANDNOT3, "andnot3", "andnot", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* setbit $src1, $src2, $dst */ - { - I960_INSN_SETBIT, "setbit", "setbit", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* setbit $lit1, $src2, $dst */ - { - I960_INSN_SETBIT1, "setbit1", "setbit", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* setbit $src1, $lit2, $dst */ - { - I960_INSN_SETBIT2, "setbit2", "setbit", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* setbit $lit1, $lit2, $dst */ - { - I960_INSN_SETBIT3, "setbit3", "setbit", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* notand $src1, $src2, $dst */ - { - I960_INSN_NOTAND, "notand", "notand", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* notand $lit1, $src2, $dst */ - { - I960_INSN_NOTAND1, "notand1", "notand", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* notand $src1, $lit2, $dst */ - { - I960_INSN_NOTAND2, "notand2", "notand", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* notand $lit1, $lit2, $dst */ - { - I960_INSN_NOTAND3, "notand3", "notand", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* xor $src1, $src2, $dst */ - { - I960_INSN_XOR, "xor", "xor", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* xor $lit1, $src2, $dst */ - { - I960_INSN_XOR1, "xor1", "xor", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* xor $src1, $lit2, $dst */ - { - I960_INSN_XOR2, "xor2", "xor", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* xor $lit1, $lit2, $dst */ - { - I960_INSN_XOR3, "xor3", "xor", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* or $src1, $src2, $dst */ - { - I960_INSN_OR, "or", "or", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* or $lit1, $src2, $dst */ - { - I960_INSN_OR1, "or1", "or", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* or $src1, $lit2, $dst */ - { - I960_INSN_OR2, "or2", "or", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* or $lit1, $lit2, $dst */ - { - I960_INSN_OR3, "or3", "or", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* nor $src1, $src2, $dst */ - { - I960_INSN_NOR, "nor", "nor", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* nor $lit1, $src2, $dst */ - { - I960_INSN_NOR1, "nor1", "nor", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* nor $src1, $lit2, $dst */ - { - I960_INSN_NOR2, "nor2", "nor", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* nor $lit1, $lit2, $dst */ - { - I960_INSN_NOR3, "nor3", "nor", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* xnor $src1, $src2, $dst */ - { - I960_INSN_XNOR, "xnor", "xnor", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* xnor $lit1, $src2, $dst */ - { - I960_INSN_XNOR1, "xnor1", "xnor", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* xnor $src1, $lit2, $dst */ - { - I960_INSN_XNOR2, "xnor2", "xnor", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* xnor $lit1, $lit2, $dst */ - { - I960_INSN_XNOR3, "xnor3", "xnor", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* not $src1, $src2, $dst */ - { - I960_INSN_NOT, "not", "not", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* not $lit1, $src2, $dst */ - { - I960_INSN_NOT1, "not1", "not", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* not $src1, $lit2, $dst */ - { - I960_INSN_NOT2, "not2", "not", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* not $lit1, $lit2, $dst */ - { - I960_INSN_NOT3, "not3", "not", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* ornot $src1, $src2, $dst */ - { - I960_INSN_ORNOT, "ornot", "ornot", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* ornot $lit1, $src2, $dst */ - { - I960_INSN_ORNOT1, "ornot1", "ornot", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* ornot $src1, $lit2, $dst */ - { - I960_INSN_ORNOT2, "ornot2", "ornot", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* ornot $lit1, $lit2, $dst */ - { - I960_INSN_ORNOT3, "ornot3", "ornot", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* clrbit $src1, $src2, $dst */ - { - I960_INSN_CLRBIT, "clrbit", "clrbit", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* clrbit $lit1, $src2, $dst */ - { - I960_INSN_CLRBIT1, "clrbit1", "clrbit", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* clrbit $src1, $lit2, $dst */ - { - I960_INSN_CLRBIT2, "clrbit2", "clrbit", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* clrbit $lit1, $lit2, $dst */ - { - I960_INSN_CLRBIT3, "clrbit3", "clrbit", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* shlo $src1, $src2, $dst */ - { - I960_INSN_SHLO, "shlo", "shlo", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* shlo $lit1, $src2, $dst */ - { - I960_INSN_SHLO1, "shlo1", "shlo", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* shlo $src1, $lit2, $dst */ - { - I960_INSN_SHLO2, "shlo2", "shlo", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* shlo $lit1, $lit2, $dst */ - { - I960_INSN_SHLO3, "shlo3", "shlo", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* shro $src1, $src2, $dst */ - { - I960_INSN_SHRO, "shro", "shro", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* shro $lit1, $src2, $dst */ - { - I960_INSN_SHRO1, "shro1", "shro", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* shro $src1, $lit2, $dst */ - { - I960_INSN_SHRO2, "shro2", "shro", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* shro $lit1, $lit2, $dst */ - { - I960_INSN_SHRO3, "shro3", "shro", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* shli $src1, $src2, $dst */ - { - I960_INSN_SHLI, "shli", "shli", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* shli $lit1, $src2, $dst */ - { - I960_INSN_SHLI1, "shli1", "shli", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* shli $src1, $lit2, $dst */ - { - I960_INSN_SHLI2, "shli2", "shli", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* shli $lit1, $lit2, $dst */ - { - I960_INSN_SHLI3, "shli3", "shli", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* shri $src1, $src2, $dst */ - { - I960_INSN_SHRI, "shri", "shri", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* shri $lit1, $src2, $dst */ - { - I960_INSN_SHRI1, "shri1", "shri", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* shri $src1, $lit2, $dst */ - { - I960_INSN_SHRI2, "shri2", "shri", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* shri $lit1, $lit2, $dst */ - { - I960_INSN_SHRI3, "shri3", "shri", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* emul $src1, $src2, $dst */ - { - I960_INSN_EMUL, "emul", "emul", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* emul $lit1, $src2, $dst */ - { - I960_INSN_EMUL1, "emul1", "emul", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* emul $src1, $lit2, $dst */ - { - I960_INSN_EMUL2, "emul2", "emul", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* emul $lit1, $lit2, $dst */ - { - I960_INSN_EMUL3, "emul3", "emul", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* mov $src1, $dst */ - { - I960_INSN_MOV, "mov", "mov", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* mov $lit1, $dst */ - { - I960_INSN_MOV1, "mov1", "mov", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* movl $src1, $dst */ - { - I960_INSN_MOVL, "movl", "movl", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* movl $lit1, $dst */ - { - I960_INSN_MOVL1, "movl1", "movl", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* movt $src1, $dst */ - { - I960_INSN_MOVT, "movt", "movt", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* movt $lit1, $dst */ - { - I960_INSN_MOVT1, "movt1", "movt", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* movq $src1, $dst */ - { - I960_INSN_MOVQ, "movq", "movq", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* movq $lit1, $dst */ - { - I960_INSN_MOVQ1, "movq1", "movq", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* modpc $src1, $src2, $dst */ - { - I960_INSN_MODPC, "modpc", "modpc", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* modac $src1, $src2, $dst */ - { - I960_INSN_MODAC, "modac", "modac", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* lda $offset, $dst */ - { - I960_INSN_LDA_OFFSET, "lda-offset", "lda", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* lda $offset($abase), $dst */ - { - I960_INSN_LDA_INDIRECT_OFFSET, "lda-indirect-offset", "lda", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* lda ($abase), $dst */ - { - I960_INSN_LDA_INDIRECT, "lda-indirect", "lda", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* lda ($abase)[$index*S$scale], $dst */ - { - I960_INSN_LDA_INDIRECT_INDEX, "lda-indirect-index", "lda", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* lda $optdisp, $dst */ - { - I960_INSN_LDA_DISP, "lda-disp", "lda", 64, - { 0, { (1<<MACH_BASE) } } - }, -/* lda $optdisp($abase), $dst */ - { - I960_INSN_LDA_INDIRECT_DISP, "lda-indirect-disp", "lda", 64, - { 0, { (1<<MACH_BASE) } } - }, -/* lda $optdisp[$index*S$scale], $dst */ - { - I960_INSN_LDA_INDEX_DISP, "lda-index-disp", "lda", 64, - { 0, { (1<<MACH_BASE) } } - }, -/* lda $optdisp($abase)[$index*S$scale], $dst */ - { - I960_INSN_LDA_INDIRECT_INDEX_DISP, "lda-indirect-index-disp", "lda", 64, - { 0, { (1<<MACH_BASE) } } - }, -/* ld $offset, $dst */ - { - I960_INSN_LD_OFFSET, "ld-offset", "ld", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* ld $offset($abase), $dst */ - { - I960_INSN_LD_INDIRECT_OFFSET, "ld-indirect-offset", "ld", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* ld ($abase), $dst */ - { - I960_INSN_LD_INDIRECT, "ld-indirect", "ld", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* ld ($abase)[$index*S$scale], $dst */ - { - I960_INSN_LD_INDIRECT_INDEX, "ld-indirect-index", "ld", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* ld $optdisp, $dst */ - { - I960_INSN_LD_DISP, "ld-disp", "ld", 64, - { 0, { (1<<MACH_BASE) } } - }, -/* ld $optdisp($abase), $dst */ - { - I960_INSN_LD_INDIRECT_DISP, "ld-indirect-disp", "ld", 64, - { 0, { (1<<MACH_BASE) } } - }, -/* ld $optdisp[$index*S$scale], $dst */ - { - I960_INSN_LD_INDEX_DISP, "ld-index-disp", "ld", 64, - { 0, { (1<<MACH_BASE) } } - }, -/* ld $optdisp($abase)[$index*S$scale], $dst */ - { - I960_INSN_LD_INDIRECT_INDEX_DISP, "ld-indirect-index-disp", "ld", 64, - { 0, { (1<<MACH_BASE) } } - }, -/* ldob $offset, $dst */ - { - I960_INSN_LDOB_OFFSET, "ldob-offset", "ldob", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* ldob $offset($abase), $dst */ - { - I960_INSN_LDOB_INDIRECT_OFFSET, "ldob-indirect-offset", "ldob", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* ldob ($abase), $dst */ - { - I960_INSN_LDOB_INDIRECT, "ldob-indirect", "ldob", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* ldob ($abase)[$index*S$scale], $dst */ - { - I960_INSN_LDOB_INDIRECT_INDEX, "ldob-indirect-index", "ldob", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* ldob $optdisp, $dst */ - { - I960_INSN_LDOB_DISP, "ldob-disp", "ldob", 64, - { 0, { (1<<MACH_BASE) } } - }, -/* ldob $optdisp($abase), $dst */ - { - I960_INSN_LDOB_INDIRECT_DISP, "ldob-indirect-disp", "ldob", 64, - { 0, { (1<<MACH_BASE) } } - }, -/* ldob $optdisp[$index*S$scale], $dst */ - { - I960_INSN_LDOB_INDEX_DISP, "ldob-index-disp", "ldob", 64, - { 0, { (1<<MACH_BASE) } } - }, -/* ldob $optdisp($abase)[$index*S$scale], $dst */ - { - I960_INSN_LDOB_INDIRECT_INDEX_DISP, "ldob-indirect-index-disp", "ldob", 64, - { 0, { (1<<MACH_BASE) } } - }, -/* ldos $offset, $dst */ - { - I960_INSN_LDOS_OFFSET, "ldos-offset", "ldos", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* ldos $offset($abase), $dst */ - { - I960_INSN_LDOS_INDIRECT_OFFSET, "ldos-indirect-offset", "ldos", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* ldos ($abase), $dst */ - { - I960_INSN_LDOS_INDIRECT, "ldos-indirect", "ldos", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* ldos ($abase)[$index*S$scale], $dst */ - { - I960_INSN_LDOS_INDIRECT_INDEX, "ldos-indirect-index", "ldos", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* ldos $optdisp, $dst */ - { - I960_INSN_LDOS_DISP, "ldos-disp", "ldos", 64, - { 0, { (1<<MACH_BASE) } } - }, -/* ldos $optdisp($abase), $dst */ - { - I960_INSN_LDOS_INDIRECT_DISP, "ldos-indirect-disp", "ldos", 64, - { 0, { (1<<MACH_BASE) } } - }, -/* ldos $optdisp[$index*S$scale], $dst */ - { - I960_INSN_LDOS_INDEX_DISP, "ldos-index-disp", "ldos", 64, - { 0, { (1<<MACH_BASE) } } - }, -/* ldos $optdisp($abase)[$index*S$scale], $dst */ - { - I960_INSN_LDOS_INDIRECT_INDEX_DISP, "ldos-indirect-index-disp", "ldos", 64, - { 0, { (1<<MACH_BASE) } } - }, -/* ldib $offset, $dst */ - { - I960_INSN_LDIB_OFFSET, "ldib-offset", "ldib", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* ldib $offset($abase), $dst */ - { - I960_INSN_LDIB_INDIRECT_OFFSET, "ldib-indirect-offset", "ldib", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* ldib ($abase), $dst */ - { - I960_INSN_LDIB_INDIRECT, "ldib-indirect", "ldib", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* ldib ($abase)[$index*S$scale], $dst */ - { - I960_INSN_LDIB_INDIRECT_INDEX, "ldib-indirect-index", "ldib", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* ldib $optdisp, $dst */ - { - I960_INSN_LDIB_DISP, "ldib-disp", "ldib", 64, - { 0, { (1<<MACH_BASE) } } - }, -/* ldib $optdisp($abase), $dst */ - { - I960_INSN_LDIB_INDIRECT_DISP, "ldib-indirect-disp", "ldib", 64, - { 0, { (1<<MACH_BASE) } } - }, -/* ldib $optdisp[$index*S$scale], $dst */ - { - I960_INSN_LDIB_INDEX_DISP, "ldib-index-disp", "ldib", 64, - { 0, { (1<<MACH_BASE) } } - }, -/* ldib $optdisp($abase)[$index*S$scale], $dst */ - { - I960_INSN_LDIB_INDIRECT_INDEX_DISP, "ldib-indirect-index-disp", "ldib", 64, - { 0, { (1<<MACH_BASE) } } - }, -/* ldis $offset, $dst */ - { - I960_INSN_LDIS_OFFSET, "ldis-offset", "ldis", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* ldis $offset($abase), $dst */ - { - I960_INSN_LDIS_INDIRECT_OFFSET, "ldis-indirect-offset", "ldis", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* ldis ($abase), $dst */ - { - I960_INSN_LDIS_INDIRECT, "ldis-indirect", "ldis", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* ldis ($abase)[$index*S$scale], $dst */ - { - I960_INSN_LDIS_INDIRECT_INDEX, "ldis-indirect-index", "ldis", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* ldis $optdisp, $dst */ - { - I960_INSN_LDIS_DISP, "ldis-disp", "ldis", 64, - { 0, { (1<<MACH_BASE) } } - }, -/* ldis $optdisp($abase), $dst */ - { - I960_INSN_LDIS_INDIRECT_DISP, "ldis-indirect-disp", "ldis", 64, - { 0, { (1<<MACH_BASE) } } - }, -/* ldis $optdisp[$index*S$scale], $dst */ - { - I960_INSN_LDIS_INDEX_DISP, "ldis-index-disp", "ldis", 64, - { 0, { (1<<MACH_BASE) } } - }, -/* ldis $optdisp($abase)[$index*S$scale], $dst */ - { - I960_INSN_LDIS_INDIRECT_INDEX_DISP, "ldis-indirect-index-disp", "ldis", 64, - { 0, { (1<<MACH_BASE) } } - }, -/* ldl $offset, $dst */ - { - I960_INSN_LDL_OFFSET, "ldl-offset", "ldl", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* ldl $offset($abase), $dst */ - { - I960_INSN_LDL_INDIRECT_OFFSET, "ldl-indirect-offset", "ldl", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* ldl ($abase), $dst */ - { - I960_INSN_LDL_INDIRECT, "ldl-indirect", "ldl", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* ldl ($abase)[$index*S$scale], $dst */ - { - I960_INSN_LDL_INDIRECT_INDEX, "ldl-indirect-index", "ldl", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* ldl $optdisp, $dst */ - { - I960_INSN_LDL_DISP, "ldl-disp", "ldl", 64, - { 0, { (1<<MACH_BASE) } } - }, -/* ldl $optdisp($abase), $dst */ - { - I960_INSN_LDL_INDIRECT_DISP, "ldl-indirect-disp", "ldl", 64, - { 0, { (1<<MACH_BASE) } } - }, -/* ldl $optdisp[$index*S$scale], $dst */ - { - I960_INSN_LDL_INDEX_DISP, "ldl-index-disp", "ldl", 64, - { 0, { (1<<MACH_BASE) } } - }, -/* ldl $optdisp($abase)[$index*S$scale], $dst */ - { - I960_INSN_LDL_INDIRECT_INDEX_DISP, "ldl-indirect-index-disp", "ldl", 64, - { 0, { (1<<MACH_BASE) } } - }, -/* ldt $offset, $dst */ - { - I960_INSN_LDT_OFFSET, "ldt-offset", "ldt", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* ldt $offset($abase), $dst */ - { - I960_INSN_LDT_INDIRECT_OFFSET, "ldt-indirect-offset", "ldt", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* ldt ($abase), $dst */ - { - I960_INSN_LDT_INDIRECT, "ldt-indirect", "ldt", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* ldt ($abase)[$index*S$scale], $dst */ - { - I960_INSN_LDT_INDIRECT_INDEX, "ldt-indirect-index", "ldt", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* ldt $optdisp, $dst */ - { - I960_INSN_LDT_DISP, "ldt-disp", "ldt", 64, - { 0, { (1<<MACH_BASE) } } - }, -/* ldt $optdisp($abase), $dst */ - { - I960_INSN_LDT_INDIRECT_DISP, "ldt-indirect-disp", "ldt", 64, - { 0, { (1<<MACH_BASE) } } - }, -/* ldt $optdisp[$index*S$scale], $dst */ - { - I960_INSN_LDT_INDEX_DISP, "ldt-index-disp", "ldt", 64, - { 0, { (1<<MACH_BASE) } } - }, -/* ldt $optdisp($abase)[$index*S$scale], $dst */ - { - I960_INSN_LDT_INDIRECT_INDEX_DISP, "ldt-indirect-index-disp", "ldt", 64, - { 0, { (1<<MACH_BASE) } } - }, -/* ldq $offset, $dst */ - { - I960_INSN_LDQ_OFFSET, "ldq-offset", "ldq", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* ldq $offset($abase), $dst */ - { - I960_INSN_LDQ_INDIRECT_OFFSET, "ldq-indirect-offset", "ldq", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* ldq ($abase), $dst */ - { - I960_INSN_LDQ_INDIRECT, "ldq-indirect", "ldq", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* ldq ($abase)[$index*S$scale], $dst */ - { - I960_INSN_LDQ_INDIRECT_INDEX, "ldq-indirect-index", "ldq", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* ldq $optdisp, $dst */ - { - I960_INSN_LDQ_DISP, "ldq-disp", "ldq", 64, - { 0, { (1<<MACH_BASE) } } - }, -/* ldq $optdisp($abase), $dst */ - { - I960_INSN_LDQ_INDIRECT_DISP, "ldq-indirect-disp", "ldq", 64, - { 0, { (1<<MACH_BASE) } } - }, -/* ldq $optdisp[$index*S$scale], $dst */ - { - I960_INSN_LDQ_INDEX_DISP, "ldq-index-disp", "ldq", 64, - { 0, { (1<<MACH_BASE) } } - }, -/* ldq $optdisp($abase)[$index*S$scale], $dst */ - { - I960_INSN_LDQ_INDIRECT_INDEX_DISP, "ldq-indirect-index-disp", "ldq", 64, - { 0, { (1<<MACH_BASE) } } - }, -/* st $st_src, $offset */ - { - I960_INSN_ST_OFFSET, "st-offset", "st", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* st $st_src, $offset($abase) */ - { - I960_INSN_ST_INDIRECT_OFFSET, "st-indirect-offset", "st", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* st $st_src, ($abase) */ - { - I960_INSN_ST_INDIRECT, "st-indirect", "st", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* st $st_src, ($abase)[$index*S$scale] */ - { - I960_INSN_ST_INDIRECT_INDEX, "st-indirect-index", "st", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* st $st_src, $optdisp */ - { - I960_INSN_ST_DISP, "st-disp", "st", 64, - { 0, { (1<<MACH_BASE) } } - }, -/* st $st_src, $optdisp($abase) */ - { - I960_INSN_ST_INDIRECT_DISP, "st-indirect-disp", "st", 64, - { 0, { (1<<MACH_BASE) } } - }, -/* st $st_src, $optdisp[$index*S$scale */ - { - I960_INSN_ST_INDEX_DISP, "st-index-disp", "st", 64, - { 0, { (1<<MACH_BASE) } } - }, -/* st $st_src, $optdisp($abase)[$index*S$scale] */ - { - I960_INSN_ST_INDIRECT_INDEX_DISP, "st-indirect-index-disp", "st", 64, - { 0, { (1<<MACH_BASE) } } - }, -/* stob $st_src, $offset */ - { - I960_INSN_STOB_OFFSET, "stob-offset", "stob", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* stob $st_src, $offset($abase) */ - { - I960_INSN_STOB_INDIRECT_OFFSET, "stob-indirect-offset", "stob", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* stob $st_src, ($abase) */ - { - I960_INSN_STOB_INDIRECT, "stob-indirect", "stob", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* stob $st_src, ($abase)[$index*S$scale] */ - { - I960_INSN_STOB_INDIRECT_INDEX, "stob-indirect-index", "stob", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* stob $st_src, $optdisp */ - { - I960_INSN_STOB_DISP, "stob-disp", "stob", 64, - { 0, { (1<<MACH_BASE) } } - }, -/* stob $st_src, $optdisp($abase) */ - { - I960_INSN_STOB_INDIRECT_DISP, "stob-indirect-disp", "stob", 64, - { 0, { (1<<MACH_BASE) } } - }, -/* stob $st_src, $optdisp[$index*S$scale */ - { - I960_INSN_STOB_INDEX_DISP, "stob-index-disp", "stob", 64, - { 0, { (1<<MACH_BASE) } } - }, -/* stob $st_src, $optdisp($abase)[$index*S$scale] */ - { - I960_INSN_STOB_INDIRECT_INDEX_DISP, "stob-indirect-index-disp", "stob", 64, - { 0, { (1<<MACH_BASE) } } - }, -/* stos $st_src, $offset */ - { - I960_INSN_STOS_OFFSET, "stos-offset", "stos", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* stos $st_src, $offset($abase) */ - { - I960_INSN_STOS_INDIRECT_OFFSET, "stos-indirect-offset", "stos", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* stos $st_src, ($abase) */ - { - I960_INSN_STOS_INDIRECT, "stos-indirect", "stos", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* stos $st_src, ($abase)[$index*S$scale] */ - { - I960_INSN_STOS_INDIRECT_INDEX, "stos-indirect-index", "stos", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* stos $st_src, $optdisp */ - { - I960_INSN_STOS_DISP, "stos-disp", "stos", 64, - { 0, { (1<<MACH_BASE) } } - }, -/* stos $st_src, $optdisp($abase) */ - { - I960_INSN_STOS_INDIRECT_DISP, "stos-indirect-disp", "stos", 64, - { 0, { (1<<MACH_BASE) } } - }, -/* stos $st_src, $optdisp[$index*S$scale */ - { - I960_INSN_STOS_INDEX_DISP, "stos-index-disp", "stos", 64, - { 0, { (1<<MACH_BASE) } } - }, -/* stos $st_src, $optdisp($abase)[$index*S$scale] */ - { - I960_INSN_STOS_INDIRECT_INDEX_DISP, "stos-indirect-index-disp", "stos", 64, - { 0, { (1<<MACH_BASE) } } - }, -/* stl $st_src, $offset */ - { - I960_INSN_STL_OFFSET, "stl-offset", "stl", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* stl $st_src, $offset($abase) */ - { - I960_INSN_STL_INDIRECT_OFFSET, "stl-indirect-offset", "stl", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* stl $st_src, ($abase) */ - { - I960_INSN_STL_INDIRECT, "stl-indirect", "stl", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* stl $st_src, ($abase)[$index*S$scale] */ - { - I960_INSN_STL_INDIRECT_INDEX, "stl-indirect-index", "stl", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* stl $st_src, $optdisp */ - { - I960_INSN_STL_DISP, "stl-disp", "stl", 64, - { 0, { (1<<MACH_BASE) } } - }, -/* stl $st_src, $optdisp($abase) */ - { - I960_INSN_STL_INDIRECT_DISP, "stl-indirect-disp", "stl", 64, - { 0, { (1<<MACH_BASE) } } - }, -/* stl $st_src, $optdisp[$index*S$scale */ - { - I960_INSN_STL_INDEX_DISP, "stl-index-disp", "stl", 64, - { 0, { (1<<MACH_BASE) } } - }, -/* stl $st_src, $optdisp($abase)[$index*S$scale] */ - { - I960_INSN_STL_INDIRECT_INDEX_DISP, "stl-indirect-index-disp", "stl", 64, - { 0, { (1<<MACH_BASE) } } - }, -/* stt $st_src, $offset */ - { - I960_INSN_STT_OFFSET, "stt-offset", "stt", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* stt $st_src, $offset($abase) */ - { - I960_INSN_STT_INDIRECT_OFFSET, "stt-indirect-offset", "stt", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* stt $st_src, ($abase) */ - { - I960_INSN_STT_INDIRECT, "stt-indirect", "stt", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* stt $st_src, ($abase)[$index*S$scale] */ - { - I960_INSN_STT_INDIRECT_INDEX, "stt-indirect-index", "stt", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* stt $st_src, $optdisp */ - { - I960_INSN_STT_DISP, "stt-disp", "stt", 64, - { 0, { (1<<MACH_BASE) } } - }, -/* stt $st_src, $optdisp($abase) */ - { - I960_INSN_STT_INDIRECT_DISP, "stt-indirect-disp", "stt", 64, - { 0, { (1<<MACH_BASE) } } - }, -/* stt $st_src, $optdisp[$index*S$scale */ - { - I960_INSN_STT_INDEX_DISP, "stt-index-disp", "stt", 64, - { 0, { (1<<MACH_BASE) } } - }, -/* stt $st_src, $optdisp($abase)[$index*S$scale] */ - { - I960_INSN_STT_INDIRECT_INDEX_DISP, "stt-indirect-index-disp", "stt", 64, - { 0, { (1<<MACH_BASE) } } - }, -/* stq $st_src, $offset */ - { - I960_INSN_STQ_OFFSET, "stq-offset", "stq", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* stq $st_src, $offset($abase) */ - { - I960_INSN_STQ_INDIRECT_OFFSET, "stq-indirect-offset", "stq", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* stq $st_src, ($abase) */ - { - I960_INSN_STQ_INDIRECT, "stq-indirect", "stq", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* stq $st_src, ($abase)[$index*S$scale] */ - { - I960_INSN_STQ_INDIRECT_INDEX, "stq-indirect-index", "stq", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* stq $st_src, $optdisp */ - { - I960_INSN_STQ_DISP, "stq-disp", "stq", 64, - { 0, { (1<<MACH_BASE) } } - }, -/* stq $st_src, $optdisp($abase) */ - { - I960_INSN_STQ_INDIRECT_DISP, "stq-indirect-disp", "stq", 64, - { 0, { (1<<MACH_BASE) } } - }, -/* stq $st_src, $optdisp[$index*S$scale */ - { - I960_INSN_STQ_INDEX_DISP, "stq-index-disp", "stq", 64, - { 0, { (1<<MACH_BASE) } } - }, -/* stq $st_src, $optdisp($abase)[$index*S$scale] */ - { - I960_INSN_STQ_INDIRECT_INDEX_DISP, "stq-indirect-index-disp", "stq", 64, - { 0, { (1<<MACH_BASE) } } - }, -/* cmpobe $br_src1, $br_src2, $br_disp */ - { - I960_INSN_CMPOBE_REG, "cmpobe-reg", "cmpobe", 32, - { 0|A(COND_CTI), { (1<<MACH_BASE) } } - }, -/* cmpobe $br_lit1, $br_src2, $br_disp */ - { - I960_INSN_CMPOBE_LIT, "cmpobe-lit", "cmpobe", 32, - { 0|A(COND_CTI), { (1<<MACH_BASE) } } - }, -/* cmpobne $br_src1, $br_src2, $br_disp */ - { - I960_INSN_CMPOBNE_REG, "cmpobne-reg", "cmpobne", 32, - { 0|A(COND_CTI), { (1<<MACH_BASE) } } - }, -/* cmpobne $br_lit1, $br_src2, $br_disp */ - { - I960_INSN_CMPOBNE_LIT, "cmpobne-lit", "cmpobne", 32, - { 0|A(COND_CTI), { (1<<MACH_BASE) } } - }, -/* cmpobl $br_src1, $br_src2, $br_disp */ - { - I960_INSN_CMPOBL_REG, "cmpobl-reg", "cmpobl", 32, - { 0|A(COND_CTI), { (1<<MACH_BASE) } } - }, -/* cmpobl $br_lit1, $br_src2, $br_disp */ - { - I960_INSN_CMPOBL_LIT, "cmpobl-lit", "cmpobl", 32, - { 0|A(COND_CTI), { (1<<MACH_BASE) } } - }, -/* cmpoble $br_src1, $br_src2, $br_disp */ - { - I960_INSN_CMPOBLE_REG, "cmpoble-reg", "cmpoble", 32, - { 0|A(COND_CTI), { (1<<MACH_BASE) } } - }, -/* cmpoble $br_lit1, $br_src2, $br_disp */ - { - I960_INSN_CMPOBLE_LIT, "cmpoble-lit", "cmpoble", 32, - { 0|A(COND_CTI), { (1<<MACH_BASE) } } - }, -/* cmpobg $br_src1, $br_src2, $br_disp */ - { - I960_INSN_CMPOBG_REG, "cmpobg-reg", "cmpobg", 32, - { 0|A(COND_CTI), { (1<<MACH_BASE) } } - }, -/* cmpobg $br_lit1, $br_src2, $br_disp */ - { - I960_INSN_CMPOBG_LIT, "cmpobg-lit", "cmpobg", 32, - { 0|A(COND_CTI), { (1<<MACH_BASE) } } - }, -/* cmpobge $br_src1, $br_src2, $br_disp */ - { - I960_INSN_CMPOBGE_REG, "cmpobge-reg", "cmpobge", 32, - { 0|A(COND_CTI), { (1<<MACH_BASE) } } - }, -/* cmpobge $br_lit1, $br_src2, $br_disp */ - { - I960_INSN_CMPOBGE_LIT, "cmpobge-lit", "cmpobge", 32, - { 0|A(COND_CTI), { (1<<MACH_BASE) } } - }, -/* cmpibe $br_src1, $br_src2, $br_disp */ - { - I960_INSN_CMPIBE_REG, "cmpibe-reg", "cmpibe", 32, - { 0|A(COND_CTI), { (1<<MACH_BASE) } } - }, -/* cmpibe $br_lit1, $br_src2, $br_disp */ - { - I960_INSN_CMPIBE_LIT, "cmpibe-lit", "cmpibe", 32, - { 0|A(COND_CTI), { (1<<MACH_BASE) } } - }, -/* cmpibne $br_src1, $br_src2, $br_disp */ - { - I960_INSN_CMPIBNE_REG, "cmpibne-reg", "cmpibne", 32, - { 0|A(COND_CTI), { (1<<MACH_BASE) } } - }, -/* cmpibne $br_lit1, $br_src2, $br_disp */ - { - I960_INSN_CMPIBNE_LIT, "cmpibne-lit", "cmpibne", 32, - { 0|A(COND_CTI), { (1<<MACH_BASE) } } - }, -/* cmpibl $br_src1, $br_src2, $br_disp */ - { - I960_INSN_CMPIBL_REG, "cmpibl-reg", "cmpibl", 32, - { 0|A(COND_CTI), { (1<<MACH_BASE) } } - }, -/* cmpibl $br_lit1, $br_src2, $br_disp */ - { - I960_INSN_CMPIBL_LIT, "cmpibl-lit", "cmpibl", 32, - { 0|A(COND_CTI), { (1<<MACH_BASE) } } - }, -/* cmpible $br_src1, $br_src2, $br_disp */ - { - I960_INSN_CMPIBLE_REG, "cmpible-reg", "cmpible", 32, - { 0|A(COND_CTI), { (1<<MACH_BASE) } } - }, -/* cmpible $br_lit1, $br_src2, $br_disp */ - { - I960_INSN_CMPIBLE_LIT, "cmpible-lit", "cmpible", 32, - { 0|A(COND_CTI), { (1<<MACH_BASE) } } - }, -/* cmpibg $br_src1, $br_src2, $br_disp */ - { - I960_INSN_CMPIBG_REG, "cmpibg-reg", "cmpibg", 32, - { 0|A(COND_CTI), { (1<<MACH_BASE) } } - }, -/* cmpibg $br_lit1, $br_src2, $br_disp */ - { - I960_INSN_CMPIBG_LIT, "cmpibg-lit", "cmpibg", 32, - { 0|A(COND_CTI), { (1<<MACH_BASE) } } - }, -/* cmpibge $br_src1, $br_src2, $br_disp */ - { - I960_INSN_CMPIBGE_REG, "cmpibge-reg", "cmpibge", 32, - { 0|A(COND_CTI), { (1<<MACH_BASE) } } - }, -/* cmpibge $br_lit1, $br_src2, $br_disp */ - { - I960_INSN_CMPIBGE_LIT, "cmpibge-lit", "cmpibge", 32, - { 0|A(COND_CTI), { (1<<MACH_BASE) } } - }, -/* bbc $br_src1, $br_src2, $br_disp */ - { - I960_INSN_BBC_REG, "bbc-reg", "bbc", 32, - { 0|A(COND_CTI), { (1<<MACH_BASE) } } - }, -/* bbc $br_lit1, $br_src2, $br_disp */ - { - I960_INSN_BBC_LIT, "bbc-lit", "bbc", 32, - { 0|A(COND_CTI), { (1<<MACH_BASE) } } - }, -/* bbs $br_src1, $br_src2, $br_disp */ - { - I960_INSN_BBS_REG, "bbs-reg", "bbs", 32, - { 0|A(COND_CTI), { (1<<MACH_BASE) } } - }, -/* bbs $br_lit1, $br_src2, $br_disp */ - { - I960_INSN_BBS_LIT, "bbs-lit", "bbs", 32, - { 0|A(COND_CTI), { (1<<MACH_BASE) } } - }, -/* cmpi $src1, $src2 */ - { - I960_INSN_CMPI, "cmpi", "cmpi", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* cmpi $lit1, $src2 */ - { - I960_INSN_CMPI1, "cmpi1", "cmpi", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* cmpi $src1, $lit2 */ - { - I960_INSN_CMPI2, "cmpi2", "cmpi", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* cmpi $lit1, $lit2 */ - { - I960_INSN_CMPI3, "cmpi3", "cmpi", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* cmpo $src1, $src2 */ - { - I960_INSN_CMPO, "cmpo", "cmpo", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* cmpo $lit1, $src2 */ - { - I960_INSN_CMPO1, "cmpo1", "cmpo", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* cmpo $src1, $lit2 */ - { - I960_INSN_CMPO2, "cmpo2", "cmpo", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* cmpo $lit1, $lit2 */ - { - I960_INSN_CMPO3, "cmpo3", "cmpo", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* testno $br_src1 */ - { - I960_INSN_TESTNO_REG, "testno-reg", "testno", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* testg $br_src1 */ - { - I960_INSN_TESTG_REG, "testg-reg", "testg", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* teste $br_src1 */ - { - I960_INSN_TESTE_REG, "teste-reg", "teste", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* testge $br_src1 */ - { - I960_INSN_TESTGE_REG, "testge-reg", "testge", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* testl $br_src1 */ - { - I960_INSN_TESTL_REG, "testl-reg", "testl", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* testne $br_src1 */ - { - I960_INSN_TESTNE_REG, "testne-reg", "testne", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* testle $br_src1 */ - { - I960_INSN_TESTLE_REG, "testle-reg", "testle", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* testo $br_src1 */ - { - I960_INSN_TESTO_REG, "testo-reg", "testo", 32, - { 0, { (1<<MACH_BASE) } } - }, -/* bno $ctrl_disp */ - { - I960_INSN_BNO, "bno", "bno", 32, - { 0|A(COND_CTI), { (1<<MACH_BASE) } } - }, -/* bg $ctrl_disp */ - { - I960_INSN_BG, "bg", "bg", 32, - { 0|A(COND_CTI), { (1<<MACH_BASE) } } - }, -/* be $ctrl_disp */ - { - I960_INSN_BE, "be", "be", 32, - { 0|A(COND_CTI), { (1<<MACH_BASE) } } - }, -/* bge $ctrl_disp */ - { - I960_INSN_BGE, "bge", "bge", 32, - { 0|A(COND_CTI), { (1<<MACH_BASE) } } - }, -/* bl $ctrl_disp */ - { - I960_INSN_BL, "bl", "bl", 32, - { 0|A(COND_CTI), { (1<<MACH_BASE) } } - }, -/* bne $ctrl_disp */ - { - I960_INSN_BNE, "bne", "bne", 32, - { 0|A(COND_CTI), { (1<<MACH_BASE) } } - }, -/* ble $ctrl_disp */ - { - I960_INSN_BLE, "ble", "ble", 32, - { 0|A(COND_CTI), { (1<<MACH_BASE) } } - }, -/* bo $ctrl_disp */ - { - I960_INSN_BO, "bo", "bo", 32, - { 0|A(COND_CTI), { (1<<MACH_BASE) } } - }, -/* b $ctrl_disp */ - { - I960_INSN_B, "b", "b", 32, - { 0|A(UNCOND_CTI), { (1<<MACH_BASE) } } - }, -/* bx $offset($abase) */ - { - I960_INSN_BX_INDIRECT_OFFSET, "bx-indirect-offset", "bx", 32, - { 0|A(UNCOND_CTI), { (1<<MACH_BASE) } } - }, -/* bx ($abase) */ - { - I960_INSN_BX_INDIRECT, "bx-indirect", "bx", 32, - { 0|A(UNCOND_CTI), { (1<<MACH_BASE) } } - }, -/* bx ($abase)[$index*S$scale] */ - { - I960_INSN_BX_INDIRECT_INDEX, "bx-indirect-index", "bx", 32, - { 0|A(UNCOND_CTI), { (1<<MACH_BASE) } } - }, -/* bx $optdisp */ - { - I960_INSN_BX_DISP, "bx-disp", "bx", 64, - { 0|A(UNCOND_CTI), { (1<<MACH_BASE) } } - }, -/* bx $optdisp($abase) */ - { - I960_INSN_BX_INDIRECT_DISP, "bx-indirect-disp", "bx", 64, - { 0|A(UNCOND_CTI), { (1<<MACH_BASE) } } - }, -/* callx $optdisp */ - { - I960_INSN_CALLX_DISP, "callx-disp", "callx", 64, - { 0|A(UNCOND_CTI), { (1<<MACH_BASE) } } - }, -/* callx ($abase) */ - { - I960_INSN_CALLX_INDIRECT, "callx-indirect", "callx", 32, - { 0|A(UNCOND_CTI), { (1<<MACH_BASE) } } - }, -/* callx $offset($abase) */ - { - I960_INSN_CALLX_INDIRECT_OFFSET, "callx-indirect-offset", "callx", 32, - { 0|A(UNCOND_CTI), { (1<<MACH_BASE) } } - }, -/* ret */ - { - I960_INSN_RET, "ret", "ret", 32, - { 0|A(UNCOND_CTI), { (1<<MACH_BASE) } } - }, -/* calls $src1 */ - { - I960_INSN_CALLS, "calls", "calls", 32, - { 0|A(UNCOND_CTI), { (1<<MACH_BASE) } } - }, -/* fmark */ - { - I960_INSN_FMARK, "fmark", "fmark", 32, - { 0|A(UNCOND_CTI), { (1<<MACH_BASE) } } - }, -/* flushreg */ - { - I960_INSN_FLUSHREG, "flushreg", "flushreg", 32, - { 0, { (1<<MACH_BASE) } } - }, -}; - -#undef A -#undef MNEM -#undef OP - -/* Initialize anything needed to be done once, before any cpu_open call. */ - -static void -init_tables () -{ -} - -/* Subroutine of i960_cgen_cpu_open to look up a mach via its bfd name. */ - -static const CGEN_MACH * -lookup_mach_via_bfd_name (table, name) - const CGEN_MACH *table; - const char *name; -{ - while (table->name) - { - if (strcmp (name, table->bfd_name) == 0) - return table; - ++table; - } - abort (); -} - -/* Subroutine of i960_cgen_cpu_open to build the hardware table. */ - -static void -build_hw_table (cd) - CGEN_CPU_TABLE *cd; -{ - int i; - int machs = cd->machs; - const CGEN_HW_ENTRY *init = & i960_cgen_hw_table[0]; - /* MAX_HW is only an upper bound on the number of selected entries. - However each entry is indexed by it's enum so there can be holes in - the table. */ - const CGEN_HW_ENTRY **selected = - (const CGEN_HW_ENTRY **) xmalloc (MAX_HW * sizeof (CGEN_HW_ENTRY *)); - - cd->hw_table.init_entries = init; - cd->hw_table.entry_size = sizeof (CGEN_HW_ENTRY); - memset (selected, 0, MAX_HW * sizeof (CGEN_HW_ENTRY *)); - /* ??? For now we just use machs to determine which ones we want. */ - for (i = 0; init[i].name != NULL; ++i) - if (CGEN_HW_ATTR_VALUE (&init[i], CGEN_HW_MACH) - & machs) - selected[init[i].type] = &init[i]; - cd->hw_table.entries = selected; - cd->hw_table.num_entries = MAX_HW; -} - -/* Subroutine of i960_cgen_cpu_open to build the hardware table. */ - -static void -build_ifield_table (cd) - CGEN_CPU_TABLE *cd; -{ - cd->ifld_table = & i960_cgen_ifld_table[0]; -} - -/* Subroutine of i960_cgen_cpu_open to build the hardware table. */ - -static void -build_operand_table (cd) - CGEN_CPU_TABLE *cd; -{ - int i; - int machs = cd->machs; - const CGEN_OPERAND *init = & i960_cgen_operand_table[0]; - /* MAX_OPERANDS is only an upper bound on the number of selected entries. - However each entry is indexed by it's enum so there can be holes in - the table. */ - const CGEN_OPERAND **selected = - (const CGEN_OPERAND **) xmalloc (MAX_OPERANDS * sizeof (CGEN_OPERAND *)); - - cd->operand_table.init_entries = init; - cd->operand_table.entry_size = sizeof (CGEN_OPERAND); - memset (selected, 0, MAX_OPERANDS * sizeof (CGEN_OPERAND *)); - /* ??? For now we just use mach to determine which ones we want. */ - for (i = 0; init[i].name != NULL; ++i) - if (CGEN_OPERAND_ATTR_VALUE (&init[i], CGEN_OPERAND_MACH) - & machs) - selected[init[i].type] = &init[i]; - cd->operand_table.entries = selected; - cd->operand_table.num_entries = MAX_OPERANDS; -} - -/* Subroutine of i960_cgen_cpu_open to build the hardware table. - ??? This could leave out insns not supported by the specified mach/isa, - but that would cause errors like "foo only supported by bar" to become - "unknown insn", so for now we include all insns and require the app to - do the checking later. - ??? On the other hand, parsing of such insns may require their hardware or - operand elements to be in the table [which they mightn't be]. */ - -static void -build_insn_table (cd) - CGEN_CPU_TABLE *cd; -{ - int i; - const CGEN_IBASE *ib = & i960_cgen_insn_table[0]; - CGEN_INSN *insns = (CGEN_INSN *) xmalloc (MAX_INSNS * sizeof (CGEN_INSN)); - - memset (insns, 0, MAX_INSNS * sizeof (CGEN_INSN)); - for (i = 0; i < MAX_INSNS; ++i) - insns[i].base = &ib[i]; - cd->insn_table.init_entries = insns; - cd->insn_table.entry_size = sizeof (CGEN_IBASE); - cd->insn_table.num_init_entries = MAX_INSNS; -} - -/* Subroutine of i960_cgen_cpu_open to rebuild the tables. */ - -static void -i960_cgen_rebuild_tables (cd) - CGEN_CPU_TABLE *cd; -{ - int i,n_isas,n_machs; - unsigned int isas = cd->isas; - unsigned int machs = cd->machs; - - cd->int_insn_p = CGEN_INT_INSN_P; - - /* Data derived from the isa spec. */ -#define UNSET (CGEN_SIZE_UNKNOWN + 1) - cd->default_insn_bitsize = UNSET; - cd->base_insn_bitsize = UNSET; - cd->min_insn_bitsize = 65535; /* some ridiculously big number */ - cd->max_insn_bitsize = 0; - for (i = 0; i < MAX_ISAS; ++i) - if (((1 << i) & isas) != 0) - { - const CGEN_ISA *isa = & i960_cgen_isa_table[i]; - - /* Default insn sizes of all selected isas must be equal or we set - the result to 0, meaning "unknown". */ - if (cd->default_insn_bitsize == UNSET) - cd->default_insn_bitsize = isa->default_insn_bitsize; - else if (isa->default_insn_bitsize == cd->default_insn_bitsize) - ; /* this is ok */ - else - cd->default_insn_bitsize = CGEN_SIZE_UNKNOWN; - - /* Base insn sizes of all selected isas must be equal or we set - the result to 0, meaning "unknown". */ - if (cd->base_insn_bitsize == UNSET) - cd->base_insn_bitsize = isa->base_insn_bitsize; - else if (isa->base_insn_bitsize == cd->base_insn_bitsize) - ; /* this is ok */ - else - cd->base_insn_bitsize = CGEN_SIZE_UNKNOWN; - - /* Set min,max insn sizes. */ - if (isa->min_insn_bitsize < cd->min_insn_bitsize) - cd->min_insn_bitsize = isa->min_insn_bitsize; - if (isa->max_insn_bitsize > cd->max_insn_bitsize) - cd->max_insn_bitsize = isa->max_insn_bitsize; - - ++n_isas; - } - - /* Data derived from the mach spec. */ - for (i = 0; i < MAX_MACHS; ++i) - if (((1 << i) & machs) != 0) - { - const CGEN_MACH *mach = & i960_cgen_mach_table[i]; - - ++n_machs; - } - - /* Determine which hw elements are used by MACH. */ - build_hw_table (cd); - - /* Build the ifield table. */ - build_ifield_table (cd); - - /* Determine which operands are used by MACH/ISA. */ - build_operand_table (cd); - - /* Build the instruction table. */ - build_insn_table (cd); -} - -/* Initialize a cpu table and return a descriptor. - It's much like opening a file, and must be the first function called. - The arguments are a set of (type/value) pairs, terminated with - CGEN_CPU_OPEN_END. - - Currently supported values: - CGEN_CPU_OPEN_ISAS: bitmap of values in enum isa_attr - CGEN_CPU_OPEN_MACHS: bitmap of values in enum mach_attr - CGEN_CPU_OPEN_BFDMACH: specify 1 mach using bfd name - CGEN_CPU_OPEN_ENDIAN: specify endian choice - CGEN_CPU_OPEN_END: terminates arguments - - ??? Simultaneous multiple isas might not make sense, but it's not (yet) - precluded. - - ??? We only support ISO C stdargs here, not K&R. - Laziness, plus experiment to see if anything requires K&R - eventually - K&R will no longer be supported - e.g. GDB is currently trying this. */ - -CGEN_CPU_DESC -i960_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...) -{ - CGEN_CPU_TABLE *cd = (CGEN_CPU_TABLE *) xmalloc (sizeof (CGEN_CPU_TABLE)); - static int init_p; - unsigned int isas = 0; /* 0 = "unspecified" */ - unsigned int machs = 0; /* 0 = "unspecified" */ - enum cgen_endian endian = CGEN_ENDIAN_UNKNOWN; - va_list ap; - - if (! init_p) - { - init_tables (); - init_p = 1; - } - - memset (cd, 0, sizeof (*cd)); - - va_start (ap, arg_type); - while (arg_type != CGEN_CPU_OPEN_END) - { - switch (arg_type) - { - case CGEN_CPU_OPEN_ISAS : - isas = va_arg (ap, unsigned int); - break; - case CGEN_CPU_OPEN_MACHS : - machs = va_arg (ap, unsigned int); - break; - case CGEN_CPU_OPEN_BFDMACH : - { - const char *name = va_arg (ap, const char *); - const CGEN_MACH *mach = - lookup_mach_via_bfd_name (i960_cgen_mach_table, name); - - machs |= mach->num << 1; - break; - } - case CGEN_CPU_OPEN_ENDIAN : - endian = va_arg (ap, enum cgen_endian); - break; - default : - fprintf (stderr, "i960_cgen_cpu_open: unsupported argument `%d'\n", - arg_type); - abort (); /* ??? return NULL? */ - } - arg_type = va_arg (ap, enum cgen_cpu_open_arg); - } - va_end (ap); - - /* mach unspecified means "all" */ - if (machs == 0) - machs = (1 << MAX_MACHS) - 1; - /* base mach is always selected */ - machs |= 1; - /* isa unspecified means "all" */ - if (isas == 0) - isas = (1 << MAX_ISAS) - 1; - if (endian == CGEN_ENDIAN_UNKNOWN) - { - /* ??? If target has only one, could have a default. */ - fprintf (stderr, "i960_cgen_cpu_open: no endianness specified\n"); - abort (); - } - - cd->isas = isas; - cd->machs = machs; - cd->endian = endian; - /* FIXME: for the sparc case we can determine insn-endianness statically. - The worry here is where both data and insn endian can be independently - chosen, in which case this function will need another argument. - Actually, will want to allow for more arguments in the future anyway. */ - cd->insn_endian = endian; - - /* Table (re)builder. */ - cd->rebuild_tables = i960_cgen_rebuild_tables; - i960_cgen_rebuild_tables (cd); - - return (CGEN_CPU_DESC) cd; -} - -/* Cover fn to i960_cgen_cpu_open to handle the simple case of 1 isa, 1 mach. - MACH_NAME is the bfd name of the mach. */ - -CGEN_CPU_DESC -i960_cgen_cpu_open_1 (mach_name, endian) - const char *mach_name; - enum cgen_endian endian; -{ - return i960_cgen_cpu_open (CGEN_CPU_OPEN_BFDMACH, mach_name, - CGEN_CPU_OPEN_ENDIAN, endian, - CGEN_CPU_OPEN_END); -} - -/* Close a cpu table. - ??? This can live in a machine independent file, but there's currently - no place to put this file (there's no libcgen). libopcodes is the wrong - place as some simulator ports use this but they don't use libopcodes. */ - -void -i960_cgen_cpu_close (cd) - CGEN_CPU_DESC cd; -{ - if (cd->insn_table.init_entries) - free ((CGEN_INSN *) cd->insn_table.init_entries); - if (cd->hw_table.entries) - free ((CGEN_HW_ENTRY *) cd->hw_table.entries); - free (cd); -} - diff --git a/sim/i960/i960-desc.h b/sim/i960/i960-desc.h deleted file mode 100644 index 40b6599..0000000 --- a/sim/i960/i960-desc.h +++ /dev/null @@ -1,317 +0,0 @@ -/* CPU data header for i960. - -THIS FILE IS MACHINE GENERATED WITH CGEN. - -Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc. - -This file is part of the GNU Binutils and/or GDB, the GNU debugger. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -*/ - -#ifndef I960_CPU_H -#define I960_CPU_H - -#define CGEN_ARCH i960 - -/* Given symbol S, return i960_cgen_<S>. */ -#define CGEN_SYM(s) CONCAT3 (i960,_cgen_,s) - -/* Selected cpu families. */ -#define HAVE_CPU_I960BASE - -#define CGEN_INSN_LSB0_P 0 - -/* Minimum size of any insn (in bytes). */ -#define CGEN_MIN_INSN_SIZE 4 - -/* Maximum size of any insn (in bytes). */ -#define CGEN_MAX_INSN_SIZE 8 - -#define CGEN_INT_INSN_P 0 - -/* FIXME: Need to compute CGEN_MAX_SYNTAX_BYTES. */ - -/* CGEN_MNEMONIC_OPERANDS is defined if mnemonics have operands. - e.g. In "b,a foo" the ",a" is an operand. If mnemonics have operands - we can't hash on everything up to the space. */ -#define CGEN_MNEMONIC_OPERANDS - -/* Maximum number of operands any insn or macro-insn has. */ -#define CGEN_MAX_INSN_OPERANDS 16 - -/* Maximum number of fields in an instruction. */ -#define CGEN_MAX_IFMT_OPERANDS 9 - -/* Enums. */ - -/* Enum declaration for insn opcode enums. */ -typedef enum insn_opcode { - OPCODE_00, OPCODE_01, OPCODE_02, OPCODE_03 - , OPCODE_04, OPCODE_05, OPCODE_06, OPCODE_07 - , OPCODE_08, OPCODE_09, OPCODE_0A, OPCODE_0B - , OPCODE_0C, OPCODE_0D, OPCODE_0E, OPCODE_0F - , OPCODE_10, OPCODE_11, OPCODE_12, OPCODE_13 - , OPCODE_14, OPCODE_15, OPCODE_16, OPCODE_17 - , OPCODE_18, OPCODE_19, OPCODE_1A, OPCODE_1B - , OPCODE_1C, OPCODE_1D, OPCODE_1E, OPCODE_1F - , OPCODE_20, OPCODE_21, OPCODE_22, OPCODE_23 - , OPCODE_24, OPCODE_25, OPCODE_26, OPCODE_27 - , OPCODE_28, OPCODE_29, OPCODE_2A, OPCODE_2B - , OPCODE_2C, OPCODE_2D, OPCODE_2E, OPCODE_2F - , OPCODE_30, OPCODE_31, OPCODE_32, OPCODE_33 - , OPCODE_34, OPCODE_35, OPCODE_36, OPCODE_37 - , OPCODE_38, OPCODE_39, OPCODE_3A, OPCODE_3B - , OPCODE_3C, OPCODE_3D, OPCODE_3E, OPCODE_3F - , OPCODE_40, OPCODE_41, OPCODE_42, OPCODE_43 - , OPCODE_44, OPCODE_45, OPCODE_46, OPCODE_47 - , OPCODE_48, OPCODE_49, OPCODE_4A, OPCODE_4B - , OPCODE_4C, OPCODE_4D, OPCODE_4E, OPCODE_4F - , OPCODE_50, OPCODE_51, OPCODE_52, OPCODE_53 - , OPCODE_54, OPCODE_55, OPCODE_56, OPCODE_57 - , OPCODE_58, OPCODE_59, OPCODE_5A, OPCODE_5B - , OPCODE_5C, OPCODE_5D, OPCODE_5E, OPCODE_5F - , OPCODE_60, OPCODE_61, OPCODE_62, OPCODE_63 - , OPCODE_64, OPCODE_65, OPCODE_66, OPCODE_67 - , OPCODE_68, OPCODE_69, OPCODE_6A, OPCODE_6B - , OPCODE_6C, OPCODE_6D, OPCODE_6E, OPCODE_6F - , OPCODE_70, OPCODE_71, OPCODE_72, OPCODE_73 - , OPCODE_74, OPCODE_75, OPCODE_76, OPCODE_77 - , OPCODE_78, OPCODE_79, OPCODE_7A, OPCODE_7B - , OPCODE_7C, OPCODE_7D, OPCODE_7E, OPCODE_7F - , OPCODE_80, OPCODE_81, OPCODE_82, OPCODE_83 - , OPCODE_84, OPCODE_85, OPCODE_86, OPCODE_87 - , OPCODE_88, OPCODE_89, OPCODE_8A, OPCODE_8B - , OPCODE_8C, OPCODE_8D, OPCODE_8E, OPCODE_8F - , OPCODE_90, OPCODE_91, OPCODE_92, OPCODE_93 - , OPCODE_94, OPCODE_95, OPCODE_96, OPCODE_97 - , OPCODE_98, OPCODE_99, OPCODE_9A, OPCODE_9B - , OPCODE_9C, OPCODE_9D, OPCODE_9E, OPCODE_9F - , OPCODE_A0, OPCODE_A1, OPCODE_A2, OPCODE_A3 - , OPCODE_A4, OPCODE_A5, OPCODE_A6, OPCODE_A7 - , OPCODE_A8, OPCODE_A9, OPCODE_AA, OPCODE_AB - , OPCODE_AC, OPCODE_AD, OPCODE_AE, OPCODE_AF - , OPCODE_B0, OPCODE_B1, OPCODE_B2, OPCODE_B3 - , OPCODE_B4, OPCODE_B5, OPCODE_B6, OPCODE_B7 - , OPCODE_B8, OPCODE_B9, OPCODE_BA, OPCODE_BB - , OPCODE_BC, OPCODE_BD, OPCODE_BE, OPCODE_BF - , OPCODE_C0, OPCODE_C1, OPCODE_C2, OPCODE_C3 - , OPCODE_C4, OPCODE_C5, OPCODE_C6, OPCODE_C7 - , OPCODE_C8, OPCODE_C9, OPCODE_CA, OPCODE_CB - , OPCODE_CC, OPCODE_CD, OPCODE_CE, OPCODE_CF - , OPCODE_D0, OPCODE_D1, OPCODE_D2, OPCODE_D3 - , OPCODE_D4, OPCODE_D5, OPCODE_D6, OPCODE_D7 - , OPCODE_D8, OPCODE_D9, OPCODE_DA, OPCODE_DB - , OPCODE_DC, OPCODE_DD, OPCODE_DE, OPCODE_DF - , OPCODE_E0, OPCODE_E1, OPCODE_E2, OPCODE_E3 - , OPCODE_E4, OPCODE_E5, OPCODE_E6, OPCODE_E7 - , OPCODE_E8, OPCODE_E9, OPCODE_EA, OPCODE_EB - , OPCODE_EC, OPCODE_ED, OPCODE_EE, OPCODE_EF - , OPCODE_F0, OPCODE_F1, OPCODE_F2, OPCODE_F3 - , OPCODE_F4, OPCODE_F5, OPCODE_F6, OPCODE_F7 - , OPCODE_F8, OPCODE_F9, OPCODE_FA, OPCODE_FB - , OPCODE_FC, OPCODE_FD, OPCODE_FE, OPCODE_FF -} INSN_OPCODE; - -/* Enum declaration for insn opcode2 enums. */ -typedef enum insn_opcode2 { - OPCODE2_0, OPCODE2_1, OPCODE2_2, OPCODE2_3 - , OPCODE2_4, OPCODE2_5, OPCODE2_6, OPCODE2_7 - , OPCODE2_8, OPCODE2_9, OPCODE2_A, OPCODE2_B - , OPCODE2_C, OPCODE2_D, OPCODE2_E, OPCODE2_F -} INSN_OPCODE2; - -/* Enum declaration for insn m3 enums. */ -typedef enum insn_m3 { - M3_0, M3_1 -} INSN_M3; - -/* Enum declaration for insn m3 enums. */ -typedef enum insn_m2 { - M2_0, M2_1 -} INSN_M2; - -/* Enum declaration for insn m1 enums. */ -typedef enum insn_m1 { - M1_0, M1_1 -} INSN_M1; - -/* Enum declaration for insn zero enums. */ -typedef enum insn_zero { - ZERO_0 -} INSN_ZERO; - -/* Enum declaration for insn mode a enums. */ -typedef enum insn_modea { - MODEA_OFFSET, MODEA_INDIRECT_OFFSET -} INSN_MODEA; - -/* Enum declaration for insn zero a enums. */ -typedef enum insn_zeroa { - ZEROA_0 -} INSN_ZEROA; - -/* Enum declaration for insn mode b enums. */ -typedef enum insn_modeb { - MODEB_ILL0, MODEB_ILL1, MODEB_ILL2, MODEB_ILL3 - , MODEB_INDIRECT, MODEB_IP_DISP, MODEB_RES6, MODEB_INDIRECT_INDEX - , MODEB_ILL8, MODEB_ILL9, MODEB_ILL10, MODEB_ILL11 - , MODEB_DISP, MODEB_INDIRECT_DISP, MODEB_INDEX_DISP, MODEB_INDIRECT_INDEX_DISP -} INSN_MODEB; - -/* Enum declaration for insn zero b enums. */ -typedef enum insn_zerob { - ZEROB_0 -} INSN_ZEROB; - -/* Enum declaration for insn branch m1 enums. */ -typedef enum insn_br_m1 { - BR_M1_0, BR_M1_1 -} INSN_BR_M1; - -/* Enum declaration for insn branch zero enums. */ -typedef enum insn_br_zero { - BR_ZERO_0 -} INSN_BR_ZERO; - -/* Enum declaration for insn ctrl zero enums. */ -typedef enum insn_ctrl_zero { - CTRL_ZERO_0 -} INSN_CTRL_ZERO; - -/* Attributes. */ - -/* Enum declaration for machine type selection. */ -typedef enum mach_attr { - MACH_BASE, MACH_I960_KA_SA, MACH_I960_CA, MACH_MAX -} MACH_ATTR; - -/* Enum declaration for instruction set selection. */ -typedef enum isa_attr { - ISA_I960, ISA_MAX -} ISA_ATTR; - -/* Number of architecture variants. */ -#define MAX_ISAS 1 -#define MAX_MACHS ((int) MACH_MAX) - -/* Ifield support. */ - -extern const struct cgen_ifld i960_cgen_ifld_table[]; - -/* Ifield attribute indices. */ - -/* Enum declaration for cgen_ifld attrs. */ -typedef enum cgen_ifld_attr { - CGEN_IFLD_VIRTUAL, CGEN_IFLD_PCREL_ADDR, CGEN_IFLD_ABS_ADDR, CGEN_IFLD_RESERVED - , CGEN_IFLD_SIGN_OPT, CGEN_IFLD_SIGNED, CGEN_IFLD_END_BOOLS, CGEN_IFLD_START_NBOOLS = 31 - , CGEN_IFLD_MACH, CGEN_IFLD_END_NBOOLS -} CGEN_IFLD_ATTR; - -/* Number of non-boolean elements in cgen_ifld_attr. */ -#define CGEN_IFLD_NBOOL_ATTRS (CGEN_IFLD_END_NBOOLS - CGEN_IFLD_START_NBOOLS - 1) - -/* Enum declaration for i960 ifield types. */ -typedef enum ifield_type { - I960_F_NIL, I960_F_OPCODE, I960_F_SRCDST, I960_F_SRC2 - , I960_F_M3, I960_F_M2, I960_F_M1, I960_F_OPCODE2 - , I960_F_ZERO, I960_F_SRC1, I960_F_ABASE, I960_F_MODEA - , I960_F_ZEROA, I960_F_OFFSET, I960_F_MODEB, I960_F_SCALE - , I960_F_ZEROB, I960_F_INDEX, I960_F_OPTDISP, I960_F_BR_SRC1 - , I960_F_BR_SRC2, I960_F_BR_M1, I960_F_BR_DISP, I960_F_BR_ZERO - , I960_F_CTRL_DISP, I960_F_CTRL_ZERO, I960_F_MAX -} IFIELD_TYPE; - -#define MAX_IFLD ((int) I960_F_MAX) - -/* Hardware attribute indices. */ - -/* Enum declaration for cgen_hw attrs. */ -typedef enum cgen_hw_attr { - CGEN_HW_VIRTUAL, CGEN_HW_CACHE_ADDR, CGEN_HW_PC, CGEN_HW_PROFILE - , CGEN_HW_END_BOOLS, CGEN_HW_START_NBOOLS = 31, CGEN_HW_MACH, CGEN_HW_END_NBOOLS -} CGEN_HW_ATTR; - -/* Number of non-boolean elements in cgen_hw_attr. */ -#define CGEN_HW_NBOOL_ATTRS (CGEN_HW_END_NBOOLS - CGEN_HW_START_NBOOLS - 1) - -/* Enum declaration for i960 hardware types. */ -typedef enum cgen_hw_type { - HW_H_MEMORY, HW_H_SINT, HW_H_UINT, HW_H_ADDR - , HW_H_IADDR, HW_H_PC, HW_H_GR, HW_H_CC - , HW_MAX -} CGEN_HW_TYPE; - -#define MAX_HW ((int) HW_MAX) - -/* Operand attribute indices. */ - -/* Enum declaration for cgen_operand attrs. */ -typedef enum cgen_operand_attr { - CGEN_OPERAND_VIRTUAL, CGEN_OPERAND_PCREL_ADDR, CGEN_OPERAND_ABS_ADDR, CGEN_OPERAND_SIGN_OPT - , CGEN_OPERAND_SIGNED, CGEN_OPERAND_NEGATIVE, CGEN_OPERAND_RELAX, CGEN_OPERAND_SEM_ONLY - , CGEN_OPERAND_END_BOOLS, CGEN_OPERAND_START_NBOOLS = 31, CGEN_OPERAND_MACH, CGEN_OPERAND_END_NBOOLS -} CGEN_OPERAND_ATTR; - -/* Number of non-boolean elements in cgen_operand_attr. */ -#define CGEN_OPERAND_NBOOL_ATTRS (CGEN_OPERAND_END_NBOOLS - CGEN_OPERAND_START_NBOOLS - 1) - -/* Enum declaration for i960 operand types. */ -typedef enum cgen_operand_type { - I960_OPERAND_PC, I960_OPERAND_SRC1, I960_OPERAND_SRC2, I960_OPERAND_DST - , I960_OPERAND_LIT1, I960_OPERAND_LIT2, I960_OPERAND_ST_SRC, I960_OPERAND_ABASE - , I960_OPERAND_OFFSET, I960_OPERAND_SCALE, I960_OPERAND_INDEX, I960_OPERAND_OPTDISP - , I960_OPERAND_BR_SRC1, I960_OPERAND_BR_SRC2, I960_OPERAND_BR_DISP, I960_OPERAND_BR_LIT1 - , I960_OPERAND_CTRL_DISP, I960_OPERAND_MAX -} CGEN_OPERAND_TYPE; - -/* Number of operands types. */ -#define MAX_OPERANDS ((int) I960_OPERAND_MAX) - -/* Maximum number of operands referenced by any insn. */ -#define MAX_OPERAND_INSTANCES 8 - -/* Insn attribute indices. */ - -/* Enum declaration for cgen_insn attrs. */ -typedef enum cgen_insn_attr { - CGEN_INSN_ALIAS, CGEN_INSN_VIRTUAL, CGEN_INSN_UNCOND_CTI, CGEN_INSN_COND_CTI - , CGEN_INSN_SKIP_CTI, CGEN_INSN_DELAY_SLOT, CGEN_INSN_RELAXABLE, CGEN_INSN_RELAX - , CGEN_INSN_NO_DIS, CGEN_INSN_PBB, CGEN_INSN_END_BOOLS, CGEN_INSN_START_NBOOLS = 31 - , CGEN_INSN_MACH, CGEN_INSN_END_NBOOLS -} CGEN_INSN_ATTR; - -/* Number of non-boolean elements in cgen_insn_attr. */ -#define CGEN_INSN_NBOOL_ATTRS (CGEN_INSN_END_NBOOLS - CGEN_INSN_START_NBOOLS - 1) - -/* cgen.h uses things we just defined. */ -#include "opcode/cgen.h" - -/* Attributes. */ -extern const CGEN_ATTR_TABLE i960_cgen_hardware_attr_table[]; -extern const CGEN_ATTR_TABLE i960_cgen_ifield_attr_table[]; -extern const CGEN_ATTR_TABLE i960_cgen_operand_attr_table[]; -extern const CGEN_ATTR_TABLE i960_cgen_insn_attr_table[]; - -/* Hardware decls. */ - -extern CGEN_KEYWORD i960_cgen_opval_h_gr; -extern CGEN_KEYWORD i960_cgen_opval_h_cc; - - - - -#endif /* I960_CPU_H */ diff --git a/sim/i960/i960-opc.h b/sim/i960/i960-opc.h deleted file mode 100644 index 0b9da78..0000000 --- a/sim/i960/i960-opc.h +++ /dev/null @@ -1,170 +0,0 @@ -/* Instruction opcode header for i960. - -THIS FILE IS MACHINE GENERATED WITH CGEN. - -Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc. - -This file is part of the GNU Binutils and/or GDB, the GNU debugger. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -*/ - -#ifndef I960_OPC_H -#define I960_OPC_H - -/* -- opc.h */ - -#undef CGEN_DIS_HASH_SIZE -#define CGEN_DIS_HASH_SIZE 256 -#undef CGEN_DIS_HASH -#define CGEN_DIS_HASH(buffer, value) ((unsigned char *) (buffer))[3] - -/* ??? Until cgen disassembler complete and functioning well, redirect back - to old disassembler. */ -#define CGEN_PRINT_INSN(od, pc, info) print_insn_i960_orig (pc, info) - -/* -- */ -/* Enum declaration for i960 instruction types. */ -typedef enum cgen_insn_type { - I960_INSN_INVALID, I960_INSN_MULO, I960_INSN_MULO1, I960_INSN_MULO2 - , I960_INSN_MULO3, I960_INSN_REMO, I960_INSN_REMO1, I960_INSN_REMO2 - , I960_INSN_REMO3, I960_INSN_DIVO, I960_INSN_DIVO1, I960_INSN_DIVO2 - , I960_INSN_DIVO3, I960_INSN_REMI, I960_INSN_REMI1, I960_INSN_REMI2 - , I960_INSN_REMI3, I960_INSN_DIVI, I960_INSN_DIVI1, I960_INSN_DIVI2 - , I960_INSN_DIVI3, I960_INSN_ADDO, I960_INSN_ADDO1, I960_INSN_ADDO2 - , I960_INSN_ADDO3, I960_INSN_SUBO, I960_INSN_SUBO1, I960_INSN_SUBO2 - , I960_INSN_SUBO3, I960_INSN_NOTBIT, I960_INSN_NOTBIT1, I960_INSN_NOTBIT2 - , I960_INSN_NOTBIT3, I960_INSN_AND, I960_INSN_AND1, I960_INSN_AND2 - , I960_INSN_AND3, I960_INSN_ANDNOT, I960_INSN_ANDNOT1, I960_INSN_ANDNOT2 - , I960_INSN_ANDNOT3, I960_INSN_SETBIT, I960_INSN_SETBIT1, I960_INSN_SETBIT2 - , I960_INSN_SETBIT3, I960_INSN_NOTAND, I960_INSN_NOTAND1, I960_INSN_NOTAND2 - , I960_INSN_NOTAND3, I960_INSN_XOR, I960_INSN_XOR1, I960_INSN_XOR2 - , I960_INSN_XOR3, I960_INSN_OR, I960_INSN_OR1, I960_INSN_OR2 - , I960_INSN_OR3, I960_INSN_NOR, I960_INSN_NOR1, I960_INSN_NOR2 - , I960_INSN_NOR3, I960_INSN_XNOR, I960_INSN_XNOR1, I960_INSN_XNOR2 - , I960_INSN_XNOR3, I960_INSN_NOT, I960_INSN_NOT1, I960_INSN_NOT2 - , I960_INSN_NOT3, I960_INSN_ORNOT, I960_INSN_ORNOT1, I960_INSN_ORNOT2 - , I960_INSN_ORNOT3, I960_INSN_CLRBIT, I960_INSN_CLRBIT1, I960_INSN_CLRBIT2 - , I960_INSN_CLRBIT3, I960_INSN_SHLO, I960_INSN_SHLO1, I960_INSN_SHLO2 - , I960_INSN_SHLO3, I960_INSN_SHRO, I960_INSN_SHRO1, I960_INSN_SHRO2 - , I960_INSN_SHRO3, I960_INSN_SHLI, I960_INSN_SHLI1, I960_INSN_SHLI2 - , I960_INSN_SHLI3, I960_INSN_SHRI, I960_INSN_SHRI1, I960_INSN_SHRI2 - , I960_INSN_SHRI3, I960_INSN_EMUL, I960_INSN_EMUL1, I960_INSN_EMUL2 - , I960_INSN_EMUL3, I960_INSN_MOV, I960_INSN_MOV1, I960_INSN_MOVL - , I960_INSN_MOVL1, I960_INSN_MOVT, I960_INSN_MOVT1, I960_INSN_MOVQ - , I960_INSN_MOVQ1, I960_INSN_MODPC, I960_INSN_MODAC, I960_INSN_LDA_OFFSET - , I960_INSN_LDA_INDIRECT_OFFSET, I960_INSN_LDA_INDIRECT, I960_INSN_LDA_INDIRECT_INDEX, I960_INSN_LDA_DISP - , I960_INSN_LDA_INDIRECT_DISP, I960_INSN_LDA_INDEX_DISP, I960_INSN_LDA_INDIRECT_INDEX_DISP, I960_INSN_LD_OFFSET - , I960_INSN_LD_INDIRECT_OFFSET, I960_INSN_LD_INDIRECT, I960_INSN_LD_INDIRECT_INDEX, I960_INSN_LD_DISP - , I960_INSN_LD_INDIRECT_DISP, I960_INSN_LD_INDEX_DISP, I960_INSN_LD_INDIRECT_INDEX_DISP, I960_INSN_LDOB_OFFSET - , I960_INSN_LDOB_INDIRECT_OFFSET, I960_INSN_LDOB_INDIRECT, I960_INSN_LDOB_INDIRECT_INDEX, I960_INSN_LDOB_DISP - , I960_INSN_LDOB_INDIRECT_DISP, I960_INSN_LDOB_INDEX_DISP, I960_INSN_LDOB_INDIRECT_INDEX_DISP, I960_INSN_LDOS_OFFSET - , I960_INSN_LDOS_INDIRECT_OFFSET, I960_INSN_LDOS_INDIRECT, I960_INSN_LDOS_INDIRECT_INDEX, I960_INSN_LDOS_DISP - , I960_INSN_LDOS_INDIRECT_DISP, I960_INSN_LDOS_INDEX_DISP, I960_INSN_LDOS_INDIRECT_INDEX_DISP, I960_INSN_LDIB_OFFSET - , I960_INSN_LDIB_INDIRECT_OFFSET, I960_INSN_LDIB_INDIRECT, I960_INSN_LDIB_INDIRECT_INDEX, I960_INSN_LDIB_DISP - , I960_INSN_LDIB_INDIRECT_DISP, I960_INSN_LDIB_INDEX_DISP, I960_INSN_LDIB_INDIRECT_INDEX_DISP, I960_INSN_LDIS_OFFSET - , I960_INSN_LDIS_INDIRECT_OFFSET, I960_INSN_LDIS_INDIRECT, I960_INSN_LDIS_INDIRECT_INDEX, I960_INSN_LDIS_DISP - , I960_INSN_LDIS_INDIRECT_DISP, I960_INSN_LDIS_INDEX_DISP, I960_INSN_LDIS_INDIRECT_INDEX_DISP, I960_INSN_LDL_OFFSET - , I960_INSN_LDL_INDIRECT_OFFSET, I960_INSN_LDL_INDIRECT, I960_INSN_LDL_INDIRECT_INDEX, I960_INSN_LDL_DISP - , I960_INSN_LDL_INDIRECT_DISP, I960_INSN_LDL_INDEX_DISP, I960_INSN_LDL_INDIRECT_INDEX_DISP, I960_INSN_LDT_OFFSET - , I960_INSN_LDT_INDIRECT_OFFSET, I960_INSN_LDT_INDIRECT, I960_INSN_LDT_INDIRECT_INDEX, I960_INSN_LDT_DISP - , I960_INSN_LDT_INDIRECT_DISP, I960_INSN_LDT_INDEX_DISP, I960_INSN_LDT_INDIRECT_INDEX_DISP, I960_INSN_LDQ_OFFSET - , I960_INSN_LDQ_INDIRECT_OFFSET, I960_INSN_LDQ_INDIRECT, I960_INSN_LDQ_INDIRECT_INDEX, I960_INSN_LDQ_DISP - , I960_INSN_LDQ_INDIRECT_DISP, I960_INSN_LDQ_INDEX_DISP, I960_INSN_LDQ_INDIRECT_INDEX_DISP, I960_INSN_ST_OFFSET - , I960_INSN_ST_INDIRECT_OFFSET, I960_INSN_ST_INDIRECT, I960_INSN_ST_INDIRECT_INDEX, I960_INSN_ST_DISP - , I960_INSN_ST_INDIRECT_DISP, I960_INSN_ST_INDEX_DISP, I960_INSN_ST_INDIRECT_INDEX_DISP, I960_INSN_STOB_OFFSET - , I960_INSN_STOB_INDIRECT_OFFSET, I960_INSN_STOB_INDIRECT, I960_INSN_STOB_INDIRECT_INDEX, I960_INSN_STOB_DISP - , I960_INSN_STOB_INDIRECT_DISP, I960_INSN_STOB_INDEX_DISP, I960_INSN_STOB_INDIRECT_INDEX_DISP, I960_INSN_STOS_OFFSET - , I960_INSN_STOS_INDIRECT_OFFSET, I960_INSN_STOS_INDIRECT, I960_INSN_STOS_INDIRECT_INDEX, I960_INSN_STOS_DISP - , I960_INSN_STOS_INDIRECT_DISP, I960_INSN_STOS_INDEX_DISP, I960_INSN_STOS_INDIRECT_INDEX_DISP, I960_INSN_STL_OFFSET - , I960_INSN_STL_INDIRECT_OFFSET, I960_INSN_STL_INDIRECT, I960_INSN_STL_INDIRECT_INDEX, I960_INSN_STL_DISP - , I960_INSN_STL_INDIRECT_DISP, I960_INSN_STL_INDEX_DISP, I960_INSN_STL_INDIRECT_INDEX_DISP, I960_INSN_STT_OFFSET - , I960_INSN_STT_INDIRECT_OFFSET, I960_INSN_STT_INDIRECT, I960_INSN_STT_INDIRECT_INDEX, I960_INSN_STT_DISP - , I960_INSN_STT_INDIRECT_DISP, I960_INSN_STT_INDEX_DISP, I960_INSN_STT_INDIRECT_INDEX_DISP, I960_INSN_STQ_OFFSET - , I960_INSN_STQ_INDIRECT_OFFSET, I960_INSN_STQ_INDIRECT, I960_INSN_STQ_INDIRECT_INDEX, I960_INSN_STQ_DISP - , I960_INSN_STQ_INDIRECT_DISP, I960_INSN_STQ_INDEX_DISP, I960_INSN_STQ_INDIRECT_INDEX_DISP, I960_INSN_CMPOBE_REG - , I960_INSN_CMPOBE_LIT, I960_INSN_CMPOBNE_REG, I960_INSN_CMPOBNE_LIT, I960_INSN_CMPOBL_REG - , I960_INSN_CMPOBL_LIT, I960_INSN_CMPOBLE_REG, I960_INSN_CMPOBLE_LIT, I960_INSN_CMPOBG_REG - , I960_INSN_CMPOBG_LIT, I960_INSN_CMPOBGE_REG, I960_INSN_CMPOBGE_LIT, I960_INSN_CMPIBE_REG - , I960_INSN_CMPIBE_LIT, I960_INSN_CMPIBNE_REG, I960_INSN_CMPIBNE_LIT, I960_INSN_CMPIBL_REG - , I960_INSN_CMPIBL_LIT, I960_INSN_CMPIBLE_REG, I960_INSN_CMPIBLE_LIT, I960_INSN_CMPIBG_REG - , I960_INSN_CMPIBG_LIT, I960_INSN_CMPIBGE_REG, I960_INSN_CMPIBGE_LIT, I960_INSN_BBC_REG - , I960_INSN_BBC_LIT, I960_INSN_BBS_REG, I960_INSN_BBS_LIT, I960_INSN_CMPI - , I960_INSN_CMPI1, I960_INSN_CMPI2, I960_INSN_CMPI3, I960_INSN_CMPO - , I960_INSN_CMPO1, I960_INSN_CMPO2, I960_INSN_CMPO3, I960_INSN_TESTNO_REG - , I960_INSN_TESTG_REG, I960_INSN_TESTE_REG, I960_INSN_TESTGE_REG, I960_INSN_TESTL_REG - , I960_INSN_TESTNE_REG, I960_INSN_TESTLE_REG, I960_INSN_TESTO_REG, I960_INSN_BNO - , I960_INSN_BG, I960_INSN_BE, I960_INSN_BGE, I960_INSN_BL - , I960_INSN_BNE, I960_INSN_BLE, I960_INSN_BO, I960_INSN_B - , I960_INSN_BX_INDIRECT_OFFSET, I960_INSN_BX_INDIRECT, I960_INSN_BX_INDIRECT_INDEX, I960_INSN_BX_DISP - , I960_INSN_BX_INDIRECT_DISP, I960_INSN_CALLX_DISP, I960_INSN_CALLX_INDIRECT, I960_INSN_CALLX_INDIRECT_OFFSET - , I960_INSN_RET, I960_INSN_CALLS, I960_INSN_FMARK, I960_INSN_FLUSHREG - , I960_INSN_MAX -} CGEN_INSN_TYPE; - -/* Index of `invalid' insn place holder. */ -#define CGEN_INSN_INVALID I960_INSN_INVALID - -/* Total number of insns in table. */ -#define MAX_INSNS ((int) I960_INSN_MAX) - -/* This struct records data prior to insertion or after extraction. */ -struct cgen_fields -{ - int length; - long f_nil; - long f_opcode; - long f_srcdst; - long f_src2; - long f_m3; - long f_m2; - long f_m1; - long f_opcode2; - long f_zero; - long f_src1; - long f_abase; - long f_modea; - long f_zeroa; - long f_offset; - long f_modeb; - long f_scale; - long f_zerob; - long f_index; - long f_optdisp; - long f_br_src1; - long f_br_src2; - long f_br_m1; - long f_br_disp; - long f_br_zero; - long f_ctrl_disp; - long f_ctrl_zero; -}; - -#define CGEN_INIT_PARSE(od) \ -{\ -} -#define CGEN_INIT_INSERT(od) \ -{\ -} -#define CGEN_INIT_EXTRACT(od) \ -{\ -} -#define CGEN_INIT_PRINT(od) \ -{\ -} - - -#endif /* I960_OPC_H */ diff --git a/sim/i960/i960-sim.h b/sim/i960/i960-sim.h deleted file mode 100644 index 471b03e..0000000 --- a/sim/i960/i960-sim.h +++ /dev/null @@ -1,54 +0,0 @@ -#ifndef I960_SIM_H -#define I960_SIM_H - -/* gdb register numbers */ -/* Copied from gdb/config/i960/tc-i960.h. */ -#define PCW_REGNUM 32 /* process control word */ -#define ACW_REGNUM 33 /* arithmetic control word */ -#define TCW_REGNUM 34 /* trace control word */ -#define IP_REGNUM 35 /* instruction pointer */ -#define FP0_REGNUM 36 /* First floating point register */ -/* Some registers have more than one name */ -#define PC_REGNUM IP_REGNUM /* GDB refers to ip as the Program Counter */ - -SI a_i960_h_gr_get (SIM_CPU *, UINT); -void a_i960_h_gr_set (SIM_CPU *, UINT, SI); -IADDR a_i960_h_pc_get (SIM_CPU *); -void a_i960_h_pc_set (SIM_CPU *, IADDR); - -#define GETTWI GETTSI -#define SETTWI SETTSI - -/* Exception, Interrupt, and Trap addresses */ -/* ??? Hack for traps.c. */ -#define EIT_TRAP_BASE_ADDR 0x40 - -/* Special purpose traps. */ -/* ??? Hack for traps.c. */ -#define TRAP_SYSCALL 0 -#define TRAP_BREAKPOINT 1 - -/* Cache Purge Control (only exists on early versions of chips) */ -/* ??? Hack for devices.c. */ -#define MSPR_ADDR 0xfffffff7 -#define MSPR_PURGE 1 - -/* Cache Control Register */ -/* ??? Hack for devices.c. */ -#define MCCR_ADDR 0xffffffff -#define MCCR_CP 0x80 - -/* Start address and length of all device support. */ -/* ??? Hack for sim-if.c. */ -#define I960_DEVICE_ADDR 0xff000000 -#define I960_DEVICE_LEN 0x00ffffff - -/* sim_core_attach device argument. */ -/* ??? Hack for sim-if.c. */ -extern device i960_devices; - -/* FIXME: Temporary, until device support ready. */ -/* ??? Hack for devices.c. */ -struct _device { int foo; }; - -#endif I960_SIM_H diff --git a/sim/i960/i960.c b/sim/i960/i960.c deleted file mode 100644 index 78fac37..0000000 --- a/sim/i960/i960.c +++ /dev/null @@ -1,205 +0,0 @@ -/* i960 simulator support code - Copyright (C) 1998 Free Software Foundation, Inc. - Contributed by Cygnus Support. - -This file is part of GDB, the GNU debugger. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ - -#define WANT_CPU -#define WANT_CPU_I960BASE - -#include "sim-main.h" -#include "cgen-mem.h" -#include "cgen-ops.h" - -/* The contents of BUF are in target byte order. */ - -int -i960base_fetch_register (SIM_CPU *current_cpu, int rn, unsigned char *buf, - int len) -{ - if (rn < 32) - SETTWI (buf, a_i960_h_gr_get (current_cpu, rn)); - else - switch (rn) - { - case PC_REGNUM : - SETTWI (buf, a_i960_h_pc_get (current_cpu)); - break; - default : - return 0; - } - - return -1; /*FIXME*/ - -} - -/* The contents of BUF are in target byte order. */ - -int -i960base_store_register (SIM_CPU *current_cpu, int rn, unsigned char *buf, - int len) -{ - if (rn < 32) - a_i960_h_gr_set (current_cpu, rn, GETTWI (buf)); - else - switch (rn) - { - case PC_REGNUM : - a_i960_h_pc_set (current_cpu, GETTWI (buf)); - break; - default : - return 0; - } - - return -1; /*FIXME*/ -} - -/* Cover fns for mach independent register accesses. */ - -SI -a_i960_h_gr_get (SIM_CPU *current_cpu, UINT regno) -{ - switch (MACH_NUM (CPU_MACH (current_cpu))) - { -#ifdef HAVE_CPU_I960BASE - case MACH_I960_KA_SA : - case MACH_I960_CA : - return i960base_h_gr_get (current_cpu, regno); -#endif - default : - abort (); - } -} - -void -a_i960_h_gr_set (SIM_CPU *current_cpu, UINT regno, SI newval) -{ - switch (MACH_NUM (CPU_MACH (current_cpu))) - { -#ifdef HAVE_CPU_I960BASE - case MACH_I960_KA_SA : - case MACH_I960_CA : - i960base_h_gr_set (current_cpu, regno, newval); - break; -#endif - default : - abort (); - } -} - -IADDR -a_i960_h_pc_get (SIM_CPU *current_cpu) -{ - switch (MACH_NUM (CPU_MACH (current_cpu))) - { -#ifdef HAVE_CPU_I960BASE - case MACH_I960_KA_SA : - case MACH_I960_CA : - return i960base_h_pc_get (current_cpu); -#endif - default : - abort (); - } -} - -void -a_i960_h_pc_set (SIM_CPU *current_cpu, IADDR newval) -{ - switch (MACH_NUM (CPU_MACH (current_cpu))) - { -#ifdef HAVE_CPU_I960BASE - case MACH_I960_KA_SA : - case MACH_I960_CA : - i960base_h_pc_set (current_cpu, newval); - break; -#endif - default : - abort (); - } -} - -#if WITH_PROFILE_MODEL_P - -/* FIXME: Some of these should be inline or macros. Later. */ - -/* Initialize cycle counting for an insn. - FIRST_P is non-zero if this is the first insn in a set of parallel - insns. */ - -void -i960base_model_insn_before (SIM_CPU *cpu, int first_p) -{ -} - -/* Record the cycles computed for an insn. - LAST_P is non-zero if this is the last insn in a set of parallel insns, - and we update the total cycle count. - CYCLES is the cycle count of the insn. */ - -void -i960base_model_insn_after (SIM_CPU *cpu, int last_p, int cycles) -{ -} - -/* Initialize cycle counting for an insn. - FIRST_P is non-zero if this is the first insn in a set of parallel - insns. */ - -void -i960_model_init_insn_cycles (SIM_CPU *cpu, int first_p) -{ -} - -/* Record the cycles computed for an insn. - LAST_P is non-zero if this is the last insn in a set of parallel insns, - and we update the total cycle count. */ - -void -i960_model_update_insn_cycles (SIM_CPU *cpu, int last_p) -{ -} - -void -i960_model_record_cycles (SIM_CPU *cpu, unsigned long cycles) -{ -} - -void -i960base_model_mark_get_h_gr (SIM_CPU *cpu, ARGBUF *abuf) -{ -} - -void -i960base_model_mark_set_h_gr (SIM_CPU *cpu, ARGBUF *abuf) -{ -} - -#endif /* WITH_PROFILE_MODEL_P */ - -int -i960base_model_i960KA_u_exec (SIM_CPU *cpu, const IDESC *idesc, - int unit_num, int referenced) -{ - return idesc->timing->units[unit_num].done; -} - -int -i960base_model_i960CA_u_exec (SIM_CPU *cpu, const IDESC *idesc, - int unit_num, int referenced) -{ - return idesc->timing->units[unit_num].done; -} diff --git a/sim/i960/mloop.in b/sim/i960/mloop.in deleted file mode 100644 index 0a3ad47..0000000 --- a/sim/i960/mloop.in +++ /dev/null @@ -1,301 +0,0 @@ -# Simulator main loop for i960. -*- C -*- -# Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc. -# -# This file is part of the GNU Simulators. -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2, or (at your option) -# any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License along -# with this program; if not, write to the Free Software Foundation, Inc., -# 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -# Syntax: -# /bin/sh mainloop.in command -# -# Command is one of: -# -# init -# support -# extract-{simple,scache,pbb} -# {full,fast}-exec-{simple,scache,pbb} -# -# A target need only provide a "full" version of one of simple,scache,pbb. -# If the target wants it can also provide a fast version of same. -# It can't provide more than this, however for illustration's sake the M32R -# port provides examples of all. - -# ??? After a few more ports are done, revisit. -# Will eventually need to machine generate a lot of this. - -case "x$1" in - -xsupport) - -cat <<EOF - -/*static INLINE*/ const IDESC * -extract32 (SIM_CPU *current_cpu, PCADDR pc, CGEN_INSN_INT insn, - ARGBUF *abuf, int fast_p) -{ - /* ??? wilson, instructions are 32 bits. */ - const IDESC *d = @cpu@_decode (current_cpu, pc, (USI) insn, abuf); - @cpu@_fill_argbuf (current_cpu, abuf, d, pc, fast_p); - if (! fast_p) - { - int trace_p = PC_IN_TRACE_RANGE_P (current_cpu, pc); - int profile_p = PC_IN_PROFILE_RANGE_P (current_cpu, pc); - @cpu@_fill_argbuf_tp (current_cpu, abuf, trace_p, profile_p); - } - return d; -} - -#if 0 -/*static INLINE*/ const IDESC * -/* ??? wilson, Some instructions are 64 bits. */ -extract64 (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, - ARGBUF *abuf, int fast_p) -{ - const IDESC *d = @cpu@_decode (current_cpu, pc, (UDI) insn >> 32, abuf); - SEM_SET_CODE (abuf, d, fast_p); - abuf->idesc = d; - abuf->addr = pc; - return d; -} -#endif - -static INLINE SEM_PC -execute (SIM_CPU *current_cpu, SCACHE *sc, int fast_p) -{ - SEM_PC vpc; - - if (fast_p) - { -#if ! WITH_SEM_SWITCH_FAST -#if WITH_SCACHE - vpc = (*sc->argbuf.semantic.sem_fast) (current_cpu, sc); -#else - vpc = (*sc->argbuf.semantic.sem_fast) (current_cpu, &sc->argbuf); -#endif -#else - abort (); -#endif /* WITH_SEM_SWITCH_FAST */ - } - else - { -#if ! WITH_SEM_SWITCH_FULL - ARGBUF *abuf = &sc->argbuf; - const IDESC *idesc = abuf->idesc; - const CGEN_INSN *insn = idesc->idata; -#if WITH_SCACHE_PBB - int virtual_p = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_VIRTUAL); -#else - int virtual_p = 0; -#endif - - if (! virtual_p) - { - /* FIXME: call x-before */ - if (ARGBUF_PROFILE_P (abuf)) - PROFILE_COUNT_INSN (current_cpu, abuf->addr, idesc->num); - /* FIXME: Later make cover macros: PROFILE_INSN_{INIT,FINI}. */ - if (PROFILE_MODEL_P (current_cpu)) - @cpu@_model_insn_before (current_cpu, 1 /*first_p*/); - TRACE_INSN_INIT (current_cpu, abuf, 1); - TRACE_INSN (current_cpu, insn, - (const struct argbuf *) abuf, abuf->addr); - } -#if WITH_SCACHE - vpc = (*sc->argbuf.semantic.sem_full) (current_cpu, sc); -#else - vpc = (*sc->argbuf.semantic.sem_full) (current_cpu, abuf); -#endif - if (! virtual_p) - { - /* FIXME: call x-after */ - if (PROFILE_MODEL_P (current_cpu)) - { - int cycles; - - cycles = (*idesc->timing->model_fn) (current_cpu, sc); - @cpu@_model_insn_after (current_cpu, 1 /*last_p*/, cycles); - } - TRACE_INSN_FINI (current_cpu, abuf, 1); - } -#else - abort (); -#endif /* WITH_SEM_SWITCH_FULL */ - } - - return vpc; -} - -EOF - -;; - -xinit) - -cat <<EOF -/*xxxinit*/ -EOF - -;; - -xextract-simple | xextract-scache) - -cat <<EOF -{ - if ((pc & 3) != 0) - { - abort (); -#if 0 - /* This only occurs when single stepping. - The test is unnecessary otherwise, but the cost is teensy, - compared with decoding/extraction. */ - UHI insn = GETIMEMUHI (current_cpu, pc); - extract16 (current_cpu, pc, insn & 0x7fff, sc, FAST_P); -#endif - } - else - { - USI insn = GETIMEMUSI (current_cpu, pc); - /* ??? wilson, insns are 32 bits, unless MEMB with displacement, which - has high bit set, bit 12 set, and mode of 5, 12, 13, 14, or 15. */ - if (((SI) insn > 0) - || ! (((insn & 0x3000) == 0x3000) - || ((insn & 0x3C00) == 0x1400))) - { - extract32 (current_cpu, pc, insn, sc, FAST_P); - } - else - { - UDI llinsn = (((UDI) insn << 32) || GETIMEMUSI (current_cpu, pc+4)); - extract64 (current_cpu, pc, llinsn, sc, FAST_P); - } - } -} -EOF - -;; - -xextract-pbb) - -# Inputs: current_cpu, pc, sc, max_insns, FAST_P -# Outputs: sc, pc -# sc must be left pointing past the last created entry. -# pc must be left pointing past the last created entry. -# If the pbb is terminated by a cti insn, SET_CTI_VPC(sc) must be called -# to record the vpc of the cti insn. -# SET_INSN_COUNT(n) must be called to record number of real insns. - -cat <<EOF -{ - const IDESC *idesc; - int icount = 0; - - if ((pc & 3) != 0) - { - abort (); -#if 0 - /* This only occurs when single stepping. - The test is unnecessary otherwise, but the cost is teensy, - compared with decoding/extraction. */ - UHI insn = GETIMEMUHI (current_cpu, pc); - idesc = extract16 (current_cpu, pc, insn & 0x7fff, &sc->argbuf, FAST_P); - ++sc; - --max_insns; - ++icount; - pc += 2; - if (IDESC_CTI_P (idesc)) - { - SET_CTI_VPC (sc - 1); - goto Finish; - } -#endif - } - - while (max_insns > 0) - { - USI insn = GETIMEMUSI (current_cpu, pc); -#if 0 - /* ??? wilson, insns are 32 bits, unless MEMB with displacement, which - has high bit set, bit 12 set, and mode of 5, 12, 13, 14, or 15. */ - if (((SI) insn > 0) - || ! (((insn & 0x3000) == 0x3000) - || ((insn & 0x3C00) == 0x1400))) - { - idesc = extract32 (current_cpu, pc, insn, &sc->argbuf, FAST_P); - ++sc; - --max_insns; - ++icount; - pc += 4; - if (IDESC_CTI_P (idesc)) - { - SET_CTI_VPC (sc - 1); - break; - } - } - else - { - idesc = extract64 (current_cpu, pc, insn, &sc->argbuf, FAST_P); - ++sc; - --max_insns; - ++icount; - pc += 8; - if (IDESC_CTI_P (idesc)) - { - SET_CTI_VPC (sc - 1); - break; - } - } -#else - idesc = extract32 (current_cpu, pc, insn, &sc->argbuf, FAST_P); - ++sc; - --max_insns; - ++icount; - pc += idesc->length; - if (IDESC_CTI_P (idesc)) - { - SET_CTI_VPC (sc - 1); - break; - } - } -#endif - Finish: - SET_INSN_COUNT (icount); -} -EOF - -;; - -xfull-exec-* | xfast-exec-*) - -# Inputs: current_cpu, vpc, FAST_P -# Outputs: vpc -# vpc is the virtual program counter. - -cat <<EOF -#if (! FAST_P && WITH_SEM_SWITCH_FULL) || (FAST_P && WITH_SEM_SWITCH_FAST) -#define DEFINE_SWITCH -#include "sem-switch.c" -#else - vpc = execute (current_cpu, vpc, FAST_P); -#endif -EOF - -;; - -*) - echo "Invalid argument to mainloop.in: $1" >&2 - exit 1 - ;; - -esac diff --git a/sim/i960/model.c b/sim/i960/model.c deleted file mode 100644 index 600d9ea..0000000 --- a/sim/i960/model.c +++ /dev/null @@ -1,10065 +0,0 @@ -/* Simulator model support for i960base. - -THIS FILE IS MACHINE GENERATED WITH CGEN. - -Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc. - -This file is part of the GNU Simulators. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -*/ - -#define WANT_CPU i960base -#define WANT_CPU_I960BASE - -#include "sim-main.h" - -/* The profiling data is recorded here, but is accessed via the profiling - mechanism. After all, this is information for profiling. */ - -#if WITH_PROFILE_MODEL_P - -/* Model handlers for each insn. */ - -static int -model_i960KA_mulo (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_mulo1 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul1.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_mulo2 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_mulo3 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_remo (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_remo1 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul1.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_remo2 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_remo3 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_divo (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_divo1 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul1.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_divo2 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_divo3 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_remi (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_remi1 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul1.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_remi2 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_remi3 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_divi (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_divi1 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul1.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_divi2 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_divi3 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_addo (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_addo1 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul1.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_addo2 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_addo3 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_subo (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_subo1 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul1.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_subo2 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_subo3 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_notbit (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_notbit1 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul1.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_notbit2 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_notbit3 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_and (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_and1 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul1.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_and2 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_and3 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_andnot (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_andnot1 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul1.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_andnot2 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_andnot3 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_setbit (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_setbit1 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul1.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_setbit2 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_setbit3 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_notand (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_notand1 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul1.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_notand2 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_notand3 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_xor (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_xor1 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul1.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_xor2 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_xor3 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_or (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_or1 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul1.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_or2 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_or3 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_nor (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_nor1 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul1.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_nor2 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_nor3 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_xnor (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_xnor1 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul1.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_xnor2 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_xnor3 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_not (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_not1 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_not2 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_not3 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_ornot (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_ornot1 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul1.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_ornot2 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_ornot3 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_clrbit (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_clrbit1 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul1.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_clrbit2 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_clrbit3 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_shlo (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_shlo1 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul1.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_shlo2 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_shlo3 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_shro (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_shro1 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul1.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_shro2 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_shro3 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_shli (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_shli1 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul1.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_shli2 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_shli3 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_shri (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_shri1 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul1.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_shri2 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_shri3 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_emul (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_emul1 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul1.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_emul2 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_emul3 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_mov (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_mov1 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_movl (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movq.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_movl1 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_movt (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movq.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_movt1 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movq.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_movq (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movq.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_movq1 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movq.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_modpc (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul1.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_modac (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul1.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_lda_offset (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_lda_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_lda_indirect (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_lda_indirect_index (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_lda_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_lda_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_lda_index_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_lda_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_ld_offset (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_ld_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_ld_indirect (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_ld_indirect_index (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_ld_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_ld_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_ld_index_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_ld_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_ldob_offset (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_ldob_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_ldob_indirect (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_ldob_indirect_index (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_ldob_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_ldob_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_ldob_index_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_ldob_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_ldos_offset (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_ldos_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_ldos_indirect (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_ldos_indirect_index (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_ldos_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_ldos_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_ldos_index_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_ldos_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_ldib_offset (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_ldib_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_ldib_indirect (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_ldib_indirect_index (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_ldib_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_ldib_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_ldib_index_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_ldib_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_ldis_offset (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_ldis_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_ldis_indirect (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_ldis_indirect_index (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_ldis_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_ldis_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_ldis_index_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_ldis_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_ldl_offset (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_ldl_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_ldl_indirect (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_ldl_indirect_index (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_ldl_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_ldl_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_ldl_index_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_ldl_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_ldt_offset (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_ldt_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_ldt_indirect (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_ldt_indirect_index (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_ldt_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_ldt_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_ldt_index_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_ldt_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_ldq_offset (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_ldq_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_ldq_indirect (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_ldq_indirect_index (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_ldq_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_ldq_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_ldq_index_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_ldq_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_st_offset (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_st_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_st_indirect (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_st_indirect_index (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_st_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_st_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_st_index_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_st_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_stob_offset (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_stob_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_stob_indirect (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_stob_indirect_index (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_stob_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_stob_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_stob_index_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_stob_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_stos_offset (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_stos_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_stos_indirect (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_stos_indirect_index (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_stos_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_stos_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_stos_index_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_stos_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_stl_offset (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_stl_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_stl_indirect (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_stl_indirect_index (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_stl_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_stl_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_stl_index_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_stl_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_stt_offset (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_stt_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_stt_indirect (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_stt_indirect_index (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_stt_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_stt_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_stt_index_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_stt_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_stq_offset (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_stq_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_stq_indirect (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_stq_indirect_index (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_stq_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_stq_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_stq_index_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_stq_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_cmpobe_reg (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_cmpobe_lit (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_cmpobne_reg (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_cmpobne_lit (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_cmpobl_reg (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_cmpobl_lit (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_cmpoble_reg (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_cmpoble_lit (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_cmpobg_reg (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_cmpobg_lit (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_cmpobge_reg (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_cmpobge_lit (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_cmpibe_reg (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_cmpibe_lit (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_cmpibne_reg (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_cmpibne_lit (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_cmpibl_reg (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_cmpibl_lit (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_cmpible_reg (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_cmpible_lit (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_cmpibg_reg (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_cmpibg_lit (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_cmpibge_reg (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_cmpibge_lit (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_bbc_reg (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_bbc_lit (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_bbs_reg (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_bbs_lit (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_cmpi (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_cmpi1 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul1.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_cmpi2 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_cmpi3 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_cmpo (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_cmpo1 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul1.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_cmpo2 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_cmpo3 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_testno_reg (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_testno_reg.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_testg_reg (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_testno_reg.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_teste_reg (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_testno_reg.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_testge_reg (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_testno_reg.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_testl_reg (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_testno_reg.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_testne_reg (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_testno_reg.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_testle_reg (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_testno_reg.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_testo_reg (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_testno_reg.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_bno (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_bno.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_bg (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_bno.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_be (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_bno.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_bge (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_bno.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_bl (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_bno.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_bne (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_bno.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_ble (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_bno.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_bo (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_bno.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_b (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_bno.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_bx_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_bx_indirect (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_bx_indirect_index (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_bx_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_bx_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_callx_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_callx_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_callx_indirect (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_callx_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_callx_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_callx_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_ret (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_callx_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_calls (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_fmark (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960KA_flushreg (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_mulo (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_mulo1 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul1.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_mulo2 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_mulo3 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_remo (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_remo1 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul1.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_remo2 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_remo3 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_divo (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_divo1 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul1.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_divo2 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_divo3 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_remi (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_remi1 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul1.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_remi2 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_remi3 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_divi (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_divi1 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul1.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_divi2 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_divi3 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_addo (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_addo1 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul1.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_addo2 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_addo3 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_subo (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_subo1 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul1.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_subo2 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_subo3 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_notbit (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_notbit1 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul1.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_notbit2 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_notbit3 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_and (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_and1 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul1.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_and2 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_and3 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_andnot (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_andnot1 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul1.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_andnot2 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_andnot3 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_setbit (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_setbit1 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul1.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_setbit2 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_setbit3 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_notand (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_notand1 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul1.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_notand2 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_notand3 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_xor (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_xor1 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul1.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_xor2 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_xor3 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_or (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_or1 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul1.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_or2 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_or3 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_nor (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_nor1 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul1.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_nor2 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_nor3 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_xnor (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_xnor1 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul1.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_xnor2 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_xnor3 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_not (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_not1 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_not2 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_not3 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_ornot (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_ornot1 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul1.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_ornot2 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_ornot3 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_clrbit (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_clrbit1 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul1.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_clrbit2 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_clrbit3 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_shlo (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_shlo1 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul1.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_shlo2 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_shlo3 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_shro (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_shro1 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul1.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_shro2 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_shro3 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_shli (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_shli1 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul1.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_shli2 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_shli3 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_shri (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_shri1 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul1.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_shri2 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_shri3 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_emul (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_emul1 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul1.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_emul2 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_emul3 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_mov (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_mov1 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_movl (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movq.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_movl1 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_movt (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movq.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_movt1 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movq.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_movq (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movq.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_movq1 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movq.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_modpc (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul1.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_modac (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul1.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_lda_offset (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_lda_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_lda_indirect (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_lda_indirect_index (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_lda_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_lda_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_lda_index_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_lda_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_ld_offset (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_ld_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_ld_indirect (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_ld_indirect_index (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_ld_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_ld_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_ld_index_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_ld_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_ldob_offset (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_ldob_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_ldob_indirect (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_ldob_indirect_index (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_ldob_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_ldob_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_ldob_index_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_ldob_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_ldos_offset (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_ldos_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_ldos_indirect (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_ldos_indirect_index (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_ldos_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_ldos_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_ldos_index_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_ldos_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_ldib_offset (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_ldib_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_ldib_indirect (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_ldib_indirect_index (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_ldib_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_ldib_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_ldib_index_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_ldib_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_ldis_offset (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_ldis_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_ldis_indirect (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_ldis_indirect_index (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_ldis_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_ldis_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_ldis_index_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_ldis_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_ldl_offset (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_ldl_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_ldl_indirect (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_ldl_indirect_index (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_ldl_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_ldl_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_ldl_index_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_ldl_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_ldt_offset (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_ldt_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_ldt_indirect (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_ldt_indirect_index (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_ldt_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_ldt_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_ldt_index_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_ldt_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_ldq_offset (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_ldq_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_ldq_indirect (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_ldq_indirect_index (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_ldq_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_ldq_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_ldq_index_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_ldq_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_st_offset (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_st_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_st_indirect (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_st_indirect_index (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_st_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_st_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_st_index_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_st_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_stob_offset (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_stob_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_stob_indirect (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_stob_indirect_index (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_stob_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_stob_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_stob_index_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_stob_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_stos_offset (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_stos_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_stos_indirect (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_stos_indirect_index (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_stos_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_stos_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_stos_index_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_stos_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_stl_offset (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_stl_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_stl_indirect (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_stl_indirect_index (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_stl_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_stl_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_stl_index_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_stl_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_stt_offset (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_stt_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_stt_indirect (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_stt_indirect_index (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_stt_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_stt_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_stt_index_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_stt_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_stq_offset (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_stq_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_stq_indirect (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_stq_indirect_index (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_stq_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_stq_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_stq_index_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_stq_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_cmpobe_reg (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_cmpobe_lit (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_cmpobne_reg (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_cmpobne_lit (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_cmpobl_reg (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_cmpobl_lit (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_cmpoble_reg (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_cmpoble_lit (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_cmpobg_reg (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_cmpobg_lit (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_cmpobge_reg (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_cmpobge_lit (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_cmpibe_reg (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_cmpibe_lit (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_cmpibne_reg (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_cmpibne_lit (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_cmpibl_reg (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_cmpibl_lit (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_cmpible_reg (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_cmpible_lit (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_cmpibg_reg (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_cmpibg_lit (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_cmpibge_reg (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_cmpibge_lit (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_bbc_reg (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_bbc_lit (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_bbs_reg (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_bbs_lit (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_cmpi (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_cmpi1 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul1.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_cmpi2 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_cmpi3 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_cmpo (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_cmpo1 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul1.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_cmpo2 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_cmpo3 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_testno_reg (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_testno_reg.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_testg_reg (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_testno_reg.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_teste_reg (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_testno_reg.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_testge_reg (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_testno_reg.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_testl_reg (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_testno_reg.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_testne_reg (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_testno_reg.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_testle_reg (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_testno_reg.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_testo_reg (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_testno_reg.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_bno (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_bno.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_bg (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_bno.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_be (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_bno.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_bge (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_bno.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_bl (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_bno.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_bne (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_bno.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_ble (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_bno.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_bo (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_bno.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_b (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_bno.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_bx_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_bx_indirect (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_bx_indirect_index (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_bx_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_bx_indirect_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_callx_disp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_callx_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_callx_indirect (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_callx_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_callx_indirect_offset (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_callx_indirect_offset.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_ret (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_callx_disp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_calls (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_fmark (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_i960CA_flushreg (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -/* We assume UNIT_NONE == 0 because the tables don't always terminate - entries with it. */ - -/* Model timing data for `i960KA'. */ - -static const INSN_TIMING i960KA_timing[] = { - { I960BASE_INSN_X_INVALID, 0, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_X_AFTER, 0, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_X_BEFORE, 0, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_X_CTI_CHAIN, 0, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_X_CHAIN, 0, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_X_BEGIN, 0, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_MULO, model_i960KA_mulo, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_MULO1, model_i960KA_mulo1, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_MULO2, model_i960KA_mulo2, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_MULO3, model_i960KA_mulo3, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_REMO, model_i960KA_remo, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_REMO1, model_i960KA_remo1, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_REMO2, model_i960KA_remo2, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_REMO3, model_i960KA_remo3, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_DIVO, model_i960KA_divo, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_DIVO1, model_i960KA_divo1, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_DIVO2, model_i960KA_divo2, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_DIVO3, model_i960KA_divo3, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_REMI, model_i960KA_remi, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_REMI1, model_i960KA_remi1, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_REMI2, model_i960KA_remi2, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_REMI3, model_i960KA_remi3, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_DIVI, model_i960KA_divi, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_DIVI1, model_i960KA_divi1, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_DIVI2, model_i960KA_divi2, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_DIVI3, model_i960KA_divi3, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_ADDO, model_i960KA_addo, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_ADDO1, model_i960KA_addo1, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_ADDO2, model_i960KA_addo2, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_ADDO3, model_i960KA_addo3, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_SUBO, model_i960KA_subo, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_SUBO1, model_i960KA_subo1, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_SUBO2, model_i960KA_subo2, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_SUBO3, model_i960KA_subo3, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_NOTBIT, model_i960KA_notbit, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_NOTBIT1, model_i960KA_notbit1, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_NOTBIT2, model_i960KA_notbit2, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_NOTBIT3, model_i960KA_notbit3, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_AND, model_i960KA_and, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_AND1, model_i960KA_and1, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_AND2, model_i960KA_and2, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_AND3, model_i960KA_and3, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_ANDNOT, model_i960KA_andnot, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_ANDNOT1, model_i960KA_andnot1, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_ANDNOT2, model_i960KA_andnot2, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_ANDNOT3, model_i960KA_andnot3, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_SETBIT, model_i960KA_setbit, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_SETBIT1, model_i960KA_setbit1, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_SETBIT2, model_i960KA_setbit2, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_SETBIT3, model_i960KA_setbit3, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_NOTAND, model_i960KA_notand, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_NOTAND1, model_i960KA_notand1, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_NOTAND2, model_i960KA_notand2, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_NOTAND3, model_i960KA_notand3, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_XOR, model_i960KA_xor, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_XOR1, model_i960KA_xor1, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_XOR2, model_i960KA_xor2, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_XOR3, model_i960KA_xor3, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_OR, model_i960KA_or, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_OR1, model_i960KA_or1, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_OR2, model_i960KA_or2, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_OR3, model_i960KA_or3, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_NOR, model_i960KA_nor, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_NOR1, model_i960KA_nor1, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_NOR2, model_i960KA_nor2, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_NOR3, model_i960KA_nor3, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_XNOR, model_i960KA_xnor, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_XNOR1, model_i960KA_xnor1, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_XNOR2, model_i960KA_xnor2, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_XNOR3, model_i960KA_xnor3, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_NOT, model_i960KA_not, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_NOT1, model_i960KA_not1, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_NOT2, model_i960KA_not2, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_NOT3, model_i960KA_not3, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_ORNOT, model_i960KA_ornot, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_ORNOT1, model_i960KA_ornot1, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_ORNOT2, model_i960KA_ornot2, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_ORNOT3, model_i960KA_ornot3, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_CLRBIT, model_i960KA_clrbit, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_CLRBIT1, model_i960KA_clrbit1, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_CLRBIT2, model_i960KA_clrbit2, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_CLRBIT3, model_i960KA_clrbit3, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_SHLO, model_i960KA_shlo, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_SHLO1, model_i960KA_shlo1, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_SHLO2, model_i960KA_shlo2, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_SHLO3, model_i960KA_shlo3, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_SHRO, model_i960KA_shro, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_SHRO1, model_i960KA_shro1, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_SHRO2, model_i960KA_shro2, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_SHRO3, model_i960KA_shro3, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_SHLI, model_i960KA_shli, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_SHLI1, model_i960KA_shli1, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_SHLI2, model_i960KA_shli2, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_SHLI3, model_i960KA_shli3, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_SHRI, model_i960KA_shri, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_SHRI1, model_i960KA_shri1, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_SHRI2, model_i960KA_shri2, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_SHRI3, model_i960KA_shri3, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_EMUL, model_i960KA_emul, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_EMUL1, model_i960KA_emul1, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_EMUL2, model_i960KA_emul2, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_EMUL3, model_i960KA_emul3, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_MOV, model_i960KA_mov, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_MOV1, model_i960KA_mov1, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_MOVL, model_i960KA_movl, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_MOVL1, model_i960KA_movl1, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_MOVT, model_i960KA_movt, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_MOVT1, model_i960KA_movt1, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_MOVQ, model_i960KA_movq, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_MOVQ1, model_i960KA_movq1, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_MODPC, model_i960KA_modpc, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_MODAC, model_i960KA_modac, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDA_OFFSET, model_i960KA_lda_offset, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDA_INDIRECT_OFFSET, model_i960KA_lda_indirect_offset, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDA_INDIRECT, model_i960KA_lda_indirect, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDA_INDIRECT_INDEX, model_i960KA_lda_indirect_index, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDA_DISP, model_i960KA_lda_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDA_INDIRECT_DISP, model_i960KA_lda_indirect_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDA_INDEX_DISP, model_i960KA_lda_index_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDA_INDIRECT_INDEX_DISP, model_i960KA_lda_indirect_index_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LD_OFFSET, model_i960KA_ld_offset, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LD_INDIRECT_OFFSET, model_i960KA_ld_indirect_offset, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LD_INDIRECT, model_i960KA_ld_indirect, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LD_INDIRECT_INDEX, model_i960KA_ld_indirect_index, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LD_DISP, model_i960KA_ld_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LD_INDIRECT_DISP, model_i960KA_ld_indirect_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LD_INDEX_DISP, model_i960KA_ld_index_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LD_INDIRECT_INDEX_DISP, model_i960KA_ld_indirect_index_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDOB_OFFSET, model_i960KA_ldob_offset, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDOB_INDIRECT_OFFSET, model_i960KA_ldob_indirect_offset, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDOB_INDIRECT, model_i960KA_ldob_indirect, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDOB_INDIRECT_INDEX, model_i960KA_ldob_indirect_index, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDOB_DISP, model_i960KA_ldob_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDOB_INDIRECT_DISP, model_i960KA_ldob_indirect_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDOB_INDEX_DISP, model_i960KA_ldob_index_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDOB_INDIRECT_INDEX_DISP, model_i960KA_ldob_indirect_index_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDOS_OFFSET, model_i960KA_ldos_offset, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDOS_INDIRECT_OFFSET, model_i960KA_ldos_indirect_offset, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDOS_INDIRECT, model_i960KA_ldos_indirect, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDOS_INDIRECT_INDEX, model_i960KA_ldos_indirect_index, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDOS_DISP, model_i960KA_ldos_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDOS_INDIRECT_DISP, model_i960KA_ldos_indirect_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDOS_INDEX_DISP, model_i960KA_ldos_index_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDOS_INDIRECT_INDEX_DISP, model_i960KA_ldos_indirect_index_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDIB_OFFSET, model_i960KA_ldib_offset, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDIB_INDIRECT_OFFSET, model_i960KA_ldib_indirect_offset, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDIB_INDIRECT, model_i960KA_ldib_indirect, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDIB_INDIRECT_INDEX, model_i960KA_ldib_indirect_index, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDIB_DISP, model_i960KA_ldib_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDIB_INDIRECT_DISP, model_i960KA_ldib_indirect_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDIB_INDEX_DISP, model_i960KA_ldib_index_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDIB_INDIRECT_INDEX_DISP, model_i960KA_ldib_indirect_index_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDIS_OFFSET, model_i960KA_ldis_offset, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDIS_INDIRECT_OFFSET, model_i960KA_ldis_indirect_offset, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDIS_INDIRECT, model_i960KA_ldis_indirect, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDIS_INDIRECT_INDEX, model_i960KA_ldis_indirect_index, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDIS_DISP, model_i960KA_ldis_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDIS_INDIRECT_DISP, model_i960KA_ldis_indirect_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDIS_INDEX_DISP, model_i960KA_ldis_index_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDIS_INDIRECT_INDEX_DISP, model_i960KA_ldis_indirect_index_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDL_OFFSET, model_i960KA_ldl_offset, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDL_INDIRECT_OFFSET, model_i960KA_ldl_indirect_offset, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDL_INDIRECT, model_i960KA_ldl_indirect, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDL_INDIRECT_INDEX, model_i960KA_ldl_indirect_index, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDL_DISP, model_i960KA_ldl_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDL_INDIRECT_DISP, model_i960KA_ldl_indirect_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDL_INDEX_DISP, model_i960KA_ldl_index_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDL_INDIRECT_INDEX_DISP, model_i960KA_ldl_indirect_index_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDT_OFFSET, model_i960KA_ldt_offset, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDT_INDIRECT_OFFSET, model_i960KA_ldt_indirect_offset, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDT_INDIRECT, model_i960KA_ldt_indirect, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDT_INDIRECT_INDEX, model_i960KA_ldt_indirect_index, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDT_DISP, model_i960KA_ldt_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDT_INDIRECT_DISP, model_i960KA_ldt_indirect_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDT_INDEX_DISP, model_i960KA_ldt_index_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDT_INDIRECT_INDEX_DISP, model_i960KA_ldt_indirect_index_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDQ_OFFSET, model_i960KA_ldq_offset, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDQ_INDIRECT_OFFSET, model_i960KA_ldq_indirect_offset, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDQ_INDIRECT, model_i960KA_ldq_indirect, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDQ_INDIRECT_INDEX, model_i960KA_ldq_indirect_index, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDQ_DISP, model_i960KA_ldq_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDQ_INDIRECT_DISP, model_i960KA_ldq_indirect_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDQ_INDEX_DISP, model_i960KA_ldq_index_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDQ_INDIRECT_INDEX_DISP, model_i960KA_ldq_indirect_index_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_ST_OFFSET, model_i960KA_st_offset, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_ST_INDIRECT_OFFSET, model_i960KA_st_indirect_offset, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_ST_INDIRECT, model_i960KA_st_indirect, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_ST_INDIRECT_INDEX, model_i960KA_st_indirect_index, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_ST_DISP, model_i960KA_st_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_ST_INDIRECT_DISP, model_i960KA_st_indirect_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_ST_INDEX_DISP, model_i960KA_st_index_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_ST_INDIRECT_INDEX_DISP, model_i960KA_st_indirect_index_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_STOB_OFFSET, model_i960KA_stob_offset, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_STOB_INDIRECT_OFFSET, model_i960KA_stob_indirect_offset, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_STOB_INDIRECT, model_i960KA_stob_indirect, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_STOB_INDIRECT_INDEX, model_i960KA_stob_indirect_index, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_STOB_DISP, model_i960KA_stob_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_STOB_INDIRECT_DISP, model_i960KA_stob_indirect_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_STOB_INDEX_DISP, model_i960KA_stob_index_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_STOB_INDIRECT_INDEX_DISP, model_i960KA_stob_indirect_index_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_STOS_OFFSET, model_i960KA_stos_offset, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_STOS_INDIRECT_OFFSET, model_i960KA_stos_indirect_offset, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_STOS_INDIRECT, model_i960KA_stos_indirect, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_STOS_INDIRECT_INDEX, model_i960KA_stos_indirect_index, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_STOS_DISP, model_i960KA_stos_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_STOS_INDIRECT_DISP, model_i960KA_stos_indirect_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_STOS_INDEX_DISP, model_i960KA_stos_index_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_STOS_INDIRECT_INDEX_DISP, model_i960KA_stos_indirect_index_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_STL_OFFSET, model_i960KA_stl_offset, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_STL_INDIRECT_OFFSET, model_i960KA_stl_indirect_offset, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_STL_INDIRECT, model_i960KA_stl_indirect, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_STL_INDIRECT_INDEX, model_i960KA_stl_indirect_index, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_STL_DISP, model_i960KA_stl_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_STL_INDIRECT_DISP, model_i960KA_stl_indirect_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_STL_INDEX_DISP, model_i960KA_stl_index_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_STL_INDIRECT_INDEX_DISP, model_i960KA_stl_indirect_index_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_STT_OFFSET, model_i960KA_stt_offset, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_STT_INDIRECT_OFFSET, model_i960KA_stt_indirect_offset, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_STT_INDIRECT, model_i960KA_stt_indirect, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_STT_INDIRECT_INDEX, model_i960KA_stt_indirect_index, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_STT_DISP, model_i960KA_stt_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_STT_INDIRECT_DISP, model_i960KA_stt_indirect_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_STT_INDEX_DISP, model_i960KA_stt_index_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_STT_INDIRECT_INDEX_DISP, model_i960KA_stt_indirect_index_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_STQ_OFFSET, model_i960KA_stq_offset, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_STQ_INDIRECT_OFFSET, model_i960KA_stq_indirect_offset, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_STQ_INDIRECT, model_i960KA_stq_indirect, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_STQ_INDIRECT_INDEX, model_i960KA_stq_indirect_index, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_STQ_DISP, model_i960KA_stq_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_STQ_INDIRECT_DISP, model_i960KA_stq_indirect_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_STQ_INDEX_DISP, model_i960KA_stq_index_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_STQ_INDIRECT_INDEX_DISP, model_i960KA_stq_indirect_index_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_CMPOBE_REG, model_i960KA_cmpobe_reg, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_CMPOBE_LIT, model_i960KA_cmpobe_lit, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_CMPOBNE_REG, model_i960KA_cmpobne_reg, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_CMPOBNE_LIT, model_i960KA_cmpobne_lit, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_CMPOBL_REG, model_i960KA_cmpobl_reg, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_CMPOBL_LIT, model_i960KA_cmpobl_lit, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_CMPOBLE_REG, model_i960KA_cmpoble_reg, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_CMPOBLE_LIT, model_i960KA_cmpoble_lit, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_CMPOBG_REG, model_i960KA_cmpobg_reg, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_CMPOBG_LIT, model_i960KA_cmpobg_lit, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_CMPOBGE_REG, model_i960KA_cmpobge_reg, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_CMPOBGE_LIT, model_i960KA_cmpobge_lit, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_CMPIBE_REG, model_i960KA_cmpibe_reg, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_CMPIBE_LIT, model_i960KA_cmpibe_lit, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_CMPIBNE_REG, model_i960KA_cmpibne_reg, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_CMPIBNE_LIT, model_i960KA_cmpibne_lit, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_CMPIBL_REG, model_i960KA_cmpibl_reg, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_CMPIBL_LIT, model_i960KA_cmpibl_lit, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_CMPIBLE_REG, model_i960KA_cmpible_reg, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_CMPIBLE_LIT, model_i960KA_cmpible_lit, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_CMPIBG_REG, model_i960KA_cmpibg_reg, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_CMPIBG_LIT, model_i960KA_cmpibg_lit, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_CMPIBGE_REG, model_i960KA_cmpibge_reg, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_CMPIBGE_LIT, model_i960KA_cmpibge_lit, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_BBC_REG, model_i960KA_bbc_reg, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_BBC_LIT, model_i960KA_bbc_lit, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_BBS_REG, model_i960KA_bbs_reg, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_BBS_LIT, model_i960KA_bbs_lit, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_CMPI, model_i960KA_cmpi, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_CMPI1, model_i960KA_cmpi1, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_CMPI2, model_i960KA_cmpi2, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_CMPI3, model_i960KA_cmpi3, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_CMPO, model_i960KA_cmpo, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_CMPO1, model_i960KA_cmpo1, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_CMPO2, model_i960KA_cmpo2, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_CMPO3, model_i960KA_cmpo3, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_TESTNO_REG, model_i960KA_testno_reg, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_TESTG_REG, model_i960KA_testg_reg, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_TESTE_REG, model_i960KA_teste_reg, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_TESTGE_REG, model_i960KA_testge_reg, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_TESTL_REG, model_i960KA_testl_reg, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_TESTNE_REG, model_i960KA_testne_reg, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_TESTLE_REG, model_i960KA_testle_reg, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_TESTO_REG, model_i960KA_testo_reg, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_BNO, model_i960KA_bno, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_BG, model_i960KA_bg, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_BE, model_i960KA_be, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_BGE, model_i960KA_bge, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_BL, model_i960KA_bl, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_BNE, model_i960KA_bne, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_BLE, model_i960KA_ble, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_BO, model_i960KA_bo, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_B, model_i960KA_b, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_BX_INDIRECT_OFFSET, model_i960KA_bx_indirect_offset, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_BX_INDIRECT, model_i960KA_bx_indirect, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_BX_INDIRECT_INDEX, model_i960KA_bx_indirect_index, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_BX_DISP, model_i960KA_bx_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_BX_INDIRECT_DISP, model_i960KA_bx_indirect_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_CALLX_DISP, model_i960KA_callx_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_CALLX_INDIRECT, model_i960KA_callx_indirect, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_CALLX_INDIRECT_OFFSET, model_i960KA_callx_indirect_offset, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_RET, model_i960KA_ret, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_CALLS, model_i960KA_calls, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_FMARK, model_i960KA_fmark, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_FLUSHREG, model_i960KA_flushreg, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } }, -}; - -/* Model timing data for `i960CA'. */ - -static const INSN_TIMING i960CA_timing[] = { - { I960BASE_INSN_X_INVALID, 0, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_X_AFTER, 0, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_X_BEFORE, 0, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_X_CTI_CHAIN, 0, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_X_CHAIN, 0, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_X_BEGIN, 0, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_MULO, model_i960CA_mulo, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_MULO1, model_i960CA_mulo1, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_MULO2, model_i960CA_mulo2, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_MULO3, model_i960CA_mulo3, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_REMO, model_i960CA_remo, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_REMO1, model_i960CA_remo1, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_REMO2, model_i960CA_remo2, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_REMO3, model_i960CA_remo3, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_DIVO, model_i960CA_divo, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_DIVO1, model_i960CA_divo1, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_DIVO2, model_i960CA_divo2, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_DIVO3, model_i960CA_divo3, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_REMI, model_i960CA_remi, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_REMI1, model_i960CA_remi1, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_REMI2, model_i960CA_remi2, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_REMI3, model_i960CA_remi3, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_DIVI, model_i960CA_divi, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_DIVI1, model_i960CA_divi1, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_DIVI2, model_i960CA_divi2, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_DIVI3, model_i960CA_divi3, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_ADDO, model_i960CA_addo, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_ADDO1, model_i960CA_addo1, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_ADDO2, model_i960CA_addo2, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_ADDO3, model_i960CA_addo3, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_SUBO, model_i960CA_subo, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_SUBO1, model_i960CA_subo1, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_SUBO2, model_i960CA_subo2, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_SUBO3, model_i960CA_subo3, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_NOTBIT, model_i960CA_notbit, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_NOTBIT1, model_i960CA_notbit1, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_NOTBIT2, model_i960CA_notbit2, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_NOTBIT3, model_i960CA_notbit3, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_AND, model_i960CA_and, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_AND1, model_i960CA_and1, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_AND2, model_i960CA_and2, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_AND3, model_i960CA_and3, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_ANDNOT, model_i960CA_andnot, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_ANDNOT1, model_i960CA_andnot1, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_ANDNOT2, model_i960CA_andnot2, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_ANDNOT3, model_i960CA_andnot3, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_SETBIT, model_i960CA_setbit, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_SETBIT1, model_i960CA_setbit1, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_SETBIT2, model_i960CA_setbit2, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_SETBIT3, model_i960CA_setbit3, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_NOTAND, model_i960CA_notand, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_NOTAND1, model_i960CA_notand1, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_NOTAND2, model_i960CA_notand2, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_NOTAND3, model_i960CA_notand3, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_XOR, model_i960CA_xor, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_XOR1, model_i960CA_xor1, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_XOR2, model_i960CA_xor2, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_XOR3, model_i960CA_xor3, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_OR, model_i960CA_or, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_OR1, model_i960CA_or1, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_OR2, model_i960CA_or2, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_OR3, model_i960CA_or3, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_NOR, model_i960CA_nor, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_NOR1, model_i960CA_nor1, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_NOR2, model_i960CA_nor2, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_NOR3, model_i960CA_nor3, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_XNOR, model_i960CA_xnor, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_XNOR1, model_i960CA_xnor1, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_XNOR2, model_i960CA_xnor2, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_XNOR3, model_i960CA_xnor3, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_NOT, model_i960CA_not, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_NOT1, model_i960CA_not1, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_NOT2, model_i960CA_not2, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_NOT3, model_i960CA_not3, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_ORNOT, model_i960CA_ornot, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_ORNOT1, model_i960CA_ornot1, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_ORNOT2, model_i960CA_ornot2, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_ORNOT3, model_i960CA_ornot3, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_CLRBIT, model_i960CA_clrbit, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_CLRBIT1, model_i960CA_clrbit1, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_CLRBIT2, model_i960CA_clrbit2, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_CLRBIT3, model_i960CA_clrbit3, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_SHLO, model_i960CA_shlo, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_SHLO1, model_i960CA_shlo1, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_SHLO2, model_i960CA_shlo2, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_SHLO3, model_i960CA_shlo3, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_SHRO, model_i960CA_shro, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_SHRO1, model_i960CA_shro1, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_SHRO2, model_i960CA_shro2, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_SHRO3, model_i960CA_shro3, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_SHLI, model_i960CA_shli, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_SHLI1, model_i960CA_shli1, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_SHLI2, model_i960CA_shli2, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_SHLI3, model_i960CA_shli3, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_SHRI, model_i960CA_shri, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_SHRI1, model_i960CA_shri1, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_SHRI2, model_i960CA_shri2, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_SHRI3, model_i960CA_shri3, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_EMUL, model_i960CA_emul, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_EMUL1, model_i960CA_emul1, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_EMUL2, model_i960CA_emul2, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_EMUL3, model_i960CA_emul3, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_MOV, model_i960CA_mov, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_MOV1, model_i960CA_mov1, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_MOVL, model_i960CA_movl, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_MOVL1, model_i960CA_movl1, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_MOVT, model_i960CA_movt, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_MOVT1, model_i960CA_movt1, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_MOVQ, model_i960CA_movq, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_MOVQ1, model_i960CA_movq1, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_MODPC, model_i960CA_modpc, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_MODAC, model_i960CA_modac, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDA_OFFSET, model_i960CA_lda_offset, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDA_INDIRECT_OFFSET, model_i960CA_lda_indirect_offset, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDA_INDIRECT, model_i960CA_lda_indirect, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDA_INDIRECT_INDEX, model_i960CA_lda_indirect_index, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDA_DISP, model_i960CA_lda_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDA_INDIRECT_DISP, model_i960CA_lda_indirect_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDA_INDEX_DISP, model_i960CA_lda_index_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDA_INDIRECT_INDEX_DISP, model_i960CA_lda_indirect_index_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LD_OFFSET, model_i960CA_ld_offset, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LD_INDIRECT_OFFSET, model_i960CA_ld_indirect_offset, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LD_INDIRECT, model_i960CA_ld_indirect, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LD_INDIRECT_INDEX, model_i960CA_ld_indirect_index, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LD_DISP, model_i960CA_ld_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LD_INDIRECT_DISP, model_i960CA_ld_indirect_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LD_INDEX_DISP, model_i960CA_ld_index_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LD_INDIRECT_INDEX_DISP, model_i960CA_ld_indirect_index_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDOB_OFFSET, model_i960CA_ldob_offset, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDOB_INDIRECT_OFFSET, model_i960CA_ldob_indirect_offset, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDOB_INDIRECT, model_i960CA_ldob_indirect, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDOB_INDIRECT_INDEX, model_i960CA_ldob_indirect_index, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDOB_DISP, model_i960CA_ldob_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDOB_INDIRECT_DISP, model_i960CA_ldob_indirect_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDOB_INDEX_DISP, model_i960CA_ldob_index_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDOB_INDIRECT_INDEX_DISP, model_i960CA_ldob_indirect_index_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDOS_OFFSET, model_i960CA_ldos_offset, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDOS_INDIRECT_OFFSET, model_i960CA_ldos_indirect_offset, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDOS_INDIRECT, model_i960CA_ldos_indirect, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDOS_INDIRECT_INDEX, model_i960CA_ldos_indirect_index, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDOS_DISP, model_i960CA_ldos_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDOS_INDIRECT_DISP, model_i960CA_ldos_indirect_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDOS_INDEX_DISP, model_i960CA_ldos_index_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDOS_INDIRECT_INDEX_DISP, model_i960CA_ldos_indirect_index_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDIB_OFFSET, model_i960CA_ldib_offset, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDIB_INDIRECT_OFFSET, model_i960CA_ldib_indirect_offset, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDIB_INDIRECT, model_i960CA_ldib_indirect, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDIB_INDIRECT_INDEX, model_i960CA_ldib_indirect_index, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDIB_DISP, model_i960CA_ldib_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDIB_INDIRECT_DISP, model_i960CA_ldib_indirect_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDIB_INDEX_DISP, model_i960CA_ldib_index_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDIB_INDIRECT_INDEX_DISP, model_i960CA_ldib_indirect_index_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDIS_OFFSET, model_i960CA_ldis_offset, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDIS_INDIRECT_OFFSET, model_i960CA_ldis_indirect_offset, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDIS_INDIRECT, model_i960CA_ldis_indirect, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDIS_INDIRECT_INDEX, model_i960CA_ldis_indirect_index, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDIS_DISP, model_i960CA_ldis_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDIS_INDIRECT_DISP, model_i960CA_ldis_indirect_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDIS_INDEX_DISP, model_i960CA_ldis_index_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDIS_INDIRECT_INDEX_DISP, model_i960CA_ldis_indirect_index_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDL_OFFSET, model_i960CA_ldl_offset, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDL_INDIRECT_OFFSET, model_i960CA_ldl_indirect_offset, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDL_INDIRECT, model_i960CA_ldl_indirect, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDL_INDIRECT_INDEX, model_i960CA_ldl_indirect_index, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDL_DISP, model_i960CA_ldl_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDL_INDIRECT_DISP, model_i960CA_ldl_indirect_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDL_INDEX_DISP, model_i960CA_ldl_index_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDL_INDIRECT_INDEX_DISP, model_i960CA_ldl_indirect_index_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDT_OFFSET, model_i960CA_ldt_offset, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDT_INDIRECT_OFFSET, model_i960CA_ldt_indirect_offset, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDT_INDIRECT, model_i960CA_ldt_indirect, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDT_INDIRECT_INDEX, model_i960CA_ldt_indirect_index, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDT_DISP, model_i960CA_ldt_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDT_INDIRECT_DISP, model_i960CA_ldt_indirect_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDT_INDEX_DISP, model_i960CA_ldt_index_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDT_INDIRECT_INDEX_DISP, model_i960CA_ldt_indirect_index_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDQ_OFFSET, model_i960CA_ldq_offset, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDQ_INDIRECT_OFFSET, model_i960CA_ldq_indirect_offset, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDQ_INDIRECT, model_i960CA_ldq_indirect, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDQ_INDIRECT_INDEX, model_i960CA_ldq_indirect_index, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDQ_DISP, model_i960CA_ldq_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDQ_INDIRECT_DISP, model_i960CA_ldq_indirect_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDQ_INDEX_DISP, model_i960CA_ldq_index_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_LDQ_INDIRECT_INDEX_DISP, model_i960CA_ldq_indirect_index_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_ST_OFFSET, model_i960CA_st_offset, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_ST_INDIRECT_OFFSET, model_i960CA_st_indirect_offset, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_ST_INDIRECT, model_i960CA_st_indirect, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_ST_INDIRECT_INDEX, model_i960CA_st_indirect_index, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_ST_DISP, model_i960CA_st_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_ST_INDIRECT_DISP, model_i960CA_st_indirect_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_ST_INDEX_DISP, model_i960CA_st_index_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_ST_INDIRECT_INDEX_DISP, model_i960CA_st_indirect_index_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_STOB_OFFSET, model_i960CA_stob_offset, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_STOB_INDIRECT_OFFSET, model_i960CA_stob_indirect_offset, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_STOB_INDIRECT, model_i960CA_stob_indirect, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_STOB_INDIRECT_INDEX, model_i960CA_stob_indirect_index, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_STOB_DISP, model_i960CA_stob_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_STOB_INDIRECT_DISP, model_i960CA_stob_indirect_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_STOB_INDEX_DISP, model_i960CA_stob_index_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_STOB_INDIRECT_INDEX_DISP, model_i960CA_stob_indirect_index_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_STOS_OFFSET, model_i960CA_stos_offset, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_STOS_INDIRECT_OFFSET, model_i960CA_stos_indirect_offset, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_STOS_INDIRECT, model_i960CA_stos_indirect, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_STOS_INDIRECT_INDEX, model_i960CA_stos_indirect_index, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_STOS_DISP, model_i960CA_stos_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_STOS_INDIRECT_DISP, model_i960CA_stos_indirect_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_STOS_INDEX_DISP, model_i960CA_stos_index_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_STOS_INDIRECT_INDEX_DISP, model_i960CA_stos_indirect_index_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_STL_OFFSET, model_i960CA_stl_offset, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_STL_INDIRECT_OFFSET, model_i960CA_stl_indirect_offset, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_STL_INDIRECT, model_i960CA_stl_indirect, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_STL_INDIRECT_INDEX, model_i960CA_stl_indirect_index, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_STL_DISP, model_i960CA_stl_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_STL_INDIRECT_DISP, model_i960CA_stl_indirect_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_STL_INDEX_DISP, model_i960CA_stl_index_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_STL_INDIRECT_INDEX_DISP, model_i960CA_stl_indirect_index_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_STT_OFFSET, model_i960CA_stt_offset, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_STT_INDIRECT_OFFSET, model_i960CA_stt_indirect_offset, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_STT_INDIRECT, model_i960CA_stt_indirect, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_STT_INDIRECT_INDEX, model_i960CA_stt_indirect_index, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_STT_DISP, model_i960CA_stt_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_STT_INDIRECT_DISP, model_i960CA_stt_indirect_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_STT_INDEX_DISP, model_i960CA_stt_index_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_STT_INDIRECT_INDEX_DISP, model_i960CA_stt_indirect_index_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_STQ_OFFSET, model_i960CA_stq_offset, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_STQ_INDIRECT_OFFSET, model_i960CA_stq_indirect_offset, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_STQ_INDIRECT, model_i960CA_stq_indirect, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_STQ_INDIRECT_INDEX, model_i960CA_stq_indirect_index, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_STQ_DISP, model_i960CA_stq_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_STQ_INDIRECT_DISP, model_i960CA_stq_indirect_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_STQ_INDEX_DISP, model_i960CA_stq_index_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_STQ_INDIRECT_INDEX_DISP, model_i960CA_stq_indirect_index_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_CMPOBE_REG, model_i960CA_cmpobe_reg, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_CMPOBE_LIT, model_i960CA_cmpobe_lit, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_CMPOBNE_REG, model_i960CA_cmpobne_reg, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_CMPOBNE_LIT, model_i960CA_cmpobne_lit, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_CMPOBL_REG, model_i960CA_cmpobl_reg, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_CMPOBL_LIT, model_i960CA_cmpobl_lit, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_CMPOBLE_REG, model_i960CA_cmpoble_reg, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_CMPOBLE_LIT, model_i960CA_cmpoble_lit, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_CMPOBG_REG, model_i960CA_cmpobg_reg, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_CMPOBG_LIT, model_i960CA_cmpobg_lit, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_CMPOBGE_REG, model_i960CA_cmpobge_reg, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_CMPOBGE_LIT, model_i960CA_cmpobge_lit, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_CMPIBE_REG, model_i960CA_cmpibe_reg, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_CMPIBE_LIT, model_i960CA_cmpibe_lit, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_CMPIBNE_REG, model_i960CA_cmpibne_reg, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_CMPIBNE_LIT, model_i960CA_cmpibne_lit, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_CMPIBL_REG, model_i960CA_cmpibl_reg, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_CMPIBL_LIT, model_i960CA_cmpibl_lit, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_CMPIBLE_REG, model_i960CA_cmpible_reg, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_CMPIBLE_LIT, model_i960CA_cmpible_lit, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_CMPIBG_REG, model_i960CA_cmpibg_reg, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_CMPIBG_LIT, model_i960CA_cmpibg_lit, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_CMPIBGE_REG, model_i960CA_cmpibge_reg, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_CMPIBGE_LIT, model_i960CA_cmpibge_lit, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_BBC_REG, model_i960CA_bbc_reg, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_BBC_LIT, model_i960CA_bbc_lit, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_BBS_REG, model_i960CA_bbs_reg, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_BBS_LIT, model_i960CA_bbs_lit, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_CMPI, model_i960CA_cmpi, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_CMPI1, model_i960CA_cmpi1, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_CMPI2, model_i960CA_cmpi2, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_CMPI3, model_i960CA_cmpi3, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_CMPO, model_i960CA_cmpo, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_CMPO1, model_i960CA_cmpo1, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_CMPO2, model_i960CA_cmpo2, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_CMPO3, model_i960CA_cmpo3, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_TESTNO_REG, model_i960CA_testno_reg, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_TESTG_REG, model_i960CA_testg_reg, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_TESTE_REG, model_i960CA_teste_reg, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_TESTGE_REG, model_i960CA_testge_reg, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_TESTL_REG, model_i960CA_testl_reg, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_TESTNE_REG, model_i960CA_testne_reg, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_TESTLE_REG, model_i960CA_testle_reg, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_TESTO_REG, model_i960CA_testo_reg, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_BNO, model_i960CA_bno, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_BG, model_i960CA_bg, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_BE, model_i960CA_be, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_BGE, model_i960CA_bge, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_BL, model_i960CA_bl, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_BNE, model_i960CA_bne, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_BLE, model_i960CA_ble, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_BO, model_i960CA_bo, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_B, model_i960CA_b, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_BX_INDIRECT_OFFSET, model_i960CA_bx_indirect_offset, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_BX_INDIRECT, model_i960CA_bx_indirect, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_BX_INDIRECT_INDEX, model_i960CA_bx_indirect_index, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_BX_DISP, model_i960CA_bx_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_BX_INDIRECT_DISP, model_i960CA_bx_indirect_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_CALLX_DISP, model_i960CA_callx_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_CALLX_INDIRECT, model_i960CA_callx_indirect, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_CALLX_INDIRECT_OFFSET, model_i960CA_callx_indirect_offset, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_RET, model_i960CA_ret, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_CALLS, model_i960CA_calls, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_FMARK, model_i960CA_fmark, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, - { I960BASE_INSN_FLUSHREG, model_i960CA_flushreg, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } }, -}; - -#endif /* WITH_PROFILE_MODEL_P */ - -static void -i960KA_model_init (SIM_CPU *cpu) -{ - CPU_MODEL_DATA (cpu) = (void *) zalloc (sizeof (MODEL_I960KA_DATA)); -} - -static void -i960CA_model_init (SIM_CPU *cpu) -{ - CPU_MODEL_DATA (cpu) = (void *) zalloc (sizeof (MODEL_I960CA_DATA)); -} - -#if WITH_PROFILE_MODEL_P -#define TIMING_DATA(td) td -#else -#define TIMING_DATA(td) 0 -#endif - -static const MODEL i960_ka_sa_models[] = -{ - { "i960KA", & i960_ka_sa_mach, MODEL_I960KA, TIMING_DATA (& i960KA_timing[0]), i960KA_model_init }, - { 0 } -}; - -static const MODEL i960_ca_models[] = -{ - { "i960CA", & i960_ca_mach, MODEL_I960CA, TIMING_DATA (& i960CA_timing[0]), i960CA_model_init }, - { 0 } -}; - -/* The properties of this cpu's implementation. */ - -static const MACH_IMP_PROPERTIES i960base_imp_properties = -{ - sizeof (SIM_CPU), -#if WITH_SCACHE - sizeof (SCACHE) -#else - 0 -#endif -}; - - -static void -i960base_prepare_run (SIM_CPU *cpu) -{ - if (CPU_IDESC (cpu) == NULL) - i960base_init_idesc_table (cpu); -} - -static const CGEN_INSN * -i960base_get_idata (SIM_CPU *cpu, int inum) -{ - return CPU_IDESC (cpu) [inum].idata; -} - -static void -i960_ka_sa_init_cpu (SIM_CPU *cpu) -{ - CPU_REG_FETCH (cpu) = i960base_fetch_register; - CPU_REG_STORE (cpu) = i960base_store_register; - CPU_PC_FETCH (cpu) = i960base_h_pc_get; - CPU_PC_STORE (cpu) = i960base_h_pc_set; - CPU_GET_IDATA (cpu) = i960base_get_idata; - CPU_MAX_INSNS (cpu) = I960BASE_INSN_MAX; - CPU_INSN_NAME (cpu) = cgen_insn_name; - CPU_FULL_ENGINE_FN (cpu) = i960base_engine_run_full; -#if WITH_FAST - CPU_FAST_ENGINE_FN (cpu) = i960base_engine_run_fast; -#else - CPU_FAST_ENGINE_FN (cpu) = i960base_engine_run_full; -#endif -} - -const MACH i960_ka_sa_mach = -{ - "i960:ka_sa", "i960:ka_sa", MACH_I960_KA_SA, - 32, 32, & i960_ka_sa_models[0], & i960base_imp_properties, - i960_ka_sa_init_cpu, - i960base_prepare_run -}; - -static void -i960_ca_init_cpu (SIM_CPU *cpu) -{ - CPU_REG_FETCH (cpu) = i960base_fetch_register; - CPU_REG_STORE (cpu) = i960base_store_register; - CPU_PC_FETCH (cpu) = i960base_h_pc_get; - CPU_PC_STORE (cpu) = i960base_h_pc_set; - CPU_GET_IDATA (cpu) = i960base_get_idata; - CPU_MAX_INSNS (cpu) = I960BASE_INSN_MAX; - CPU_INSN_NAME (cpu) = cgen_insn_name; - CPU_FULL_ENGINE_FN (cpu) = i960base_engine_run_full; -#if WITH_FAST - CPU_FAST_ENGINE_FN (cpu) = i960base_engine_run_fast; -#else - CPU_FAST_ENGINE_FN (cpu) = i960base_engine_run_full; -#endif -} - -const MACH i960_ca_mach = -{ - "i960:ca", "i960:ca", MACH_I960_CA, - 32, 32, & i960_ca_models[0], & i960base_imp_properties, - i960_ca_init_cpu, - i960base_prepare_run -}; - diff --git a/sim/i960/sem-switch.c b/sim/i960/sem-switch.c deleted file mode 100644 index e1fd336..0000000 --- a/sim/i960/sem-switch.c +++ /dev/null @@ -1,7345 +0,0 @@ -/* Simulator instruction semantics for i960base. - -THIS FILE IS MACHINE GENERATED WITH CGEN. - -Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc. - -This file is part of the GNU Simulators. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -*/ - -#ifdef DEFINE_LABELS - - /* The labels have the case they have because the enum of insn types - is all uppercase and in the non-stdc case the insn symbol is built - into the enum name. */ - - static struct { - int index; - void *label; - } labels[] = { - { I960BASE_INSN_X_INVALID, && case_sem_INSN_X_INVALID }, - { I960BASE_INSN_X_AFTER, && case_sem_INSN_X_AFTER }, - { I960BASE_INSN_X_BEFORE, && case_sem_INSN_X_BEFORE }, - { I960BASE_INSN_X_CTI_CHAIN, && case_sem_INSN_X_CTI_CHAIN }, - { I960BASE_INSN_X_CHAIN, && case_sem_INSN_X_CHAIN }, - { I960BASE_INSN_X_BEGIN, && case_sem_INSN_X_BEGIN }, - { I960BASE_INSN_MULO, && case_sem_INSN_MULO }, - { I960BASE_INSN_MULO1, && case_sem_INSN_MULO1 }, - { I960BASE_INSN_MULO2, && case_sem_INSN_MULO2 }, - { I960BASE_INSN_MULO3, && case_sem_INSN_MULO3 }, - { I960BASE_INSN_REMO, && case_sem_INSN_REMO }, - { I960BASE_INSN_REMO1, && case_sem_INSN_REMO1 }, - { I960BASE_INSN_REMO2, && case_sem_INSN_REMO2 }, - { I960BASE_INSN_REMO3, && case_sem_INSN_REMO3 }, - { I960BASE_INSN_DIVO, && case_sem_INSN_DIVO }, - { I960BASE_INSN_DIVO1, && case_sem_INSN_DIVO1 }, - { I960BASE_INSN_DIVO2, && case_sem_INSN_DIVO2 }, - { I960BASE_INSN_DIVO3, && case_sem_INSN_DIVO3 }, - { I960BASE_INSN_REMI, && case_sem_INSN_REMI }, - { I960BASE_INSN_REMI1, && case_sem_INSN_REMI1 }, - { I960BASE_INSN_REMI2, && case_sem_INSN_REMI2 }, - { I960BASE_INSN_REMI3, && case_sem_INSN_REMI3 }, - { I960BASE_INSN_DIVI, && case_sem_INSN_DIVI }, - { I960BASE_INSN_DIVI1, && case_sem_INSN_DIVI1 }, - { I960BASE_INSN_DIVI2, && case_sem_INSN_DIVI2 }, - { I960BASE_INSN_DIVI3, && case_sem_INSN_DIVI3 }, - { I960BASE_INSN_ADDO, && case_sem_INSN_ADDO }, - { I960BASE_INSN_ADDO1, && case_sem_INSN_ADDO1 }, - { I960BASE_INSN_ADDO2, && case_sem_INSN_ADDO2 }, - { I960BASE_INSN_ADDO3, && case_sem_INSN_ADDO3 }, - { I960BASE_INSN_SUBO, && case_sem_INSN_SUBO }, - { I960BASE_INSN_SUBO1, && case_sem_INSN_SUBO1 }, - { I960BASE_INSN_SUBO2, && case_sem_INSN_SUBO2 }, - { I960BASE_INSN_SUBO3, && case_sem_INSN_SUBO3 }, - { I960BASE_INSN_NOTBIT, && case_sem_INSN_NOTBIT }, - { I960BASE_INSN_NOTBIT1, && case_sem_INSN_NOTBIT1 }, - { I960BASE_INSN_NOTBIT2, && case_sem_INSN_NOTBIT2 }, - { I960BASE_INSN_NOTBIT3, && case_sem_INSN_NOTBIT3 }, - { I960BASE_INSN_AND, && case_sem_INSN_AND }, - { I960BASE_INSN_AND1, && case_sem_INSN_AND1 }, - { I960BASE_INSN_AND2, && case_sem_INSN_AND2 }, - { I960BASE_INSN_AND3, && case_sem_INSN_AND3 }, - { I960BASE_INSN_ANDNOT, && case_sem_INSN_ANDNOT }, - { I960BASE_INSN_ANDNOT1, && case_sem_INSN_ANDNOT1 }, - { I960BASE_INSN_ANDNOT2, && case_sem_INSN_ANDNOT2 }, - { I960BASE_INSN_ANDNOT3, && case_sem_INSN_ANDNOT3 }, - { I960BASE_INSN_SETBIT, && case_sem_INSN_SETBIT }, - { I960BASE_INSN_SETBIT1, && case_sem_INSN_SETBIT1 }, - { I960BASE_INSN_SETBIT2, && case_sem_INSN_SETBIT2 }, - { I960BASE_INSN_SETBIT3, && case_sem_INSN_SETBIT3 }, - { I960BASE_INSN_NOTAND, && case_sem_INSN_NOTAND }, - { I960BASE_INSN_NOTAND1, && case_sem_INSN_NOTAND1 }, - { I960BASE_INSN_NOTAND2, && case_sem_INSN_NOTAND2 }, - { I960BASE_INSN_NOTAND3, && case_sem_INSN_NOTAND3 }, - { I960BASE_INSN_XOR, && case_sem_INSN_XOR }, - { I960BASE_INSN_XOR1, && case_sem_INSN_XOR1 }, - { I960BASE_INSN_XOR2, && case_sem_INSN_XOR2 }, - { I960BASE_INSN_XOR3, && case_sem_INSN_XOR3 }, - { I960BASE_INSN_OR, && case_sem_INSN_OR }, - { I960BASE_INSN_OR1, && case_sem_INSN_OR1 }, - { I960BASE_INSN_OR2, && case_sem_INSN_OR2 }, - { I960BASE_INSN_OR3, && case_sem_INSN_OR3 }, - { I960BASE_INSN_NOR, && case_sem_INSN_NOR }, - { I960BASE_INSN_NOR1, && case_sem_INSN_NOR1 }, - { I960BASE_INSN_NOR2, && case_sem_INSN_NOR2 }, - { I960BASE_INSN_NOR3, && case_sem_INSN_NOR3 }, - { I960BASE_INSN_XNOR, && case_sem_INSN_XNOR }, - { I960BASE_INSN_XNOR1, && case_sem_INSN_XNOR1 }, - { I960BASE_INSN_XNOR2, && case_sem_INSN_XNOR2 }, - { I960BASE_INSN_XNOR3, && case_sem_INSN_XNOR3 }, - { I960BASE_INSN_NOT, && case_sem_INSN_NOT }, - { I960BASE_INSN_NOT1, && case_sem_INSN_NOT1 }, - { I960BASE_INSN_NOT2, && case_sem_INSN_NOT2 }, - { I960BASE_INSN_NOT3, && case_sem_INSN_NOT3 }, - { I960BASE_INSN_ORNOT, && case_sem_INSN_ORNOT }, - { I960BASE_INSN_ORNOT1, && case_sem_INSN_ORNOT1 }, - { I960BASE_INSN_ORNOT2, && case_sem_INSN_ORNOT2 }, - { I960BASE_INSN_ORNOT3, && case_sem_INSN_ORNOT3 }, - { I960BASE_INSN_CLRBIT, && case_sem_INSN_CLRBIT }, - { I960BASE_INSN_CLRBIT1, && case_sem_INSN_CLRBIT1 }, - { I960BASE_INSN_CLRBIT2, && case_sem_INSN_CLRBIT2 }, - { I960BASE_INSN_CLRBIT3, && case_sem_INSN_CLRBIT3 }, - { I960BASE_INSN_SHLO, && case_sem_INSN_SHLO }, - { I960BASE_INSN_SHLO1, && case_sem_INSN_SHLO1 }, - { I960BASE_INSN_SHLO2, && case_sem_INSN_SHLO2 }, - { I960BASE_INSN_SHLO3, && case_sem_INSN_SHLO3 }, - { I960BASE_INSN_SHRO, && case_sem_INSN_SHRO }, - { I960BASE_INSN_SHRO1, && case_sem_INSN_SHRO1 }, - { I960BASE_INSN_SHRO2, && case_sem_INSN_SHRO2 }, - { I960BASE_INSN_SHRO3, && case_sem_INSN_SHRO3 }, - { I960BASE_INSN_SHLI, && case_sem_INSN_SHLI }, - { I960BASE_INSN_SHLI1, && case_sem_INSN_SHLI1 }, - { I960BASE_INSN_SHLI2, && case_sem_INSN_SHLI2 }, - { I960BASE_INSN_SHLI3, && case_sem_INSN_SHLI3 }, - { I960BASE_INSN_SHRI, && case_sem_INSN_SHRI }, - { I960BASE_INSN_SHRI1, && case_sem_INSN_SHRI1 }, - { I960BASE_INSN_SHRI2, && case_sem_INSN_SHRI2 }, - { I960BASE_INSN_SHRI3, && case_sem_INSN_SHRI3 }, - { I960BASE_INSN_EMUL, && case_sem_INSN_EMUL }, - { I960BASE_INSN_EMUL1, && case_sem_INSN_EMUL1 }, - { I960BASE_INSN_EMUL2, && case_sem_INSN_EMUL2 }, - { I960BASE_INSN_EMUL3, && case_sem_INSN_EMUL3 }, - { I960BASE_INSN_MOV, && case_sem_INSN_MOV }, - { I960BASE_INSN_MOV1, && case_sem_INSN_MOV1 }, - { I960BASE_INSN_MOVL, && case_sem_INSN_MOVL }, - { I960BASE_INSN_MOVL1, && case_sem_INSN_MOVL1 }, - { I960BASE_INSN_MOVT, && case_sem_INSN_MOVT }, - { I960BASE_INSN_MOVT1, && case_sem_INSN_MOVT1 }, - { I960BASE_INSN_MOVQ, && case_sem_INSN_MOVQ }, - { I960BASE_INSN_MOVQ1, && case_sem_INSN_MOVQ1 }, - { I960BASE_INSN_MODPC, && case_sem_INSN_MODPC }, - { I960BASE_INSN_MODAC, && case_sem_INSN_MODAC }, - { I960BASE_INSN_LDA_OFFSET, && case_sem_INSN_LDA_OFFSET }, - { I960BASE_INSN_LDA_INDIRECT_OFFSET, && case_sem_INSN_LDA_INDIRECT_OFFSET }, - { I960BASE_INSN_LDA_INDIRECT, && case_sem_INSN_LDA_INDIRECT }, - { I960BASE_INSN_LDA_INDIRECT_INDEX, && case_sem_INSN_LDA_INDIRECT_INDEX }, - { I960BASE_INSN_LDA_DISP, && case_sem_INSN_LDA_DISP }, - { I960BASE_INSN_LDA_INDIRECT_DISP, && case_sem_INSN_LDA_INDIRECT_DISP }, - { I960BASE_INSN_LDA_INDEX_DISP, && case_sem_INSN_LDA_INDEX_DISP }, - { I960BASE_INSN_LDA_INDIRECT_INDEX_DISP, && case_sem_INSN_LDA_INDIRECT_INDEX_DISP }, - { I960BASE_INSN_LD_OFFSET, && case_sem_INSN_LD_OFFSET }, - { I960BASE_INSN_LD_INDIRECT_OFFSET, && case_sem_INSN_LD_INDIRECT_OFFSET }, - { I960BASE_INSN_LD_INDIRECT, && case_sem_INSN_LD_INDIRECT }, - { I960BASE_INSN_LD_INDIRECT_INDEX, && case_sem_INSN_LD_INDIRECT_INDEX }, - { I960BASE_INSN_LD_DISP, && case_sem_INSN_LD_DISP }, - { I960BASE_INSN_LD_INDIRECT_DISP, && case_sem_INSN_LD_INDIRECT_DISP }, - { I960BASE_INSN_LD_INDEX_DISP, && case_sem_INSN_LD_INDEX_DISP }, - { I960BASE_INSN_LD_INDIRECT_INDEX_DISP, && case_sem_INSN_LD_INDIRECT_INDEX_DISP }, - { I960BASE_INSN_LDOB_OFFSET, && case_sem_INSN_LDOB_OFFSET }, - { I960BASE_INSN_LDOB_INDIRECT_OFFSET, && case_sem_INSN_LDOB_INDIRECT_OFFSET }, - { I960BASE_INSN_LDOB_INDIRECT, && case_sem_INSN_LDOB_INDIRECT }, - { I960BASE_INSN_LDOB_INDIRECT_INDEX, && case_sem_INSN_LDOB_INDIRECT_INDEX }, - { I960BASE_INSN_LDOB_DISP, && case_sem_INSN_LDOB_DISP }, - { I960BASE_INSN_LDOB_INDIRECT_DISP, && case_sem_INSN_LDOB_INDIRECT_DISP }, - { I960BASE_INSN_LDOB_INDEX_DISP, && case_sem_INSN_LDOB_INDEX_DISP }, - { I960BASE_INSN_LDOB_INDIRECT_INDEX_DISP, && case_sem_INSN_LDOB_INDIRECT_INDEX_DISP }, - { I960BASE_INSN_LDOS_OFFSET, && case_sem_INSN_LDOS_OFFSET }, - { I960BASE_INSN_LDOS_INDIRECT_OFFSET, && case_sem_INSN_LDOS_INDIRECT_OFFSET }, - { I960BASE_INSN_LDOS_INDIRECT, && case_sem_INSN_LDOS_INDIRECT }, - { I960BASE_INSN_LDOS_INDIRECT_INDEX, && case_sem_INSN_LDOS_INDIRECT_INDEX }, - { I960BASE_INSN_LDOS_DISP, && case_sem_INSN_LDOS_DISP }, - { I960BASE_INSN_LDOS_INDIRECT_DISP, && case_sem_INSN_LDOS_INDIRECT_DISP }, - { I960BASE_INSN_LDOS_INDEX_DISP, && case_sem_INSN_LDOS_INDEX_DISP }, - { I960BASE_INSN_LDOS_INDIRECT_INDEX_DISP, && case_sem_INSN_LDOS_INDIRECT_INDEX_DISP }, - { I960BASE_INSN_LDIB_OFFSET, && case_sem_INSN_LDIB_OFFSET }, - { I960BASE_INSN_LDIB_INDIRECT_OFFSET, && case_sem_INSN_LDIB_INDIRECT_OFFSET }, - { I960BASE_INSN_LDIB_INDIRECT, && case_sem_INSN_LDIB_INDIRECT }, - { I960BASE_INSN_LDIB_INDIRECT_INDEX, && case_sem_INSN_LDIB_INDIRECT_INDEX }, - { I960BASE_INSN_LDIB_DISP, && case_sem_INSN_LDIB_DISP }, - { I960BASE_INSN_LDIB_INDIRECT_DISP, && case_sem_INSN_LDIB_INDIRECT_DISP }, - { I960BASE_INSN_LDIB_INDEX_DISP, && case_sem_INSN_LDIB_INDEX_DISP }, - { I960BASE_INSN_LDIB_INDIRECT_INDEX_DISP, && case_sem_INSN_LDIB_INDIRECT_INDEX_DISP }, - { I960BASE_INSN_LDIS_OFFSET, && case_sem_INSN_LDIS_OFFSET }, - { I960BASE_INSN_LDIS_INDIRECT_OFFSET, && case_sem_INSN_LDIS_INDIRECT_OFFSET }, - { I960BASE_INSN_LDIS_INDIRECT, && case_sem_INSN_LDIS_INDIRECT }, - { I960BASE_INSN_LDIS_INDIRECT_INDEX, && case_sem_INSN_LDIS_INDIRECT_INDEX }, - { I960BASE_INSN_LDIS_DISP, && case_sem_INSN_LDIS_DISP }, - { I960BASE_INSN_LDIS_INDIRECT_DISP, && case_sem_INSN_LDIS_INDIRECT_DISP }, - { I960BASE_INSN_LDIS_INDEX_DISP, && case_sem_INSN_LDIS_INDEX_DISP }, - { I960BASE_INSN_LDIS_INDIRECT_INDEX_DISP, && case_sem_INSN_LDIS_INDIRECT_INDEX_DISP }, - { I960BASE_INSN_LDL_OFFSET, && case_sem_INSN_LDL_OFFSET }, - { I960BASE_INSN_LDL_INDIRECT_OFFSET, && case_sem_INSN_LDL_INDIRECT_OFFSET }, - { I960BASE_INSN_LDL_INDIRECT, && case_sem_INSN_LDL_INDIRECT }, - { I960BASE_INSN_LDL_INDIRECT_INDEX, && case_sem_INSN_LDL_INDIRECT_INDEX }, - { I960BASE_INSN_LDL_DISP, && case_sem_INSN_LDL_DISP }, - { I960BASE_INSN_LDL_INDIRECT_DISP, && case_sem_INSN_LDL_INDIRECT_DISP }, - { I960BASE_INSN_LDL_INDEX_DISP, && case_sem_INSN_LDL_INDEX_DISP }, - { I960BASE_INSN_LDL_INDIRECT_INDEX_DISP, && case_sem_INSN_LDL_INDIRECT_INDEX_DISP }, - { I960BASE_INSN_LDT_OFFSET, && case_sem_INSN_LDT_OFFSET }, - { I960BASE_INSN_LDT_INDIRECT_OFFSET, && case_sem_INSN_LDT_INDIRECT_OFFSET }, - { I960BASE_INSN_LDT_INDIRECT, && case_sem_INSN_LDT_INDIRECT }, - { I960BASE_INSN_LDT_INDIRECT_INDEX, && case_sem_INSN_LDT_INDIRECT_INDEX }, - { I960BASE_INSN_LDT_DISP, && case_sem_INSN_LDT_DISP }, - { I960BASE_INSN_LDT_INDIRECT_DISP, && case_sem_INSN_LDT_INDIRECT_DISP }, - { I960BASE_INSN_LDT_INDEX_DISP, && case_sem_INSN_LDT_INDEX_DISP }, - { I960BASE_INSN_LDT_INDIRECT_INDEX_DISP, && case_sem_INSN_LDT_INDIRECT_INDEX_DISP }, - { I960BASE_INSN_LDQ_OFFSET, && case_sem_INSN_LDQ_OFFSET }, - { I960BASE_INSN_LDQ_INDIRECT_OFFSET, && case_sem_INSN_LDQ_INDIRECT_OFFSET }, - { I960BASE_INSN_LDQ_INDIRECT, && case_sem_INSN_LDQ_INDIRECT }, - { I960BASE_INSN_LDQ_INDIRECT_INDEX, && case_sem_INSN_LDQ_INDIRECT_INDEX }, - { I960BASE_INSN_LDQ_DISP, && case_sem_INSN_LDQ_DISP }, - { I960BASE_INSN_LDQ_INDIRECT_DISP, && case_sem_INSN_LDQ_INDIRECT_DISP }, - { I960BASE_INSN_LDQ_INDEX_DISP, && case_sem_INSN_LDQ_INDEX_DISP }, - { I960BASE_INSN_LDQ_INDIRECT_INDEX_DISP, && case_sem_INSN_LDQ_INDIRECT_INDEX_DISP }, - { I960BASE_INSN_ST_OFFSET, && case_sem_INSN_ST_OFFSET }, - { I960BASE_INSN_ST_INDIRECT_OFFSET, && case_sem_INSN_ST_INDIRECT_OFFSET }, - { I960BASE_INSN_ST_INDIRECT, && case_sem_INSN_ST_INDIRECT }, - { I960BASE_INSN_ST_INDIRECT_INDEX, && case_sem_INSN_ST_INDIRECT_INDEX }, - { I960BASE_INSN_ST_DISP, && case_sem_INSN_ST_DISP }, - { I960BASE_INSN_ST_INDIRECT_DISP, && case_sem_INSN_ST_INDIRECT_DISP }, - { I960BASE_INSN_ST_INDEX_DISP, && case_sem_INSN_ST_INDEX_DISP }, - { I960BASE_INSN_ST_INDIRECT_INDEX_DISP, && case_sem_INSN_ST_INDIRECT_INDEX_DISP }, - { I960BASE_INSN_STOB_OFFSET, && case_sem_INSN_STOB_OFFSET }, - { I960BASE_INSN_STOB_INDIRECT_OFFSET, && case_sem_INSN_STOB_INDIRECT_OFFSET }, - { I960BASE_INSN_STOB_INDIRECT, && case_sem_INSN_STOB_INDIRECT }, - { I960BASE_INSN_STOB_INDIRECT_INDEX, && case_sem_INSN_STOB_INDIRECT_INDEX }, - { I960BASE_INSN_STOB_DISP, && case_sem_INSN_STOB_DISP }, - { I960BASE_INSN_STOB_INDIRECT_DISP, && case_sem_INSN_STOB_INDIRECT_DISP }, - { I960BASE_INSN_STOB_INDEX_DISP, && case_sem_INSN_STOB_INDEX_DISP }, - { I960BASE_INSN_STOB_INDIRECT_INDEX_DISP, && case_sem_INSN_STOB_INDIRECT_INDEX_DISP }, - { I960BASE_INSN_STOS_OFFSET, && case_sem_INSN_STOS_OFFSET }, - { I960BASE_INSN_STOS_INDIRECT_OFFSET, && case_sem_INSN_STOS_INDIRECT_OFFSET }, - { I960BASE_INSN_STOS_INDIRECT, && case_sem_INSN_STOS_INDIRECT }, - { I960BASE_INSN_STOS_INDIRECT_INDEX, && case_sem_INSN_STOS_INDIRECT_INDEX }, - { I960BASE_INSN_STOS_DISP, && case_sem_INSN_STOS_DISP }, - { I960BASE_INSN_STOS_INDIRECT_DISP, && case_sem_INSN_STOS_INDIRECT_DISP }, - { I960BASE_INSN_STOS_INDEX_DISP, && case_sem_INSN_STOS_INDEX_DISP }, - { I960BASE_INSN_STOS_INDIRECT_INDEX_DISP, && case_sem_INSN_STOS_INDIRECT_INDEX_DISP }, - { I960BASE_INSN_STL_OFFSET, && case_sem_INSN_STL_OFFSET }, - { I960BASE_INSN_STL_INDIRECT_OFFSET, && case_sem_INSN_STL_INDIRECT_OFFSET }, - { I960BASE_INSN_STL_INDIRECT, && case_sem_INSN_STL_INDIRECT }, - { I960BASE_INSN_STL_INDIRECT_INDEX, && case_sem_INSN_STL_INDIRECT_INDEX }, - { I960BASE_INSN_STL_DISP, && case_sem_INSN_STL_DISP }, - { I960BASE_INSN_STL_INDIRECT_DISP, && case_sem_INSN_STL_INDIRECT_DISP }, - { I960BASE_INSN_STL_INDEX_DISP, && case_sem_INSN_STL_INDEX_DISP }, - { I960BASE_INSN_STL_INDIRECT_INDEX_DISP, && case_sem_INSN_STL_INDIRECT_INDEX_DISP }, - { I960BASE_INSN_STT_OFFSET, && case_sem_INSN_STT_OFFSET }, - { I960BASE_INSN_STT_INDIRECT_OFFSET, && case_sem_INSN_STT_INDIRECT_OFFSET }, - { I960BASE_INSN_STT_INDIRECT, && case_sem_INSN_STT_INDIRECT }, - { I960BASE_INSN_STT_INDIRECT_INDEX, && case_sem_INSN_STT_INDIRECT_INDEX }, - { I960BASE_INSN_STT_DISP, && case_sem_INSN_STT_DISP }, - { I960BASE_INSN_STT_INDIRECT_DISP, && case_sem_INSN_STT_INDIRECT_DISP }, - { I960BASE_INSN_STT_INDEX_DISP, && case_sem_INSN_STT_INDEX_DISP }, - { I960BASE_INSN_STT_INDIRECT_INDEX_DISP, && case_sem_INSN_STT_INDIRECT_INDEX_DISP }, - { I960BASE_INSN_STQ_OFFSET, && case_sem_INSN_STQ_OFFSET }, - { I960BASE_INSN_STQ_INDIRECT_OFFSET, && case_sem_INSN_STQ_INDIRECT_OFFSET }, - { I960BASE_INSN_STQ_INDIRECT, && case_sem_INSN_STQ_INDIRECT }, - { I960BASE_INSN_STQ_INDIRECT_INDEX, && case_sem_INSN_STQ_INDIRECT_INDEX }, - { I960BASE_INSN_STQ_DISP, && case_sem_INSN_STQ_DISP }, - { I960BASE_INSN_STQ_INDIRECT_DISP, && case_sem_INSN_STQ_INDIRECT_DISP }, - { I960BASE_INSN_STQ_INDEX_DISP, && case_sem_INSN_STQ_INDEX_DISP }, - { I960BASE_INSN_STQ_INDIRECT_INDEX_DISP, && case_sem_INSN_STQ_INDIRECT_INDEX_DISP }, - { I960BASE_INSN_CMPOBE_REG, && case_sem_INSN_CMPOBE_REG }, - { I960BASE_INSN_CMPOBE_LIT, && case_sem_INSN_CMPOBE_LIT }, - { I960BASE_INSN_CMPOBNE_REG, && case_sem_INSN_CMPOBNE_REG }, - { I960BASE_INSN_CMPOBNE_LIT, && case_sem_INSN_CMPOBNE_LIT }, - { I960BASE_INSN_CMPOBL_REG, && case_sem_INSN_CMPOBL_REG }, - { I960BASE_INSN_CMPOBL_LIT, && case_sem_INSN_CMPOBL_LIT }, - { I960BASE_INSN_CMPOBLE_REG, && case_sem_INSN_CMPOBLE_REG }, - { I960BASE_INSN_CMPOBLE_LIT, && case_sem_INSN_CMPOBLE_LIT }, - { I960BASE_INSN_CMPOBG_REG, && case_sem_INSN_CMPOBG_REG }, - { I960BASE_INSN_CMPOBG_LIT, && case_sem_INSN_CMPOBG_LIT }, - { I960BASE_INSN_CMPOBGE_REG, && case_sem_INSN_CMPOBGE_REG }, - { I960BASE_INSN_CMPOBGE_LIT, && case_sem_INSN_CMPOBGE_LIT }, - { I960BASE_INSN_CMPIBE_REG, && case_sem_INSN_CMPIBE_REG }, - { I960BASE_INSN_CMPIBE_LIT, && case_sem_INSN_CMPIBE_LIT }, - { I960BASE_INSN_CMPIBNE_REG, && case_sem_INSN_CMPIBNE_REG }, - { I960BASE_INSN_CMPIBNE_LIT, && case_sem_INSN_CMPIBNE_LIT }, - { I960BASE_INSN_CMPIBL_REG, && case_sem_INSN_CMPIBL_REG }, - { I960BASE_INSN_CMPIBL_LIT, && case_sem_INSN_CMPIBL_LIT }, - { I960BASE_INSN_CMPIBLE_REG, && case_sem_INSN_CMPIBLE_REG }, - { I960BASE_INSN_CMPIBLE_LIT, && case_sem_INSN_CMPIBLE_LIT }, - { I960BASE_INSN_CMPIBG_REG, && case_sem_INSN_CMPIBG_REG }, - { I960BASE_INSN_CMPIBG_LIT, && case_sem_INSN_CMPIBG_LIT }, - { I960BASE_INSN_CMPIBGE_REG, && case_sem_INSN_CMPIBGE_REG }, - { I960BASE_INSN_CMPIBGE_LIT, && case_sem_INSN_CMPIBGE_LIT }, - { I960BASE_INSN_BBC_REG, && case_sem_INSN_BBC_REG }, - { I960BASE_INSN_BBC_LIT, && case_sem_INSN_BBC_LIT }, - { I960BASE_INSN_BBS_REG, && case_sem_INSN_BBS_REG }, - { I960BASE_INSN_BBS_LIT, && case_sem_INSN_BBS_LIT }, - { I960BASE_INSN_CMPI, && case_sem_INSN_CMPI }, - { I960BASE_INSN_CMPI1, && case_sem_INSN_CMPI1 }, - { I960BASE_INSN_CMPI2, && case_sem_INSN_CMPI2 }, - { I960BASE_INSN_CMPI3, && case_sem_INSN_CMPI3 }, - { I960BASE_INSN_CMPO, && case_sem_INSN_CMPO }, - { I960BASE_INSN_CMPO1, && case_sem_INSN_CMPO1 }, - { I960BASE_INSN_CMPO2, && case_sem_INSN_CMPO2 }, - { I960BASE_INSN_CMPO3, && case_sem_INSN_CMPO3 }, - { I960BASE_INSN_TESTNO_REG, && case_sem_INSN_TESTNO_REG }, - { I960BASE_INSN_TESTG_REG, && case_sem_INSN_TESTG_REG }, - { I960BASE_INSN_TESTE_REG, && case_sem_INSN_TESTE_REG }, - { I960BASE_INSN_TESTGE_REG, && case_sem_INSN_TESTGE_REG }, - { I960BASE_INSN_TESTL_REG, && case_sem_INSN_TESTL_REG }, - { I960BASE_INSN_TESTNE_REG, && case_sem_INSN_TESTNE_REG }, - { I960BASE_INSN_TESTLE_REG, && case_sem_INSN_TESTLE_REG }, - { I960BASE_INSN_TESTO_REG, && case_sem_INSN_TESTO_REG }, - { I960BASE_INSN_BNO, && case_sem_INSN_BNO }, - { I960BASE_INSN_BG, && case_sem_INSN_BG }, - { I960BASE_INSN_BE, && case_sem_INSN_BE }, - { I960BASE_INSN_BGE, && case_sem_INSN_BGE }, - { I960BASE_INSN_BL, && case_sem_INSN_BL }, - { I960BASE_INSN_BNE, && case_sem_INSN_BNE }, - { I960BASE_INSN_BLE, && case_sem_INSN_BLE }, - { I960BASE_INSN_BO, && case_sem_INSN_BO }, - { I960BASE_INSN_B, && case_sem_INSN_B }, - { I960BASE_INSN_BX_INDIRECT_OFFSET, && case_sem_INSN_BX_INDIRECT_OFFSET }, - { I960BASE_INSN_BX_INDIRECT, && case_sem_INSN_BX_INDIRECT }, - { I960BASE_INSN_BX_INDIRECT_INDEX, && case_sem_INSN_BX_INDIRECT_INDEX }, - { I960BASE_INSN_BX_DISP, && case_sem_INSN_BX_DISP }, - { I960BASE_INSN_BX_INDIRECT_DISP, && case_sem_INSN_BX_INDIRECT_DISP }, - { I960BASE_INSN_CALLX_DISP, && case_sem_INSN_CALLX_DISP }, - { I960BASE_INSN_CALLX_INDIRECT, && case_sem_INSN_CALLX_INDIRECT }, - { I960BASE_INSN_CALLX_INDIRECT_OFFSET, && case_sem_INSN_CALLX_INDIRECT_OFFSET }, - { I960BASE_INSN_RET, && case_sem_INSN_RET }, - { I960BASE_INSN_CALLS, && case_sem_INSN_CALLS }, - { I960BASE_INSN_FMARK, && case_sem_INSN_FMARK }, - { I960BASE_INSN_FLUSHREG, && case_sem_INSN_FLUSHREG }, - { 0, 0 } - }; - int i; - - for (i = 0; labels[i].label != 0; ++i) - { -#if FAST_P - CPU_IDESC (current_cpu) [labels[i].index].sem_fast_lab = labels[i].label; -#else - CPU_IDESC (current_cpu) [labels[i].index].sem_full_lab = labels[i].label; -#endif - } - -#undef DEFINE_LABELS -#endif /* DEFINE_LABELS */ - -#ifdef DEFINE_SWITCH - -/* If hyper-fast [well not unnecessarily slow] execution is selected, turn - off frills like tracing and profiling. */ -/* FIXME: A better way would be to have TRACE_RESULT check for something - that can cause it to be optimized out. Another way would be to emit - special handlers into the instruction "stream". */ - -#if FAST_P -#undef TRACE_RESULT -#define TRACE_RESULT(cpu, abuf, name, type, val) -#endif - -#undef GET_ATTR -#define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_##attr) - -{ - -#if WITH_SCACHE_PBB - -/* Branch to next handler without going around main loop. */ -#define NEXT(vpc) goto * SEM_ARGBUF (vpc) -> semantic.sem_case -SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) - -#else /* ! WITH_SCACHE_PBB */ - -#define NEXT(vpc) BREAK (sem) -#ifdef __GNUC__ -#if FAST_P - SWITCH (sem, SEM_ARGBUF (sc) -> idesc->sem_fast_lab) -#else - SWITCH (sem, SEM_ARGBUF (sc) -> idesc->sem_full_lab) -#endif -#else - SWITCH (sem, SEM_ARGBUF (sc) -> idesc->num) -#endif - -#endif /* ! WITH_SCACHE_PBB */ - - { - - CASE (sem, INSN_X_INVALID) : /* --invalid-- */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - { - /* Update the recorded pc in the cpu state struct. - Only necessary for WITH_SCACHE case, but to avoid the - conditional compilation .... */ - SET_H_PC (pc); - /* Virtual insns have zero size. Overwrite vpc with address of next insn - using the default-insn-bitsize spec. When executing insns in parallel - we may want to queue the fault and continue execution. */ - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - vpc = sim_engine_invalid_insn (current_cpu, pc, vpc); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_X_AFTER) : /* --after-- */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - { -#if WITH_SCACHE_PBB_I960BASE - i960base_pbb_after (current_cpu, sem_arg); -#endif - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_X_BEFORE) : /* --before-- */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - { -#if WITH_SCACHE_PBB_I960BASE - i960base_pbb_before (current_cpu, sem_arg); -#endif - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_X_CTI_CHAIN) : /* --cti-chain-- */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - { -#if WITH_SCACHE_PBB_I960BASE -#ifdef DEFINE_SWITCH - vpc = i960base_pbb_cti_chain (current_cpu, sem_arg, - pbb_br_type, pbb_br_npc); - BREAK (sem); -#else - /* FIXME: Allow provision of explicit ifmt spec in insn spec. */ - vpc = i960base_pbb_cti_chain (current_cpu, sem_arg, - CPU_PBB_BR_TYPE (current_cpu), - CPU_PBB_BR_NPC (current_cpu)); -#endif -#endif - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_X_CHAIN) : /* --chain-- */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - { -#if WITH_SCACHE_PBB_I960BASE - vpc = i960base_pbb_chain (current_cpu, sem_arg); -#ifdef DEFINE_SWITCH - BREAK (sem); -#endif -#endif - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_X_BEGIN) : /* --begin-- */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - { -#if WITH_SCACHE_PBB_I960BASE -#ifdef DEFINE_SWITCH - /* In the switch case FAST_P is a constant, allowing several optimizations - in any called inline functions. */ - vpc = i960base_pbb_begin (current_cpu, FAST_P); -#else - vpc = i960base_pbb_begin (current_cpu, STATE_RUN_FAST_P (CPU_STATE (current_cpu))); -#endif -#endif - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MULO) : /* mulo $src1, $src2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = MULSI (* FLD (i_src1), * FLD (i_src2)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MULO1) : /* mulo $lit1, $src2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul1.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = MULSI (FLD (f_src1), * FLD (i_src2)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MULO2) : /* mulo $src1, $lit2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul2.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = MULSI (* FLD (i_src1), FLD (f_src2)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MULO3) : /* mulo $lit1, $lit2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul3.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = MULSI (FLD (f_src1), FLD (f_src2)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_REMO) : /* remo $src1, $src2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = UMODSI (* FLD (i_src2), * FLD (i_src1)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_REMO1) : /* remo $lit1, $src2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul1.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = UMODSI (* FLD (i_src2), FLD (f_src1)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_REMO2) : /* remo $src1, $lit2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul2.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = UMODSI (FLD (f_src2), * FLD (i_src1)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_REMO3) : /* remo $lit1, $lit2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul3.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = UMODSI (FLD (f_src2), FLD (f_src1)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_DIVO) : /* divo $src1, $src2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = UDIVSI (* FLD (i_src2), * FLD (i_src1)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_DIVO1) : /* divo $lit1, $src2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul1.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = UDIVSI (* FLD (i_src2), FLD (f_src1)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_DIVO2) : /* divo $src1, $lit2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul2.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = UDIVSI (FLD (f_src2), * FLD (i_src1)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_DIVO3) : /* divo $lit1, $lit2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul3.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = UDIVSI (FLD (f_src2), FLD (f_src1)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_REMI) : /* remi $src1, $src2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = MODSI (* FLD (i_src2), * FLD (i_src1)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_REMI1) : /* remi $lit1, $src2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul1.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = MODSI (* FLD (i_src2), FLD (f_src1)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_REMI2) : /* remi $src1, $lit2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul2.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = MODSI (FLD (f_src2), * FLD (i_src1)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_REMI3) : /* remi $lit1, $lit2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul3.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = MODSI (FLD (f_src2), FLD (f_src1)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_DIVI) : /* divi $src1, $src2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = DIVSI (* FLD (i_src2), * FLD (i_src1)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_DIVI1) : /* divi $lit1, $src2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul1.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = DIVSI (* FLD (i_src2), FLD (f_src1)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_DIVI2) : /* divi $src1, $lit2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul2.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = DIVSI (FLD (f_src2), * FLD (i_src1)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_DIVI3) : /* divi $lit1, $lit2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul3.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = DIVSI (FLD (f_src2), FLD (f_src1)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ADDO) : /* addo $src1, $src2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ADDSI (* FLD (i_src1), * FLD (i_src2)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ADDO1) : /* addo $lit1, $src2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul1.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ADDSI (FLD (f_src1), * FLD (i_src2)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ADDO2) : /* addo $src1, $lit2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul2.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ADDSI (* FLD (i_src1), FLD (f_src2)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ADDO3) : /* addo $lit1, $lit2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul3.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ADDSI (FLD (f_src1), FLD (f_src2)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SUBO) : /* subo $src1, $src2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = SUBSI (* FLD (i_src2), * FLD (i_src1)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SUBO1) : /* subo $lit1, $src2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul1.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = SUBSI (* FLD (i_src2), FLD (f_src1)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SUBO2) : /* subo $src1, $lit2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul2.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = SUBSI (FLD (f_src2), * FLD (i_src1)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SUBO3) : /* subo $lit1, $lit2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul3.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = SUBSI (FLD (f_src2), FLD (f_src1)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_NOTBIT) : /* notbit $src1, $src2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = XORSI (SLLSI (1, * FLD (i_src1)), * FLD (i_src2)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_NOTBIT1) : /* notbit $lit1, $src2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul1.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = XORSI (SLLSI (1, FLD (f_src1)), * FLD (i_src2)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_NOTBIT2) : /* notbit $src1, $lit2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul2.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = XORSI (SLLSI (1, * FLD (i_src1)), FLD (f_src2)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_NOTBIT3) : /* notbit $lit1, $lit2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul3.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = XORSI (SLLSI (1, FLD (f_src1)), FLD (f_src2)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_AND) : /* and $src1, $src2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ANDSI (* FLD (i_src1), * FLD (i_src2)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_AND1) : /* and $lit1, $src2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul1.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ANDSI (FLD (f_src1), * FLD (i_src2)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_AND2) : /* and $src1, $lit2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul2.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ANDSI (* FLD (i_src1), FLD (f_src2)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_AND3) : /* and $lit1, $lit2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul3.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ANDSI (FLD (f_src1), FLD (f_src2)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ANDNOT) : /* andnot $src1, $src2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ANDSI (* FLD (i_src2), INVSI (* FLD (i_src1))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ANDNOT1) : /* andnot $lit1, $src2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul1.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ANDSI (* FLD (i_src2), INVSI (FLD (f_src1))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ANDNOT2) : /* andnot $src1, $lit2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul2.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ANDSI (FLD (f_src2), INVSI (* FLD (i_src1))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ANDNOT3) : /* andnot $lit1, $lit2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul3.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ANDSI (FLD (f_src2), INVSI (FLD (f_src1))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SETBIT) : /* setbit $src1, $src2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ORSI (SLLSI (1, * FLD (i_src1)), * FLD (i_src2)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SETBIT1) : /* setbit $lit1, $src2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul1.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ORSI (SLLSI (1, FLD (f_src1)), * FLD (i_src2)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SETBIT2) : /* setbit $src1, $lit2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul2.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ORSI (SLLSI (1, * FLD (i_src1)), FLD (f_src2)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SETBIT3) : /* setbit $lit1, $lit2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul3.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ORSI (SLLSI (1, FLD (f_src1)), FLD (f_src2)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_NOTAND) : /* notand $src1, $src2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ANDSI (INVSI (* FLD (i_src2)), * FLD (i_src1)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_NOTAND1) : /* notand $lit1, $src2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul1.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ANDSI (INVSI (* FLD (i_src2)), FLD (f_src1)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_NOTAND2) : /* notand $src1, $lit2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul2.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ANDSI (INVSI (FLD (f_src2)), * FLD (i_src1)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_NOTAND3) : /* notand $lit1, $lit2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul3.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ANDSI (INVSI (FLD (f_src2)), FLD (f_src1)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_XOR) : /* xor $src1, $src2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = XORSI (* FLD (i_src1), * FLD (i_src2)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_XOR1) : /* xor $lit1, $src2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul1.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = XORSI (FLD (f_src1), * FLD (i_src2)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_XOR2) : /* xor $src1, $lit2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul2.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = XORSI (* FLD (i_src1), FLD (f_src2)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_XOR3) : /* xor $lit1, $lit2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul3.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = XORSI (FLD (f_src1), FLD (f_src2)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_OR) : /* or $src1, $src2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ORSI (* FLD (i_src1), * FLD (i_src2)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_OR1) : /* or $lit1, $src2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul1.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ORSI (FLD (f_src1), * FLD (i_src2)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_OR2) : /* or $src1, $lit2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul2.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ORSI (* FLD (i_src1), FLD (f_src2)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_OR3) : /* or $lit1, $lit2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul3.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ORSI (FLD (f_src1), FLD (f_src2)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_NOR) : /* nor $src1, $src2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ANDSI (INVSI (* FLD (i_src2)), INVSI (* FLD (i_src1))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_NOR1) : /* nor $lit1, $src2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul1.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ANDSI (INVSI (* FLD (i_src2)), INVSI (FLD (f_src1))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_NOR2) : /* nor $src1, $lit2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul2.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ANDSI (INVSI (FLD (f_src2)), INVSI (* FLD (i_src1))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_NOR3) : /* nor $lit1, $lit2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul3.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ANDSI (INVSI (FLD (f_src2)), INVSI (FLD (f_src1))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_XNOR) : /* xnor $src1, $src2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = INVSI (XORSI (* FLD (i_src1), * FLD (i_src2))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_XNOR1) : /* xnor $lit1, $src2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul1.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = INVSI (XORSI (FLD (f_src1), * FLD (i_src2))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_XNOR2) : /* xnor $src1, $lit2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul2.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = INVSI (XORSI (* FLD (i_src1), FLD (f_src2))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_XNOR3) : /* xnor $lit1, $lit2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul3.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = INVSI (XORSI (FLD (f_src1), FLD (f_src2))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_NOT) : /* not $src1, $src2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul2.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = INVSI (* FLD (i_src1)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_NOT1) : /* not $lit1, $src2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul3.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = INVSI (FLD (f_src1)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_NOT2) : /* not $src1, $lit2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul2.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = INVSI (* FLD (i_src1)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_NOT3) : /* not $lit1, $lit2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul3.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = INVSI (FLD (f_src1)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ORNOT) : /* ornot $src1, $src2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ORSI (* FLD (i_src2), INVSI (* FLD (i_src1))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ORNOT1) : /* ornot $lit1, $src2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul1.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ORSI (* FLD (i_src2), INVSI (FLD (f_src1))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ORNOT2) : /* ornot $src1, $lit2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul2.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ORSI (FLD (f_src2), INVSI (* FLD (i_src1))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ORNOT3) : /* ornot $lit1, $lit2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul3.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ORSI (FLD (f_src2), INVSI (FLD (f_src1))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_CLRBIT) : /* clrbit $src1, $src2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ANDSI (INVSI (SLLSI (1, * FLD (i_src1))), * FLD (i_src2)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_CLRBIT1) : /* clrbit $lit1, $src2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul1.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ANDSI (INVSI (SLLSI (1, FLD (f_src1))), * FLD (i_src2)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_CLRBIT2) : /* clrbit $src1, $lit2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul2.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ANDSI (INVSI (SLLSI (1, * FLD (i_src1))), FLD (f_src2)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_CLRBIT3) : /* clrbit $lit1, $lit2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul3.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ANDSI (INVSI (SLLSI (1, FLD (f_src1))), FLD (f_src2)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SHLO) : /* shlo $src1, $src2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = (GEUSI (* FLD (i_src1), 32)) ? (0) : (SLLSI (* FLD (i_src2), * FLD (i_src1))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SHLO1) : /* shlo $lit1, $src2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul1.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = (GEUSI (FLD (f_src1), 32)) ? (0) : (SLLSI (* FLD (i_src2), FLD (f_src1))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SHLO2) : /* shlo $src1, $lit2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul2.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = (GEUSI (* FLD (i_src1), 32)) ? (0) : (SLLSI (FLD (f_src2), * FLD (i_src1))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SHLO3) : /* shlo $lit1, $lit2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul3.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = (GEUSI (FLD (f_src1), 32)) ? (0) : (SLLSI (FLD (f_src2), FLD (f_src1))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SHRO) : /* shro $src1, $src2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = (GEUSI (* FLD (i_src1), 32)) ? (0) : (SRLSI (* FLD (i_src2), * FLD (i_src1))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SHRO1) : /* shro $lit1, $src2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul1.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = (GEUSI (FLD (f_src1), 32)) ? (0) : (SRLSI (* FLD (i_src2), FLD (f_src1))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SHRO2) : /* shro $src1, $lit2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul2.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = (GEUSI (* FLD (i_src1), 32)) ? (0) : (SRLSI (FLD (f_src2), * FLD (i_src1))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SHRO3) : /* shro $lit1, $lit2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul3.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = (GEUSI (FLD (f_src1), 32)) ? (0) : (SRLSI (FLD (f_src2), FLD (f_src1))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SHLI) : /* shli $src1, $src2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = (GEUSI (* FLD (i_src1), 32)) ? (0) : (SLLSI (* FLD (i_src2), * FLD (i_src1))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SHLI1) : /* shli $lit1, $src2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul1.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = (GEUSI (FLD (f_src1), 32)) ? (0) : (SLLSI (* FLD (i_src2), FLD (f_src1))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SHLI2) : /* shli $src1, $lit2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul2.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = (GEUSI (* FLD (i_src1), 32)) ? (0) : (SLLSI (FLD (f_src2), * FLD (i_src1))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SHLI3) : /* shli $lit1, $lit2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul3.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = (GEUSI (FLD (f_src1), 32)) ? (0) : (SLLSI (FLD (f_src2), FLD (f_src1))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SHRI) : /* shri $src1, $src2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = (GEUSI (* FLD (i_src1), 32)) ? (SRASI (* FLD (i_src2), 31)) : (SRASI (* FLD (i_src2), * FLD (i_src1))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SHRI1) : /* shri $lit1, $src2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul1.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = (GEUSI (FLD (f_src1), 32)) ? (SRASI (* FLD (i_src2), 31)) : (SRASI (* FLD (i_src2), FLD (f_src1))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SHRI2) : /* shri $src1, $lit2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul2.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = (GEUSI (* FLD (i_src1), 32)) ? (SRASI (FLD (f_src2), 31)) : (SRASI (FLD (f_src2), * FLD (i_src1))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SHRI3) : /* shri $lit1, $lit2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul3.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = (GEUSI (FLD (f_src1), 32)) ? (SRASI (FLD (f_src2), 31)) : (SRASI (FLD (f_src2), FLD (f_src1))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_EMUL) : /* emul $src1, $src2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - DI tmp_temp; - SI tmp_dregno; - tmp_temp = MULDI (ZEXTSIDI (* FLD (i_src1)), ZEXTSIDI (* FLD (i_src2))); - tmp_dregno = FLD (f_srcdst); - { - SI opval = TRUNCDISI (tmp_temp); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - { - SI opval = TRUNCDISI (SRLDI (tmp_temp, 32)); - CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_EMUL1) : /* emul $lit1, $src2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul1.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - DI tmp_temp; - SI tmp_dregno; - tmp_temp = MULDI (ZEXTSIDI (FLD (f_src1)), ZEXTSIDI (* FLD (i_src2))); - tmp_dregno = FLD (f_srcdst); - { - SI opval = TRUNCDISI (tmp_temp); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - { - SI opval = TRUNCDISI (SRLDI (tmp_temp, 32)); - CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_EMUL2) : /* emul $src1, $lit2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul2.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - DI tmp_temp; - SI tmp_dregno; - tmp_temp = MULDI (ZEXTSIDI (* FLD (i_src1)), ZEXTSIDI (FLD (f_src2))); - tmp_dregno = FLD (f_srcdst); - { - SI opval = TRUNCDISI (tmp_temp); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - { - SI opval = TRUNCDISI (SRLDI (tmp_temp, 32)); - CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_EMUL3) : /* emul $lit1, $lit2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul3.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - DI tmp_temp; - SI tmp_dregno; - tmp_temp = MULDI (ZEXTSIDI (FLD (f_src1)), ZEXTSIDI (FLD (f_src2))); - tmp_dregno = FLD (f_srcdst); - { - SI opval = TRUNCDISI (tmp_temp); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - { - SI opval = TRUNCDISI (SRLDI (tmp_temp, 32)); - CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MOV) : /* mov $src1, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul2.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = * FLD (i_src1); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MOV1) : /* mov $lit1, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul3.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = FLD (f_src1); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MOVL) : /* movl $src1, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movq.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_dregno; - SI tmp_sregno; - tmp_dregno = FLD (f_srcdst); - tmp_sregno = FLD (f_src1); - { - SI opval = * FLD (i_src1); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_src1)) + (1))]); - CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MOVL1) : /* movl $lit1, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul3.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_dregno; - tmp_dregno = FLD (f_srcdst); - { - SI opval = FLD (f_src1); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - { - SI opval = 0; - CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MOVT) : /* movt $src1, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movq.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_dregno; - SI tmp_sregno; - tmp_dregno = FLD (f_srcdst); - tmp_sregno = FLD (f_src1); - { - SI opval = * FLD (i_src1); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_src1)) + (1))]); - CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_src1)) + (2))]); - CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MOVT1) : /* movt $lit1, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movq.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_dregno; - tmp_dregno = FLD (f_srcdst); - { - SI opval = FLD (f_src1); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - { - SI opval = 0; - CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); - } - { - SI opval = 0; - CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MOVQ) : /* movq $src1, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movq.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_dregno; - SI tmp_sregno; - tmp_dregno = FLD (f_srcdst); - tmp_sregno = FLD (f_src1); - { - SI opval = * FLD (i_src1); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_src1)) + (1))]); - CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_src1)) + (2))]); - CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_src1)) + (3))]); - CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-3", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MOVQ1) : /* movq $lit1, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movq.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_dregno; - tmp_dregno = FLD (f_srcdst); - { - SI opval = FLD (f_src1); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - { - SI opval = 0; - CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); - } - { - SI opval = 0; - CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval); - } - { - SI opval = 0; - CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-3", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MODPC) : /* modpc $src1, $src2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul1.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = * FLD (i_src2); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MODAC) : /* modac $src1, $src2, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul1.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = * FLD (i_src2); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDA_OFFSET) : /* lda $offset, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = FLD (f_offset); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDA_INDIRECT_OFFSET) : /* lda $offset($abase), $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ADDSI (FLD (f_offset), * FLD (i_abase)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDA_INDIRECT) : /* lda ($abase), $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = * FLD (i_abase); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDA_INDIRECT_INDEX) : /* lda ($abase)[$index*S$scale], $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDA_DISP) : /* lda $optdisp, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - - { - SI opval = FLD (f_optdisp); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDA_INDIRECT_DISP) : /* lda $optdisp($abase), $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - - { - SI opval = ADDSI (FLD (f_optdisp), * FLD (i_abase)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDA_INDEX_DISP) : /* lda $optdisp[$index*S$scale], $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - - { - SI opval = ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDA_INDIRECT_INDEX_DISP) : /* lda $optdisp($abase)[$index*S$scale], $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - - { - SI opval = ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LD_OFFSET) : /* ld $offset, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = GETMEMSI (current_cpu, pc, FLD (f_offset)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LD_INDIRECT_OFFSET) : /* ld $offset($abase), $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LD_INDIRECT) : /* ld ($abase), $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = GETMEMSI (current_cpu, pc, * FLD (i_abase)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LD_INDIRECT_INDEX) : /* ld ($abase)[$index*S$scale], $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LD_DISP) : /* ld $optdisp, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - - { - SI opval = GETMEMSI (current_cpu, pc, FLD (f_optdisp)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LD_INDIRECT_DISP) : /* ld $optdisp($abase), $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LD_INDEX_DISP) : /* ld $optdisp[$index*S$scale], $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LD_INDIRECT_INDEX_DISP) : /* ld $optdisp($abase)[$index*S$scale], $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDOB_OFFSET) : /* ldob $offset, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = GETMEMUQI (current_cpu, pc, FLD (f_offset)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDOB_INDIRECT_OFFSET) : /* ldob $offset($abase), $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = GETMEMUQI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDOB_INDIRECT) : /* ldob ($abase), $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = GETMEMUQI (current_cpu, pc, * FLD (i_abase)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDOB_INDIRECT_INDEX) : /* ldob ($abase)[$index*S$scale], $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = GETMEMUQI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDOB_DISP) : /* ldob $optdisp, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - - { - SI opval = GETMEMUQI (current_cpu, pc, FLD (f_optdisp)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDOB_INDIRECT_DISP) : /* ldob $optdisp($abase), $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - - { - SI opval = GETMEMUQI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDOB_INDEX_DISP) : /* ldob $optdisp[$index*S$scale], $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - - { - SI opval = GETMEMUQI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDOB_INDIRECT_INDEX_DISP) : /* ldob $optdisp($abase)[$index*S$scale], $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - - { - SI opval = GETMEMUQI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDOS_OFFSET) : /* ldos $offset, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = GETMEMUHI (current_cpu, pc, FLD (f_offset)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDOS_INDIRECT_OFFSET) : /* ldos $offset($abase), $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = GETMEMUHI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDOS_INDIRECT) : /* ldos ($abase), $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = GETMEMUHI (current_cpu, pc, * FLD (i_abase)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDOS_INDIRECT_INDEX) : /* ldos ($abase)[$index*S$scale], $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = GETMEMUHI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDOS_DISP) : /* ldos $optdisp, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - - { - SI opval = GETMEMUHI (current_cpu, pc, FLD (f_optdisp)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDOS_INDIRECT_DISP) : /* ldos $optdisp($abase), $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - - { - SI opval = GETMEMUHI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDOS_INDEX_DISP) : /* ldos $optdisp[$index*S$scale], $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - - { - SI opval = GETMEMUHI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDOS_INDIRECT_INDEX_DISP) : /* ldos $optdisp($abase)[$index*S$scale], $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - - { - SI opval = GETMEMUHI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDIB_OFFSET) : /* ldib $offset, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = GETMEMQI (current_cpu, pc, FLD (f_offset)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDIB_INDIRECT_OFFSET) : /* ldib $offset($abase), $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = GETMEMQI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDIB_INDIRECT) : /* ldib ($abase), $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = GETMEMQI (current_cpu, pc, * FLD (i_abase)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDIB_INDIRECT_INDEX) : /* ldib ($abase)[$index*S$scale], $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = GETMEMQI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDIB_DISP) : /* ldib $optdisp, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - - { - SI opval = GETMEMQI (current_cpu, pc, FLD (f_optdisp)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDIB_INDIRECT_DISP) : /* ldib $optdisp($abase), $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - - { - SI opval = GETMEMQI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDIB_INDEX_DISP) : /* ldib $optdisp[$index*S$scale], $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - - { - SI opval = GETMEMQI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDIB_INDIRECT_INDEX_DISP) : /* ldib $optdisp($abase)[$index*S$scale], $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - - { - SI opval = GETMEMQI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDIS_OFFSET) : /* ldis $offset, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = GETMEMHI (current_cpu, pc, FLD (f_offset)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDIS_INDIRECT_OFFSET) : /* ldis $offset($abase), $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = GETMEMHI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDIS_INDIRECT) : /* ldis ($abase), $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = GETMEMHI (current_cpu, pc, * FLD (i_abase)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDIS_INDIRECT_INDEX) : /* ldis ($abase)[$index*S$scale], $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = GETMEMHI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDIS_DISP) : /* ldis $optdisp, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - - { - SI opval = GETMEMHI (current_cpu, pc, FLD (f_optdisp)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDIS_INDIRECT_DISP) : /* ldis $optdisp($abase), $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - - { - SI opval = GETMEMHI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDIS_INDEX_DISP) : /* ldis $optdisp[$index*S$scale], $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - - { - SI opval = GETMEMHI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDIS_INDIRECT_INDEX_DISP) : /* ldis $optdisp($abase)[$index*S$scale], $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - - { - SI opval = GETMEMHI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDL_OFFSET) : /* ldl $offset, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_temp; - SI tmp_dregno; - tmp_dregno = FLD (f_srcdst); - tmp_temp = FLD (f_offset); - { - SI opval = GETMEMSI (current_cpu, pc, tmp_temp); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); - CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDL_INDIRECT_OFFSET) : /* ldl $offset($abase), $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_temp; - SI tmp_dregno; - tmp_dregno = FLD (f_srcdst); - tmp_temp = ADDSI (FLD (f_offset), * FLD (i_abase)); - { - SI opval = GETMEMSI (current_cpu, pc, tmp_temp); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); - CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDL_INDIRECT) : /* ldl ($abase), $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_temp; - SI tmp_dregno; - tmp_dregno = FLD (f_srcdst); - tmp_temp = * FLD (i_abase); - { - SI opval = GETMEMSI (current_cpu, pc, tmp_temp); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); - CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDL_INDIRECT_INDEX) : /* ldl ($abase)[$index*S$scale], $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_temp; - SI tmp_dregno; - tmp_dregno = FLD (f_srcdst); - tmp_temp = ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))); - { - SI opval = GETMEMSI (current_cpu, pc, tmp_temp); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); - CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDL_DISP) : /* ldl $optdisp, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - -{ - SI tmp_temp; - SI tmp_dregno; - tmp_dregno = FLD (f_srcdst); - tmp_temp = FLD (f_optdisp); - { - SI opval = GETMEMSI (current_cpu, pc, tmp_temp); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); - CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDL_INDIRECT_DISP) : /* ldl $optdisp($abase), $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - -{ - SI tmp_temp; - SI tmp_dregno; - tmp_dregno = FLD (f_srcdst); - tmp_temp = ADDSI (FLD (f_optdisp), * FLD (i_abase)); - { - SI opval = GETMEMSI (current_cpu, pc, tmp_temp); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); - CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDL_INDEX_DISP) : /* ldl $optdisp[$index*S$scale], $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - -{ - SI tmp_temp; - SI tmp_dregno; - tmp_dregno = FLD (f_srcdst); - tmp_temp = ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))); - { - SI opval = GETMEMSI (current_cpu, pc, tmp_temp); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); - CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDL_INDIRECT_INDEX_DISP) : /* ldl $optdisp($abase)[$index*S$scale], $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - -{ - SI tmp_temp; - SI tmp_dregno; - tmp_dregno = FLD (f_srcdst); - tmp_temp = ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))); - { - SI opval = GETMEMSI (current_cpu, pc, tmp_temp); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); - CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDT_OFFSET) : /* ldt $offset, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_temp; - SI tmp_dregno; - tmp_dregno = FLD (f_srcdst); - tmp_temp = FLD (f_offset); - { - SI opval = GETMEMSI (current_cpu, pc, tmp_temp); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); - CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8)); - CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDT_INDIRECT_OFFSET) : /* ldt $offset($abase), $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_temp; - SI tmp_dregno; - tmp_dregno = FLD (f_srcdst); - tmp_temp = ADDSI (FLD (f_offset), * FLD (i_abase)); - { - SI opval = GETMEMSI (current_cpu, pc, tmp_temp); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); - CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8)); - CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDT_INDIRECT) : /* ldt ($abase), $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_temp; - SI tmp_dregno; - tmp_dregno = FLD (f_srcdst); - tmp_temp = * FLD (i_abase); - { - SI opval = GETMEMSI (current_cpu, pc, tmp_temp); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); - CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8)); - CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDT_INDIRECT_INDEX) : /* ldt ($abase)[$index*S$scale], $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_temp; - SI tmp_dregno; - tmp_dregno = FLD (f_srcdst); - tmp_temp = ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))); - { - SI opval = GETMEMSI (current_cpu, pc, tmp_temp); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); - CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8)); - CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDT_DISP) : /* ldt $optdisp, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - -{ - SI tmp_temp; - SI tmp_dregno; - tmp_dregno = FLD (f_srcdst); - tmp_temp = FLD (f_optdisp); - { - SI opval = GETMEMSI (current_cpu, pc, tmp_temp); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); - CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8)); - CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDT_INDIRECT_DISP) : /* ldt $optdisp($abase), $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - -{ - SI tmp_temp; - SI tmp_dregno; - tmp_dregno = FLD (f_srcdst); - tmp_temp = ADDSI (FLD (f_optdisp), * FLD (i_abase)); - { - SI opval = GETMEMSI (current_cpu, pc, tmp_temp); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); - CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8)); - CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDT_INDEX_DISP) : /* ldt $optdisp[$index*S$scale], $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - -{ - SI tmp_temp; - SI tmp_dregno; - tmp_dregno = FLD (f_srcdst); - tmp_temp = ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))); - { - SI opval = GETMEMSI (current_cpu, pc, tmp_temp); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); - CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8)); - CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDT_INDIRECT_INDEX_DISP) : /* ldt $optdisp($abase)[$index*S$scale], $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - -{ - SI tmp_temp; - SI tmp_dregno; - tmp_dregno = FLD (f_srcdst); - tmp_temp = ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))); - { - SI opval = GETMEMSI (current_cpu, pc, tmp_temp); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); - CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8)); - CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDQ_OFFSET) : /* ldq $offset, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_temp; - SI tmp_dregno; - tmp_dregno = FLD (f_srcdst); - tmp_temp = FLD (f_offset); - { - SI opval = GETMEMSI (current_cpu, pc, tmp_temp); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); - CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8)); - CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 12)); - CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-3", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDQ_INDIRECT_OFFSET) : /* ldq $offset($abase), $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_temp; - SI tmp_dregno; - tmp_dregno = FLD (f_srcdst); - tmp_temp = ADDSI (FLD (f_offset), * FLD (i_abase)); - { - SI opval = GETMEMSI (current_cpu, pc, tmp_temp); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); - CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8)); - CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 12)); - CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-3", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDQ_INDIRECT) : /* ldq ($abase), $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_temp; - SI tmp_dregno; - tmp_dregno = FLD (f_srcdst); - tmp_temp = * FLD (i_abase); - { - SI opval = GETMEMSI (current_cpu, pc, tmp_temp); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); - CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8)); - CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 12)); - CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-3", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDQ_INDIRECT_INDEX) : /* ldq ($abase)[$index*S$scale], $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_temp; - SI tmp_dregno; - tmp_dregno = FLD (f_srcdst); - tmp_temp = ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))); - { - SI opval = GETMEMSI (current_cpu, pc, tmp_temp); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); - CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8)); - CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 12)); - CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-3", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDQ_DISP) : /* ldq $optdisp, $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - -{ - SI tmp_temp; - SI tmp_dregno; - tmp_dregno = FLD (f_srcdst); - tmp_temp = FLD (f_optdisp); - { - SI opval = GETMEMSI (current_cpu, pc, tmp_temp); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); - CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8)); - CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 12)); - CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-3", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDQ_INDIRECT_DISP) : /* ldq $optdisp($abase), $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - -{ - SI tmp_temp; - SI tmp_dregno; - tmp_dregno = FLD (f_srcdst); - tmp_temp = ADDSI (FLD (f_optdisp), * FLD (i_abase)); - { - SI opval = GETMEMSI (current_cpu, pc, tmp_temp); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); - CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8)); - CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 12)); - CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-3", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDQ_INDEX_DISP) : /* ldq $optdisp[$index*S$scale], $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - -{ - SI tmp_temp; - SI tmp_dregno; - tmp_dregno = FLD (f_srcdst); - tmp_temp = ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))); - { - SI opval = GETMEMSI (current_cpu, pc, tmp_temp); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); - CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8)); - CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 12)); - CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-3", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDQ_INDIRECT_INDEX_DISP) : /* ldq $optdisp($abase)[$index*S$scale], $dst */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - -{ - SI tmp_temp; - SI tmp_dregno; - tmp_dregno = FLD (f_srcdst); - tmp_temp = ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))); - { - SI opval = GETMEMSI (current_cpu, pc, tmp_temp); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); - CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8)); - CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 12)); - CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-3", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ST_OFFSET) : /* st $st_src, $offset */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = * FLD (i_st_src); - SETMEMSI (current_cpu, pc, FLD (f_offset), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ST_INDIRECT_OFFSET) : /* st $st_src, $offset($abase) */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = * FLD (i_st_src); - SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase)), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ST_INDIRECT) : /* st $st_src, ($abase) */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = * FLD (i_st_src); - SETMEMSI (current_cpu, pc, * FLD (i_abase), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ST_INDIRECT_INDEX) : /* st $st_src, ($abase)[$index*S$scale] */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = * FLD (i_st_src); - SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ST_DISP) : /* st $st_src, $optdisp */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - - { - SI opval = * FLD (i_st_src); - SETMEMSI (current_cpu, pc, FLD (f_optdisp), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ST_INDIRECT_DISP) : /* st $st_src, $optdisp($abase) */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - - { - SI opval = * FLD (i_st_src); - SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase)), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ST_INDEX_DISP) : /* st $st_src, $optdisp[$index*S$scale */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - - { - SI opval = * FLD (i_st_src); - SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ST_INDIRECT_INDEX_DISP) : /* st $st_src, $optdisp($abase)[$index*S$scale] */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - - { - SI opval = * FLD (i_st_src); - SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STOB_OFFSET) : /* stob $st_src, $offset */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - QI opval = * FLD (i_st_src); - SETMEMQI (current_cpu, pc, FLD (f_offset), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STOB_INDIRECT_OFFSET) : /* stob $st_src, $offset($abase) */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - QI opval = * FLD (i_st_src); - SETMEMQI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase)), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STOB_INDIRECT) : /* stob $st_src, ($abase) */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - QI opval = * FLD (i_st_src); - SETMEMQI (current_cpu, pc, * FLD (i_abase), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STOB_INDIRECT_INDEX) : /* stob $st_src, ($abase)[$index*S$scale] */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - QI opval = * FLD (i_st_src); - SETMEMQI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STOB_DISP) : /* stob $st_src, $optdisp */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - - { - QI opval = * FLD (i_st_src); - SETMEMQI (current_cpu, pc, FLD (f_optdisp), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STOB_INDIRECT_DISP) : /* stob $st_src, $optdisp($abase) */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - - { - QI opval = * FLD (i_st_src); - SETMEMQI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase)), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STOB_INDEX_DISP) : /* stob $st_src, $optdisp[$index*S$scale */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - - { - QI opval = * FLD (i_st_src); - SETMEMQI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STOB_INDIRECT_INDEX_DISP) : /* stob $st_src, $optdisp($abase)[$index*S$scale] */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - - { - QI opval = * FLD (i_st_src); - SETMEMQI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STOS_OFFSET) : /* stos $st_src, $offset */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - HI opval = * FLD (i_st_src); - SETMEMHI (current_cpu, pc, FLD (f_offset), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STOS_INDIRECT_OFFSET) : /* stos $st_src, $offset($abase) */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - HI opval = * FLD (i_st_src); - SETMEMHI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase)), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STOS_INDIRECT) : /* stos $st_src, ($abase) */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - HI opval = * FLD (i_st_src); - SETMEMHI (current_cpu, pc, * FLD (i_abase), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STOS_INDIRECT_INDEX) : /* stos $st_src, ($abase)[$index*S$scale] */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - HI opval = * FLD (i_st_src); - SETMEMHI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STOS_DISP) : /* stos $st_src, $optdisp */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - - { - HI opval = * FLD (i_st_src); - SETMEMHI (current_cpu, pc, FLD (f_optdisp), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STOS_INDIRECT_DISP) : /* stos $st_src, $optdisp($abase) */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - - { - HI opval = * FLD (i_st_src); - SETMEMHI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase)), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STOS_INDEX_DISP) : /* stos $st_src, $optdisp[$index*S$scale */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - - { - HI opval = * FLD (i_st_src); - SETMEMHI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STOS_INDIRECT_INDEX_DISP) : /* stos $st_src, $optdisp($abase)[$index*S$scale] */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - - { - HI opval = * FLD (i_st_src); - SETMEMHI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STL_OFFSET) : /* stl $st_src, $offset */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_sregno; - tmp_sregno = FLD (f_srcdst); - { - SI opval = * FLD (i_st_src); - SETMEMSI (current_cpu, pc, FLD (f_offset), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); - SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), 4), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STL_INDIRECT_OFFSET) : /* stl $st_src, $offset($abase) */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_sregno; - tmp_sregno = FLD (f_srcdst); - { - SI opval = * FLD (i_st_src); - SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase)), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); - SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_offset), * FLD (i_abase)), 4), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STL_INDIRECT) : /* stl $st_src, ($abase) */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_sregno; - tmp_sregno = FLD (f_srcdst); - { - SI opval = * FLD (i_st_src); - SETMEMSI (current_cpu, pc, * FLD (i_abase), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); - SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), 4), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STL_INDIRECT_INDEX) : /* stl $st_src, ($abase)[$index*S$scale] */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_sregno; - tmp_sregno = FLD (f_srcdst); - { - SI opval = * FLD (i_st_src); - SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); - SETMEMSI (current_cpu, pc, ADDSI (ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 4), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STL_DISP) : /* stl $st_src, $optdisp */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - -{ - SI tmp_sregno; - tmp_sregno = FLD (f_srcdst); - { - SI opval = * FLD (i_st_src); - SETMEMSI (current_cpu, pc, FLD (f_optdisp), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); - SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), 4), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STL_INDIRECT_DISP) : /* stl $st_src, $optdisp($abase) */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - -{ - SI tmp_sregno; - tmp_sregno = FLD (f_srcdst); - { - SI opval = * FLD (i_st_src); - SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase)), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); - SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), * FLD (i_abase)), 4), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STL_INDEX_DISP) : /* stl $st_src, $optdisp[$index*S$scale */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - -{ - SI tmp_sregno; - tmp_sregno = FLD (f_srcdst); - { - SI opval = * FLD (i_st_src); - SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); - SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 4), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STL_INDIRECT_INDEX_DISP) : /* stl $st_src, $optdisp($abase)[$index*S$scale] */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - -{ - SI tmp_sregno; - tmp_sregno = FLD (f_srcdst); - { - SI opval = * FLD (i_st_src); - SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); - SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), 4), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STT_OFFSET) : /* stt $st_src, $offset */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_sregno; - tmp_sregno = FLD (f_srcdst); - { - SI opval = * FLD (i_st_src); - SETMEMSI (current_cpu, pc, FLD (f_offset), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); - SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), 4), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]); - SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), 8), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STT_INDIRECT_OFFSET) : /* stt $st_src, $offset($abase) */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_sregno; - tmp_sregno = FLD (f_srcdst); - { - SI opval = * FLD (i_st_src); - SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase)), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); - SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_offset), * FLD (i_abase)), 4), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]); - SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_offset), * FLD (i_abase)), 8), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STT_INDIRECT) : /* stt $st_src, ($abase) */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_sregno; - tmp_sregno = FLD (f_srcdst); - { - SI opval = * FLD (i_st_src); - SETMEMSI (current_cpu, pc, * FLD (i_abase), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); - SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), 4), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]); - SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), 8), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STT_INDIRECT_INDEX) : /* stt $st_src, ($abase)[$index*S$scale] */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_sregno; - tmp_sregno = FLD (f_srcdst); - { - SI opval = * FLD (i_st_src); - SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); - SETMEMSI (current_cpu, pc, ADDSI (ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 4), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]); - SETMEMSI (current_cpu, pc, ADDSI (ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 8), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STT_DISP) : /* stt $st_src, $optdisp */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - -{ - SI tmp_sregno; - tmp_sregno = FLD (f_srcdst); - { - SI opval = * FLD (i_st_src); - SETMEMSI (current_cpu, pc, FLD (f_optdisp), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); - SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), 4), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]); - SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), 8), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STT_INDIRECT_DISP) : /* stt $st_src, $optdisp($abase) */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - -{ - SI tmp_sregno; - tmp_sregno = FLD (f_srcdst); - { - SI opval = * FLD (i_st_src); - SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase)), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); - SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), * FLD (i_abase)), 4), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]); - SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), * FLD (i_abase)), 8), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STT_INDEX_DISP) : /* stt $st_src, $optdisp[$index*S$scale */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - -{ - SI tmp_sregno; - tmp_sregno = FLD (f_srcdst); - { - SI opval = * FLD (i_st_src); - SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); - SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 4), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]); - SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 8), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STT_INDIRECT_INDEX_DISP) : /* stt $st_src, $optdisp($abase)[$index*S$scale] */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - -{ - SI tmp_sregno; - tmp_sregno = FLD (f_srcdst); - { - SI opval = * FLD (i_st_src); - SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); - SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), 4), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]); - SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), 8), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STQ_OFFSET) : /* stq $st_src, $offset */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_sregno; - tmp_sregno = FLD (f_srcdst); - { - SI opval = * FLD (i_st_src); - SETMEMSI (current_cpu, pc, FLD (f_offset), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); - SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), 4), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]); - SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), 8), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (3))]); - SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), 12), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STQ_INDIRECT_OFFSET) : /* stq $st_src, $offset($abase) */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_sregno; - tmp_sregno = FLD (f_srcdst); - { - SI opval = * FLD (i_st_src); - SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase)), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); - SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_offset), * FLD (i_abase)), 4), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]); - SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_offset), * FLD (i_abase)), 8), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (3))]); - SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_offset), * FLD (i_abase)), 12), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STQ_INDIRECT) : /* stq $st_src, ($abase) */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_sregno; - tmp_sregno = FLD (f_srcdst); - { - SI opval = * FLD (i_st_src); - SETMEMSI (current_cpu, pc, * FLD (i_abase), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); - SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), 4), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]); - SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), 8), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (3))]); - SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), 12), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STQ_INDIRECT_INDEX) : /* stq $st_src, ($abase)[$index*S$scale] */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_sregno; - tmp_sregno = FLD (f_srcdst); - { - SI opval = * FLD (i_st_src); - SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); - SETMEMSI (current_cpu, pc, ADDSI (ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 4), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]); - SETMEMSI (current_cpu, pc, ADDSI (ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 8), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (3))]); - SETMEMSI (current_cpu, pc, ADDSI (ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 12), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STQ_DISP) : /* stq $st_src, $optdisp */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - -{ - SI tmp_sregno; - tmp_sregno = FLD (f_srcdst); - { - SI opval = * FLD (i_st_src); - SETMEMSI (current_cpu, pc, FLD (f_optdisp), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); - SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), 4), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]); - SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), 8), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (3))]); - SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), 12), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STQ_INDIRECT_DISP) : /* stq $st_src, $optdisp($abase) */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - -{ - SI tmp_sregno; - tmp_sregno = FLD (f_srcdst); - { - SI opval = * FLD (i_st_src); - SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase)), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); - SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), * FLD (i_abase)), 4), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]); - SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), * FLD (i_abase)), 8), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (3))]); - SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), * FLD (i_abase)), 12), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STQ_INDEX_DISP) : /* stq $st_src, $optdisp[$index*S$scale */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - -{ - SI tmp_sregno; - tmp_sregno = FLD (f_srcdst); - { - SI opval = * FLD (i_st_src); - SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); - SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 4), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]); - SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 8), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (3))]); - SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 12), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STQ_INDIRECT_INDEX_DISP) : /* stq $st_src, $optdisp($abase)[$index*S$scale] */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - -{ - SI tmp_sregno; - tmp_sregno = FLD (f_srcdst); - { - SI opval = * FLD (i_st_src); - SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); - SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), 4), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]); - SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), 8), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (3))]); - SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), 12), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_CMPOBE_REG) : /* cmpobe $br_src1, $br_src2, $br_disp */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (EQSI (* FLD (i_br_src1), * FLD (i_br_src2))) { - { - USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_CMPOBE_LIT) : /* cmpobe $br_lit1, $br_src2, $br_disp */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (EQSI (FLD (f_br_src1), * FLD (i_br_src2))) { - { - USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_CMPOBNE_REG) : /* cmpobne $br_src1, $br_src2, $br_disp */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (NESI (* FLD (i_br_src1), * FLD (i_br_src2))) { - { - USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_CMPOBNE_LIT) : /* cmpobne $br_lit1, $br_src2, $br_disp */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (NESI (FLD (f_br_src1), * FLD (i_br_src2))) { - { - USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_CMPOBL_REG) : /* cmpobl $br_src1, $br_src2, $br_disp */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (LTUSI (* FLD (i_br_src1), * FLD (i_br_src2))) { - { - USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_CMPOBL_LIT) : /* cmpobl $br_lit1, $br_src2, $br_disp */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (LTUSI (FLD (f_br_src1), * FLD (i_br_src2))) { - { - USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_CMPOBLE_REG) : /* cmpoble $br_src1, $br_src2, $br_disp */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (LEUSI (* FLD (i_br_src1), * FLD (i_br_src2))) { - { - USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_CMPOBLE_LIT) : /* cmpoble $br_lit1, $br_src2, $br_disp */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (LEUSI (FLD (f_br_src1), * FLD (i_br_src2))) { - { - USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_CMPOBG_REG) : /* cmpobg $br_src1, $br_src2, $br_disp */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (GTUSI (* FLD (i_br_src1), * FLD (i_br_src2))) { - { - USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_CMPOBG_LIT) : /* cmpobg $br_lit1, $br_src2, $br_disp */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (GTUSI (FLD (f_br_src1), * FLD (i_br_src2))) { - { - USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_CMPOBGE_REG) : /* cmpobge $br_src1, $br_src2, $br_disp */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (GEUSI (* FLD (i_br_src1), * FLD (i_br_src2))) { - { - USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_CMPOBGE_LIT) : /* cmpobge $br_lit1, $br_src2, $br_disp */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (GEUSI (FLD (f_br_src1), * FLD (i_br_src2))) { - { - USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_CMPIBE_REG) : /* cmpibe $br_src1, $br_src2, $br_disp */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (EQSI (* FLD (i_br_src1), * FLD (i_br_src2))) { - { - USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_CMPIBE_LIT) : /* cmpibe $br_lit1, $br_src2, $br_disp */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (EQSI (FLD (f_br_src1), * FLD (i_br_src2))) { - { - USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_CMPIBNE_REG) : /* cmpibne $br_src1, $br_src2, $br_disp */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (NESI (* FLD (i_br_src1), * FLD (i_br_src2))) { - { - USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_CMPIBNE_LIT) : /* cmpibne $br_lit1, $br_src2, $br_disp */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (NESI (FLD (f_br_src1), * FLD (i_br_src2))) { - { - USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_CMPIBL_REG) : /* cmpibl $br_src1, $br_src2, $br_disp */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (LTSI (* FLD (i_br_src1), * FLD (i_br_src2))) { - { - USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_CMPIBL_LIT) : /* cmpibl $br_lit1, $br_src2, $br_disp */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (LTSI (FLD (f_br_src1), * FLD (i_br_src2))) { - { - USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_CMPIBLE_REG) : /* cmpible $br_src1, $br_src2, $br_disp */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (LESI (* FLD (i_br_src1), * FLD (i_br_src2))) { - { - USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_CMPIBLE_LIT) : /* cmpible $br_lit1, $br_src2, $br_disp */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (LESI (FLD (f_br_src1), * FLD (i_br_src2))) { - { - USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_CMPIBG_REG) : /* cmpibg $br_src1, $br_src2, $br_disp */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (GTSI (* FLD (i_br_src1), * FLD (i_br_src2))) { - { - USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_CMPIBG_LIT) : /* cmpibg $br_lit1, $br_src2, $br_disp */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (GTSI (FLD (f_br_src1), * FLD (i_br_src2))) { - { - USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_CMPIBGE_REG) : /* cmpibge $br_src1, $br_src2, $br_disp */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (GESI (* FLD (i_br_src1), * FLD (i_br_src2))) { - { - USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_CMPIBGE_LIT) : /* cmpibge $br_lit1, $br_src2, $br_disp */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (GESI (FLD (f_br_src1), * FLD (i_br_src2))) { - { - USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BBC_REG) : /* bbc $br_src1, $br_src2, $br_disp */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (EQSI (ANDSI (SLLSI (1, * FLD (i_br_src1)), * FLD (i_br_src2)), 0)) { - { - USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BBC_LIT) : /* bbc $br_lit1, $br_src2, $br_disp */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (EQSI (ANDSI (SLLSI (1, FLD (f_br_src1)), * FLD (i_br_src2)), 0)) { - { - USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BBS_REG) : /* bbs $br_src1, $br_src2, $br_disp */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (NESI (ANDSI (SLLSI (1, * FLD (i_br_src1)), * FLD (i_br_src2)), 0)) { - { - USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BBS_LIT) : /* bbs $br_lit1, $br_src2, $br_disp */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (NESI (ANDSI (SLLSI (1, FLD (f_br_src1)), * FLD (i_br_src2)), 0)) { - { - USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_CMPI) : /* cmpi $src1, $src2 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = (LTSI (* FLD (i_src1), * FLD (i_src2))) ? (4) : (EQSI (* FLD (i_src1), * FLD (i_src2))) ? (2) : (1); - CPU (h_cc) = opval; - TRACE_RESULT (current_cpu, abuf, "cc", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_CMPI1) : /* cmpi $lit1, $src2 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul1.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = (LTSI (FLD (f_src1), * FLD (i_src2))) ? (4) : (EQSI (FLD (f_src1), * FLD (i_src2))) ? (2) : (1); - CPU (h_cc) = opval; - TRACE_RESULT (current_cpu, abuf, "cc", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_CMPI2) : /* cmpi $src1, $lit2 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul2.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = (LTSI (* FLD (i_src1), FLD (f_src2))) ? (4) : (EQSI (* FLD (i_src1), FLD (f_src2))) ? (2) : (1); - CPU (h_cc) = opval; - TRACE_RESULT (current_cpu, abuf, "cc", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_CMPI3) : /* cmpi $lit1, $lit2 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul3.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = (LTSI (FLD (f_src1), FLD (f_src2))) ? (4) : (EQSI (FLD (f_src1), FLD (f_src2))) ? (2) : (1); - CPU (h_cc) = opval; - TRACE_RESULT (current_cpu, abuf, "cc", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_CMPO) : /* cmpo $src1, $src2 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = (LTUSI (* FLD (i_src1), * FLD (i_src2))) ? (4) : (EQSI (* FLD (i_src1), * FLD (i_src2))) ? (2) : (1); - CPU (h_cc) = opval; - TRACE_RESULT (current_cpu, abuf, "cc", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_CMPO1) : /* cmpo $lit1, $src2 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul1.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = (LTUSI (FLD (f_src1), * FLD (i_src2))) ? (4) : (EQSI (FLD (f_src1), * FLD (i_src2))) ? (2) : (1); - CPU (h_cc) = opval; - TRACE_RESULT (current_cpu, abuf, "cc", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_CMPO2) : /* cmpo $src1, $lit2 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul2.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = (LTUSI (* FLD (i_src1), FLD (f_src2))) ? (4) : (EQSI (* FLD (i_src1), FLD (f_src2))) ? (2) : (1); - CPU (h_cc) = opval; - TRACE_RESULT (current_cpu, abuf, "cc", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_CMPO3) : /* cmpo $lit1, $lit2 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul3.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = (LTUSI (FLD (f_src1), FLD (f_src2))) ? (4) : (EQSI (FLD (f_src1), FLD (f_src2))) ? (2) : (1); - CPU (h_cc) = opval; - TRACE_RESULT (current_cpu, abuf, "cc", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_TESTNO_REG) : /* testno $br_src1 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_testno_reg.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = EQSI (CPU (h_cc), 0); - * FLD (i_br_src1) = opval; - TRACE_RESULT (current_cpu, abuf, "br_src1", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_TESTG_REG) : /* testg $br_src1 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_testno_reg.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = NESI (ANDSI (CPU (h_cc), 1), 0); - * FLD (i_br_src1) = opval; - TRACE_RESULT (current_cpu, abuf, "br_src1", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_TESTE_REG) : /* teste $br_src1 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_testno_reg.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = NESI (ANDSI (CPU (h_cc), 2), 0); - * FLD (i_br_src1) = opval; - TRACE_RESULT (current_cpu, abuf, "br_src1", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_TESTGE_REG) : /* testge $br_src1 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_testno_reg.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = NESI (ANDSI (CPU (h_cc), 3), 0); - * FLD (i_br_src1) = opval; - TRACE_RESULT (current_cpu, abuf, "br_src1", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_TESTL_REG) : /* testl $br_src1 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_testno_reg.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = NESI (ANDSI (CPU (h_cc), 4), 0); - * FLD (i_br_src1) = opval; - TRACE_RESULT (current_cpu, abuf, "br_src1", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_TESTNE_REG) : /* testne $br_src1 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_testno_reg.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = NESI (ANDSI (CPU (h_cc), 5), 0); - * FLD (i_br_src1) = opval; - TRACE_RESULT (current_cpu, abuf, "br_src1", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_TESTLE_REG) : /* testle $br_src1 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_testno_reg.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = NESI (ANDSI (CPU (h_cc), 6), 0); - * FLD (i_br_src1) = opval; - TRACE_RESULT (current_cpu, abuf, "br_src1", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_TESTO_REG) : /* testo $br_src1 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_testno_reg.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = NESI (ANDSI (CPU (h_cc), 7), 0); - * FLD (i_br_src1) = opval; - TRACE_RESULT (current_cpu, abuf, "br_src1", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BNO) : /* bno $ctrl_disp */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_bno.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (EQSI (CPU (h_cc), 0)) { - { - USI opval = FLD (i_ctrl_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BG) : /* bg $ctrl_disp */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_bno.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (NESI (ANDSI (CPU (h_cc), 1), 0)) { - { - USI opval = FLD (i_ctrl_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BE) : /* be $ctrl_disp */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_bno.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (NESI (ANDSI (CPU (h_cc), 2), 0)) { - { - USI opval = FLD (i_ctrl_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BGE) : /* bge $ctrl_disp */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_bno.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (NESI (ANDSI (CPU (h_cc), 3), 0)) { - { - USI opval = FLD (i_ctrl_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BL) : /* bl $ctrl_disp */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_bno.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (NESI (ANDSI (CPU (h_cc), 4), 0)) { - { - USI opval = FLD (i_ctrl_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BNE) : /* bne $ctrl_disp */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_bno.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (NESI (ANDSI (CPU (h_cc), 5), 0)) { - { - USI opval = FLD (i_ctrl_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BLE) : /* ble $ctrl_disp */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_bno.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (NESI (ANDSI (CPU (h_cc), 6), 0)) { - { - USI opval = FLD (i_ctrl_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BO) : /* bo $ctrl_disp */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_bno.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (NESI (ANDSI (CPU (h_cc), 7), 0)) { - { - USI opval = FLD (i_ctrl_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_B) : /* b $ctrl_disp */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_bno.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - USI opval = FLD (i_ctrl_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } - - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BX_INDIRECT_OFFSET) : /* bx $offset($abase) */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - USI opval = ADDSI (FLD (f_offset), * FLD (i_abase)); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } - - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BX_INDIRECT) : /* bx ($abase) */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - USI opval = * FLD (i_abase); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } - - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BX_INDIRECT_INDEX) : /* bx ($abase)[$index*S$scale] */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - USI opval = ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } - - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BX_DISP) : /* bx $optdisp */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - - { - USI opval = FLD (f_optdisp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } - - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BX_INDIRECT_DISP) : /* bx $optdisp($abase) */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - - { - USI opval = ADDSI (FLD (f_optdisp), * FLD (i_abase)); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } - - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_CALLX_DISP) : /* callx $optdisp */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_callx_disp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - -{ - SI tmp_temp; - tmp_temp = ANDSI (ADDSI (CPU (h_gr[((UINT) 1)]), 63), INVSI (63)); - { - SI opval = ADDSI (pc, 8); - CPU (h_gr[((UINT) 2)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-2", 'x', opval); - } -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 0), CPU (h_gr[((UINT) 0)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 4), CPU (h_gr[((UINT) 1)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 8), CPU (h_gr[((UINT) 2)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 12), CPU (h_gr[((UINT) 3)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 16), CPU (h_gr[((UINT) 4)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 20), CPU (h_gr[((UINT) 5)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 24), CPU (h_gr[((UINT) 6)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 28), CPU (h_gr[((UINT) 7)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 32), CPU (h_gr[((UINT) 8)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 36), CPU (h_gr[((UINT) 9)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 40), CPU (h_gr[((UINT) 10)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 44), CPU (h_gr[((UINT) 11)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 48), CPU (h_gr[((UINT) 12)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 52), CPU (h_gr[((UINT) 13)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 56), CPU (h_gr[((UINT) 14)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 60), CPU (h_gr[((UINT) 15)])); - { - USI opval = FLD (f_optdisp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -CPU (h_gr[((UINT) 0)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 1)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 2)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 3)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 4)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 5)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 6)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 7)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 8)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 9)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 10)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 11)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 12)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 13)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 14)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 15)]) = 0xdeadbeef; - { - SI opval = CPU (h_gr[((UINT) 31)]); - CPU (h_gr[((UINT) 0)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-0", 'x', opval); - } - { - SI opval = tmp_temp; - CPU (h_gr[((UINT) 31)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-31", 'x', opval); - } - { - SI opval = ADDSI (tmp_temp, 64); - CPU (h_gr[((UINT) 1)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-1", 'x', opval); - } -} - - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_CALLX_INDIRECT) : /* callx ($abase) */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_callx_indirect_offset.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_temp; - tmp_temp = ANDSI (ADDSI (CPU (h_gr[((UINT) 1)]), 63), INVSI (63)); - { - SI opval = ADDSI (pc, 4); - CPU (h_gr[((UINT) 2)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-2", 'x', opval); - } -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 0), CPU (h_gr[((UINT) 0)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 4), CPU (h_gr[((UINT) 1)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 8), CPU (h_gr[((UINT) 2)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 12), CPU (h_gr[((UINT) 3)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 16), CPU (h_gr[((UINT) 4)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 20), CPU (h_gr[((UINT) 5)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 24), CPU (h_gr[((UINT) 6)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 28), CPU (h_gr[((UINT) 7)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 32), CPU (h_gr[((UINT) 8)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 36), CPU (h_gr[((UINT) 9)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 40), CPU (h_gr[((UINT) 10)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 44), CPU (h_gr[((UINT) 11)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 48), CPU (h_gr[((UINT) 12)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 52), CPU (h_gr[((UINT) 13)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 56), CPU (h_gr[((UINT) 14)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 60), CPU (h_gr[((UINT) 15)])); - { - USI opval = * FLD (i_abase); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -CPU (h_gr[((UINT) 0)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 1)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 2)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 3)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 4)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 5)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 6)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 7)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 8)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 9)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 10)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 11)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 12)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 13)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 14)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 15)]) = 0xdeadbeef; - { - SI opval = CPU (h_gr[((UINT) 31)]); - CPU (h_gr[((UINT) 0)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-0", 'x', opval); - } - { - SI opval = tmp_temp; - CPU (h_gr[((UINT) 31)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-31", 'x', opval); - } - { - SI opval = ADDSI (tmp_temp, 64); - CPU (h_gr[((UINT) 1)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-1", 'x', opval); - } -} - - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_CALLX_INDIRECT_OFFSET) : /* callx $offset($abase) */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_callx_indirect_offset.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_temp; - tmp_temp = ANDSI (ADDSI (CPU (h_gr[((UINT) 1)]), 63), INVSI (63)); - { - SI opval = ADDSI (pc, 4); - CPU (h_gr[((UINT) 2)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-2", 'x', opval); - } -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 0), CPU (h_gr[((UINT) 0)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 4), CPU (h_gr[((UINT) 1)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 8), CPU (h_gr[((UINT) 2)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 12), CPU (h_gr[((UINT) 3)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 16), CPU (h_gr[((UINT) 4)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 20), CPU (h_gr[((UINT) 5)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 24), CPU (h_gr[((UINT) 6)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 28), CPU (h_gr[((UINT) 7)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 32), CPU (h_gr[((UINT) 8)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 36), CPU (h_gr[((UINT) 9)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 40), CPU (h_gr[((UINT) 10)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 44), CPU (h_gr[((UINT) 11)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 48), CPU (h_gr[((UINT) 12)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 52), CPU (h_gr[((UINT) 13)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 56), CPU (h_gr[((UINT) 14)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 60), CPU (h_gr[((UINT) 15)])); - { - USI opval = ADDSI (FLD (f_offset), * FLD (i_abase)); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -CPU (h_gr[((UINT) 0)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 1)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 2)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 3)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 4)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 5)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 6)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 7)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 8)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 9)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 10)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 11)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 12)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 13)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 14)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 15)]) = 0xdeadbeef; - { - SI opval = CPU (h_gr[((UINT) 31)]); - CPU (h_gr[((UINT) 0)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-0", 'x', opval); - } - { - SI opval = tmp_temp; - CPU (h_gr[((UINT) 31)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-31", 'x', opval); - } - { - SI opval = ADDSI (tmp_temp, 64); - CPU (h_gr[((UINT) 1)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-1", 'x', opval); - } -} - - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_RET) : /* ret */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_callx_disp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - { - SI opval = CPU (h_gr[((UINT) 0)]); - CPU (h_gr[((UINT) 31)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-31", 'x', opval); - } -CPU (h_gr[((UINT) 0)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 0)); -CPU (h_gr[((UINT) 1)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 4)); -CPU (h_gr[((UINT) 2)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 8)); -CPU (h_gr[((UINT) 3)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 12)); -CPU (h_gr[((UINT) 4)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 16)); -CPU (h_gr[((UINT) 5)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 20)); -CPU (h_gr[((UINT) 6)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 24)); -CPU (h_gr[((UINT) 7)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 28)); -CPU (h_gr[((UINT) 8)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 32)); -CPU (h_gr[((UINT) 9)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 36)); -CPU (h_gr[((UINT) 10)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 40)); -CPU (h_gr[((UINT) 11)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 44)); -CPU (h_gr[((UINT) 12)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 48)); -CPU (h_gr[((UINT) 13)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 52)); -CPU (h_gr[((UINT) 14)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 56)); -CPU (h_gr[((UINT) 15)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 60)); - { - USI opval = CPU (h_gr[((UINT) 2)]); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_CALLS) : /* calls $src1 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_emul2.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = i960_trap (current_cpu, pc, * FLD (i_src1)); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } - - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_FMARK) : /* fmark */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = i960_breakpoint (current_cpu, pc); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } - - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_FLUSHREG) : /* flushreg */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -((void) 0); /*nop*/ - -#undef FLD -} - NEXT (vpc); - - - } - ENDSWITCH (sem) /* End of semantic switch. */ - - /* At this point `vpc' contains the next insn to execute. */ -} - -#undef DEFINE_SWITCH -#endif /* DEFINE_SWITCH */ diff --git a/sim/i960/sem.c b/sim/i960/sem.c deleted file mode 100644 index 262340e..0000000 --- a/sim/i960/sem.c +++ /dev/null @@ -1,7918 +0,0 @@ -/* Simulator instruction semantics for i960base. - -THIS FILE IS MACHINE GENERATED WITH CGEN. - -Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc. - -This file is part of the GNU Simulators. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -*/ - -#define WANT_CPU i960base -#define WANT_CPU_I960BASE - -#include "sim-main.h" -#include "cgen-mem.h" -#include "cgen-ops.h" - -#undef GET_ATTR -#define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_##attr) - -/* This is used so that we can compile two copies of the semantic code, - one with full feature support and one without that runs fast(er). - FAST_P, when desired, is defined on the command line, -DFAST_P=1. */ -#if FAST_P -#define SEM_FN_NAME(cpu,fn) XCONCAT3 (cpu,_semf_,fn) -#undef TRACE_RESULT -#define TRACE_RESULT(cpu, abuf, name, type, val) -#else -#define SEM_FN_NAME(cpu,fn) XCONCAT3 (cpu,_sem_,fn) -#endif - -/* x-invalid: --invalid-- */ - -static SEM_PC -SEM_FN_NAME (i960base,x_invalid) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - { - /* Update the recorded pc in the cpu state struct. - Only necessary for WITH_SCACHE case, but to avoid the - conditional compilation .... */ - SET_H_PC (pc); - /* Virtual insns have zero size. Overwrite vpc with address of next insn - using the default-insn-bitsize spec. When executing insns in parallel - we may want to queue the fault and continue execution. */ - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - vpc = sim_engine_invalid_insn (current_cpu, pc, vpc); - } - - return vpc; -#undef FLD -} - -/* x-after: --after-- */ - -static SEM_PC -SEM_FN_NAME (i960base,x_after) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - { -#if WITH_SCACHE_PBB_I960BASE - i960base_pbb_after (current_cpu, sem_arg); -#endif - } - - return vpc; -#undef FLD -} - -/* x-before: --before-- */ - -static SEM_PC -SEM_FN_NAME (i960base,x_before) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - { -#if WITH_SCACHE_PBB_I960BASE - i960base_pbb_before (current_cpu, sem_arg); -#endif - } - - return vpc; -#undef FLD -} - -/* x-cti-chain: --cti-chain-- */ - -static SEM_PC -SEM_FN_NAME (i960base,x_cti_chain) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - { -#if WITH_SCACHE_PBB_I960BASE -#ifdef DEFINE_SWITCH - vpc = i960base_pbb_cti_chain (current_cpu, sem_arg, - pbb_br_type, pbb_br_npc); - BREAK (sem); -#else - /* FIXME: Allow provision of explicit ifmt spec in insn spec. */ - vpc = i960base_pbb_cti_chain (current_cpu, sem_arg, - CPU_PBB_BR_TYPE (current_cpu), - CPU_PBB_BR_NPC (current_cpu)); -#endif -#endif - } - - return vpc; -#undef FLD -} - -/* x-chain: --chain-- */ - -static SEM_PC -SEM_FN_NAME (i960base,x_chain) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - { -#if WITH_SCACHE_PBB_I960BASE - vpc = i960base_pbb_chain (current_cpu, sem_arg); -#ifdef DEFINE_SWITCH - BREAK (sem); -#endif -#endif - } - - return vpc; -#undef FLD -} - -/* x-begin: --begin-- */ - -static SEM_PC -SEM_FN_NAME (i960base,x_begin) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - { -#if WITH_SCACHE_PBB_I960BASE -#ifdef DEFINE_SWITCH - /* In the switch case FAST_P is a constant, allowing several optimizations - in any called inline functions. */ - vpc = i960base_pbb_begin (current_cpu, FAST_P); -#else - vpc = i960base_pbb_begin (current_cpu, STATE_RUN_FAST_P (CPU_STATE (current_cpu))); -#endif -#endif - } - - return vpc; -#undef FLD -} - -/* mulo: mulo $src1, $src2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,mulo) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = MULSI (* FLD (i_src1), * FLD (i_src2)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* mulo1: mulo $lit1, $src2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,mulo1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul1.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = MULSI (FLD (f_src1), * FLD (i_src2)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* mulo2: mulo $src1, $lit2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,mulo2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = MULSI (* FLD (i_src1), FLD (f_src2)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* mulo3: mulo $lit1, $lit2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,mulo3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = MULSI (FLD (f_src1), FLD (f_src2)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* remo: remo $src1, $src2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,remo) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = UMODSI (* FLD (i_src2), * FLD (i_src1)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* remo1: remo $lit1, $src2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,remo1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul1.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = UMODSI (* FLD (i_src2), FLD (f_src1)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* remo2: remo $src1, $lit2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,remo2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = UMODSI (FLD (f_src2), * FLD (i_src1)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* remo3: remo $lit1, $lit2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,remo3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = UMODSI (FLD (f_src2), FLD (f_src1)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* divo: divo $src1, $src2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,divo) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = UDIVSI (* FLD (i_src2), * FLD (i_src1)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* divo1: divo $lit1, $src2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,divo1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul1.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = UDIVSI (* FLD (i_src2), FLD (f_src1)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* divo2: divo $src1, $lit2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,divo2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = UDIVSI (FLD (f_src2), * FLD (i_src1)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* divo3: divo $lit1, $lit2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,divo3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = UDIVSI (FLD (f_src2), FLD (f_src1)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* remi: remi $src1, $src2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,remi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = MODSI (* FLD (i_src2), * FLD (i_src1)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* remi1: remi $lit1, $src2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,remi1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul1.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = MODSI (* FLD (i_src2), FLD (f_src1)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* remi2: remi $src1, $lit2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,remi2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = MODSI (FLD (f_src2), * FLD (i_src1)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* remi3: remi $lit1, $lit2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,remi3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = MODSI (FLD (f_src2), FLD (f_src1)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* divi: divi $src1, $src2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,divi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = DIVSI (* FLD (i_src2), * FLD (i_src1)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* divi1: divi $lit1, $src2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,divi1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul1.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = DIVSI (* FLD (i_src2), FLD (f_src1)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* divi2: divi $src1, $lit2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,divi2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = DIVSI (FLD (f_src2), * FLD (i_src1)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* divi3: divi $lit1, $lit2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,divi3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = DIVSI (FLD (f_src2), FLD (f_src1)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* addo: addo $src1, $src2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,addo) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ADDSI (* FLD (i_src1), * FLD (i_src2)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* addo1: addo $lit1, $src2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,addo1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul1.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ADDSI (FLD (f_src1), * FLD (i_src2)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* addo2: addo $src1, $lit2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,addo2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ADDSI (* FLD (i_src1), FLD (f_src2)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* addo3: addo $lit1, $lit2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,addo3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ADDSI (FLD (f_src1), FLD (f_src2)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* subo: subo $src1, $src2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,subo) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = SUBSI (* FLD (i_src2), * FLD (i_src1)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* subo1: subo $lit1, $src2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,subo1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul1.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = SUBSI (* FLD (i_src2), FLD (f_src1)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* subo2: subo $src1, $lit2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,subo2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = SUBSI (FLD (f_src2), * FLD (i_src1)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* subo3: subo $lit1, $lit2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,subo3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = SUBSI (FLD (f_src2), FLD (f_src1)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* notbit: notbit $src1, $src2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,notbit) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = XORSI (SLLSI (1, * FLD (i_src1)), * FLD (i_src2)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* notbit1: notbit $lit1, $src2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,notbit1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul1.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = XORSI (SLLSI (1, FLD (f_src1)), * FLD (i_src2)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* notbit2: notbit $src1, $lit2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,notbit2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = XORSI (SLLSI (1, * FLD (i_src1)), FLD (f_src2)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* notbit3: notbit $lit1, $lit2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,notbit3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = XORSI (SLLSI (1, FLD (f_src1)), FLD (f_src2)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* and: and $src1, $src2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,and) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ANDSI (* FLD (i_src1), * FLD (i_src2)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* and1: and $lit1, $src2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,and1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul1.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ANDSI (FLD (f_src1), * FLD (i_src2)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* and2: and $src1, $lit2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,and2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ANDSI (* FLD (i_src1), FLD (f_src2)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* and3: and $lit1, $lit2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,and3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ANDSI (FLD (f_src1), FLD (f_src2)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* andnot: andnot $src1, $src2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,andnot) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ANDSI (* FLD (i_src2), INVSI (* FLD (i_src1))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* andnot1: andnot $lit1, $src2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,andnot1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul1.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ANDSI (* FLD (i_src2), INVSI (FLD (f_src1))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* andnot2: andnot $src1, $lit2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,andnot2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ANDSI (FLD (f_src2), INVSI (* FLD (i_src1))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* andnot3: andnot $lit1, $lit2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,andnot3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ANDSI (FLD (f_src2), INVSI (FLD (f_src1))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* setbit: setbit $src1, $src2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,setbit) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ORSI (SLLSI (1, * FLD (i_src1)), * FLD (i_src2)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* setbit1: setbit $lit1, $src2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,setbit1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul1.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ORSI (SLLSI (1, FLD (f_src1)), * FLD (i_src2)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* setbit2: setbit $src1, $lit2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,setbit2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ORSI (SLLSI (1, * FLD (i_src1)), FLD (f_src2)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* setbit3: setbit $lit1, $lit2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,setbit3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ORSI (SLLSI (1, FLD (f_src1)), FLD (f_src2)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* notand: notand $src1, $src2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,notand) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ANDSI (INVSI (* FLD (i_src2)), * FLD (i_src1)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* notand1: notand $lit1, $src2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,notand1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul1.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ANDSI (INVSI (* FLD (i_src2)), FLD (f_src1)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* notand2: notand $src1, $lit2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,notand2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ANDSI (INVSI (FLD (f_src2)), * FLD (i_src1)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* notand3: notand $lit1, $lit2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,notand3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ANDSI (INVSI (FLD (f_src2)), FLD (f_src1)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* xor: xor $src1, $src2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,xor) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = XORSI (* FLD (i_src1), * FLD (i_src2)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* xor1: xor $lit1, $src2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,xor1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul1.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = XORSI (FLD (f_src1), * FLD (i_src2)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* xor2: xor $src1, $lit2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,xor2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = XORSI (* FLD (i_src1), FLD (f_src2)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* xor3: xor $lit1, $lit2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,xor3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = XORSI (FLD (f_src1), FLD (f_src2)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* or: or $src1, $src2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,or) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ORSI (* FLD (i_src1), * FLD (i_src2)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* or1: or $lit1, $src2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,or1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul1.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ORSI (FLD (f_src1), * FLD (i_src2)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* or2: or $src1, $lit2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,or2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ORSI (* FLD (i_src1), FLD (f_src2)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* or3: or $lit1, $lit2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,or3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ORSI (FLD (f_src1), FLD (f_src2)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* nor: nor $src1, $src2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,nor) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ANDSI (INVSI (* FLD (i_src2)), INVSI (* FLD (i_src1))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* nor1: nor $lit1, $src2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,nor1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul1.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ANDSI (INVSI (* FLD (i_src2)), INVSI (FLD (f_src1))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* nor2: nor $src1, $lit2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,nor2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ANDSI (INVSI (FLD (f_src2)), INVSI (* FLD (i_src1))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* nor3: nor $lit1, $lit2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,nor3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ANDSI (INVSI (FLD (f_src2)), INVSI (FLD (f_src1))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* xnor: xnor $src1, $src2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,xnor) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = INVSI (XORSI (* FLD (i_src1), * FLD (i_src2))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* xnor1: xnor $lit1, $src2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,xnor1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul1.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = INVSI (XORSI (FLD (f_src1), * FLD (i_src2))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* xnor2: xnor $src1, $lit2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,xnor2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = INVSI (XORSI (* FLD (i_src1), FLD (f_src2))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* xnor3: xnor $lit1, $lit2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,xnor3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = INVSI (XORSI (FLD (f_src1), FLD (f_src2))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* not: not $src1, $src2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,not) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = INVSI (* FLD (i_src1)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* not1: not $lit1, $src2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,not1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = INVSI (FLD (f_src1)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* not2: not $src1, $lit2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,not2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = INVSI (* FLD (i_src1)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* not3: not $lit1, $lit2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,not3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = INVSI (FLD (f_src1)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* ornot: ornot $src1, $src2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,ornot) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ORSI (* FLD (i_src2), INVSI (* FLD (i_src1))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* ornot1: ornot $lit1, $src2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,ornot1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul1.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ORSI (* FLD (i_src2), INVSI (FLD (f_src1))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* ornot2: ornot $src1, $lit2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,ornot2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ORSI (FLD (f_src2), INVSI (* FLD (i_src1))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* ornot3: ornot $lit1, $lit2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,ornot3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ORSI (FLD (f_src2), INVSI (FLD (f_src1))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* clrbit: clrbit $src1, $src2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,clrbit) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ANDSI (INVSI (SLLSI (1, * FLD (i_src1))), * FLD (i_src2)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* clrbit1: clrbit $lit1, $src2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,clrbit1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul1.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ANDSI (INVSI (SLLSI (1, FLD (f_src1))), * FLD (i_src2)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* clrbit2: clrbit $src1, $lit2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,clrbit2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ANDSI (INVSI (SLLSI (1, * FLD (i_src1))), FLD (f_src2)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* clrbit3: clrbit $lit1, $lit2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,clrbit3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ANDSI (INVSI (SLLSI (1, FLD (f_src1))), FLD (f_src2)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* shlo: shlo $src1, $src2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,shlo) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = (GEUSI (* FLD (i_src1), 32)) ? (0) : (SLLSI (* FLD (i_src2), * FLD (i_src1))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* shlo1: shlo $lit1, $src2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,shlo1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul1.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = (GEUSI (FLD (f_src1), 32)) ? (0) : (SLLSI (* FLD (i_src2), FLD (f_src1))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* shlo2: shlo $src1, $lit2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,shlo2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = (GEUSI (* FLD (i_src1), 32)) ? (0) : (SLLSI (FLD (f_src2), * FLD (i_src1))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* shlo3: shlo $lit1, $lit2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,shlo3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = (GEUSI (FLD (f_src1), 32)) ? (0) : (SLLSI (FLD (f_src2), FLD (f_src1))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* shro: shro $src1, $src2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,shro) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = (GEUSI (* FLD (i_src1), 32)) ? (0) : (SRLSI (* FLD (i_src2), * FLD (i_src1))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* shro1: shro $lit1, $src2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,shro1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul1.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = (GEUSI (FLD (f_src1), 32)) ? (0) : (SRLSI (* FLD (i_src2), FLD (f_src1))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* shro2: shro $src1, $lit2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,shro2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = (GEUSI (* FLD (i_src1), 32)) ? (0) : (SRLSI (FLD (f_src2), * FLD (i_src1))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* shro3: shro $lit1, $lit2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,shro3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = (GEUSI (FLD (f_src1), 32)) ? (0) : (SRLSI (FLD (f_src2), FLD (f_src1))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* shli: shli $src1, $src2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,shli) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = (GEUSI (* FLD (i_src1), 32)) ? (0) : (SLLSI (* FLD (i_src2), * FLD (i_src1))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* shli1: shli $lit1, $src2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,shli1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul1.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = (GEUSI (FLD (f_src1), 32)) ? (0) : (SLLSI (* FLD (i_src2), FLD (f_src1))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* shli2: shli $src1, $lit2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,shli2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = (GEUSI (* FLD (i_src1), 32)) ? (0) : (SLLSI (FLD (f_src2), * FLD (i_src1))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* shli3: shli $lit1, $lit2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,shli3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = (GEUSI (FLD (f_src1), 32)) ? (0) : (SLLSI (FLD (f_src2), FLD (f_src1))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* shri: shri $src1, $src2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,shri) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = (GEUSI (* FLD (i_src1), 32)) ? (SRASI (* FLD (i_src2), 31)) : (SRASI (* FLD (i_src2), * FLD (i_src1))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* shri1: shri $lit1, $src2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,shri1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul1.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = (GEUSI (FLD (f_src1), 32)) ? (SRASI (* FLD (i_src2), 31)) : (SRASI (* FLD (i_src2), FLD (f_src1))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* shri2: shri $src1, $lit2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,shri2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = (GEUSI (* FLD (i_src1), 32)) ? (SRASI (FLD (f_src2), 31)) : (SRASI (FLD (f_src2), * FLD (i_src1))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* shri3: shri $lit1, $lit2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,shri3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = (GEUSI (FLD (f_src1), 32)) ? (SRASI (FLD (f_src2), 31)) : (SRASI (FLD (f_src2), FLD (f_src1))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* emul: emul $src1, $src2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,emul) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - DI tmp_temp; - SI tmp_dregno; - tmp_temp = MULDI (ZEXTSIDI (* FLD (i_src1)), ZEXTSIDI (* FLD (i_src2))); - tmp_dregno = FLD (f_srcdst); - { - SI opval = TRUNCDISI (tmp_temp); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - { - SI opval = TRUNCDISI (SRLDI (tmp_temp, 32)); - CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* emul1: emul $lit1, $src2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,emul1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul1.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - DI tmp_temp; - SI tmp_dregno; - tmp_temp = MULDI (ZEXTSIDI (FLD (f_src1)), ZEXTSIDI (* FLD (i_src2))); - tmp_dregno = FLD (f_srcdst); - { - SI opval = TRUNCDISI (tmp_temp); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - { - SI opval = TRUNCDISI (SRLDI (tmp_temp, 32)); - CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* emul2: emul $src1, $lit2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,emul2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - DI tmp_temp; - SI tmp_dregno; - tmp_temp = MULDI (ZEXTSIDI (* FLD (i_src1)), ZEXTSIDI (FLD (f_src2))); - tmp_dregno = FLD (f_srcdst); - { - SI opval = TRUNCDISI (tmp_temp); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - { - SI opval = TRUNCDISI (SRLDI (tmp_temp, 32)); - CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* emul3: emul $lit1, $lit2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,emul3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - DI tmp_temp; - SI tmp_dregno; - tmp_temp = MULDI (ZEXTSIDI (FLD (f_src1)), ZEXTSIDI (FLD (f_src2))); - tmp_dregno = FLD (f_srcdst); - { - SI opval = TRUNCDISI (tmp_temp); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - { - SI opval = TRUNCDISI (SRLDI (tmp_temp, 32)); - CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* mov: mov $src1, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,mov) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = * FLD (i_src1); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* mov1: mov $lit1, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,mov1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = FLD (f_src1); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* movl: movl $src1, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,movl) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movq.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_dregno; - SI tmp_sregno; - tmp_dregno = FLD (f_srcdst); - tmp_sregno = FLD (f_src1); - { - SI opval = * FLD (i_src1); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_src1)) + (1))]); - CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* movl1: movl $lit1, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,movl1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_dregno; - tmp_dregno = FLD (f_srcdst); - { - SI opval = FLD (f_src1); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - { - SI opval = 0; - CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* movt: movt $src1, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,movt) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movq.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_dregno; - SI tmp_sregno; - tmp_dregno = FLD (f_srcdst); - tmp_sregno = FLD (f_src1); - { - SI opval = * FLD (i_src1); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_src1)) + (1))]); - CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_src1)) + (2))]); - CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* movt1: movt $lit1, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,movt1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movq.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_dregno; - tmp_dregno = FLD (f_srcdst); - { - SI opval = FLD (f_src1); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - { - SI opval = 0; - CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); - } - { - SI opval = 0; - CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* movq: movq $src1, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,movq) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movq.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_dregno; - SI tmp_sregno; - tmp_dregno = FLD (f_srcdst); - tmp_sregno = FLD (f_src1); - { - SI opval = * FLD (i_src1); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_src1)) + (1))]); - CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_src1)) + (2))]); - CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_src1)) + (3))]); - CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-3", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* movq1: movq $lit1, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,movq1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movq.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_dregno; - tmp_dregno = FLD (f_srcdst); - { - SI opval = FLD (f_src1); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - { - SI opval = 0; - CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); - } - { - SI opval = 0; - CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval); - } - { - SI opval = 0; - CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-3", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* modpc: modpc $src1, $src2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,modpc) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul1.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = * FLD (i_src2); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* modac: modac $src1, $src2, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,modac) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul1.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = * FLD (i_src2); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* lda-offset: lda $offset, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,lda_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = FLD (f_offset); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* lda-indirect-offset: lda $offset($abase), $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,lda_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ADDSI (FLD (f_offset), * FLD (i_abase)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* lda-indirect: lda ($abase), $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,lda_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = * FLD (i_abase); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* lda-indirect-index: lda ($abase)[$index*S$scale], $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,lda_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* lda-disp: lda $optdisp, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,lda_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - - { - SI opval = FLD (f_optdisp); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* lda-indirect-disp: lda $optdisp($abase), $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,lda_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - - { - SI opval = ADDSI (FLD (f_optdisp), * FLD (i_abase)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* lda-index-disp: lda $optdisp[$index*S$scale], $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,lda_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - - { - SI opval = ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* lda-indirect-index-disp: lda $optdisp($abase)[$index*S$scale], $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,lda_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - - { - SI opval = ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* ld-offset: ld $offset, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,ld_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = GETMEMSI (current_cpu, pc, FLD (f_offset)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* ld-indirect-offset: ld $offset($abase), $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,ld_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* ld-indirect: ld ($abase), $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,ld_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = GETMEMSI (current_cpu, pc, * FLD (i_abase)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* ld-indirect-index: ld ($abase)[$index*S$scale], $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,ld_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* ld-disp: ld $optdisp, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,ld_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - - { - SI opval = GETMEMSI (current_cpu, pc, FLD (f_optdisp)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* ld-indirect-disp: ld $optdisp($abase), $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,ld_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* ld-index-disp: ld $optdisp[$index*S$scale], $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,ld_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* ld-indirect-index-disp: ld $optdisp($abase)[$index*S$scale], $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,ld_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* ldob-offset: ldob $offset, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,ldob_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = GETMEMUQI (current_cpu, pc, FLD (f_offset)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* ldob-indirect-offset: ldob $offset($abase), $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,ldob_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = GETMEMUQI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* ldob-indirect: ldob ($abase), $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,ldob_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = GETMEMUQI (current_cpu, pc, * FLD (i_abase)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* ldob-indirect-index: ldob ($abase)[$index*S$scale], $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,ldob_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = GETMEMUQI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* ldob-disp: ldob $optdisp, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,ldob_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - - { - SI opval = GETMEMUQI (current_cpu, pc, FLD (f_optdisp)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* ldob-indirect-disp: ldob $optdisp($abase), $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,ldob_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - - { - SI opval = GETMEMUQI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* ldob-index-disp: ldob $optdisp[$index*S$scale], $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,ldob_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - - { - SI opval = GETMEMUQI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* ldob-indirect-index-disp: ldob $optdisp($abase)[$index*S$scale], $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,ldob_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - - { - SI opval = GETMEMUQI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* ldos-offset: ldos $offset, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,ldos_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = GETMEMUHI (current_cpu, pc, FLD (f_offset)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* ldos-indirect-offset: ldos $offset($abase), $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,ldos_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = GETMEMUHI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* ldos-indirect: ldos ($abase), $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,ldos_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = GETMEMUHI (current_cpu, pc, * FLD (i_abase)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* ldos-indirect-index: ldos ($abase)[$index*S$scale], $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,ldos_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = GETMEMUHI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* ldos-disp: ldos $optdisp, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,ldos_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - - { - SI opval = GETMEMUHI (current_cpu, pc, FLD (f_optdisp)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* ldos-indirect-disp: ldos $optdisp($abase), $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,ldos_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - - { - SI opval = GETMEMUHI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* ldos-index-disp: ldos $optdisp[$index*S$scale], $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,ldos_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - - { - SI opval = GETMEMUHI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* ldos-indirect-index-disp: ldos $optdisp($abase)[$index*S$scale], $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,ldos_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - - { - SI opval = GETMEMUHI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* ldib-offset: ldib $offset, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,ldib_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = GETMEMQI (current_cpu, pc, FLD (f_offset)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* ldib-indirect-offset: ldib $offset($abase), $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,ldib_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = GETMEMQI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* ldib-indirect: ldib ($abase), $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,ldib_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = GETMEMQI (current_cpu, pc, * FLD (i_abase)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* ldib-indirect-index: ldib ($abase)[$index*S$scale], $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,ldib_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = GETMEMQI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* ldib-disp: ldib $optdisp, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,ldib_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - - { - SI opval = GETMEMQI (current_cpu, pc, FLD (f_optdisp)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* ldib-indirect-disp: ldib $optdisp($abase), $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,ldib_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - - { - SI opval = GETMEMQI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* ldib-index-disp: ldib $optdisp[$index*S$scale], $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,ldib_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - - { - SI opval = GETMEMQI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* ldib-indirect-index-disp: ldib $optdisp($abase)[$index*S$scale], $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,ldib_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - - { - SI opval = GETMEMQI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* ldis-offset: ldis $offset, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,ldis_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = GETMEMHI (current_cpu, pc, FLD (f_offset)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* ldis-indirect-offset: ldis $offset($abase), $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,ldis_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = GETMEMHI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* ldis-indirect: ldis ($abase), $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,ldis_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = GETMEMHI (current_cpu, pc, * FLD (i_abase)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* ldis-indirect-index: ldis ($abase)[$index*S$scale], $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,ldis_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = GETMEMHI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* ldis-disp: ldis $optdisp, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,ldis_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - - { - SI opval = GETMEMHI (current_cpu, pc, FLD (f_optdisp)); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* ldis-indirect-disp: ldis $optdisp($abase), $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,ldis_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - - { - SI opval = GETMEMHI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* ldis-index-disp: ldis $optdisp[$index*S$scale], $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,ldis_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - - { - SI opval = GETMEMHI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* ldis-indirect-index-disp: ldis $optdisp($abase)[$index*S$scale], $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,ldis_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - - { - SI opval = GETMEMHI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))))); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* ldl-offset: ldl $offset, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,ldl_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_temp; - SI tmp_dregno; - tmp_dregno = FLD (f_srcdst); - tmp_temp = FLD (f_offset); - { - SI opval = GETMEMSI (current_cpu, pc, tmp_temp); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); - CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* ldl-indirect-offset: ldl $offset($abase), $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,ldl_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_temp; - SI tmp_dregno; - tmp_dregno = FLD (f_srcdst); - tmp_temp = ADDSI (FLD (f_offset), * FLD (i_abase)); - { - SI opval = GETMEMSI (current_cpu, pc, tmp_temp); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); - CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* ldl-indirect: ldl ($abase), $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,ldl_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_temp; - SI tmp_dregno; - tmp_dregno = FLD (f_srcdst); - tmp_temp = * FLD (i_abase); - { - SI opval = GETMEMSI (current_cpu, pc, tmp_temp); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); - CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* ldl-indirect-index: ldl ($abase)[$index*S$scale], $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,ldl_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_temp; - SI tmp_dregno; - tmp_dregno = FLD (f_srcdst); - tmp_temp = ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))); - { - SI opval = GETMEMSI (current_cpu, pc, tmp_temp); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); - CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* ldl-disp: ldl $optdisp, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,ldl_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - -{ - SI tmp_temp; - SI tmp_dregno; - tmp_dregno = FLD (f_srcdst); - tmp_temp = FLD (f_optdisp); - { - SI opval = GETMEMSI (current_cpu, pc, tmp_temp); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); - CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* ldl-indirect-disp: ldl $optdisp($abase), $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,ldl_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - -{ - SI tmp_temp; - SI tmp_dregno; - tmp_dregno = FLD (f_srcdst); - tmp_temp = ADDSI (FLD (f_optdisp), * FLD (i_abase)); - { - SI opval = GETMEMSI (current_cpu, pc, tmp_temp); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); - CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* ldl-index-disp: ldl $optdisp[$index*S$scale], $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,ldl_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - -{ - SI tmp_temp; - SI tmp_dregno; - tmp_dregno = FLD (f_srcdst); - tmp_temp = ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))); - { - SI opval = GETMEMSI (current_cpu, pc, tmp_temp); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); - CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* ldl-indirect-index-disp: ldl $optdisp($abase)[$index*S$scale], $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,ldl_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - -{ - SI tmp_temp; - SI tmp_dregno; - tmp_dregno = FLD (f_srcdst); - tmp_temp = ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))); - { - SI opval = GETMEMSI (current_cpu, pc, tmp_temp); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); - CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* ldt-offset: ldt $offset, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,ldt_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_temp; - SI tmp_dregno; - tmp_dregno = FLD (f_srcdst); - tmp_temp = FLD (f_offset); - { - SI opval = GETMEMSI (current_cpu, pc, tmp_temp); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); - CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8)); - CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* ldt-indirect-offset: ldt $offset($abase), $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,ldt_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_temp; - SI tmp_dregno; - tmp_dregno = FLD (f_srcdst); - tmp_temp = ADDSI (FLD (f_offset), * FLD (i_abase)); - { - SI opval = GETMEMSI (current_cpu, pc, tmp_temp); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); - CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8)); - CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* ldt-indirect: ldt ($abase), $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,ldt_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_temp; - SI tmp_dregno; - tmp_dregno = FLD (f_srcdst); - tmp_temp = * FLD (i_abase); - { - SI opval = GETMEMSI (current_cpu, pc, tmp_temp); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); - CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8)); - CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* ldt-indirect-index: ldt ($abase)[$index*S$scale], $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,ldt_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_temp; - SI tmp_dregno; - tmp_dregno = FLD (f_srcdst); - tmp_temp = ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))); - { - SI opval = GETMEMSI (current_cpu, pc, tmp_temp); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); - CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8)); - CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* ldt-disp: ldt $optdisp, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,ldt_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - -{ - SI tmp_temp; - SI tmp_dregno; - tmp_dregno = FLD (f_srcdst); - tmp_temp = FLD (f_optdisp); - { - SI opval = GETMEMSI (current_cpu, pc, tmp_temp); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); - CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8)); - CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* ldt-indirect-disp: ldt $optdisp($abase), $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,ldt_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - -{ - SI tmp_temp; - SI tmp_dregno; - tmp_dregno = FLD (f_srcdst); - tmp_temp = ADDSI (FLD (f_optdisp), * FLD (i_abase)); - { - SI opval = GETMEMSI (current_cpu, pc, tmp_temp); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); - CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8)); - CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* ldt-index-disp: ldt $optdisp[$index*S$scale], $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,ldt_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - -{ - SI tmp_temp; - SI tmp_dregno; - tmp_dregno = FLD (f_srcdst); - tmp_temp = ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))); - { - SI opval = GETMEMSI (current_cpu, pc, tmp_temp); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); - CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8)); - CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* ldt-indirect-index-disp: ldt $optdisp($abase)[$index*S$scale], $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,ldt_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - -{ - SI tmp_temp; - SI tmp_dregno; - tmp_dregno = FLD (f_srcdst); - tmp_temp = ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))); - { - SI opval = GETMEMSI (current_cpu, pc, tmp_temp); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); - CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8)); - CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* ldq-offset: ldq $offset, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,ldq_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_temp; - SI tmp_dregno; - tmp_dregno = FLD (f_srcdst); - tmp_temp = FLD (f_offset); - { - SI opval = GETMEMSI (current_cpu, pc, tmp_temp); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); - CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8)); - CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 12)); - CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-3", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* ldq-indirect-offset: ldq $offset($abase), $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,ldq_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_temp; - SI tmp_dregno; - tmp_dregno = FLD (f_srcdst); - tmp_temp = ADDSI (FLD (f_offset), * FLD (i_abase)); - { - SI opval = GETMEMSI (current_cpu, pc, tmp_temp); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); - CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8)); - CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 12)); - CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-3", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* ldq-indirect: ldq ($abase), $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,ldq_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_temp; - SI tmp_dregno; - tmp_dregno = FLD (f_srcdst); - tmp_temp = * FLD (i_abase); - { - SI opval = GETMEMSI (current_cpu, pc, tmp_temp); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); - CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8)); - CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 12)); - CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-3", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* ldq-indirect-index: ldq ($abase)[$index*S$scale], $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,ldq_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_temp; - SI tmp_dregno; - tmp_dregno = FLD (f_srcdst); - tmp_temp = ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))); - { - SI opval = GETMEMSI (current_cpu, pc, tmp_temp); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); - CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8)); - CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 12)); - CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-3", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* ldq-disp: ldq $optdisp, $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,ldq_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - -{ - SI tmp_temp; - SI tmp_dregno; - tmp_dregno = FLD (f_srcdst); - tmp_temp = FLD (f_optdisp); - { - SI opval = GETMEMSI (current_cpu, pc, tmp_temp); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); - CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8)); - CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 12)); - CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-3", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* ldq-indirect-disp: ldq $optdisp($abase), $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,ldq_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - -{ - SI tmp_temp; - SI tmp_dregno; - tmp_dregno = FLD (f_srcdst); - tmp_temp = ADDSI (FLD (f_optdisp), * FLD (i_abase)); - { - SI opval = GETMEMSI (current_cpu, pc, tmp_temp); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); - CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8)); - CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 12)); - CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-3", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* ldq-index-disp: ldq $optdisp[$index*S$scale], $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,ldq_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - -{ - SI tmp_temp; - SI tmp_dregno; - tmp_dregno = FLD (f_srcdst); - tmp_temp = ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))); - { - SI opval = GETMEMSI (current_cpu, pc, tmp_temp); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); - CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8)); - CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 12)); - CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-3", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* ldq-indirect-index-disp: ldq $optdisp($abase)[$index*S$scale], $dst */ - -static SEM_PC -SEM_FN_NAME (i960base,ldq_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - -{ - SI tmp_temp; - SI tmp_dregno; - tmp_dregno = FLD (f_srcdst); - tmp_temp = ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))); - { - SI opval = GETMEMSI (current_cpu, pc, tmp_temp); - * FLD (i_dst) = opval; - TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); - CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8)); - CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 12)); - CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-3", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* st-offset: st $st_src, $offset */ - -static SEM_PC -SEM_FN_NAME (i960base,st_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = * FLD (i_st_src); - SETMEMSI (current_cpu, pc, FLD (f_offset), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* st-indirect-offset: st $st_src, $offset($abase) */ - -static SEM_PC -SEM_FN_NAME (i960base,st_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = * FLD (i_st_src); - SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase)), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* st-indirect: st $st_src, ($abase) */ - -static SEM_PC -SEM_FN_NAME (i960base,st_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = * FLD (i_st_src); - SETMEMSI (current_cpu, pc, * FLD (i_abase), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* st-indirect-index: st $st_src, ($abase)[$index*S$scale] */ - -static SEM_PC -SEM_FN_NAME (i960base,st_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = * FLD (i_st_src); - SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* st-disp: st $st_src, $optdisp */ - -static SEM_PC -SEM_FN_NAME (i960base,st_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - - { - SI opval = * FLD (i_st_src); - SETMEMSI (current_cpu, pc, FLD (f_optdisp), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* st-indirect-disp: st $st_src, $optdisp($abase) */ - -static SEM_PC -SEM_FN_NAME (i960base,st_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - - { - SI opval = * FLD (i_st_src); - SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase)), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* st-index-disp: st $st_src, $optdisp[$index*S$scale */ - -static SEM_PC -SEM_FN_NAME (i960base,st_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - - { - SI opval = * FLD (i_st_src); - SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* st-indirect-index-disp: st $st_src, $optdisp($abase)[$index*S$scale] */ - -static SEM_PC -SEM_FN_NAME (i960base,st_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - - { - SI opval = * FLD (i_st_src); - SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* stob-offset: stob $st_src, $offset */ - -static SEM_PC -SEM_FN_NAME (i960base,stob_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - QI opval = * FLD (i_st_src); - SETMEMQI (current_cpu, pc, FLD (f_offset), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* stob-indirect-offset: stob $st_src, $offset($abase) */ - -static SEM_PC -SEM_FN_NAME (i960base,stob_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - QI opval = * FLD (i_st_src); - SETMEMQI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase)), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* stob-indirect: stob $st_src, ($abase) */ - -static SEM_PC -SEM_FN_NAME (i960base,stob_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - QI opval = * FLD (i_st_src); - SETMEMQI (current_cpu, pc, * FLD (i_abase), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* stob-indirect-index: stob $st_src, ($abase)[$index*S$scale] */ - -static SEM_PC -SEM_FN_NAME (i960base,stob_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - QI opval = * FLD (i_st_src); - SETMEMQI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* stob-disp: stob $st_src, $optdisp */ - -static SEM_PC -SEM_FN_NAME (i960base,stob_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - - { - QI opval = * FLD (i_st_src); - SETMEMQI (current_cpu, pc, FLD (f_optdisp), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* stob-indirect-disp: stob $st_src, $optdisp($abase) */ - -static SEM_PC -SEM_FN_NAME (i960base,stob_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - - { - QI opval = * FLD (i_st_src); - SETMEMQI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase)), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* stob-index-disp: stob $st_src, $optdisp[$index*S$scale */ - -static SEM_PC -SEM_FN_NAME (i960base,stob_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - - { - QI opval = * FLD (i_st_src); - SETMEMQI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* stob-indirect-index-disp: stob $st_src, $optdisp($abase)[$index*S$scale] */ - -static SEM_PC -SEM_FN_NAME (i960base,stob_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - - { - QI opval = * FLD (i_st_src); - SETMEMQI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* stos-offset: stos $st_src, $offset */ - -static SEM_PC -SEM_FN_NAME (i960base,stos_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - HI opval = * FLD (i_st_src); - SETMEMHI (current_cpu, pc, FLD (f_offset), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* stos-indirect-offset: stos $st_src, $offset($abase) */ - -static SEM_PC -SEM_FN_NAME (i960base,stos_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - HI opval = * FLD (i_st_src); - SETMEMHI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase)), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* stos-indirect: stos $st_src, ($abase) */ - -static SEM_PC -SEM_FN_NAME (i960base,stos_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - HI opval = * FLD (i_st_src); - SETMEMHI (current_cpu, pc, * FLD (i_abase), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* stos-indirect-index: stos $st_src, ($abase)[$index*S$scale] */ - -static SEM_PC -SEM_FN_NAME (i960base,stos_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - HI opval = * FLD (i_st_src); - SETMEMHI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* stos-disp: stos $st_src, $optdisp */ - -static SEM_PC -SEM_FN_NAME (i960base,stos_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - - { - HI opval = * FLD (i_st_src); - SETMEMHI (current_cpu, pc, FLD (f_optdisp), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* stos-indirect-disp: stos $st_src, $optdisp($abase) */ - -static SEM_PC -SEM_FN_NAME (i960base,stos_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - - { - HI opval = * FLD (i_st_src); - SETMEMHI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase)), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* stos-index-disp: stos $st_src, $optdisp[$index*S$scale */ - -static SEM_PC -SEM_FN_NAME (i960base,stos_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - - { - HI opval = * FLD (i_st_src); - SETMEMHI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* stos-indirect-index-disp: stos $st_src, $optdisp($abase)[$index*S$scale] */ - -static SEM_PC -SEM_FN_NAME (i960base,stos_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - - { - HI opval = * FLD (i_st_src); - SETMEMHI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* stl-offset: stl $st_src, $offset */ - -static SEM_PC -SEM_FN_NAME (i960base,stl_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_sregno; - tmp_sregno = FLD (f_srcdst); - { - SI opval = * FLD (i_st_src); - SETMEMSI (current_cpu, pc, FLD (f_offset), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); - SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), 4), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* stl-indirect-offset: stl $st_src, $offset($abase) */ - -static SEM_PC -SEM_FN_NAME (i960base,stl_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_sregno; - tmp_sregno = FLD (f_srcdst); - { - SI opval = * FLD (i_st_src); - SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase)), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); - SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_offset), * FLD (i_abase)), 4), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* stl-indirect: stl $st_src, ($abase) */ - -static SEM_PC -SEM_FN_NAME (i960base,stl_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_sregno; - tmp_sregno = FLD (f_srcdst); - { - SI opval = * FLD (i_st_src); - SETMEMSI (current_cpu, pc, * FLD (i_abase), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); - SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), 4), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* stl-indirect-index: stl $st_src, ($abase)[$index*S$scale] */ - -static SEM_PC -SEM_FN_NAME (i960base,stl_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_sregno; - tmp_sregno = FLD (f_srcdst); - { - SI opval = * FLD (i_st_src); - SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); - SETMEMSI (current_cpu, pc, ADDSI (ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 4), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* stl-disp: stl $st_src, $optdisp */ - -static SEM_PC -SEM_FN_NAME (i960base,stl_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - -{ - SI tmp_sregno; - tmp_sregno = FLD (f_srcdst); - { - SI opval = * FLD (i_st_src); - SETMEMSI (current_cpu, pc, FLD (f_optdisp), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); - SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), 4), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* stl-indirect-disp: stl $st_src, $optdisp($abase) */ - -static SEM_PC -SEM_FN_NAME (i960base,stl_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - -{ - SI tmp_sregno; - tmp_sregno = FLD (f_srcdst); - { - SI opval = * FLD (i_st_src); - SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase)), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); - SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), * FLD (i_abase)), 4), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* stl-index-disp: stl $st_src, $optdisp[$index*S$scale */ - -static SEM_PC -SEM_FN_NAME (i960base,stl_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - -{ - SI tmp_sregno; - tmp_sregno = FLD (f_srcdst); - { - SI opval = * FLD (i_st_src); - SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); - SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 4), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* stl-indirect-index-disp: stl $st_src, $optdisp($abase)[$index*S$scale] */ - -static SEM_PC -SEM_FN_NAME (i960base,stl_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - -{ - SI tmp_sregno; - tmp_sregno = FLD (f_srcdst); - { - SI opval = * FLD (i_st_src); - SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); - SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), 4), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* stt-offset: stt $st_src, $offset */ - -static SEM_PC -SEM_FN_NAME (i960base,stt_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_sregno; - tmp_sregno = FLD (f_srcdst); - { - SI opval = * FLD (i_st_src); - SETMEMSI (current_cpu, pc, FLD (f_offset), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); - SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), 4), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]); - SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), 8), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* stt-indirect-offset: stt $st_src, $offset($abase) */ - -static SEM_PC -SEM_FN_NAME (i960base,stt_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_sregno; - tmp_sregno = FLD (f_srcdst); - { - SI opval = * FLD (i_st_src); - SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase)), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); - SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_offset), * FLD (i_abase)), 4), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]); - SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_offset), * FLD (i_abase)), 8), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* stt-indirect: stt $st_src, ($abase) */ - -static SEM_PC -SEM_FN_NAME (i960base,stt_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_sregno; - tmp_sregno = FLD (f_srcdst); - { - SI opval = * FLD (i_st_src); - SETMEMSI (current_cpu, pc, * FLD (i_abase), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); - SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), 4), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]); - SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), 8), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* stt-indirect-index: stt $st_src, ($abase)[$index*S$scale] */ - -static SEM_PC -SEM_FN_NAME (i960base,stt_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_sregno; - tmp_sregno = FLD (f_srcdst); - { - SI opval = * FLD (i_st_src); - SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); - SETMEMSI (current_cpu, pc, ADDSI (ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 4), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]); - SETMEMSI (current_cpu, pc, ADDSI (ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 8), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* stt-disp: stt $st_src, $optdisp */ - -static SEM_PC -SEM_FN_NAME (i960base,stt_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - -{ - SI tmp_sregno; - tmp_sregno = FLD (f_srcdst); - { - SI opval = * FLD (i_st_src); - SETMEMSI (current_cpu, pc, FLD (f_optdisp), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); - SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), 4), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]); - SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), 8), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* stt-indirect-disp: stt $st_src, $optdisp($abase) */ - -static SEM_PC -SEM_FN_NAME (i960base,stt_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - -{ - SI tmp_sregno; - tmp_sregno = FLD (f_srcdst); - { - SI opval = * FLD (i_st_src); - SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase)), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); - SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), * FLD (i_abase)), 4), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]); - SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), * FLD (i_abase)), 8), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* stt-index-disp: stt $st_src, $optdisp[$index*S$scale */ - -static SEM_PC -SEM_FN_NAME (i960base,stt_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - -{ - SI tmp_sregno; - tmp_sregno = FLD (f_srcdst); - { - SI opval = * FLD (i_st_src); - SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); - SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 4), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]); - SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 8), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* stt-indirect-index-disp: stt $st_src, $optdisp($abase)[$index*S$scale] */ - -static SEM_PC -SEM_FN_NAME (i960base,stt_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - -{ - SI tmp_sregno; - tmp_sregno = FLD (f_srcdst); - { - SI opval = * FLD (i_st_src); - SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); - SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), 4), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]); - SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), 8), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* stq-offset: stq $st_src, $offset */ - -static SEM_PC -SEM_FN_NAME (i960base,stq_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_sregno; - tmp_sregno = FLD (f_srcdst); - { - SI opval = * FLD (i_st_src); - SETMEMSI (current_cpu, pc, FLD (f_offset), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); - SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), 4), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]); - SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), 8), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (3))]); - SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), 12), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* stq-indirect-offset: stq $st_src, $offset($abase) */ - -static SEM_PC -SEM_FN_NAME (i960base,stq_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_sregno; - tmp_sregno = FLD (f_srcdst); - { - SI opval = * FLD (i_st_src); - SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase)), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); - SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_offset), * FLD (i_abase)), 4), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]); - SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_offset), * FLD (i_abase)), 8), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (3))]); - SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_offset), * FLD (i_abase)), 12), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* stq-indirect: stq $st_src, ($abase) */ - -static SEM_PC -SEM_FN_NAME (i960base,stq_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_sregno; - tmp_sregno = FLD (f_srcdst); - { - SI opval = * FLD (i_st_src); - SETMEMSI (current_cpu, pc, * FLD (i_abase), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); - SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), 4), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]); - SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), 8), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (3))]); - SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), 12), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* stq-indirect-index: stq $st_src, ($abase)[$index*S$scale] */ - -static SEM_PC -SEM_FN_NAME (i960base,stq_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_sregno; - tmp_sregno = FLD (f_srcdst); - { - SI opval = * FLD (i_st_src); - SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); - SETMEMSI (current_cpu, pc, ADDSI (ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 4), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]); - SETMEMSI (current_cpu, pc, ADDSI (ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 8), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (3))]); - SETMEMSI (current_cpu, pc, ADDSI (ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 12), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* stq-disp: stq $st_src, $optdisp */ - -static SEM_PC -SEM_FN_NAME (i960base,stq_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - -{ - SI tmp_sregno; - tmp_sregno = FLD (f_srcdst); - { - SI opval = * FLD (i_st_src); - SETMEMSI (current_cpu, pc, FLD (f_optdisp), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); - SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), 4), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]); - SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), 8), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (3))]); - SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), 12), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* stq-indirect-disp: stq $st_src, $optdisp($abase) */ - -static SEM_PC -SEM_FN_NAME (i960base,stq_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - -{ - SI tmp_sregno; - tmp_sregno = FLD (f_srcdst); - { - SI opval = * FLD (i_st_src); - SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase)), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); - SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), * FLD (i_abase)), 4), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]); - SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), * FLD (i_abase)), 8), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (3))]); - SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), * FLD (i_abase)), 12), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* stq-index-disp: stq $st_src, $optdisp[$index*S$scale */ - -static SEM_PC -SEM_FN_NAME (i960base,stq_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - -{ - SI tmp_sregno; - tmp_sregno = FLD (f_srcdst); - { - SI opval = * FLD (i_st_src); - SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); - SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 4), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]); - SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 8), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (3))]); - SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 12), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* stq-indirect-index-disp: stq $st_src, $optdisp($abase)[$index*S$scale] */ - -static SEM_PC -SEM_FN_NAME (i960base,stq_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - -{ - SI tmp_sregno; - tmp_sregno = FLD (f_srcdst); - { - SI opval = * FLD (i_st_src); - SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); - SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), 4), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]); - SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), 8), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = CPU (h_gr[((FLD (f_srcdst)) + (3))]); - SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), 12), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* cmpobe-reg: cmpobe $br_src1, $br_src2, $br_disp */ - -static SEM_PC -SEM_FN_NAME (i960base,cmpobe_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (EQSI (* FLD (i_br_src1), * FLD (i_br_src2))) { - { - USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* cmpobe-lit: cmpobe $br_lit1, $br_src2, $br_disp */ - -static SEM_PC -SEM_FN_NAME (i960base,cmpobe_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (EQSI (FLD (f_br_src1), * FLD (i_br_src2))) { - { - USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* cmpobne-reg: cmpobne $br_src1, $br_src2, $br_disp */ - -static SEM_PC -SEM_FN_NAME (i960base,cmpobne_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (NESI (* FLD (i_br_src1), * FLD (i_br_src2))) { - { - USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* cmpobne-lit: cmpobne $br_lit1, $br_src2, $br_disp */ - -static SEM_PC -SEM_FN_NAME (i960base,cmpobne_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (NESI (FLD (f_br_src1), * FLD (i_br_src2))) { - { - USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* cmpobl-reg: cmpobl $br_src1, $br_src2, $br_disp */ - -static SEM_PC -SEM_FN_NAME (i960base,cmpobl_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (LTUSI (* FLD (i_br_src1), * FLD (i_br_src2))) { - { - USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* cmpobl-lit: cmpobl $br_lit1, $br_src2, $br_disp */ - -static SEM_PC -SEM_FN_NAME (i960base,cmpobl_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (LTUSI (FLD (f_br_src1), * FLD (i_br_src2))) { - { - USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* cmpoble-reg: cmpoble $br_src1, $br_src2, $br_disp */ - -static SEM_PC -SEM_FN_NAME (i960base,cmpoble_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (LEUSI (* FLD (i_br_src1), * FLD (i_br_src2))) { - { - USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* cmpoble-lit: cmpoble $br_lit1, $br_src2, $br_disp */ - -static SEM_PC -SEM_FN_NAME (i960base,cmpoble_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (LEUSI (FLD (f_br_src1), * FLD (i_br_src2))) { - { - USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* cmpobg-reg: cmpobg $br_src1, $br_src2, $br_disp */ - -static SEM_PC -SEM_FN_NAME (i960base,cmpobg_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (GTUSI (* FLD (i_br_src1), * FLD (i_br_src2))) { - { - USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* cmpobg-lit: cmpobg $br_lit1, $br_src2, $br_disp */ - -static SEM_PC -SEM_FN_NAME (i960base,cmpobg_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (GTUSI (FLD (f_br_src1), * FLD (i_br_src2))) { - { - USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* cmpobge-reg: cmpobge $br_src1, $br_src2, $br_disp */ - -static SEM_PC -SEM_FN_NAME (i960base,cmpobge_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (GEUSI (* FLD (i_br_src1), * FLD (i_br_src2))) { - { - USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* cmpobge-lit: cmpobge $br_lit1, $br_src2, $br_disp */ - -static SEM_PC -SEM_FN_NAME (i960base,cmpobge_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (GEUSI (FLD (f_br_src1), * FLD (i_br_src2))) { - { - USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* cmpibe-reg: cmpibe $br_src1, $br_src2, $br_disp */ - -static SEM_PC -SEM_FN_NAME (i960base,cmpibe_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (EQSI (* FLD (i_br_src1), * FLD (i_br_src2))) { - { - USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* cmpibe-lit: cmpibe $br_lit1, $br_src2, $br_disp */ - -static SEM_PC -SEM_FN_NAME (i960base,cmpibe_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (EQSI (FLD (f_br_src1), * FLD (i_br_src2))) { - { - USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* cmpibne-reg: cmpibne $br_src1, $br_src2, $br_disp */ - -static SEM_PC -SEM_FN_NAME (i960base,cmpibne_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (NESI (* FLD (i_br_src1), * FLD (i_br_src2))) { - { - USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* cmpibne-lit: cmpibne $br_lit1, $br_src2, $br_disp */ - -static SEM_PC -SEM_FN_NAME (i960base,cmpibne_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (NESI (FLD (f_br_src1), * FLD (i_br_src2))) { - { - USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* cmpibl-reg: cmpibl $br_src1, $br_src2, $br_disp */ - -static SEM_PC -SEM_FN_NAME (i960base,cmpibl_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (LTSI (* FLD (i_br_src1), * FLD (i_br_src2))) { - { - USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* cmpibl-lit: cmpibl $br_lit1, $br_src2, $br_disp */ - -static SEM_PC -SEM_FN_NAME (i960base,cmpibl_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (LTSI (FLD (f_br_src1), * FLD (i_br_src2))) { - { - USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* cmpible-reg: cmpible $br_src1, $br_src2, $br_disp */ - -static SEM_PC -SEM_FN_NAME (i960base,cmpible_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (LESI (* FLD (i_br_src1), * FLD (i_br_src2))) { - { - USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* cmpible-lit: cmpible $br_lit1, $br_src2, $br_disp */ - -static SEM_PC -SEM_FN_NAME (i960base,cmpible_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (LESI (FLD (f_br_src1), * FLD (i_br_src2))) { - { - USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* cmpibg-reg: cmpibg $br_src1, $br_src2, $br_disp */ - -static SEM_PC -SEM_FN_NAME (i960base,cmpibg_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (GTSI (* FLD (i_br_src1), * FLD (i_br_src2))) { - { - USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* cmpibg-lit: cmpibg $br_lit1, $br_src2, $br_disp */ - -static SEM_PC -SEM_FN_NAME (i960base,cmpibg_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (GTSI (FLD (f_br_src1), * FLD (i_br_src2))) { - { - USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* cmpibge-reg: cmpibge $br_src1, $br_src2, $br_disp */ - -static SEM_PC -SEM_FN_NAME (i960base,cmpibge_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (GESI (* FLD (i_br_src1), * FLD (i_br_src2))) { - { - USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* cmpibge-lit: cmpibge $br_lit1, $br_src2, $br_disp */ - -static SEM_PC -SEM_FN_NAME (i960base,cmpibge_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (GESI (FLD (f_br_src1), * FLD (i_br_src2))) { - { - USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bbc-reg: bbc $br_src1, $br_src2, $br_disp */ - -static SEM_PC -SEM_FN_NAME (i960base,bbc_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (EQSI (ANDSI (SLLSI (1, * FLD (i_br_src1)), * FLD (i_br_src2)), 0)) { - { - USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bbc-lit: bbc $br_lit1, $br_src2, $br_disp */ - -static SEM_PC -SEM_FN_NAME (i960base,bbc_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (EQSI (ANDSI (SLLSI (1, FLD (f_br_src1)), * FLD (i_br_src2)), 0)) { - { - USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bbs-reg: bbs $br_src1, $br_src2, $br_disp */ - -static SEM_PC -SEM_FN_NAME (i960base,bbs_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (NESI (ANDSI (SLLSI (1, * FLD (i_br_src1)), * FLD (i_br_src2)), 0)) { - { - USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bbs-lit: bbs $br_lit1, $br_src2, $br_disp */ - -static SEM_PC -SEM_FN_NAME (i960base,bbs_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (NESI (ANDSI (SLLSI (1, FLD (f_br_src1)), * FLD (i_br_src2)), 0)) { - { - USI opval = FLD (i_br_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* cmpi: cmpi $src1, $src2 */ - -static SEM_PC -SEM_FN_NAME (i960base,cmpi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = (LTSI (* FLD (i_src1), * FLD (i_src2))) ? (4) : (EQSI (* FLD (i_src1), * FLD (i_src2))) ? (2) : (1); - CPU (h_cc) = opval; - TRACE_RESULT (current_cpu, abuf, "cc", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* cmpi1: cmpi $lit1, $src2 */ - -static SEM_PC -SEM_FN_NAME (i960base,cmpi1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul1.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = (LTSI (FLD (f_src1), * FLD (i_src2))) ? (4) : (EQSI (FLD (f_src1), * FLD (i_src2))) ? (2) : (1); - CPU (h_cc) = opval; - TRACE_RESULT (current_cpu, abuf, "cc", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* cmpi2: cmpi $src1, $lit2 */ - -static SEM_PC -SEM_FN_NAME (i960base,cmpi2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = (LTSI (* FLD (i_src1), FLD (f_src2))) ? (4) : (EQSI (* FLD (i_src1), FLD (f_src2))) ? (2) : (1); - CPU (h_cc) = opval; - TRACE_RESULT (current_cpu, abuf, "cc", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* cmpi3: cmpi $lit1, $lit2 */ - -static SEM_PC -SEM_FN_NAME (i960base,cmpi3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = (LTSI (FLD (f_src1), FLD (f_src2))) ? (4) : (EQSI (FLD (f_src1), FLD (f_src2))) ? (2) : (1); - CPU (h_cc) = opval; - TRACE_RESULT (current_cpu, abuf, "cc", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* cmpo: cmpo $src1, $src2 */ - -static SEM_PC -SEM_FN_NAME (i960base,cmpo) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = (LTUSI (* FLD (i_src1), * FLD (i_src2))) ? (4) : (EQSI (* FLD (i_src1), * FLD (i_src2))) ? (2) : (1); - CPU (h_cc) = opval; - TRACE_RESULT (current_cpu, abuf, "cc", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* cmpo1: cmpo $lit1, $src2 */ - -static SEM_PC -SEM_FN_NAME (i960base,cmpo1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul1.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = (LTUSI (FLD (f_src1), * FLD (i_src2))) ? (4) : (EQSI (FLD (f_src1), * FLD (i_src2))) ? (2) : (1); - CPU (h_cc) = opval; - TRACE_RESULT (current_cpu, abuf, "cc", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* cmpo2: cmpo $src1, $lit2 */ - -static SEM_PC -SEM_FN_NAME (i960base,cmpo2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = (LTUSI (* FLD (i_src1), FLD (f_src2))) ? (4) : (EQSI (* FLD (i_src1), FLD (f_src2))) ? (2) : (1); - CPU (h_cc) = opval; - TRACE_RESULT (current_cpu, abuf, "cc", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* cmpo3: cmpo $lit1, $lit2 */ - -static SEM_PC -SEM_FN_NAME (i960base,cmpo3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul3.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = (LTUSI (FLD (f_src1), FLD (f_src2))) ? (4) : (EQSI (FLD (f_src1), FLD (f_src2))) ? (2) : (1); - CPU (h_cc) = opval; - TRACE_RESULT (current_cpu, abuf, "cc", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* testno-reg: testno $br_src1 */ - -static SEM_PC -SEM_FN_NAME (i960base,testno_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_testno_reg.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = EQSI (CPU (h_cc), 0); - * FLD (i_br_src1) = opval; - TRACE_RESULT (current_cpu, abuf, "br_src1", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* testg-reg: testg $br_src1 */ - -static SEM_PC -SEM_FN_NAME (i960base,testg_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_testno_reg.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = NESI (ANDSI (CPU (h_cc), 1), 0); - * FLD (i_br_src1) = opval; - TRACE_RESULT (current_cpu, abuf, "br_src1", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* teste-reg: teste $br_src1 */ - -static SEM_PC -SEM_FN_NAME (i960base,teste_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_testno_reg.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = NESI (ANDSI (CPU (h_cc), 2), 0); - * FLD (i_br_src1) = opval; - TRACE_RESULT (current_cpu, abuf, "br_src1", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* testge-reg: testge $br_src1 */ - -static SEM_PC -SEM_FN_NAME (i960base,testge_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_testno_reg.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = NESI (ANDSI (CPU (h_cc), 3), 0); - * FLD (i_br_src1) = opval; - TRACE_RESULT (current_cpu, abuf, "br_src1", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* testl-reg: testl $br_src1 */ - -static SEM_PC -SEM_FN_NAME (i960base,testl_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_testno_reg.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = NESI (ANDSI (CPU (h_cc), 4), 0); - * FLD (i_br_src1) = opval; - TRACE_RESULT (current_cpu, abuf, "br_src1", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* testne-reg: testne $br_src1 */ - -static SEM_PC -SEM_FN_NAME (i960base,testne_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_testno_reg.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = NESI (ANDSI (CPU (h_cc), 5), 0); - * FLD (i_br_src1) = opval; - TRACE_RESULT (current_cpu, abuf, "br_src1", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* testle-reg: testle $br_src1 */ - -static SEM_PC -SEM_FN_NAME (i960base,testle_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_testno_reg.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = NESI (ANDSI (CPU (h_cc), 6), 0); - * FLD (i_br_src1) = opval; - TRACE_RESULT (current_cpu, abuf, "br_src1", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* testo-reg: testo $br_src1 */ - -static SEM_PC -SEM_FN_NAME (i960base,testo_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_testno_reg.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = NESI (ANDSI (CPU (h_cc), 7), 0); - * FLD (i_br_src1) = opval; - TRACE_RESULT (current_cpu, abuf, "br_src1", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* bno: bno $ctrl_disp */ - -static SEM_PC -SEM_FN_NAME (i960base,bno) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_bno.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (EQSI (CPU (h_cc), 0)) { - { - USI opval = FLD (i_ctrl_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bg: bg $ctrl_disp */ - -static SEM_PC -SEM_FN_NAME (i960base,bg) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_bno.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (NESI (ANDSI (CPU (h_cc), 1), 0)) { - { - USI opval = FLD (i_ctrl_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* be: be $ctrl_disp */ - -static SEM_PC -SEM_FN_NAME (i960base,be) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_bno.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (NESI (ANDSI (CPU (h_cc), 2), 0)) { - { - USI opval = FLD (i_ctrl_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bge: bge $ctrl_disp */ - -static SEM_PC -SEM_FN_NAME (i960base,bge) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_bno.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (NESI (ANDSI (CPU (h_cc), 3), 0)) { - { - USI opval = FLD (i_ctrl_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bl: bl $ctrl_disp */ - -static SEM_PC -SEM_FN_NAME (i960base,bl) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_bno.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (NESI (ANDSI (CPU (h_cc), 4), 0)) { - { - USI opval = FLD (i_ctrl_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bne: bne $ctrl_disp */ - -static SEM_PC -SEM_FN_NAME (i960base,bne) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_bno.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (NESI (ANDSI (CPU (h_cc), 5), 0)) { - { - USI opval = FLD (i_ctrl_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* ble: ble $ctrl_disp */ - -static SEM_PC -SEM_FN_NAME (i960base,ble) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_bno.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (NESI (ANDSI (CPU (h_cc), 6), 0)) { - { - USI opval = FLD (i_ctrl_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bo: bo $ctrl_disp */ - -static SEM_PC -SEM_FN_NAME (i960base,bo) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_bno.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (NESI (ANDSI (CPU (h_cc), 7), 0)) { - { - USI opval = FLD (i_ctrl_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* b: b $ctrl_disp */ - -static SEM_PC -SEM_FN_NAME (i960base,b) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_bno.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - USI opval = FLD (i_ctrl_disp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } - - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bx-indirect-offset: bx $offset($abase) */ - -static SEM_PC -SEM_FN_NAME (i960base,bx_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - USI opval = ADDSI (FLD (f_offset), * FLD (i_abase)); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } - - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bx-indirect: bx ($abase) */ - -static SEM_PC -SEM_FN_NAME (i960base,bx_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - USI opval = * FLD (i_abase); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } - - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bx-indirect-index: bx ($abase)[$index*S$scale] */ - -static SEM_PC -SEM_FN_NAME (i960base,bx_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - USI opval = ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } - - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bx-disp: bx $optdisp */ - -static SEM_PC -SEM_FN_NAME (i960base,bx_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - - { - USI opval = FLD (f_optdisp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } - - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bx-indirect-disp: bx $optdisp($abase) */ - -static SEM_PC -SEM_FN_NAME (i960base,bx_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - - { - USI opval = ADDSI (FLD (f_optdisp), * FLD (i_abase)); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } - - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* callx-disp: callx $optdisp */ - -static SEM_PC -SEM_FN_NAME (i960base,callx_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_callx_disp.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); - -{ - SI tmp_temp; - tmp_temp = ANDSI (ADDSI (CPU (h_gr[((UINT) 1)]), 63), INVSI (63)); - { - SI opval = ADDSI (pc, 8); - CPU (h_gr[((UINT) 2)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-2", 'x', opval); - } -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 0), CPU (h_gr[((UINT) 0)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 4), CPU (h_gr[((UINT) 1)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 8), CPU (h_gr[((UINT) 2)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 12), CPU (h_gr[((UINT) 3)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 16), CPU (h_gr[((UINT) 4)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 20), CPU (h_gr[((UINT) 5)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 24), CPU (h_gr[((UINT) 6)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 28), CPU (h_gr[((UINT) 7)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 32), CPU (h_gr[((UINT) 8)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 36), CPU (h_gr[((UINT) 9)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 40), CPU (h_gr[((UINT) 10)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 44), CPU (h_gr[((UINT) 11)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 48), CPU (h_gr[((UINT) 12)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 52), CPU (h_gr[((UINT) 13)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 56), CPU (h_gr[((UINT) 14)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 60), CPU (h_gr[((UINT) 15)])); - { - USI opval = FLD (f_optdisp); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -CPU (h_gr[((UINT) 0)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 1)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 2)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 3)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 4)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 5)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 6)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 7)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 8)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 9)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 10)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 11)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 12)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 13)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 14)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 15)]) = 0xdeadbeef; - { - SI opval = CPU (h_gr[((UINT) 31)]); - CPU (h_gr[((UINT) 0)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-0", 'x', opval); - } - { - SI opval = tmp_temp; - CPU (h_gr[((UINT) 31)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-31", 'x', opval); - } - { - SI opval = ADDSI (tmp_temp, 64); - CPU (h_gr[((UINT) 1)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-1", 'x', opval); - } -} - - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* callx-indirect: callx ($abase) */ - -static SEM_PC -SEM_FN_NAME (i960base,callx_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_callx_indirect_offset.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_temp; - tmp_temp = ANDSI (ADDSI (CPU (h_gr[((UINT) 1)]), 63), INVSI (63)); - { - SI opval = ADDSI (pc, 4); - CPU (h_gr[((UINT) 2)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-2", 'x', opval); - } -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 0), CPU (h_gr[((UINT) 0)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 4), CPU (h_gr[((UINT) 1)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 8), CPU (h_gr[((UINT) 2)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 12), CPU (h_gr[((UINT) 3)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 16), CPU (h_gr[((UINT) 4)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 20), CPU (h_gr[((UINT) 5)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 24), CPU (h_gr[((UINT) 6)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 28), CPU (h_gr[((UINT) 7)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 32), CPU (h_gr[((UINT) 8)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 36), CPU (h_gr[((UINT) 9)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 40), CPU (h_gr[((UINT) 10)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 44), CPU (h_gr[((UINT) 11)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 48), CPU (h_gr[((UINT) 12)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 52), CPU (h_gr[((UINT) 13)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 56), CPU (h_gr[((UINT) 14)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 60), CPU (h_gr[((UINT) 15)])); - { - USI opval = * FLD (i_abase); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -CPU (h_gr[((UINT) 0)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 1)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 2)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 3)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 4)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 5)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 6)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 7)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 8)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 9)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 10)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 11)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 12)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 13)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 14)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 15)]) = 0xdeadbeef; - { - SI opval = CPU (h_gr[((UINT) 31)]); - CPU (h_gr[((UINT) 0)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-0", 'x', opval); - } - { - SI opval = tmp_temp; - CPU (h_gr[((UINT) 31)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-31", 'x', opval); - } - { - SI opval = ADDSI (tmp_temp, 64); - CPU (h_gr[((UINT) 1)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-1", 'x', opval); - } -} - - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* callx-indirect-offset: callx $offset($abase) */ - -static SEM_PC -SEM_FN_NAME (i960base,callx_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_callx_indirect_offset.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI tmp_temp; - tmp_temp = ANDSI (ADDSI (CPU (h_gr[((UINT) 1)]), 63), INVSI (63)); - { - SI opval = ADDSI (pc, 4); - CPU (h_gr[((UINT) 2)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-2", 'x', opval); - } -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 0), CPU (h_gr[((UINT) 0)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 4), CPU (h_gr[((UINT) 1)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 8), CPU (h_gr[((UINT) 2)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 12), CPU (h_gr[((UINT) 3)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 16), CPU (h_gr[((UINT) 4)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 20), CPU (h_gr[((UINT) 5)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 24), CPU (h_gr[((UINT) 6)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 28), CPU (h_gr[((UINT) 7)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 32), CPU (h_gr[((UINT) 8)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 36), CPU (h_gr[((UINT) 9)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 40), CPU (h_gr[((UINT) 10)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 44), CPU (h_gr[((UINT) 11)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 48), CPU (h_gr[((UINT) 12)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 52), CPU (h_gr[((UINT) 13)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 56), CPU (h_gr[((UINT) 14)])); -SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 60), CPU (h_gr[((UINT) 15)])); - { - USI opval = ADDSI (FLD (f_offset), * FLD (i_abase)); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -CPU (h_gr[((UINT) 0)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 1)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 2)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 3)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 4)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 5)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 6)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 7)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 8)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 9)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 10)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 11)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 12)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 13)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 14)]) = 0xdeadbeef; -CPU (h_gr[((UINT) 15)]) = 0xdeadbeef; - { - SI opval = CPU (h_gr[((UINT) 31)]); - CPU (h_gr[((UINT) 0)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-0", 'x', opval); - } - { - SI opval = tmp_temp; - CPU (h_gr[((UINT) 31)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-31", 'x', opval); - } - { - SI opval = ADDSI (tmp_temp, 64); - CPU (h_gr[((UINT) 1)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-1", 'x', opval); - } -} - - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* ret: ret */ - -static SEM_PC -SEM_FN_NAME (i960base,ret) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_callx_disp.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - { - SI opval = CPU (h_gr[((UINT) 0)]); - CPU (h_gr[((UINT) 31)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr-31", 'x', opval); - } -CPU (h_gr[((UINT) 0)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 0)); -CPU (h_gr[((UINT) 1)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 4)); -CPU (h_gr[((UINT) 2)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 8)); -CPU (h_gr[((UINT) 3)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 12)); -CPU (h_gr[((UINT) 4)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 16)); -CPU (h_gr[((UINT) 5)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 20)); -CPU (h_gr[((UINT) 6)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 24)); -CPU (h_gr[((UINT) 7)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 28)); -CPU (h_gr[((UINT) 8)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 32)); -CPU (h_gr[((UINT) 9)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 36)); -CPU (h_gr[((UINT) 10)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 40)); -CPU (h_gr[((UINT) 11)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 44)); -CPU (h_gr[((UINT) 12)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 48)); -CPU (h_gr[((UINT) 13)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 52)); -CPU (h_gr[((UINT) 14)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 56)); -CPU (h_gr[((UINT) 15)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 60)); - { - USI opval = CPU (h_gr[((UINT) 2)]); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* calls: calls $src1 */ - -static SEM_PC -SEM_FN_NAME (i960base,calls) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_emul2.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = i960_trap (current_cpu, pc, * FLD (i_src1)); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } - - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* fmark: fmark */ - -static SEM_PC -SEM_FN_NAME (i960base,fmark) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = i960_breakpoint (current_cpu, pc); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } - - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* flushreg: flushreg */ - -static SEM_PC -SEM_FN_NAME (i960base,flushreg) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -((void) 0); /*nop*/ - - return vpc; -#undef FLD -} - -/* Table of all semantic fns. */ - -static const struct sem_fn_desc sem_fns[] = { - { I960BASE_INSN_X_INVALID, SEM_FN_NAME (i960base,x_invalid) }, - { I960BASE_INSN_X_AFTER, SEM_FN_NAME (i960base,x_after) }, - { I960BASE_INSN_X_BEFORE, SEM_FN_NAME (i960base,x_before) }, - { I960BASE_INSN_X_CTI_CHAIN, SEM_FN_NAME (i960base,x_cti_chain) }, - { I960BASE_INSN_X_CHAIN, SEM_FN_NAME (i960base,x_chain) }, - { I960BASE_INSN_X_BEGIN, SEM_FN_NAME (i960base,x_begin) }, - { I960BASE_INSN_MULO, SEM_FN_NAME (i960base,mulo) }, - { I960BASE_INSN_MULO1, SEM_FN_NAME (i960base,mulo1) }, - { I960BASE_INSN_MULO2, SEM_FN_NAME (i960base,mulo2) }, - { I960BASE_INSN_MULO3, SEM_FN_NAME (i960base,mulo3) }, - { I960BASE_INSN_REMO, SEM_FN_NAME (i960base,remo) }, - { I960BASE_INSN_REMO1, SEM_FN_NAME (i960base,remo1) }, - { I960BASE_INSN_REMO2, SEM_FN_NAME (i960base,remo2) }, - { I960BASE_INSN_REMO3, SEM_FN_NAME (i960base,remo3) }, - { I960BASE_INSN_DIVO, SEM_FN_NAME (i960base,divo) }, - { I960BASE_INSN_DIVO1, SEM_FN_NAME (i960base,divo1) }, - { I960BASE_INSN_DIVO2, SEM_FN_NAME (i960base,divo2) }, - { I960BASE_INSN_DIVO3, SEM_FN_NAME (i960base,divo3) }, - { I960BASE_INSN_REMI, SEM_FN_NAME (i960base,remi) }, - { I960BASE_INSN_REMI1, SEM_FN_NAME (i960base,remi1) }, - { I960BASE_INSN_REMI2, SEM_FN_NAME (i960base,remi2) }, - { I960BASE_INSN_REMI3, SEM_FN_NAME (i960base,remi3) }, - { I960BASE_INSN_DIVI, SEM_FN_NAME (i960base,divi) }, - { I960BASE_INSN_DIVI1, SEM_FN_NAME (i960base,divi1) }, - { I960BASE_INSN_DIVI2, SEM_FN_NAME (i960base,divi2) }, - { I960BASE_INSN_DIVI3, SEM_FN_NAME (i960base,divi3) }, - { I960BASE_INSN_ADDO, SEM_FN_NAME (i960base,addo) }, - { I960BASE_INSN_ADDO1, SEM_FN_NAME (i960base,addo1) }, - { I960BASE_INSN_ADDO2, SEM_FN_NAME (i960base,addo2) }, - { I960BASE_INSN_ADDO3, SEM_FN_NAME (i960base,addo3) }, - { I960BASE_INSN_SUBO, SEM_FN_NAME (i960base,subo) }, - { I960BASE_INSN_SUBO1, SEM_FN_NAME (i960base,subo1) }, - { I960BASE_INSN_SUBO2, SEM_FN_NAME (i960base,subo2) }, - { I960BASE_INSN_SUBO3, SEM_FN_NAME (i960base,subo3) }, - { I960BASE_INSN_NOTBIT, SEM_FN_NAME (i960base,notbit) }, - { I960BASE_INSN_NOTBIT1, SEM_FN_NAME (i960base,notbit1) }, - { I960BASE_INSN_NOTBIT2, SEM_FN_NAME (i960base,notbit2) }, - { I960BASE_INSN_NOTBIT3, SEM_FN_NAME (i960base,notbit3) }, - { I960BASE_INSN_AND, SEM_FN_NAME (i960base,and) }, - { I960BASE_INSN_AND1, SEM_FN_NAME (i960base,and1) }, - { I960BASE_INSN_AND2, SEM_FN_NAME (i960base,and2) }, - { I960BASE_INSN_AND3, SEM_FN_NAME (i960base,and3) }, - { I960BASE_INSN_ANDNOT, SEM_FN_NAME (i960base,andnot) }, - { I960BASE_INSN_ANDNOT1, SEM_FN_NAME (i960base,andnot1) }, - { I960BASE_INSN_ANDNOT2, SEM_FN_NAME (i960base,andnot2) }, - { I960BASE_INSN_ANDNOT3, SEM_FN_NAME (i960base,andnot3) }, - { I960BASE_INSN_SETBIT, SEM_FN_NAME (i960base,setbit) }, - { I960BASE_INSN_SETBIT1, SEM_FN_NAME (i960base,setbit1) }, - { I960BASE_INSN_SETBIT2, SEM_FN_NAME (i960base,setbit2) }, - { I960BASE_INSN_SETBIT3, SEM_FN_NAME (i960base,setbit3) }, - { I960BASE_INSN_NOTAND, SEM_FN_NAME (i960base,notand) }, - { I960BASE_INSN_NOTAND1, SEM_FN_NAME (i960base,notand1) }, - { I960BASE_INSN_NOTAND2, SEM_FN_NAME (i960base,notand2) }, - { I960BASE_INSN_NOTAND3, SEM_FN_NAME (i960base,notand3) }, - { I960BASE_INSN_XOR, SEM_FN_NAME (i960base,xor) }, - { I960BASE_INSN_XOR1, SEM_FN_NAME (i960base,xor1) }, - { I960BASE_INSN_XOR2, SEM_FN_NAME (i960base,xor2) }, - { I960BASE_INSN_XOR3, SEM_FN_NAME (i960base,xor3) }, - { I960BASE_INSN_OR, SEM_FN_NAME (i960base,or) }, - { I960BASE_INSN_OR1, SEM_FN_NAME (i960base,or1) }, - { I960BASE_INSN_OR2, SEM_FN_NAME (i960base,or2) }, - { I960BASE_INSN_OR3, SEM_FN_NAME (i960base,or3) }, - { I960BASE_INSN_NOR, SEM_FN_NAME (i960base,nor) }, - { I960BASE_INSN_NOR1, SEM_FN_NAME (i960base,nor1) }, - { I960BASE_INSN_NOR2, SEM_FN_NAME (i960base,nor2) }, - { I960BASE_INSN_NOR3, SEM_FN_NAME (i960base,nor3) }, - { I960BASE_INSN_XNOR, SEM_FN_NAME (i960base,xnor) }, - { I960BASE_INSN_XNOR1, SEM_FN_NAME (i960base,xnor1) }, - { I960BASE_INSN_XNOR2, SEM_FN_NAME (i960base,xnor2) }, - { I960BASE_INSN_XNOR3, SEM_FN_NAME (i960base,xnor3) }, - { I960BASE_INSN_NOT, SEM_FN_NAME (i960base,not) }, - { I960BASE_INSN_NOT1, SEM_FN_NAME (i960base,not1) }, - { I960BASE_INSN_NOT2, SEM_FN_NAME (i960base,not2) }, - { I960BASE_INSN_NOT3, SEM_FN_NAME (i960base,not3) }, - { I960BASE_INSN_ORNOT, SEM_FN_NAME (i960base,ornot) }, - { I960BASE_INSN_ORNOT1, SEM_FN_NAME (i960base,ornot1) }, - { I960BASE_INSN_ORNOT2, SEM_FN_NAME (i960base,ornot2) }, - { I960BASE_INSN_ORNOT3, SEM_FN_NAME (i960base,ornot3) }, - { I960BASE_INSN_CLRBIT, SEM_FN_NAME (i960base,clrbit) }, - { I960BASE_INSN_CLRBIT1, SEM_FN_NAME (i960base,clrbit1) }, - { I960BASE_INSN_CLRBIT2, SEM_FN_NAME (i960base,clrbit2) }, - { I960BASE_INSN_CLRBIT3, SEM_FN_NAME (i960base,clrbit3) }, - { I960BASE_INSN_SHLO, SEM_FN_NAME (i960base,shlo) }, - { I960BASE_INSN_SHLO1, SEM_FN_NAME (i960base,shlo1) }, - { I960BASE_INSN_SHLO2, SEM_FN_NAME (i960base,shlo2) }, - { I960BASE_INSN_SHLO3, SEM_FN_NAME (i960base,shlo3) }, - { I960BASE_INSN_SHRO, SEM_FN_NAME (i960base,shro) }, - { I960BASE_INSN_SHRO1, SEM_FN_NAME (i960base,shro1) }, - { I960BASE_INSN_SHRO2, SEM_FN_NAME (i960base,shro2) }, - { I960BASE_INSN_SHRO3, SEM_FN_NAME (i960base,shro3) }, - { I960BASE_INSN_SHLI, SEM_FN_NAME (i960base,shli) }, - { I960BASE_INSN_SHLI1, SEM_FN_NAME (i960base,shli1) }, - { I960BASE_INSN_SHLI2, SEM_FN_NAME (i960base,shli2) }, - { I960BASE_INSN_SHLI3, SEM_FN_NAME (i960base,shli3) }, - { I960BASE_INSN_SHRI, SEM_FN_NAME (i960base,shri) }, - { I960BASE_INSN_SHRI1, SEM_FN_NAME (i960base,shri1) }, - { I960BASE_INSN_SHRI2, SEM_FN_NAME (i960base,shri2) }, - { I960BASE_INSN_SHRI3, SEM_FN_NAME (i960base,shri3) }, - { I960BASE_INSN_EMUL, SEM_FN_NAME (i960base,emul) }, - { I960BASE_INSN_EMUL1, SEM_FN_NAME (i960base,emul1) }, - { I960BASE_INSN_EMUL2, SEM_FN_NAME (i960base,emul2) }, - { I960BASE_INSN_EMUL3, SEM_FN_NAME (i960base,emul3) }, - { I960BASE_INSN_MOV, SEM_FN_NAME (i960base,mov) }, - { I960BASE_INSN_MOV1, SEM_FN_NAME (i960base,mov1) }, - { I960BASE_INSN_MOVL, SEM_FN_NAME (i960base,movl) }, - { I960BASE_INSN_MOVL1, SEM_FN_NAME (i960base,movl1) }, - { I960BASE_INSN_MOVT, SEM_FN_NAME (i960base,movt) }, - { I960BASE_INSN_MOVT1, SEM_FN_NAME (i960base,movt1) }, - { I960BASE_INSN_MOVQ, SEM_FN_NAME (i960base,movq) }, - { I960BASE_INSN_MOVQ1, SEM_FN_NAME (i960base,movq1) }, - { I960BASE_INSN_MODPC, SEM_FN_NAME (i960base,modpc) }, - { I960BASE_INSN_MODAC, SEM_FN_NAME (i960base,modac) }, - { I960BASE_INSN_LDA_OFFSET, SEM_FN_NAME (i960base,lda_offset) }, - { I960BASE_INSN_LDA_INDIRECT_OFFSET, SEM_FN_NAME (i960base,lda_indirect_offset) }, - { I960BASE_INSN_LDA_INDIRECT, SEM_FN_NAME (i960base,lda_indirect) }, - { I960BASE_INSN_LDA_INDIRECT_INDEX, SEM_FN_NAME (i960base,lda_indirect_index) }, - { I960BASE_INSN_LDA_DISP, SEM_FN_NAME (i960base,lda_disp) }, - { I960BASE_INSN_LDA_INDIRECT_DISP, SEM_FN_NAME (i960base,lda_indirect_disp) }, - { I960BASE_INSN_LDA_INDEX_DISP, SEM_FN_NAME (i960base,lda_index_disp) }, - { I960BASE_INSN_LDA_INDIRECT_INDEX_DISP, SEM_FN_NAME (i960base,lda_indirect_index_disp) }, - { I960BASE_INSN_LD_OFFSET, SEM_FN_NAME (i960base,ld_offset) }, - { I960BASE_INSN_LD_INDIRECT_OFFSET, SEM_FN_NAME (i960base,ld_indirect_offset) }, - { I960BASE_INSN_LD_INDIRECT, SEM_FN_NAME (i960base,ld_indirect) }, - { I960BASE_INSN_LD_INDIRECT_INDEX, SEM_FN_NAME (i960base,ld_indirect_index) }, - { I960BASE_INSN_LD_DISP, SEM_FN_NAME (i960base,ld_disp) }, - { I960BASE_INSN_LD_INDIRECT_DISP, SEM_FN_NAME (i960base,ld_indirect_disp) }, - { I960BASE_INSN_LD_INDEX_DISP, SEM_FN_NAME (i960base,ld_index_disp) }, - { I960BASE_INSN_LD_INDIRECT_INDEX_DISP, SEM_FN_NAME (i960base,ld_indirect_index_disp) }, - { I960BASE_INSN_LDOB_OFFSET, SEM_FN_NAME (i960base,ldob_offset) }, - { I960BASE_INSN_LDOB_INDIRECT_OFFSET, SEM_FN_NAME (i960base,ldob_indirect_offset) }, - { I960BASE_INSN_LDOB_INDIRECT, SEM_FN_NAME (i960base,ldob_indirect) }, - { I960BASE_INSN_LDOB_INDIRECT_INDEX, SEM_FN_NAME (i960base,ldob_indirect_index) }, - { I960BASE_INSN_LDOB_DISP, SEM_FN_NAME (i960base,ldob_disp) }, - { I960BASE_INSN_LDOB_INDIRECT_DISP, SEM_FN_NAME (i960base,ldob_indirect_disp) }, - { I960BASE_INSN_LDOB_INDEX_DISP, SEM_FN_NAME (i960base,ldob_index_disp) }, - { I960BASE_INSN_LDOB_INDIRECT_INDEX_DISP, SEM_FN_NAME (i960base,ldob_indirect_index_disp) }, - { I960BASE_INSN_LDOS_OFFSET, SEM_FN_NAME (i960base,ldos_offset) }, - { I960BASE_INSN_LDOS_INDIRECT_OFFSET, SEM_FN_NAME (i960base,ldos_indirect_offset) }, - { I960BASE_INSN_LDOS_INDIRECT, SEM_FN_NAME (i960base,ldos_indirect) }, - { I960BASE_INSN_LDOS_INDIRECT_INDEX, SEM_FN_NAME (i960base,ldos_indirect_index) }, - { I960BASE_INSN_LDOS_DISP, SEM_FN_NAME (i960base,ldos_disp) }, - { I960BASE_INSN_LDOS_INDIRECT_DISP, SEM_FN_NAME (i960base,ldos_indirect_disp) }, - { I960BASE_INSN_LDOS_INDEX_DISP, SEM_FN_NAME (i960base,ldos_index_disp) }, - { I960BASE_INSN_LDOS_INDIRECT_INDEX_DISP, SEM_FN_NAME (i960base,ldos_indirect_index_disp) }, - { I960BASE_INSN_LDIB_OFFSET, SEM_FN_NAME (i960base,ldib_offset) }, - { I960BASE_INSN_LDIB_INDIRECT_OFFSET, SEM_FN_NAME (i960base,ldib_indirect_offset) }, - { I960BASE_INSN_LDIB_INDIRECT, SEM_FN_NAME (i960base,ldib_indirect) }, - { I960BASE_INSN_LDIB_INDIRECT_INDEX, SEM_FN_NAME (i960base,ldib_indirect_index) }, - { I960BASE_INSN_LDIB_DISP, SEM_FN_NAME (i960base,ldib_disp) }, - { I960BASE_INSN_LDIB_INDIRECT_DISP, SEM_FN_NAME (i960base,ldib_indirect_disp) }, - { I960BASE_INSN_LDIB_INDEX_DISP, SEM_FN_NAME (i960base,ldib_index_disp) }, - { I960BASE_INSN_LDIB_INDIRECT_INDEX_DISP, SEM_FN_NAME (i960base,ldib_indirect_index_disp) }, - { I960BASE_INSN_LDIS_OFFSET, SEM_FN_NAME (i960base,ldis_offset) }, - { I960BASE_INSN_LDIS_INDIRECT_OFFSET, SEM_FN_NAME (i960base,ldis_indirect_offset) }, - { I960BASE_INSN_LDIS_INDIRECT, SEM_FN_NAME (i960base,ldis_indirect) }, - { I960BASE_INSN_LDIS_INDIRECT_INDEX, SEM_FN_NAME (i960base,ldis_indirect_index) }, - { I960BASE_INSN_LDIS_DISP, SEM_FN_NAME (i960base,ldis_disp) }, - { I960BASE_INSN_LDIS_INDIRECT_DISP, SEM_FN_NAME (i960base,ldis_indirect_disp) }, - { I960BASE_INSN_LDIS_INDEX_DISP, SEM_FN_NAME (i960base,ldis_index_disp) }, - { I960BASE_INSN_LDIS_INDIRECT_INDEX_DISP, SEM_FN_NAME (i960base,ldis_indirect_index_disp) }, - { I960BASE_INSN_LDL_OFFSET, SEM_FN_NAME (i960base,ldl_offset) }, - { I960BASE_INSN_LDL_INDIRECT_OFFSET, SEM_FN_NAME (i960base,ldl_indirect_offset) }, - { I960BASE_INSN_LDL_INDIRECT, SEM_FN_NAME (i960base,ldl_indirect) }, - { I960BASE_INSN_LDL_INDIRECT_INDEX, SEM_FN_NAME (i960base,ldl_indirect_index) }, - { I960BASE_INSN_LDL_DISP, SEM_FN_NAME (i960base,ldl_disp) }, - { I960BASE_INSN_LDL_INDIRECT_DISP, SEM_FN_NAME (i960base,ldl_indirect_disp) }, - { I960BASE_INSN_LDL_INDEX_DISP, SEM_FN_NAME (i960base,ldl_index_disp) }, - { I960BASE_INSN_LDL_INDIRECT_INDEX_DISP, SEM_FN_NAME (i960base,ldl_indirect_index_disp) }, - { I960BASE_INSN_LDT_OFFSET, SEM_FN_NAME (i960base,ldt_offset) }, - { I960BASE_INSN_LDT_INDIRECT_OFFSET, SEM_FN_NAME (i960base,ldt_indirect_offset) }, - { I960BASE_INSN_LDT_INDIRECT, SEM_FN_NAME (i960base,ldt_indirect) }, - { I960BASE_INSN_LDT_INDIRECT_INDEX, SEM_FN_NAME (i960base,ldt_indirect_index) }, - { I960BASE_INSN_LDT_DISP, SEM_FN_NAME (i960base,ldt_disp) }, - { I960BASE_INSN_LDT_INDIRECT_DISP, SEM_FN_NAME (i960base,ldt_indirect_disp) }, - { I960BASE_INSN_LDT_INDEX_DISP, SEM_FN_NAME (i960base,ldt_index_disp) }, - { I960BASE_INSN_LDT_INDIRECT_INDEX_DISP, SEM_FN_NAME (i960base,ldt_indirect_index_disp) }, - { I960BASE_INSN_LDQ_OFFSET, SEM_FN_NAME (i960base,ldq_offset) }, - { I960BASE_INSN_LDQ_INDIRECT_OFFSET, SEM_FN_NAME (i960base,ldq_indirect_offset) }, - { I960BASE_INSN_LDQ_INDIRECT, SEM_FN_NAME (i960base,ldq_indirect) }, - { I960BASE_INSN_LDQ_INDIRECT_INDEX, SEM_FN_NAME (i960base,ldq_indirect_index) }, - { I960BASE_INSN_LDQ_DISP, SEM_FN_NAME (i960base,ldq_disp) }, - { I960BASE_INSN_LDQ_INDIRECT_DISP, SEM_FN_NAME (i960base,ldq_indirect_disp) }, - { I960BASE_INSN_LDQ_INDEX_DISP, SEM_FN_NAME (i960base,ldq_index_disp) }, - { I960BASE_INSN_LDQ_INDIRECT_INDEX_DISP, SEM_FN_NAME (i960base,ldq_indirect_index_disp) }, - { I960BASE_INSN_ST_OFFSET, SEM_FN_NAME (i960base,st_offset) }, - { I960BASE_INSN_ST_INDIRECT_OFFSET, SEM_FN_NAME (i960base,st_indirect_offset) }, - { I960BASE_INSN_ST_INDIRECT, SEM_FN_NAME (i960base,st_indirect) }, - { I960BASE_INSN_ST_INDIRECT_INDEX, SEM_FN_NAME (i960base,st_indirect_index) }, - { I960BASE_INSN_ST_DISP, SEM_FN_NAME (i960base,st_disp) }, - { I960BASE_INSN_ST_INDIRECT_DISP, SEM_FN_NAME (i960base,st_indirect_disp) }, - { I960BASE_INSN_ST_INDEX_DISP, SEM_FN_NAME (i960base,st_index_disp) }, - { I960BASE_INSN_ST_INDIRECT_INDEX_DISP, SEM_FN_NAME (i960base,st_indirect_index_disp) }, - { I960BASE_INSN_STOB_OFFSET, SEM_FN_NAME (i960base,stob_offset) }, - { I960BASE_INSN_STOB_INDIRECT_OFFSET, SEM_FN_NAME (i960base,stob_indirect_offset) }, - { I960BASE_INSN_STOB_INDIRECT, SEM_FN_NAME (i960base,stob_indirect) }, - { I960BASE_INSN_STOB_INDIRECT_INDEX, SEM_FN_NAME (i960base,stob_indirect_index) }, - { I960BASE_INSN_STOB_DISP, SEM_FN_NAME (i960base,stob_disp) }, - { I960BASE_INSN_STOB_INDIRECT_DISP, SEM_FN_NAME (i960base,stob_indirect_disp) }, - { I960BASE_INSN_STOB_INDEX_DISP, SEM_FN_NAME (i960base,stob_index_disp) }, - { I960BASE_INSN_STOB_INDIRECT_INDEX_DISP, SEM_FN_NAME (i960base,stob_indirect_index_disp) }, - { I960BASE_INSN_STOS_OFFSET, SEM_FN_NAME (i960base,stos_offset) }, - { I960BASE_INSN_STOS_INDIRECT_OFFSET, SEM_FN_NAME (i960base,stos_indirect_offset) }, - { I960BASE_INSN_STOS_INDIRECT, SEM_FN_NAME (i960base,stos_indirect) }, - { I960BASE_INSN_STOS_INDIRECT_INDEX, SEM_FN_NAME (i960base,stos_indirect_index) }, - { I960BASE_INSN_STOS_DISP, SEM_FN_NAME (i960base,stos_disp) }, - { I960BASE_INSN_STOS_INDIRECT_DISP, SEM_FN_NAME (i960base,stos_indirect_disp) }, - { I960BASE_INSN_STOS_INDEX_DISP, SEM_FN_NAME (i960base,stos_index_disp) }, - { I960BASE_INSN_STOS_INDIRECT_INDEX_DISP, SEM_FN_NAME (i960base,stos_indirect_index_disp) }, - { I960BASE_INSN_STL_OFFSET, SEM_FN_NAME (i960base,stl_offset) }, - { I960BASE_INSN_STL_INDIRECT_OFFSET, SEM_FN_NAME (i960base,stl_indirect_offset) }, - { I960BASE_INSN_STL_INDIRECT, SEM_FN_NAME (i960base,stl_indirect) }, - { I960BASE_INSN_STL_INDIRECT_INDEX, SEM_FN_NAME (i960base,stl_indirect_index) }, - { I960BASE_INSN_STL_DISP, SEM_FN_NAME (i960base,stl_disp) }, - { I960BASE_INSN_STL_INDIRECT_DISP, SEM_FN_NAME (i960base,stl_indirect_disp) }, - { I960BASE_INSN_STL_INDEX_DISP, SEM_FN_NAME (i960base,stl_index_disp) }, - { I960BASE_INSN_STL_INDIRECT_INDEX_DISP, SEM_FN_NAME (i960base,stl_indirect_index_disp) }, - { I960BASE_INSN_STT_OFFSET, SEM_FN_NAME (i960base,stt_offset) }, - { I960BASE_INSN_STT_INDIRECT_OFFSET, SEM_FN_NAME (i960base,stt_indirect_offset) }, - { I960BASE_INSN_STT_INDIRECT, SEM_FN_NAME (i960base,stt_indirect) }, - { I960BASE_INSN_STT_INDIRECT_INDEX, SEM_FN_NAME (i960base,stt_indirect_index) }, - { I960BASE_INSN_STT_DISP, SEM_FN_NAME (i960base,stt_disp) }, - { I960BASE_INSN_STT_INDIRECT_DISP, SEM_FN_NAME (i960base,stt_indirect_disp) }, - { I960BASE_INSN_STT_INDEX_DISP, SEM_FN_NAME (i960base,stt_index_disp) }, - { I960BASE_INSN_STT_INDIRECT_INDEX_DISP, SEM_FN_NAME (i960base,stt_indirect_index_disp) }, - { I960BASE_INSN_STQ_OFFSET, SEM_FN_NAME (i960base,stq_offset) }, - { I960BASE_INSN_STQ_INDIRECT_OFFSET, SEM_FN_NAME (i960base,stq_indirect_offset) }, - { I960BASE_INSN_STQ_INDIRECT, SEM_FN_NAME (i960base,stq_indirect) }, - { I960BASE_INSN_STQ_INDIRECT_INDEX, SEM_FN_NAME (i960base,stq_indirect_index) }, - { I960BASE_INSN_STQ_DISP, SEM_FN_NAME (i960base,stq_disp) }, - { I960BASE_INSN_STQ_INDIRECT_DISP, SEM_FN_NAME (i960base,stq_indirect_disp) }, - { I960BASE_INSN_STQ_INDEX_DISP, SEM_FN_NAME (i960base,stq_index_disp) }, - { I960BASE_INSN_STQ_INDIRECT_INDEX_DISP, SEM_FN_NAME (i960base,stq_indirect_index_disp) }, - { I960BASE_INSN_CMPOBE_REG, SEM_FN_NAME (i960base,cmpobe_reg) }, - { I960BASE_INSN_CMPOBE_LIT, SEM_FN_NAME (i960base,cmpobe_lit) }, - { I960BASE_INSN_CMPOBNE_REG, SEM_FN_NAME (i960base,cmpobne_reg) }, - { I960BASE_INSN_CMPOBNE_LIT, SEM_FN_NAME (i960base,cmpobne_lit) }, - { I960BASE_INSN_CMPOBL_REG, SEM_FN_NAME (i960base,cmpobl_reg) }, - { I960BASE_INSN_CMPOBL_LIT, SEM_FN_NAME (i960base,cmpobl_lit) }, - { I960BASE_INSN_CMPOBLE_REG, SEM_FN_NAME (i960base,cmpoble_reg) }, - { I960BASE_INSN_CMPOBLE_LIT, SEM_FN_NAME (i960base,cmpoble_lit) }, - { I960BASE_INSN_CMPOBG_REG, SEM_FN_NAME (i960base,cmpobg_reg) }, - { I960BASE_INSN_CMPOBG_LIT, SEM_FN_NAME (i960base,cmpobg_lit) }, - { I960BASE_INSN_CMPOBGE_REG, SEM_FN_NAME (i960base,cmpobge_reg) }, - { I960BASE_INSN_CMPOBGE_LIT, SEM_FN_NAME (i960base,cmpobge_lit) }, - { I960BASE_INSN_CMPIBE_REG, SEM_FN_NAME (i960base,cmpibe_reg) }, - { I960BASE_INSN_CMPIBE_LIT, SEM_FN_NAME (i960base,cmpibe_lit) }, - { I960BASE_INSN_CMPIBNE_REG, SEM_FN_NAME (i960base,cmpibne_reg) }, - { I960BASE_INSN_CMPIBNE_LIT, SEM_FN_NAME (i960base,cmpibne_lit) }, - { I960BASE_INSN_CMPIBL_REG, SEM_FN_NAME (i960base,cmpibl_reg) }, - { I960BASE_INSN_CMPIBL_LIT, SEM_FN_NAME (i960base,cmpibl_lit) }, - { I960BASE_INSN_CMPIBLE_REG, SEM_FN_NAME (i960base,cmpible_reg) }, - { I960BASE_INSN_CMPIBLE_LIT, SEM_FN_NAME (i960base,cmpible_lit) }, - { I960BASE_INSN_CMPIBG_REG, SEM_FN_NAME (i960base,cmpibg_reg) }, - { I960BASE_INSN_CMPIBG_LIT, SEM_FN_NAME (i960base,cmpibg_lit) }, - { I960BASE_INSN_CMPIBGE_REG, SEM_FN_NAME (i960base,cmpibge_reg) }, - { I960BASE_INSN_CMPIBGE_LIT, SEM_FN_NAME (i960base,cmpibge_lit) }, - { I960BASE_INSN_BBC_REG, SEM_FN_NAME (i960base,bbc_reg) }, - { I960BASE_INSN_BBC_LIT, SEM_FN_NAME (i960base,bbc_lit) }, - { I960BASE_INSN_BBS_REG, SEM_FN_NAME (i960base,bbs_reg) }, - { I960BASE_INSN_BBS_LIT, SEM_FN_NAME (i960base,bbs_lit) }, - { I960BASE_INSN_CMPI, SEM_FN_NAME (i960base,cmpi) }, - { I960BASE_INSN_CMPI1, SEM_FN_NAME (i960base,cmpi1) }, - { I960BASE_INSN_CMPI2, SEM_FN_NAME (i960base,cmpi2) }, - { I960BASE_INSN_CMPI3, SEM_FN_NAME (i960base,cmpi3) }, - { I960BASE_INSN_CMPO, SEM_FN_NAME (i960base,cmpo) }, - { I960BASE_INSN_CMPO1, SEM_FN_NAME (i960base,cmpo1) }, - { I960BASE_INSN_CMPO2, SEM_FN_NAME (i960base,cmpo2) }, - { I960BASE_INSN_CMPO3, SEM_FN_NAME (i960base,cmpo3) }, - { I960BASE_INSN_TESTNO_REG, SEM_FN_NAME (i960base,testno_reg) }, - { I960BASE_INSN_TESTG_REG, SEM_FN_NAME (i960base,testg_reg) }, - { I960BASE_INSN_TESTE_REG, SEM_FN_NAME (i960base,teste_reg) }, - { I960BASE_INSN_TESTGE_REG, SEM_FN_NAME (i960base,testge_reg) }, - { I960BASE_INSN_TESTL_REG, SEM_FN_NAME (i960base,testl_reg) }, - { I960BASE_INSN_TESTNE_REG, SEM_FN_NAME (i960base,testne_reg) }, - { I960BASE_INSN_TESTLE_REG, SEM_FN_NAME (i960base,testle_reg) }, - { I960BASE_INSN_TESTO_REG, SEM_FN_NAME (i960base,testo_reg) }, - { I960BASE_INSN_BNO, SEM_FN_NAME (i960base,bno) }, - { I960BASE_INSN_BG, SEM_FN_NAME (i960base,bg) }, - { I960BASE_INSN_BE, SEM_FN_NAME (i960base,be) }, - { I960BASE_INSN_BGE, SEM_FN_NAME (i960base,bge) }, - { I960BASE_INSN_BL, SEM_FN_NAME (i960base,bl) }, - { I960BASE_INSN_BNE, SEM_FN_NAME (i960base,bne) }, - { I960BASE_INSN_BLE, SEM_FN_NAME (i960base,ble) }, - { I960BASE_INSN_BO, SEM_FN_NAME (i960base,bo) }, - { I960BASE_INSN_B, SEM_FN_NAME (i960base,b) }, - { I960BASE_INSN_BX_INDIRECT_OFFSET, SEM_FN_NAME (i960base,bx_indirect_offset) }, - { I960BASE_INSN_BX_INDIRECT, SEM_FN_NAME (i960base,bx_indirect) }, - { I960BASE_INSN_BX_INDIRECT_INDEX, SEM_FN_NAME (i960base,bx_indirect_index) }, - { I960BASE_INSN_BX_DISP, SEM_FN_NAME (i960base,bx_disp) }, - { I960BASE_INSN_BX_INDIRECT_DISP, SEM_FN_NAME (i960base,bx_indirect_disp) }, - { I960BASE_INSN_CALLX_DISP, SEM_FN_NAME (i960base,callx_disp) }, - { I960BASE_INSN_CALLX_INDIRECT, SEM_FN_NAME (i960base,callx_indirect) }, - { I960BASE_INSN_CALLX_INDIRECT_OFFSET, SEM_FN_NAME (i960base,callx_indirect_offset) }, - { I960BASE_INSN_RET, SEM_FN_NAME (i960base,ret) }, - { I960BASE_INSN_CALLS, SEM_FN_NAME (i960base,calls) }, - { I960BASE_INSN_FMARK, SEM_FN_NAME (i960base,fmark) }, - { I960BASE_INSN_FLUSHREG, SEM_FN_NAME (i960base,flushreg) }, - { 0, 0 } -}; - -/* Add the semantic fns to IDESC_TABLE. */ - -void -SEM_FN_NAME (i960base,init_idesc_table) (SIM_CPU *current_cpu) -{ - IDESC *idesc_table = CPU_IDESC (current_cpu); - const struct sem_fn_desc *sf; - int mach_num = MACH_NUM (CPU_MACH (current_cpu)); - - for (sf = &sem_fns[0]; sf->fn != 0; ++sf) - { - const CGEN_INSN *insn = idesc_table[sf->index].idata; - int valid_p = (CGEN_INSN_VIRTUAL_P (insn) - || CGEN_INSN_MACH_HAS_P (insn, mach_num)); -#if FAST_P - if (valid_p) - idesc_table[sf->index].sem_fast = sf->fn; - else - idesc_table[sf->index].sem_fast = SEM_FN_NAME (i960base,x_invalid); -#else - if (valid_p) - idesc_table[sf->index].sem_full = sf->fn; - else - idesc_table[sf->index].sem_full = SEM_FN_NAME (i960base,x_invalid); -#endif - } -} - diff --git a/sim/i960/sim-if.c b/sim/i960/sim-if.c deleted file mode 100644 index 423dac0..0000000 --- a/sim/i960/sim-if.c +++ /dev/null @@ -1,311 +0,0 @@ -/* Main simulator entry points for the i960. - Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc. - Contributed by Cygnus Support. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ - -#include "libiberty.h" -#include "bfd.h" -#include "sim-main.h" -#ifdef HAVE_STDLIB_H -#include <stdlib.h> -#endif -#include "sim-options.h" -#include "dis-asm.h" - -static void free_state (SIM_DESC); - -/* Since we don't build the cgen-opcode table, we use the old - disassembler. */ -static CGEN_DISASSEMBLER i960_disassemble_insn; - -/* Records simulator descriptor so utilities like i960_dump_regs can be - called from gdb. */ -SIM_DESC current_state; - -/* Cover function of sim_state_free to free the cpu buffers as well. */ - -static void -free_state (SIM_DESC sd) -{ - if (STATE_MODULES (sd) != NULL) - sim_module_uninstall (sd); - sim_cpu_free_all (sd); - sim_state_free (sd); -} - -/* Create an instance of the simulator. */ - -SIM_DESC -sim_open (kind, callback, abfd, argv) - SIM_OPEN_KIND kind; - host_callback *callback; - struct bfd *abfd; - char **argv; -{ - char c; - int i; - SIM_DESC sd = sim_state_alloc (kind, callback); - - /* The cpu data is kept in a separately allocated chunk of memory. */ - if (sim_cpu_alloc_all (sd, 1, cgen_cpu_max_extra_bytes ()) != SIM_RC_OK) - { - free_state (sd); - return 0; - } - -#if 0 /* FIXME: pc is in mach-specific struct */ - /* FIXME: watchpoints code shouldn't need this */ - { - SIM_CPU *current_cpu = STATE_CPU (sd, 0); - STATE_WATCHPOINTS (sd)->pc = &(PC); - STATE_WATCHPOINTS (sd)->sizeof_pc = sizeof (PC); - } -#endif - - if (sim_pre_argv_init (sd, argv[0]) != SIM_RC_OK) - { - free_state (sd); - return 0; - } - -#if 0 /* FIXME: 'twould be nice if we could do this */ - /* These options override any module options. - Obviously ambiguity should be avoided, however the caller may wish to - augment the meaning of an option. */ - if (extra_options != NULL) - sim_add_option_table (sd, extra_options); -#endif - - /* getopt will print the error message so we just have to exit if this fails. - FIXME: Hmmm... in the case of gdb we need getopt to call - print_filtered. */ - if (sim_parse_args (sd, argv) != SIM_RC_OK) - { - free_state (sd); - return 0; - } - - /* Allocate a handler for the control registers and other devices - if no memory for that range has been allocated by the user. - All are allocated in one chunk to keep things from being - unnecessarily complicated. */ - if (sim_core_read_buffer (sd, NULL, read_map, &c, I960_DEVICE_ADDR, 1) == 0) - sim_core_attach (sd, NULL, - 0 /*level*/, - access_read_write, - 0 /*space ???*/, - I960_DEVICE_ADDR, I960_DEVICE_LEN /*nr_bytes*/, - 0 /*modulo*/, - &i960_devices, - NULL /*buffer*/); - - /* Allocate core managed memory if none specified by user. - Use address 4 here in case the user wanted address 0 unmapped. */ - if (sim_core_read_buffer (sd, NULL, read_map, &c, 4, 1) == 0) - /* ??? wilson */ - sim_do_commandf (sd, "memory region 0x%lx,0x%lx", I960_DEFAULT_MEM_START, - I960_DEFAULT_MEM_SIZE); - - /* check for/establish the reference program image */ - if (sim_analyze_program (sd, - (STATE_PROG_ARGV (sd) != NULL - ? *STATE_PROG_ARGV (sd) - : NULL), - abfd) != SIM_RC_OK) - { - free_state (sd); - return 0; - } - - /* Establish any remaining configuration options. */ - if (sim_config (sd) != SIM_RC_OK) - { - free_state (sd); - return 0; - } - - if (sim_post_argv_init (sd) != SIM_RC_OK) - { - free_state (sd); - return 0; - } - - /* Open a copy of the cpu descriptor table. */ - { - CGEN_CPU_DESC cd = i960_cgen_cpu_open_1 (STATE_ARCHITECTURE (sd)->printable_name, - CGEN_ENDIAN_LITTLE); - for (i = 0; i < MAX_NR_PROCESSORS; ++i) - { - SIM_CPU *cpu = STATE_CPU (sd, i); - CPU_CPU_DESC (cpu) = cd; - CPU_DISASSEMBLER (cpu) = i960_disassemble_insn; - } - } - - /* Initialize various cgen things not done by common framework. - Must be done after i960_cgen_cpu_open. */ - cgen_init (sd); - - /* Store in a global so things like i960_dump_regs can be invoked - from the gdb command line. */ - current_state = sd; - - return sd; -} - -void -sim_close (sd, quitting) - SIM_DESC sd; - int quitting; -{ - i960_cgen_cpu_close (CPU_CPU_DESC (STATE_CPU (sd, 0))); - sim_module_uninstall (sd); -} - -SIM_RC -sim_create_inferior (sd, abfd, argv, envp) - SIM_DESC sd; - struct bfd *abfd; - char **argv; - char **envp; -{ - SIM_CPU *current_cpu = STATE_CPU (sd, 0); - SIM_ADDR addr; - - if (abfd != NULL) - addr = bfd_get_start_address (abfd); - else - addr = 0; - sim_pc_set (current_cpu, addr); - -#if 0 - STATE_ARGV (sd) = sim_copy_argv (argv); - STATE_ENVP (sd) = sim_copy_argv (envp); -#endif - - return SIM_RC_OK; -} - -#if 0 -int -sim_stop (SIM_DESC sd) -{ - switch (STATE_ARCHITECTURE (sd)->mach) - { - case bfd_mach_i960_ka_sa : - return i960base_engine_stop (sd, NULL, NULL_CIA, sim_stopped, SIM_SIGINT); - default : - abort (); - } -} - -/* This isn't part of the official interface. - This is just a good place to put this for now. */ - -void -sim_sync_stop (SIM_DESC sd, SIM_CPU *cpu, PCADDR pc, enum sim_stop reason, int sigrc) -{ - switch (STATE_ARCHITECTURE (sd)->mach) - { - case bfd_mach_i960_ka_sa : - (void) i960base_engine_stop (sd, cpu, pc, reason, sigrc); - break; - default : - abort (); - } -} - -void -sim_resume (sd, step, siggnal) - SIM_DESC sd; - int step, siggnal; -{ - sim_module_resume (sd); - - switch (STATE_ARCHITECTURE (sd)->mach) - { - case bfd_mach_i960_ka_sa : - i960base_engine_run (sd, step, siggnal); - break; - default : - abort (); - } - - sim_module_suspend (sd); -} -#endif - -/* The contents of BUF are in target byte order. */ - -int -sim_fetch_register (sd, rn, buf, length) - SIM_DESC sd; - int rn; - unsigned char *buf; - int length; -{ - SIM_CPU *cpu = STATE_CPU (sd, 0); - - return (* CPU_REG_FETCH (cpu)) (cpu, rn, buf, length); -} - -/* The contents of BUF are in target byte order. */ - -int -sim_store_register (sd, rn, buf, length) - SIM_DESC sd; - int rn; - unsigned char *buf; - int length; -{ - SIM_CPU *cpu = STATE_CPU (sd, 0); - - return (* CPU_REG_STORE (cpu)) (cpu, rn, buf, length); -} - -void -sim_do_command (sd, cmd) - SIM_DESC sd; - char *cmd; -{ - if (sim_args_command (sd, cmd) != SIM_RC_OK) - sim_io_eprintf (sd, "Unknown command `%s'\n", cmd); -} - -/* Disassemble an instruction. */ - -static void -i960_disassemble_insn (SIM_CPU *cpu, const CGEN_INSN *insn, - const ARGBUF *abuf, IADDR pc, char *buf) -{ - struct disassemble_info disasm_info; - SFILE sfile; - SIM_DESC sd = CPU_STATE (cpu); - int insn_length = CGEN_INSN_BITSIZE (insn) / 8; - - sfile.buffer = sfile.current = buf; - INIT_DISASSEMBLE_INFO (disasm_info, (FILE *) &sfile, - (fprintf_ftype) sim_disasm_sprintf); - disasm_info.endian = - (bfd_big_endian (STATE_PROG_BFD (sd)) ? BFD_ENDIAN_BIG - : bfd_little_endian (STATE_PROG_BFD (sd)) ? BFD_ENDIAN_LITTLE - : BFD_ENDIAN_UNKNOWN); - disasm_info.read_memory_func = sim_disasm_read_memory; - disasm_info.memory_error_func = sim_disasm_perror_memory; - disasm_info.application_data = (PTR) cpu; - - print_insn_i960 (pc, &disasm_info); -} diff --git a/sim/i960/sim-main.h b/sim/i960/sim-main.h deleted file mode 100644 index abac5fc..0000000 --- a/sim/i960/sim-main.h +++ /dev/null @@ -1,69 +0,0 @@ -/* Main header for the i960. */ - -#define USING_SIM_BASE_H /* FIXME: quick hack */ - -struct _sim_cpu; /* FIXME: should be in sim-basics.h */ -typedef struct _sim_cpu SIM_CPU; - -#include "symcat.h" -#include "sim-basics.h" -#include "cgen-types.h" -#include "i960-desc.h" -#include "i960-opc.h" -#include "arch.h" - -/* These must be defined before sim-base.h. */ -typedef USI sim_cia; -#define CIA_GET(cpu) 0 /* FIXME:(CPU_CGEN_HW (cpu)->h_pc) */ -#define CIA_SET(cpu,val) 0 /* FIXME:(CPU_CGEN_HW (cpu)->h_pc = (val)) */ - -/* FIXME: Shouldn't be required to define these this early. */ -#define SIM_ENGINE_HALT_HOOK(SD, LAST_CPU, CIA) -#define SIM_ENGINE_RESTART_HOOK(SD, LAST_CPU, CIA) - -#include "sim-base.h" -#include "cgen-sim.h" -#include "i960-sim.h" - -/* The _sim_cpu struct. */ - -struct _sim_cpu { - sim_cpu_base base; - - /* Static parts of cgen. */ - CGEN_CPU cgen_cpu; - - /* CPU specific parts go here. - Note that in files that don't need to access these pieces WANT_CPU_FOO - won't be defined and thus these parts won't appear. This is ok. - One has to of course be careful to not take the size of this - struct and no structure members accessed in non-cpu specific files can - go after here. */ -#if defined (WANT_CPU_I960BASE) - I960BASE_CPU_DATA cpu_data; -#endif -}; - -/* The sim_state struct. */ - -struct sim_state { - sim_cpu *cpu; -#define STATE_CPU(sd, n) (/*&*/ (sd)->cpu) - - CGEN_STATE cgen_state; - - sim_state_base base; -}; - -/* Misc. */ - -/* Catch address exceptions. */ -extern SIM_CORE_SIGNAL_FN i960_core_signal; -#define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \ -i960_core_signal ((SD), (CPU), (CIA), (MAP), (NR_BYTES), (ADDR), \ - (TRANSFER), (ERROR)) - -/* Default memory size. */ -/* This value comes from the libgloss/i960/mon960.ld linker script. */ -#define I960_DEFAULT_MEM_START 0xa0008000 -#define I960_DEFAULT_MEM_SIZE 0x800000 /* 8M */ diff --git a/sim/i960/tconfig.in b/sim/i960/tconfig.in deleted file mode 100644 index 2acf456..0000000 --- a/sim/i960/tconfig.in +++ /dev/null @@ -1,49 +0,0 @@ -/* I960 target configuration file. -*- C -*- */ - -/* See sim-hload.c. We properly handle LMA. */ -#define SIM_HANDLES_LMA 1 - -/* For MSPR support. FIXME: revisit. */ -#define WITH_DEVICES 1 - -/* FIXME: Revisit. */ -#ifdef HAVE_DV_SOCKSER -MODULE_INSTALL_FN dv_sockser_install; -#define MODULE_LIST dv_sockser_install, -#endif - -#if 0 -/* Enable watchpoints. */ -#define WITH_WATCHPOINTS 1 -#endif - -/* ??? Temporary hack until model support unified. */ -#define SIM_HAVE_MODEL - -/* Define this to enable the intrinsic breakpoint mechanism. */ -/* FIXME: may be able to remove SIM_HAVE_BREAKPOINT since it essentially - duplicates ifdef SIM_BREAKPOINT (right?) */ -#if 0 -#define SIM_HAVE_BREAKPOINTS -#define SIM_BREAKPOINT { 0x10, 0xf1 } -#define SIM_BREAKPOINT_SIZE 2 -#endif - -/* This is a global setting. Different cpu families can't mix-n-match -scache - and -pbb. However some cpu families may use -simple while others use - one of -scache/-pbb. */ -#define WITH_SCACHE_PBB 1 - -#if 0 -/* ??? This was obsoleted by the PBB code. */ -/* The semantic code should probably always use a switch(). - However, in case that's not possible in some circumstance, we allow - the target to choose. Perhaps this can be autoconf'd on whether the - switch is too big? I can't (yet) think of a reason for allowing the - user to choose, though the developer may certainly wish to. */ -#ifdef WANT_CPU_I960BASE -#define WITH_FAST 1 -#define WITH_SEM_SWITCH_FULL 0 -#define WITH_SEM_SWITCH_FAST 1 -#endif -#endif diff --git a/sim/i960/traps.c b/sim/i960/traps.c deleted file mode 100644 index 570fc95..0000000 --- a/sim/i960/traps.c +++ /dev/null @@ -1,214 +0,0 @@ -/* i960 exception, interrupt, and trap (EIT) support - Copyright (C) 1998, 1999 Free Software Foundation, Inc. - Contributed by Cygnus Solutions. - -This file is part of GDB, the GNU debugger. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ - -#include "sim-main.h" -#include "targ-vals.h" - -/* The semantic code invokes this for illegal (unrecognized) instructions. */ - -SEM_PC -sim_engine_invalid_insn (SIM_CPU *current_cpu, IADDR cia, SEM_PC vpc) -{ - SIM_DESC sd = CPU_STATE (current_cpu); - -#if 0 - if (STATE_ENVIRONMENT (sd) == OPERATING_ENVIRONMENT) - { - h_bsm_set (current_cpu, h_sm_get (current_cpu)); - h_bie_set (current_cpu, h_ie_get (current_cpu)); - h_bcond_set (current_cpu, h_cond_get (current_cpu)); - /* sm not changed */ - h_ie_set (current_cpu, 0); - h_cond_set (current_cpu, 0); - - h_bpc_set (current_cpu, cia); - - sim_engine_restart (CPU_STATE (current_cpu), current_cpu, NULL, - EIT_RSVD_INSN_ADDR); - } - else -#endif - sim_engine_halt (sd, current_cpu, NULL, cia, sim_stopped, SIM_SIGILL); - return vpc; -} - -/* Process an address exception. */ - -void -i960_core_signal (SIM_DESC sd, SIM_CPU *current_cpu, sim_cia cia, - unsigned int map, int nr_bytes, address_word addr, - transfer_type transfer, sim_core_signals sig) -{ -#if 0 - if (STATE_ENVIRONMENT (sd) == OPERATING_ENVIRONMENT) - { - h_bsm_set (current_cpu, h_sm_get (current_cpu)); - h_bie_set (current_cpu, h_ie_get (current_cpu)); - h_bcond_set (current_cpu, h_cond_get (current_cpu)); - /* sm not changed */ - h_ie_set (current_cpu, 0); - h_cond_set (current_cpu, 0); - - h_bpc_set (current_cpu, cia); - - sim_engine_restart (CPU_STATE (current_cpu), current_cpu, NULL, - EIT_ADDR_EXCP_ADDR); - } - else -#endif - sim_core_signal (sd, current_cpu, cia, map, nr_bytes, addr, - transfer, sig); -} - -/* Read/write functions for system call interface. */ - -static int -syscall_read_mem (host_callback *cb, struct cb_syscall *sc, - unsigned long taddr, char *buf, int bytes) -{ - SIM_DESC sd = (SIM_DESC) sc->p1; - SIM_CPU *cpu = (SIM_CPU *) sc->p2; - - return sim_core_read_buffer (sd, cpu, read_map, buf, taddr, bytes); -} - -static int -syscall_write_mem (host_callback *cb, struct cb_syscall *sc, - unsigned long taddr, const char *buf, int bytes) -{ - SIM_DESC sd = (SIM_DESC) sc->p1; - SIM_CPU *cpu = (SIM_CPU *) sc->p2; - - return sim_core_write_buffer (sd, cpu, write_map, buf, taddr, bytes); -} - -/* Trap support. - The result is the pc address to continue at. - Preprocessing like saving the various registers has already been done. */ - -USI -i960_trap (SIM_CPU *current_cpu, PCADDR pc, int num) -{ - SIM_DESC sd = CPU_STATE (current_cpu); - host_callback *cb = STATE_CALLBACK (sd); - -#ifdef SIM_HAVE_BREAKPOINTS - /* Check for breakpoints "owned" by the simulator first, regardless - of --environment. */ - if (num == TRAP_BREAKPOINT) - { - /* First try sim-break.c. If it's a breakpoint the simulator "owns" - it doesn't return. Otherwise it returns and let's us try. */ - sim_handle_breakpoint (sd, current_cpu, pc); - /* Fall through. */ - } -#endif - -#if 0 - /* ??? wilson, don't know what this does. */ - if (STATE_ENVIRONMENT (sd) == OPERATING_ENVIRONMENT) - { - /* The new pc is the trap vector entry. - We assume there's a branch there to some handler. */ - USI new_pc = EIT_TRAP_BASE_ADDR + num * 4; - return new_pc; - } -#endif - - switch (num) - { - default: - case TRAP_SYSCALL : - { - CB_SYSCALL s; - - CB_SYSCALL_INIT (&s); - s.func = num; - s.arg1 = a_i960_h_gr_get (current_cpu, 16); - s.arg2 = a_i960_h_gr_get (current_cpu, 17); - s.arg3 = a_i960_h_gr_get (current_cpu, 18); - - if (s.func == TARGET_SYS_exit) - { - sim_engine_halt (sd, current_cpu, NULL, pc, sim_exited, s.arg1); - } - - s.p1 = (PTR) sd; - s.p2 = (PTR) current_cpu; - s.read_mem = syscall_read_mem; - s.write_mem = syscall_write_mem; - cb_syscall (cb, &s); - /* ??? This stuff is probably wrong, but libgloss doesn't look at - these values, so it shouldn't matter. */ - a_i960_h_gr_set (current_cpu, 18, s.errcode); - a_i960_h_gr_set (current_cpu, 16, s.result); - a_i960_h_gr_set (current_cpu, 17, s.result2); - break; - } - - case TRAP_BREAKPOINT: - sim_engine_halt (sd, current_cpu, NULL, NULL_CIA, - sim_stopped, SIM_SIGTRAP); - break; - -#if 0 - /* ??? wilson, don't know what this does. */ - default : - { - USI new_pc = EIT_TRAP_BASE_ADDR + num * 4; - return new_pc; - } -#endif - } - - /* Fake an "rte" insn. */ - /* FIXME: Should duplicate all of rte processing. */ - return (pc & -4) + 4; -} - -/* Breakpoint support. - The result is the pc address to continue at. */ -/* ??? This is an editted copy of the above. */ - -USI -i960_breakpoint (SIM_CPU *current_cpu, PCADDR pc) -{ - SIM_DESC sd = CPU_STATE (current_cpu); - host_callback *cb = STATE_CALLBACK (sd); - -#ifdef SIM_HAVE_BREAKPOINTS - /* Check for breakpoints "owned" by the simulator first, regardless - of --environment. */ - if (num == TRAP_BREAKPOINT) - { - /* First try sim-break.c. If it's a breakpoint the simulator "owns" - it doesn't return. Otherwise it returns and let's us try. */ - sim_handle_breakpoint (sd, current_cpu, pc); - /* Fall through. */ - } -#endif - - sim_engine_halt (sd, current_cpu, NULL, NULL_CIA, - sim_stopped, SIM_SIGTRAP); - - /* Fake an "rte" insn. */ - /* FIXME: Should duplicate all of rte processing. */ - return (pc & -4) + 4; -} |